A five-dimensional conservative hyperchaotic system

Abstract

The present invention provides a five-dimensional conservative hyperchaotic system. The system model is implemented based on a five-dimensional conservative hyperchaotic circuit, which includes a first channel circuit, a second channel circuit, a third channel circuit, a fourth channel circuit, and a fifth channel circuit. The present invention can provide highly complex hyperchaotic signals and highly ergodic hyperchaotic phase diagrams, addressing the shortcomings of existing chaotic systems, such as poor pseudorandomness and limited ergodicity of phase diagrams, and improving cryptographic security.

Description

Technical Field

[0001] The present invention relates to a chaotic system applied in the field of encryption, and in particular to a five-dimensional conservative hyperchaotic system. Background Art

[0002] Chaos has characteristics such as initial value sensitivity, ergodicity, and unpredictability, and has great application value in the field of encryption. Current research on chaos mainly focuses on dissipative chaotic systems, but its attractors are easily reconstructed by attackers, resulting in the cracking of encryption systems and encryption algorithms. Chinese patent application number 202110595608.3 discloses "A conservative chaotic system and circuit with a dissipative term". Although this system can generate conservative chaos, it can only generate ordinary chaotic signals and has the defect of poor pseudo-randomness. At the same time, the ergodicity of the phase diagram generated is general, which cannot fully exert the advantages of conservative chaos and is easily cracked when applied in the field of encryption. Summary of the Invention

[0003] The present invention provides a five-dimensional conservative hyperchaotic system, aiming to provide a hyperchaotic signal with high complexity and a hyperchaotic phase diagram with high ergodicity, thereby solving the defects of poor pseudo-randomness and general ergodicity of the existing chaotic system and improving encryption security.

[0004] The technical means adopted in the present invention are as follows:

[0005] A five-dimensional conservative hyperchaotic system, wherein the model of the five-dimensional conservative hyperchaotic system is:

[0006]

[0007] Among them, x, y, z, w, and u are state variables;

[0008] The model of the five-dimensional conservative hyperchaotic system is implemented based on a five-dimensional conservative hyperchaotic circuit, which includes a first channel circuit, a second channel circuit, a third channel circuit, a fourth channel circuit, and a fifth channel circuit, wherein:

[0009] The first channel circuit includes a first analog multiplier, first to sixth resistors, first to third operational amplifiers, and a first capacitor;

[0010] The second channel circuit includes a second analog multiplier, seventh to twelfth resistors, fourth to sixth operational amplifiers, and a second capacitor;

[0011] The third channel circuit includes a third analog multiplier, thirteenth to seventeenth resistors, seventh to ninth operational amplifiers, and a third capacitor;

[0012] The fourth channel circuit includes a fourth analog multiplier, eighteenth to twenty-second resistors, tenth to twelfth operational amplifiers, and a fourth capacitor;

[0013] The fifth channel circuit includes a fifth analog multiplier, twenty-third to twenty-eighth resistors, thirteenth to fifteenth operational amplifiers, and a fifth capacitor.

[0014] Furthermore, in the first channel circuit:

[0015] The first analog multiplier has a -w signal and a u signal as inputs, and an output connected to the inverting input of the first operational amplifier via a first resistor. The left end of the second resistor is connected to the -y signal, and the right end is connected in parallel with the first resistor and then connected to the inverting input of the first operational amplifier.

[0016] The non-inverting input terminal of the first operational amplifier is grounded, and the third resistor connects the inverting input terminal and the output terminal of the first operational amplifier;

[0017] The non-inverting input terminal of the second operational amplifier is grounded, the inverting input terminal is connected to the output terminal of the first operational amplifier via a fourth resistor, and is further connected to the output terminal of the second operational amplifier via a first capacitor, and the output terminal is a -x signal;

[0018] The non-inverting input terminal of the third operational amplifier is grounded, and the inverting input terminal is connected to the output terminal of the second operational amplifier through the fifth resistor and is further connected to the output terminal of the third operational amplifier through the sixth resistor. The output terminal is the x signal.

[0019] Furthermore, in the second channel circuit:

[0020] The second analog multiplier has an input terminal connected to the -z signal and the u signal, and an output terminal connected to the inverting input terminal of the fourth operational amplifier via a seventh resistor. The left end of the eighth resistor is connected to the x signal, and the right end of the eighth resistor is connected in parallel with the seventh resistor and then connected to the inverting input terminal of the fourth operational amplifier.

[0021] The non-inverting input terminal of the fourth operational amplifier is grounded, and the ninth resistor connects the inverting input terminal and the output terminal of the fourth operational amplifier;

[0022] The non-inverting input terminal of the fifth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the fourth operational amplifier via a tenth resistor, and is further connected to the output terminal of the fifth operational amplifier via a second capacitor, and the output terminal is a -y signal;

[0023] The non-inverting input terminal of the sixth operational amplifier is grounded, and the inverting input terminal is connected to the output terminal of the fifth operational amplifier through the eleventh resistor, and is further connected to the output terminal of the sixth operational amplifier through the twelfth resistor. The output terminal is the y signal.

[0024] Furthermore, in the third channel circuit:

[0025] The input terminal of the third analog multiplier is the y signal and the u signal, and the output terminal is connected to the inverting input terminal of the seventh operational amplifier through the thirteenth resistor;

[0026] The non-inverting input terminal of the seventh operational amplifier is grounded, and the fourteenth resistor connects the inverting input terminal and the output terminal of the seventh operational amplifier;

[0027] The non-inverting input terminal of the eighth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the seventh operational amplifier via the fifteenth resistor, and is further connected to the output terminal of the eighth operational amplifier via the third capacitor, and the output terminal is a -z signal;

[0028] The non-inverting input terminal of the ninth operational amplifier is grounded, and the inverting input terminal is connected to the output terminal of the eighth operational amplifier through the sixteenth resistor and is further connected to the output terminal of the ninth operational amplifier through the seventeenth resistor. The output terminal is the z signal.

[0029] Furthermore, in the fourth channel circuit:

[0030] The input terminal of the fourth analog multiplier is the x signal and the u signal, and the output terminal is connected to the inverting input terminal of the tenth operational amplifier through the eighteenth resistor;

[0031] The non-inverting input terminal of the tenth operational amplifier is grounded, and the nineteenth resistor connects the inverting input terminal and the output terminal of the tenth operational amplifier;

[0032] The non-inverting input terminal of the eleventh operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the tenth operational amplifier via the twentieth resistor, and is further connected to the output terminal of the eleventh operational amplifier via the fourth capacitor, and the output terminal thereof is a -w signal;

[0033] The non-inverting input terminal of the twelfth operational amplifier is grounded, and the inverting input terminal is connected to the output terminal of the eleventh operational amplifier through the twenty-first resistor, and is further connected to the output terminal of the twelfth operational amplifier through the twenty-second resistor. The output terminal is the w signal.

[0034] Furthermore, in the fifth channel circuit:

[0035] The fifth analog multiplier has an input terminal receiving the x signal and the w signal, and an output terminal connected to the left end of the twenty-third resistor. The sixth analog multiplier has an input terminal receiving the y signal and the -z signal, and an output terminal connected to the left end of the twenty-fourth resistor. The right end of the twenty-third resistor and the right end of the twenty-fourth resistor are connected in parallel to the inverting input terminal of the thirteenth operational amplifier.

[0036] The non-inverting input terminal of the thirteenth operational amplifier is grounded, and the twenty-fifth resistor connects the inverting input terminal and the output terminal of the thirteenth operational amplifier;

[0037] The non-inverting input terminal of the fourteenth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the thirteenth operational amplifier via the twenty-sixth resistor, and is further connected to the output terminal of the fourteenth operational amplifier via the fifth capacitor, and the output terminal thereof is a -u signal;

[0038] The non-inverting input terminal of the fifteenth operational amplifier is grounded, and the inverting input terminal is connected to the output terminal of the fourteenth operational amplifier through the twenty-seventh resistor, and is further connected to the output terminal of the fifteenth operational amplifier through the twenty-eighth resistor. The output terminal is the u signal.

[0039] Compared with the prior art, the present invention has the following advantages:

[0040] The present invention provides a five-dimensional conservative hyperchaotic system that exhibits superior chaotic properties compared to conservative chaotic systems primarily based on three- and four-dimensional systems. This system is implemented using five circuit channels with similar structures. The resulting hyperchaotic signal exhibits high complexity, a phase diagram lacking attractors, and exhibits excellent ergodicity. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0042] Figure 1 This is the five-dimensional conservative hyperchaotic circuit diagram of the present invention.

[0043] Figure 2 FIG. 2 is a timing diagram of an X signal in an embodiment. FIG.

[0044] Figure 3 2 is a timing diagram of the Y signal in the embodiment.

[0045] Figure 4 2 is a timing diagram of the Z signal in the embodiment.

[0046] Figure 5 2 is a timing diagram of the W signal in the embodiment.

[0047] Figure 6 It is a timing diagram of the U signal in the embodiment.

[0048] Figure 7 It is the XY phase diagram in the embodiment.

[0049] Figure 8 It is the XZ phase diagram in the embodiment.

[0050] Figure 9 It is the XW phase diagram in the embodiment.

[0051] Figure 10 It is the XU phase diagram in the embodiment. DETAILED DESCRIPTION

[0052] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0053] like Figure 1 As shown, the present invention provides a five-dimensional conservative hyperchaotic system, the model of the system is:

[0054]

[0055] Among them, x, y, z, w, and u are state variables.

[0056] The model of the five-dimensional conservative hyperchaotic system is implemented based on a five-dimensional conservative hyperchaotic circuit, which includes a first channel circuit, a second channel circuit, a third channel circuit, a fourth channel circuit, and a fifth channel circuit, wherein: the first channel circuit includes a first analog multiplier, first to sixth resistors, first to third operational amplifiers, and a first capacitor; the second channel circuit includes a second analog multiplier, seventh to twelfth resistors, fourth to sixth operational amplifiers, and a second capacitor; the third channel circuit includes a third analog multiplier, thirteenth to seventeenth resistors, seventh to ninth operational amplifiers, and a third capacitor; the fourth channel circuit includes a fourth analog multiplier, eighteenth to twenty-second resistors, tenth to twelfth operational amplifiers, and a fourth capacitor; the fifth channel circuit includes a fifth analog multiplier, twenty-third to twenty-eighth resistors, thirteenth to fifteenth operational amplifiers, and a fifth capacitor. Specifically:

[0057] The inputs of the first analog multiplier A1 in the first channel circuit are the -w signal and the u signal, and the output is connected to the inverting input of the first operational amplifier U1 through the first resistor R1. The left end of the second resistor R2 is connected to the -y signal, and the right end is connected to the inverting input of the first operational amplifier U1 in parallel with the first resistor R1. The non-inverting input of the first operational amplifier U1 is grounded, and the third resistor R3 connects the inverting input and output of the first operational amplifier U1. The non-inverting input of the second operational amplifier U2 is grounded, and its inverting input is connected to the output of the first operational amplifier U1 through the fourth resistor R4, and is further connected to the output of the second operational amplifier U2 through the first capacitor C1. The output is the -x signal. The non-inverting input of the third operational amplifier U3 is grounded, and its inverting input is connected to the output of the second operational amplifier U2 through the fifth resistor R5, and is further connected to the output of the third operational amplifier U3 through the sixth resistor R6. The output is the x signal.

[0058] The second analog multiplier A2 in the second channel circuit has a -z signal and a u signal as inputs, and an output connected to the inverting input of the fourth operational amplifier U4 via a seventh resistor R7. The left end of the eighth resistor R8 is connected to the x signal, and the right end, in parallel with the seventh resistor R7, is connected to the inverting input of the fourth operational amplifier U4. The non-inverting input of the fourth operational amplifier U4 is grounded, and a ninth resistor R9 connects the inverting input to the output of the fourth operational amplifier U4. The non-inverting input of the fifth operational amplifier U5 is grounded, and its inverting input is connected to the output of the fourth operational amplifier U4 via a tenth resistor R10, and further connected to the output of the fifth operational amplifier U5 via a second capacitor C2. The output of the fifth operational amplifier U5 carries the -y signal. The non-inverting input of the sixth operational amplifier U6 is grounded, and its inverting input is connected to the output of the fifth operational amplifier U5 via an eleventh resistor R11, and further connected to the output of the sixth operational amplifier U6 via a twelfth resistor R12. The output of the sixth operational amplifier U6 carries the y signal.

[0059] The input end of the third analog multiplier A3 in the third channel circuit is the y signal and the u signal, and the output end is connected to the inverting input end of the seventh operational amplifier U7 through the thirteenth resistor R13. The non-inverting input end of the seventh operational amplifier U7 is grounded, and the fourteenth resistor R14 connects the inverting input end and the output end of the seventh operational amplifier U7; the non-inverting input end of the eighth operational amplifier U8 is grounded, and its inverting input end is connected to the output end of the seventh operational amplifier U7 through the fifteenth resistor R15, and is further connected to the output end of the eighth operational amplifier U8 through the third capacitor C3, and the output end is the -z signal; the non-inverting input end of the ninth operational amplifier U9 is grounded, and its inverting input end is connected to the output end of the eighth operational amplifier U8 through the sixteenth resistor R16, and is further connected to the output end of the ninth operational amplifier U9 through the seventeenth resistor R17, and the output end is the z signal.

[0060] The fourth analog multiplier A4 in the fourth channel circuit has inputs of the x signal and the u signal, and its output is connected to the inverting input of the tenth operational amplifier U10 via an eighteenth resistor R18. The non-inverting input of the tenth operational amplifier U10 is grounded, and a nineteenth resistor R19 connects the inverting input and output of the tenth operational amplifier U10. The non-inverting input of the eleventh operational amplifier U11 is grounded, its inverting input is connected to the output of the tenth operational amplifier U10 via a twentieth resistor R20, and is further connected to the output of the eleventh operational amplifier U11 via a fourth capacitor C4. Its output carries the -w signal. The twelfth operational amplifier U12 has a non-inverting input connected to ground, its inverting input is connected to the output of the eleventh operational amplifier U11 via a twenty-first resistor R21, and is further connected to the output of the twelfth operational amplifier U12 via a twenty-second resistor R22. Its output carries the w signal.

[0061] The input terminals of the fifth analog multiplier A5 in the fifth channel circuit are the x signal and the w signal, and the output terminal is connected to the left end of the twenty-third resistor R23. The input terminals of the sixth analog multiplier A6 are the y signal and the -z signal, and the output terminal is connected to the left end of the twenty-fourth resistor R24. The right end of the twenty-third resistor R23 and the right end of the twenty-fourth resistor R24 ​​are connected in parallel to the inverting input terminal of the thirteenth operational amplifier U13. The non-inverting input terminal of the thirteenth operational amplifier U13 is grounded. The twenty-fifth resistor R25 connects the inverting input terminal of the thirteenth operational amplifier U13 to the output terminal. The non-inverting input terminal of the fourteenth operational amplifier U14 is grounded, and the inverting input terminal thereof is connected to the output terminal of the thirteenth operational amplifier U13 through the twenty-sixth resistor R26, and is further connected to the output terminal of the fourteenth operational amplifier U14 through the fifth capacitor C5, and the output terminal is a -u signal; the non-inverting input terminal of the fifteenth operational amplifier U15 is grounded, and the inverting input terminal thereof is connected to the output terminal of the fourteenth operational amplifier U14 through the twenty-seventh resistor R27, and is further connected to the output terminal of the fifteenth operational amplifier U15 through the twenty-eighth resistor R28, and the output terminal is a u signal.

[0062] As a preferred embodiment of the present invention, the analog multipliers A1-A6 used in the present invention are all MULTIPLIER in Multisim software, with an output gain of 1V / V. The operational amplifiers U1-U15 are all TL082IP models, with an inverting power supply VDD = -15V and a non-inverting power supply VCC = 15V.

[0063] The values ​​of the resistors and capacitors are all in Figure 1 Marked in Chinese.

[0064] The working principle of the present invention is:

[0065] Taking the first channel circuit as an example, a first resistor R1 and a second resistor R2 are connected in parallel to the inverting input of the first operational amplifier U1, and the inverting input of the first operational amplifier U1 is connected to its output via a third resistor R3, forming an adding circuit. The inverting input of the second operational amplifier U2 is connected to the output of the first operational amplifier U1 via a fourth resistor R4, and is further connected to its output via a first capacitor C1, forming an integrating circuit to realize the -x signal. A fifth resistor R5 is connected to the inverting input of the third operational amplifier U3, and the inverting input of the third operational amplifier U3 is connected to its output via a sixth resistor R6, forming an inverter to convert the -x signal into an x ​​signal.

[0066] The working principles of other channel circuits are the same as those of the first channel circuit and will not be described in detail.

[0067] Figures 2 to 10 The effectiveness of the circuit of the present invention is proved. The phase diagram generated by the circuit of the present invention has no attractor and good ergodicity, and the generated hyperchaotic signal has irregular fluctuations, which conforms to the basic characteristics of hyperchaos.

[0068] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A five-dimensional conservative hyperchaotic system for encryption, characterized in that: The model of the five-dimensional conservative hyperchaotic system is: in, is a state variable; The model of the five-dimensional conservative hyperchaotic system is implemented based on a five-dimensional conservative hyperchaotic circuit, which includes a first channel circuit, a second channel circuit, a third channel circuit, a fourth channel circuit, and a fifth channel circuit, wherein: In the first channel circuit: The first analog multiplier has a -w signal and a u signal as inputs, and an output connected to the inverting input of the first operational amplifier via a first resistor. The left end of the second resistor is connected to the -y signal, and the right end is connected in parallel with the first resistor and then connected to the inverting input of the first operational amplifier. The non-inverting input terminal of the first operational amplifier is grounded, and the third resistor connects the inverting input terminal and the output terminal of the first operational amplifier; The non-inverting input terminal of the second operational amplifier is grounded, the inverting input terminal is connected to the output terminal of the first operational amplifier via a fourth resistor, and is further connected to the output terminal of the second operational amplifier via a first capacitor, and the output terminal is a -x signal; The non-inverting input terminal of the third operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the second operational amplifier via a fifth resistor, and is further connected to the output terminal of the third operational amplifier via a sixth resistor, and the output terminal thereof is an x ​​signal; In the second channel circuit: The second analog multiplier has an input terminal connected to the -z signal and the u signal, and an output terminal connected to the inverting input terminal of the fourth operational amplifier via a seventh resistor. The left end of the eighth resistor is connected to the x signal, and the right end of the eighth resistor is connected in parallel with the seventh resistor and then connected to the inverting input terminal of the fourth operational amplifier. The non-inverting input terminal of the fourth operational amplifier is grounded, and the ninth resistor connects the inverting input terminal and the output terminal of the fourth operational amplifier; The non-inverting input terminal of the fifth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the fourth operational amplifier via a tenth resistor, and is further connected to the output terminal of the fifth operational amplifier via a second capacitor, and the output terminal is a -y signal; The non-inverting input terminal of the sixth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the fifth operational amplifier via an eleventh resistor, and is further connected to the output terminal of the sixth operational amplifier via a twelfth resistor, and the output terminal is a y signal; In the third channel circuit: The input terminal of the third analog multiplier is the y signal and the u signal, and the output terminal is connected to the inverting input terminal of the seventh operational amplifier through the thirteenth resistor; The non-inverting input terminal of the seventh operational amplifier is grounded, and the fourteenth resistor connects the inverting input terminal and the output terminal of the seventh operational amplifier; The non-inverting input terminal of the eighth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the seventh operational amplifier via the fifteenth resistor, and is further connected to the output terminal of the eighth operational amplifier via the third capacitor, and the output terminal is a -z signal; The non-inverting input terminal of the ninth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the eighth operational amplifier via a sixteenth resistor, and is further connected to the output terminal of the ninth operational amplifier via a seventeenth resistor, and the output terminal is a z signal; In the fourth channel circuit: The input terminal of the fourth analog multiplier is the x signal and the u signal, and the output terminal is connected to the inverting input terminal of the tenth operational amplifier through the eighteenth resistor; The non-inverting input terminal of the tenth operational amplifier is grounded, and the nineteenth resistor connects the inverting input terminal and the output terminal of the tenth operational amplifier; The non-inverting input terminal of the eleventh operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the tenth operational amplifier via the twentieth resistor, and is further connected to the output terminal of the eleventh operational amplifier via the fourth capacitor, and the output terminal thereof is a -w signal; The non-inverting input terminal of the twelfth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the eleventh operational amplifier via a twenty-first resistor, and is further connected to the output terminal of the twelfth operational amplifier via a twenty-second resistor, and the output terminal thereof is a w signal; In the fifth channel circuit: The fifth analog multiplier has an input terminal receiving the x signal and the w signal, and an output terminal connected to the left end of the twenty-third resistor. The sixth analog multiplier has an input terminal receiving the y signal and the -z signal, and an output terminal connected to the left end of the twenty-fourth resistor. The right end of the twenty-third resistor and the right end of the twenty-fourth resistor are connected in parallel to the inverting input terminal of the thirteenth operational amplifier. The non-inverting input terminal of the thirteenth operational amplifier is grounded, and the twenty-fifth resistor connects the inverting input terminal and the output terminal of the thirteenth operational amplifier; The non-inverting input terminal of the fourteenth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the thirteenth operational amplifier via the twenty-sixth resistor, and is further connected to the output terminal of the fourteenth operational amplifier via the fifth capacitor, and the output terminal thereof is a -u signal; The non-inverting input terminal of the fifteenth operational amplifier is grounded, the inverting input terminal thereof is connected to the output terminal of the fourteenth operational amplifier via the twenty-seventh resistor, and is further connected to the output terminal of the fifteenth operational amplifier via the twenty-eighth resistor, and the output terminal is a u signal; The hyperchaotic signal phase diagram generated based on the five-dimensional conservative hyperchaotic system has no attractor.

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