High-amplitude, high-repetition-rate subnanosecond pulse source based on avalanche tube parallel incremental structure

Abstract

This invention discloses a high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche transistors, comprising: sequentially connecting a first microstrip line T1, a charging capacitor C1, a second microstrip line T2, and an avalanche transistor Q1; connecting the avalanche transistor Q1 to a third microstrip line T3; sequentially connecting the third microstrip line T3, a charging capacitor C2, a fourth microstrip line T4, and the avalanche transistor Q2; and connecting the charging capacitors C2 and C1 to a power supply E. c Connection. This invention, through the use of a parallel incremental structure of avalanche diodes, effectively increases the current-carrying capacity of a high-amplitude pulse source while minimizing the adverse effects of increased microstrip line width on the output pulse waveform. Furthermore, the parallel incremental structure of avalanche diodes reduces the number of avalanche diodes required, saving costs.

Description

Technical Field

[0001] This invention belongs to the field of electromagnetic pulse technology and relates to a high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes. Background Technology

[0002] Subnanosecond pulses, characterized by rapid rise time, short pulse duration, and wide spectral coverage, are widely used in ultra-wideband radar, ultra-wideband communication, and intentional electromagnetic interference. The amplitude of the ultra-wideband radiated electric field is positively correlated with the steepness of the subnanosecond excitation pulse; therefore, the output pulse amplitude of the pulse source should be maximized while minimizing its rise time. In practical applications, the pulse repetition frequency is also a crucial parameter of the pulse source. For instance, in intentional electromagnetic interference applications, electronic systems are more susceptible to interference and even damage under the influence of high-repetition-rate pulses.

[0003] Currently, the fast switches used in sub-nanosecond pulse source circuits are mainly divided into two types: gas switches and semiconductor switches. Compared with pulse sources based on gas switches, semiconductor switch pulse sources have advantages such as high pulse repetition frequency, high waveform stability, and small size and weight. However, their output power is often limited by the power capacity of semiconductor switching devices. Avalanche transistors, as a common semiconductor switching device, have advantages such as easy cascading, fast switching speed, long lifespan, and low jitter. Therefore, since the advent of avalanche transistors, many scholars at home and abroad have carried out research on nanosecond or sub-nanosecond pulse sources based on avalanche transistors, and the designed and developed pulse sources have been applied in many research fields.

[0004] Marx circuits are commonly used in avalanche diode pulse sources. Their operating principle involves parallel charging and series discharging of capacitors. To increase the peak power of the output pulse source, the number of Marx circuit stages needs to be increased, which leads to a corresponding increase in the physical size of the pulse source, sometimes even comparable to the electrical length of the output pulse. In this case, the pulse source circuit must be considered as a distributed parameter circuit, taking into account the influence of PCB circuit board parameters on the output pulse waveform. Furthermore, as the pulse amplitude increases, the pulse current flowing through each stage of the avalanche diodes in the Marx circuit also increases. However, avalanche diodes have limited current handling capacity (their peak current handling capacity is 60A under a 20ns pulse width). When the output pulse amplitude is too high, the current flowing through the avalanche diodes may exceed their current handling capacity, damaging the pulse source. This is one of the important reasons limiting the peak power of the avalanche diode output pulse. Therefore, it is necessary to improve the current-carrying capacity of the avalanche diode pulse source. Summary of the Invention

[0005] The purpose of this invention is to solve the problem in the prior art where the output pulse amplitude is too high, and the current flowing through the avalanche tube may exceed its current-bearing capacity, causing damage to the pulse source. The invention provides a high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes.

[0006] To achieve the above objectives, the present invention employs the following technical solution:

[0007] A high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes includes: a pulse triggering unit and a power supply E. c ;

[0008] The pulse triggering unit includes a first-stage pulse triggering unit, an intermediate pulse triggering unit, and a final-stage pulse triggering unit; these units are connected sequentially, with several intermediate pulse triggering units; power supply E c It is connected to the first-stage pulse trigger unit, intermediate pulse trigger unit, and final-stage pulse trigger unit for power supply; the first-stage pulse trigger unit is connected to an external control signal source to receive control signals; the first-stage pulse trigger unit provides pulse voltage to the intermediate pulse trigger unit and the final-stage pulse trigger unit, and the pulse voltage of the intermediate pulse trigger unit is superimposed with the pulse voltage of the previous pulse trigger unit and transmitted to the next pulse trigger unit; the final-stage pulse trigger unit is connected to an external microstrip line, and the microstrip line is connected to an external resistor R. L resistance R L Grounding;

[0009] The primary pulse triggering unit includes a charging capacitor C1, an avalanche transistor Q1, a first microstrip line T1, and a second microstrip line T2; the intermediate pulse triggering unit includes a charging capacitor C2, an avalanche transistor Q2, a third microstrip line T3, and a fourth microstrip line T4.

[0010] The first microstrip line T1, charging capacitor C1, the second microstrip line T2, and avalanche transistor Q1 are connected in sequence; avalanche transistor Q1 is connected to the third microstrip line T3; the third microstrip line T3, charging capacitor C2, the fourth microstrip line T4, and avalanche transistor Q2 are connected in sequence; charging capacitor C2 and charging capacitor C1 are respectively connected to power supply E. c Connections: The first microstrip line T1, the second microstrip line T2, the third microstrip line T3, and the fourth microstrip line T4 are all grounded at both ends.

[0011] A further improvement of the present invention is that:

[0012] Furthermore, the primary pulse triggering unit also includes: capacitor C0, resistor R0, and resistor R1; the first microstrip line T1, charging capacitor C1, second microstrip line T2, and avalanche transistor Q1 are connected in sequence, specifically as follows:

[0013] One end of the first microstrip line T1 is grounded, and the other end of the first microstrip line T1 is connected to one end of the charging capacitor C1. The other end of the charging capacitor C1 is connected to one end of the second microstrip line T2 and the power supply E, respectively. cThe other end of the second microstrip line T2 is connected to the collector of avalanche transistor Q1; the base of avalanche transistor Q1 is connected to one end of resistor R0 and one end of capacitor C0, respectively, and the other end of resistor R0 is connected to the emitter of avalanche transistor; the other end of capacitor C0 and the other end of resistor R0 are connected to an external control signal source; the emitter of avalanche transistor Q1 is connected to the intermediate pulse trigger unit and one end of resistor R1, respectively, and the other end of resistor R1 is grounded.

[0014] Furthermore, the intermediate pulse triggering unit and the final stage pulse triggering unit have the same structure.

[0015] Furthermore, the intermediate pulse triggering unit also includes resistor R2; the third microstrip line T3, charging capacitor C2, fourth microstrip line T4, and avalanche transistor Q2 are connected in sequence, specifically as follows:

[0016] One end of the third microstrip line T3 is connected to the emitter of the avalanche transistor Q1, and the other end of the third microstrip line T3 is connected to one end of the charging capacitor C2. The other end of the charging capacitor C2 is connected to one end of the fourth microstrip line T4 and the power supply E. c The other end of the fourth microstrip line T4 is connected to the collector of avalanche transistor Q2; the base of avalanche transistor Q2 is grounded through resistor R2; the emitter of avalanche transistor Q2 is connected to the microstrip line of the next intermediate pulse trigger unit; the emitter of avalanche transistor Q2 is connected to the base.

[0017] Furthermore, a microstrip line is externally connected to the final stage pulse trigger unit, and an external resistor R is connected to the microstrip line. L resistance R L Grounding, specifically:

[0018] The avalanche transistor in the final stage pulse trigger unit is connected to a microstrip line, and the microstrip line is connected to an external resistor R. L resistance R L Grounded; the microstrip line connected to the avalanche transistor of the final stage pulse trigger unit is grounded at both ends.

[0019] Furthermore, the lengths of the first microstrip line T1, the second microstrip line T2, the third microstrip line T3, and the fourth microstrip line T4 are 1 mm.

[0020] Furthermore, the primary pulse triggering unit is connected to an external control signal source, specifically: the control signal source is a square wave signal source or a narrow pulse signal source.

[0021] Furthermore, power supply E c It is a DC power supply.

[0022] Furthermore, power supply E c One end of the battery is connected to resistor R3, and resistor R3 is connected to the other end of charging capacitor C1; battery E cOne end of the capacitor is connected to resistor R4, and resistor R4 is connected to the other end of the charging capacitor C2.

[0023] Furthermore, resistors R1, R2, R3, R4, and R... L Same model.

[0024] Compared with the prior art, the present invention has the following beneficial effects:

[0025] This invention connects a first microstrip line T1, a charging capacitor C1, a second microstrip line T2, and an avalanche transistor Q1 in sequence; the avalanche transistor Q1 is connected to a third microstrip line T3; the third microstrip line T3, a charging capacitor C2, a fourth microstrip line T4, and the avalanche transistor Q2 are connected in sequence; the charging capacitors C2 and C1 are respectively connected to a power supply E. c Connection. This invention, through the use of a parallel incremental structure of avalanche diodes, effectively increases the current-carrying capacity of a high-amplitude pulse source while minimizing the adverse effects of increased microstrip line width on the output pulse waveform. Furthermore, the parallel incremental structure of avalanche diodes reduces the number of avalanche diodes required, saving costs. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 Marx circuit diagram for avalanche diode considering the effects of interstage microstrip lines;

[0028] Figure 2 The equivalent low-pass filter circuit structure diagram for the pulse forming circuit;

[0029] Figure 3 The structural diagram of the 80-level pulse source prototype used in the embodiments of the present invention;

[0030] Figure 4 This is a waveform diagram of a single sub-nanosecond pulse generated by the prototype of an embodiment of the present invention;

[0031] Figure 5 The sub-nanosecond pulse waveform at a repetition rate of 100kHz is shown in the prototype of the embodiment of the present invention.

[0032] Among them, 1-first stage pulse triggering unit; 2-intermediate pulse triggering unit; 3-final stage pulse triggering unit. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0034] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0035] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0036] In the description of the embodiments of the present invention, it should be noted that if terms such as "upper," "lower," "horizontal," or "inner" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention. Furthermore, terms such as "first" and "second" are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0037] Furthermore, the use of the term "horizontal" does not imply that the component must be absolutely horizontal, but rather that it can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0038] In the description of the embodiments of the present invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in the present invention according to the specific circumstances.

[0039] The present invention will now be described in further detail with reference to the accompanying drawings:

[0040] See Figure 1 This invention discloses a high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes, comprising:

[0041] A high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes includes: a pulse triggering unit and a power supply E. c ;

[0042] The pulse triggering unit includes a first-stage pulse triggering unit 1, an intermediate-stage pulse triggering unit 2, and a final-stage pulse triggering unit 3; the first-stage pulse triggering unit 1, the intermediate-stage pulse triggering unit 2, and the final-stage pulse triggering unit 3 are connected sequentially, and there are several intermediate-stage pulse triggering units 2; power supply E c The system is connected to the first-stage pulse trigger unit 1, the intermediate-stage pulse trigger unit 2, and the final-stage pulse trigger unit 3 for power supply. The first-stage pulse trigger unit 1 is connected to an external control signal source to receive control signals. The first-stage pulse trigger unit 1 provides pulse voltages to the intermediate-stage pulse trigger unit 2 and the final-stage pulse trigger unit 3. The pulse voltage of the intermediate-stage pulse trigger unit 2 is superimposed with the pulse voltage of the previous pulse trigger unit and transmitted to the next pulse trigger unit. The final-stage pulse trigger unit 3 is connected to an external microstrip line, and the microstrip line is connected to an external resistor R. L resistance R L Grounding;

[0043] The primary pulse triggering unit 1 includes a charging capacitor C1, an avalanche transistor Q1, a first microstrip line T1, and a second microstrip line T2; the intermediate pulse triggering unit 2 includes a charging capacitor C2, an avalanche transistor Q2, a third microstrip line T3, and a fourth microstrip line T4.

[0044] The first microstrip line T1, charging capacitor C1, the second microstrip line T2, and avalanche transistor Q1 are connected in sequence; avalanche transistor Q1 is connected to the third microstrip line T3; the third microstrip line T3, charging capacitor C2, the fourth microstrip line T4, and avalanche transistor Q2 are connected in sequence; charging capacitor C2 and charging capacitor C1 are respectively connected to power supply E. c Connections: The first microstrip line T1, the second microstrip line T2, the third microstrip line T3, and the fourth microstrip line T4 are all grounded at both ends.

[0045] The primary pulse trigger unit 1 also includes: capacitor C0, resistor R0, and resistor R1; the first microstrip line T1, charging capacitor C1, second microstrip line T2, and avalanche transistor Q1 are connected in sequence, specifically as follows:

[0046] One end of the first microstrip line T1 is grounded, and the other end of the first microstrip line T1 is connected to one end of the charging capacitor C1. The other end of the charging capacitor C1 is connected to one end of the second microstrip line T2 and the power supply E, respectively. cThe other end of the second microstrip line T2 is connected to the collector of avalanche transistor Q1; the base of avalanche transistor Q1 is connected to one end of resistor R0 and one end of capacitor C0, respectively, and the other end of resistor R0 is connected to the emitter of avalanche transistor; the other end of capacitor C0 and the other end of resistor R0 are connected to an external control signal source; the emitter of avalanche transistor Q1 is connected to the intermediate pulse trigger unit and one end of resistor R1, respectively, and the other end of resistor R1 is grounded.

[0047] The intermediate stage pulse triggering unit 2 and the final stage pulse triggering unit 3 have the same structure.

[0048] The intermediate stage pulse trigger unit 2 also includes a resistor R2; the third microstrip line T3, the charging capacitor C2, the fourth microstrip line T4, and the avalanche transistor Q2 are connected in sequence, specifically as follows:

[0049] One end of the third microstrip line T3 is connected to the emitter of the avalanche transistor Q1, and the other end of the third microstrip line T3 is connected to one end of the charging capacitor C2. The other end of the charging capacitor C2 is connected to one end of the fourth microstrip line T4 and the power supply E. c The other end of the fourth microstrip line T4 is connected to the collector of avalanche transistor Q2; the base of avalanche transistor Q2 is grounded through resistor R2; the emitter of avalanche transistor Q2 is connected to the microstrip line of the next intermediate pulse trigger unit; the emitter of avalanche transistor Q2 is connected to the base.

[0050] The final stage pulse trigger unit 3 is connected to a microstrip line, and the microstrip line is connected to an external resistor R. L resistance R L Grounding, specifically:

[0051] The avalanche transistor in the final stage pulse trigger unit 3 is connected to a microstrip line, and the microstrip line is connected to an external resistor R. L resistance R L Grounded; the microstrip line connected to the avalanche transistor of the final stage pulse trigger unit is grounded at both ends.

[0052] The lengths of the first microstrip line T1, the second microstrip line T2, the third microstrip line T3, and the fourth microstrip line T4 are 1 mm.

[0053] The primary pulse trigger unit is connected to an external control signal source, specifically a square wave signal source or a narrow pulse signal source. Power supply E c It is a DC power supply. Power supply E c One end of the battery is connected to resistor R3, and resistor R3 is connected to the other end of charging capacitor C1; battery E c One end of the capacitor is connected to resistor R4, and resistor R4 is connected to the other end of the charging capacitor C2.

[0054] Resistors R1, R2, R3, R4 and R L Same model.

[0055] Due to the unique nature of sub-nanosecond pulses generated by avalanche tube pulse sources, the pulse source circuit is considered as a distributed parameter circuit, taking into account the influence of the pulse traveling wave process. Figure 1 In the Marx circuit diagram for avalanche transistors considering the influence of interstage microstrip lines, when avalanche transistor Q1 is triggered, charging capacitor C1 begins to discharge through the second microstrip line T2, generating a discharge pulse. When this discharge pulse reaches avalanche transistor Q2, Q2 conducts due to overvoltage, and charging capacitor C2 begins to discharge. The discharge pulse of charging capacitor C2 superimposes with the traveling wave pulse from the previous stage, forming a larger traveling wave pulse. As the traveling wave pulse propagates to subsequent stages, the avalanche transistors in those stages gradually conduct due to overvoltage, and the amplitude of the traveling wave pulse is supplemented by the discharge pulses from each stage of the capacitors. Simultaneously, the capacitors in each stage of the triggered Marx circuit continuously discharge, and their voltages decay over time. Ultimately, the output pulse of the pulse source is the superposition of the traveling wave pulse propagating to the load and the residual discharge voltage of each stage of the capacitors at the moment of pulse arrival. To obtain a high-amplitude pulse, the loss of the traveling wave pulse during transmission should be minimized, and the residual discharge voltage of each stage of the capacitors should be increased.

[0056] During the transmission to subsequent stages, the attenuation of the traveling ripple pulse is mainly composed of two parts. Firstly, a portion of the pulse current will pass through resistors R1, R2, R3, and R4. Secondly, due to the inherent losses of the PCB circuit board, the amplitude of the traveling ripple pulse will also attenuate. To reduce the shunting of the traveling ripple pulse, the isolation capability of the Marx circuit should be increased. Therefore, this pulse source adopts a "resistor-bead inductor" series structure as a new isolation structure. The bead inductor exhibits low resistance under DC charging current but high resistance to high-frequency pulse current. Thus, this structure can increase the isolation capability of the pulse source without affecting the pulse repetition frequency.

[0057] The inherent losses of a PCB circuit board are mainly due to dielectric losses, with a dielectric loss attenuation constant of α. d , is represented as:

[0058]

[0059] In the formula: tanδ is the dielectric loss tangent of the dielectric layer, λ g ε is the traveling wave wavelength / m. r ε is the dielectric constant of the dielectric substrate. e Let be the effective dielectric constant of the dielectric substrate. The effective relative dielectric constant is used to characterize the dielectric properties of non-uniform dielectrics and can be expressed as:

[0060]

[0061] In the formula: h is the dielectric layer thickness / mm, and w is the microstrip line width / mm.

[0062] From equations (1) and (2), it can be seen that as the interstage microstrip linewidth w increases, the dielectric loss attenuation constant α... d This will increase the losses in the pulse source circuit, which is detrimental to the amplitude of the output pulse.

[0063] The residual voltage U of each capacitor discharge stage r It can be represented as:

[0064]

[0065] In the formula: U0 is the initial voltage of the charging capacitor (V), which is equal to the DC supply voltage; C represents the charging capacitors C1, C2, and the pulse module; R is the characteristic impedance of the interstage microstrip line (Ω); t d The duration (in seconds) from the start of capacitor discharge to the transmission of its discharge pulse to the load.

[0066] According to formula (3), in order to improve the residual voltage U of charging capacitor C1, charging capacitor C2 and the charging capacitor of the pulse module r The characteristic impedance R of the interstage microstrip line should be increased as much as possible. According to the characteristic impedance formula of microstrip lines, the larger the width of the microstrip line, the smaller its characteristic impedance value. This will increase the residual voltage U of each stage capacitor. r Decrease.

[0067] from Figure 1 As can be seen, after the avalanche transistor is turned on, the traveling wave pulse propagates to the next stage along the pulse forming circuit composed of the avalanche transistor, the interstage microstrip line, and the charging capacitor. In the pulse forming circuit, the microstrip line-charging capacitor-microstrip line-avalanche transistor form an alternating unit; this structure can be considered a multi-section microstrip line low-pass filter, and its equivalent circuit is shown below. Figure 2 As shown, the cutoff frequency f of this low-pass filter c satisfy:

[0068]

[0069] The filter inductance L of this filter is mainly determined by the characteristics of the avalanche diode device, while the filter capacitor C is related to the interstage microstrip line capacitance C. T Positively correlated, the filter capacitor C is Figure 2 The capacitance of the interstage microstrip line C T It can be represented as:

[0070]

[0071] In the formula: ε0 is the vacuum permittivity, l T C represents the length of the interstage microstrip line. T These are the charging capacitors C1, C2, and the charging capacitor for the pulse module.

[0072] According to formula (5), as the interstage microstrip line width w increases, the low-pass filter capacitor C will increase accordingly, and the cutoff frequency f c This will decrease. Therefore, the filtering effect removes more high-frequency components from the output pulse, causing the output pulse leading edge to slow down. From the above analysis, it can be concluded that increasing the width of the interstage microstrip line will decrease the amplitude of the output pulse and slow down its leading edge. Therefore, in the design of pulse sources, the width of the interstage microstrip line should be minimized as much as possible.

[0073] As the output pulse amplitude increases, the pulse current flowing through the avalanche diodes also increases. However, the avalanche diodes have limited current handling capacity, which may damage the pulse source. Parallel avalanche diode structures are often used to improve the current-carrying capacity of the pulse source, but the width of the interstage microstrip line also needs to be increased accordingly to accommodate multiple parallel avalanche diodes. As analyzed above, this is not conducive to the generation of high-amplitude, fast-leading-edge pulses. According to traveling-wave pulse theory, as the pulse current propagates to the next stage, the amplitude of the traveling-wave current continuously increases, and the current flowing through the next stage of the Marx circuit is greater than the current flowing through the previous stage. Therefore, this invention proposes a parallel incremental avalanche diode structure, where the number of parallel avalanche diodes gradually increases as the number of pulse source stages increases, and the width of the corresponding interstage microstrip line corresponds to the number of parallel avalanche diodes.

[0074] The pulse source circuit is a multi-stage Marx circuit. Each stage includes several parallel avalanche transistors and a corresponding number of parallel charging capacitors, with the charging capacitors and avalanche transistors positioned accordingly. The number of parallel avalanche transistors increases with the number of Marx circuit stages.

[0075] Marx circuit isolation structure includes an isolation resistor and a ferrite bead inductor.

[0076] The interstage microstrip line length is approximately 1 mm, which is the minimum microstrip line length determined by the package size of the surface-mount capacitors and avalanche diodes. The width of the interstage microstrip line is determined by the package size of the parallel avalanche diodes. The width of the microstrip line in the transition stage gradually increases to avoid impedance discontinuities caused by abrupt changes in microstrip line width.

[0077] The Marx circuit is powered by a DC power supply, and the control signal for the trigger circuit is a square wave signal source or a narrow pulse signal source.

[0078] The pulse source input and output terminals are both RF connectors, exhibiting excellent high-frequency characteristics.

[0079] See Figure 3This invention employs an 80-stage Marx circuit, using polytetrafluoroethylene (PTFE) as the circuit board material. The dielectric constant is 2.2, the loss tangent is less than 0.001, and the copper thickness is 3 oz. Each stage capacitor is charged via ferrite beads and surface-mount resistors, with an avalanche transistor acting as a switch between two stages. The charging capacitor and the corresponding avalanche transistor together form an "avalanche transistor-capacitor" unit, with units in parallel within the same stage. The first 20 stages of this pulse source circuit each have a fixed "avalanche transistor-capacitor" unit, with an inter-stage microstrip line characteristic impedance of 50Ω and a corresponding width of approximately 3mm, just large enough to accommodate one avalanche transistor. In stages 21-50, the microstrip line width is approximately 6mm, with two parallel units fixed per stage. In stages 51-80, each stage has three parallel units, with a corresponding microstrip width of approximately 9mm. To reduce impedance discontinuities caused by abrupt changes in inter-stage microstrip line width, the width of the inter-stage microstrip line increases progressively in stages 19, 20, 49, and 50. The trigger signal of the pulse source is input via a coaxial cable through an SMA connector, and the output pulse is output via an N-type RF connector.

[0080] See Figure 4 The output waveform of the 80-level pulse source prototype designed in this invention was measured using a high-sampling oscilloscope and a coaxial attenuator. The output pulse amplitude reached 6.00kV, and the pulse rise time (10%-90%) was approximately 142ps. In steady-state mode, the pulse repetition frequency reached 50kHz, and in burst mode, the pulse repetition frequency reached 100kHz. Figure 5 As shown.

[0081] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes, characterized in that, include: Pulse trigger unit and power supply E c ; The pulse triggering unit includes a first-stage pulse triggering unit (1), an intermediate pulse triggering unit (2), and a final-stage pulse triggering unit (3); the first-stage pulse triggering unit (1), the intermediate pulse triggering unit (2), and the final-stage pulse triggering unit (3) are connected in sequence, and there are several intermediate pulse triggering units (2); the power supply E c It is connected to the first-stage pulse triggering unit (1), the intermediate pulse triggering unit (2) and the final-stage pulse triggering unit (3) respectively for power supply; The primary pulse triggering unit (1) is connected to an external control signal source to receive control signals; The first-stage pulse triggering unit (1) provides pulse voltage to the intermediate pulse triggering unit (2) and the final-stage pulse triggering unit (3). The pulse voltage of the intermediate pulse triggering unit (2) is superimposed with the pulse voltage of the previous pulse triggering unit and transmitted to the next pulse triggering unit. The final stage pulse triggering unit (3) is externally connected to a microstrip line, and the microstrip line is externally connected to a resistor R. L resistance R L Grounding; The primary pulse triggering unit (1) includes a charging capacitor C1, an avalanche transistor Q1, a first microstrip line T1, and a second microstrip line T2; the intermediate pulse triggering unit (2) includes a charging capacitor C2, an avalanche transistor Q2, a third microstrip line T3, and a fourth microstrip line T4. The first microstrip line T1, charging capacitor C1, second microstrip line T2, and avalanche transistor Q1 are connected sequentially; the avalanche transistor Q1 is connected to the third microstrip line T3; the third microstrip line T3, charging capacitor C2, fourth microstrip line T4, and avalanche transistor Q2 are connected sequentially; charging capacitor C2 and charging capacitor C1 are respectively connected to power supply E. c Connections: The first microstrip line T1, the second microstrip line T2, the third microstrip line T3, and the fourth microstrip line T4 are all grounded at both ends.

2. The high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes according to claim 1, characterized in that, The primary pulse triggering unit (1) further includes: capacitor C0, resistor R0, and resistor R1; the first microstrip line T1, charging capacitor C1, second microstrip line T2, and avalanche transistor Q1 are connected in sequence, specifically as follows: One end of the first microstrip line T1 is grounded, and the other end of the first microstrip line T1 is connected to one end of the charging capacitor C1. The other end of the charging capacitor C1 is connected to one end of the second microstrip line T2 and the power supply E. c The other end of the second microstrip line T2 is connected to the collector of the avalanche transistor Q1; the base of the avalanche transistor Q1 is connected to one end of the resistor R0 and one end of the capacitor C0, and the other end of the resistor R0 is connected to the emitter of the avalanche transistor; the other end of the capacitor C0 and the other end of the resistor R0 are connected to an external control signal source; the emitter of the avalanche transistor Q1 is connected to the intermediate pulse trigger unit and one end of the resistor R1, and the other end of the resistor R1 is grounded.

3. The high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes according to claim 2, characterized in that, The intermediate pulse triggering unit (2) and the final pulse triggering unit (3) have the same structure.

4. The high-amplitude, high-repetition-rate sub-nanosecond pulse source based on avalanche tube parallel incremental structure according to claim 3, characterized in that, The intermediate pulse triggering unit (2) also includes a resistor R2; the third microstrip line T3, the charging capacitor C2, the fourth microstrip line T4, and the avalanche transistor Q2 are connected in sequence, specifically as follows: One end of the third microstrip line T3 is connected to the emitter of the avalanche transistor Q1, and the other end of the third microstrip line T3 is connected to one end of the charging capacitor C2. The other end of the charging capacitor C2 is connected to one end of the fourth microstrip line T4 and the power supply E. c The other end of the fourth microstrip line T4 is connected to the collector of the avalanche transistor Q2; the base of the avalanche transistor Q2 is grounded through resistor R2; the emitter of the avalanche transistor Q2 is connected to the microstrip line of the next intermediate pulse trigger unit; the emitter of the avalanche transistor Q2 is connected to the base.

5. The high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes according to claim 4, characterized in that, The final stage pulse triggering unit (3) is externally connected to a microstrip line, and the microstrip line is externally connected to a resistor R. L resistance R L Grounding, specifically: The avalanche transistor of the final stage pulse triggering unit (3) is externally connected to a microstrip line, and the microstrip line is externally connected to a resistor R. L resistance R L Grounded; the microstrip line connected to the avalanche transistor of the final stage pulse triggering unit is grounded at both ends.

6. The high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes according to claim 5, characterized in that, The lengths of the first microstrip line T1, the second microstrip line T2, the third microstrip line T3, and the fourth microstrip line T4 are 1 mm.

7. The high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes according to claim 6, characterized in that, The primary pulse triggering unit is connected to an external control signal source, specifically: the control signal source is a square wave signal source or a narrow pulse signal source.

8. The high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes according to claim 7, characterized in that, The power supply E c It is a DC power supply.

9. The high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes according to claim 8, characterized in that, The power supply E c One end of the power supply is connected to resistor R3, and resistor R3 is connected to the other end of charging capacitor C1; the power supply E c One end of the capacitor is connected to resistor R4, and resistor R4 is connected to the other end of charging capacitor C2.

10. The high-amplitude, high-repetition-rate sub-nanosecond pulse source based on a parallel incremental structure of avalanche tubes according to claim 9, characterized in that, The resistors R1, R2, R3, R4 and R L Same model.

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