Phase change memory and method of manufacturing the same

Abstract

This invention relates to a phase-change memory (PCM) and its fabrication method. The PCM comprises a substrate (1) and several electrode units. Each electrode unit, from bottom to top, includes a blade electrode layer (2), a phase-change material layer (3), a first adhesive layer (4), a gate material layer (5), a second adhesive layer (6), and a top electrode layer (7). Trenches are formed between the electrode units. A barrier layer (8) is deposited on the surface of each electrode unit. A dielectric layer (9) fills the trenches between the electrode units. The structure of this invention can effectively improve the performance and capacity of the PCM, while providing a corresponding low-etching-damage fabrication method to obtain this structure, thus possessing good market application prospects.

Description

Technical Field

[0001] This invention belongs to the field of computer memory, and specifically relates to a phase-change memory and its preparation method. Background Technology

[0002] At the beginning of this century, solid-state flash memory (NAND) filled the performance gap between dynamic random access memory (DRAM) and hard disk drives (HDD) in computer memory architecture. NAND is the foundational layer of memory, but as the performance gap between NAND and DRAM widens, phase-change memory (Phase-Change Memory), with its access speed and cost falling between the two, has become a candidate to replace NAND or DRAM. With the growth of data-centric applications such as artificial intelligence, traditional data processing methods consume excessive energy. In-memory computing is gradually becoming an important method for reducing energy consumption in the future. Phase-Change Memory's faster access speed, high fatigue durability, low power consumption, and high scalability make it extremely promising for in-memory computing applications. Intel's proposed 3D XPoint structure memory demonstrates the feasibility of replacing NAND and DRAM. The one-select-one-resistor (1S1R) structure plays a significant role in the development of 3D structure memory, effectively increasing memory capacity. However, the current low yield rate of 1S1R structure memory limits its further development. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a phase change memory and a method for fabricating the same. The structure of the phase change memory can effectively improve the performance and capacity of the phase change memory. At the same time, a corresponding method for fabricating the structure with low etching damage is provided, which has good market application prospects.

[0004] The present invention provides a phase change memory, wherein the phase change memory has a substrate and a plurality of electrode units; the electrode units include, from bottom to top, a blade electrode layer, a phase change material layer, a first adhesive layer, a gate material layer, a second adhesive layer, and a top electrode layer; trenches are provided between the electrode units; a barrier layer is deposited on the surface of the electrode units; and a dielectric layer is filled in the trenches between the electrode units.

[0005] The phase change material of the phase change material layer is a chalcogenide material with reversible structural phase change characteristics, including at least one of germanium-antimony-tellurium-based, antimony-tellurium-based, and germanium-tellurium-based compounds or doped compounds, and the doping element includes at least one of carbon, titanium, tantalum, oxygen, nitrogen, silicon, scandium, chromium, indium, tungsten, ruthenium, gallium, yttrium, and hafnium.

[0006] The gate material of the gate material layer is a chalcogenide compound or oxide material with threshold switching characteristics (OTS, MIT, TVS, etc.), including at least one of sulfur-based, selenium-based, and tellurium-based compounds or doped compounds, and the doping element includes at least one of carbon, nitrogen, germanium, silicon, arsenic, silver, boron, manganese, magnesium, and aluminum; or the gate material is a transition metal oxide material, and the transition metal includes at least one of titanium, vanadium, chromium, zirconium, yttrium, niobium, molybdenum, hafnium, tantalum, and tungsten.

[0007] The first and second adhesive layers comprise conductive materials and thin films; wherein the conductive material comprises at least one of titanium nitride and graphene; and the thin film comprises at least one of diamond-like carbon film, carbon material film, silicon carbon material film, carbon nitride material film, and carbon silicon nitride material film. The second adhesive layer uses the same material as the first adhesive layer. The conductive material is preferably titanium nitride, and the thin film is preferably a carbon thin film.

[0008] The films in the first and second adhesive layers are bonded to the gate material layer.

[0009] The barrier layer is made of at least one of silicon nitride, silicon oxynitride, tungsten nitride, and tantalum nitride, preferably silicon nitride.

[0010] The material of the dielectric layer (9) includes at least one of low-temperature silicon oxide (LTO), high-density silicon oxide (HDP), high aspect ratio silicon oxide (HARP), tetraethyl orthosilicate silicon oxide, thermal silicon oxide, and silicon nitride. Preferably, it is high-density silicon oxide or high aspect ratio silicon oxide, more preferably high aspect ratio silicon oxide.

[0011] This invention also provides a first method for fabricating a phase-change memory, comprising the following steps:

[0012] After the blade electrode layer is fabricated on the substrate, S1 sequentially deposits a phase change material layer, a first adhesive layer, a gate material layer, a second adhesive layer, a soft mask layer, a hard mask layer, and a photoresist layer.

[0013] S2 lithography is followed by continuous etching to transfer the pattern from the photoresist to the phase change material layer and remove the remaining soft mask layer.

[0014] S3 deposits a barrier layer and a dielectric layer, followed by chemical mechanical polishing;

[0015] S4 uses photolithography and etching to fabricate the top electrode layer, thus obtaining the phase-change memory;

[0016] or

[0017] After S1 completes the blade electrode layer on the substrate, it sequentially deposits a phase change material layer, a first adhesive layer, a gate material layer, a second adhesive layer, a hard mask layer, a soft mask layer, and a photoresist layer.

[0018] After S2 lithography, the pattern is transferred from the photoresist layer to the hard mask layer, part of the hard mask layer is retained, and the soft mask layer and photoresist layer are removed.

[0019] S3 performs continuous etching to transfer the pattern from the hard mask layer to the phase change material layer and remove the remaining soft mask layer;

[0020] S4 deposits a barrier layer and a dielectric layer, followed by chemical mechanical polishing;

[0021] S5 uses photolithography and etching to fabricate the top electrode layer, thus obtaining the phase-change memory.

[0022] The present invention also provides a second method for fabricating a phase-change memory, comprising the following steps:

[0023] After the blade electrode layer is fabricated on the substrate, the phase change material layer, the first adhesion layer, the hard mask layer, the soft mask layer, and the photoresist layer are deposited sequentially.

[0024] After S2 photolithography, step-by-step etching is performed. The first etching step transfers the pattern to the hard mask layer while retaining part of the hard mask layer. In S3, the photoresist layer and soft mask layer are removed, and then the second etching step is performed to remove the hard mask layer and transfer the pattern to the phase change material layer.

[0025] S4 removes the remaining hard mask, then deposits the barrier layer and dielectric layer in sequence, and then performs chemical mechanical polishing down to the first adhesion layer;

[0026] The S5 deposition process includes a gate material layer, a second adhesion layer, a hard mask layer, a soft mask layer, and a photoresist layer. After photolithography, a third etching step is performed to transfer the pattern to the hard mask layer while retaining part of the hard mask layer.

[0027] S6 removes the photoresist layer and soft mask layer, then performs the fourth etching step to remove the hard mask layer and transfer the pattern to the gate layer;

[0028] S7 removes the remaining hard mask, then deposits a barrier layer and a dielectric layer, followed by chemical mechanical polishing;

[0029] The S8 uses photolithography and etching to create the top electrode layer, thus obtaining the phase-change memory.

[0030] The material of the hard mask layer includes at least one of low-temperature silicon oxide, silicon nitride, amorphous silicon, polycrystalline silicon, diamond-like carbon film, and silicon oxynitride. Low-temperature silicon oxide is preferred.

[0031] The material of the soft mask layer includes at least one of organic carbon film, spin-coated carbon, spin-coated silicon, and amorphous carbon. Spin-coated carbon is preferred.

[0032] The main etching gas used in the first etching step includes at least one of carbon tetrafluoride, trifluoromethane, sulfur fluoride, difluoromethane, octafluorocyclobutane, perfluorobutadiene, and carbon dioxide, and the auxiliary gas used includes at least one of oxygen, nitrogen, hydrogen, argon, and helium; the third etching step is the same as the first etching step.

[0033] The main etching gas used in the second etching step includes at least one of chlorine, boron trichloride, hydrogen bromide, carbon tetrafluoride, trifluoromethane, ammonia, and nitrogen fluoride, and the auxiliary gas used includes at least one of oxygen, nitrogen, hydrogen, argon, and helium; the fourth etching step is the same as the second etching step.

[0034] In the above-mentioned continuous etching preparation method, different etching gases are used for each layer of material.

[0035] Beneficial effects

[0036] The structure of this invention can effectively improve the performance and capacity of phase-change memory. This invention also proposes an etching method with low etching damage, namely, after etching the mask layer, removing the residual organic soft mask layer and photoresist layer, and then using a hard mask as an etching barrier layer to complete the etching. This method can avoid the difficult-to-remove impurities formed by the reaction of metal ions and organic etching gases during the etching process, improve the yield of the device, and has good market application prospects. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of the phase-change memory structure of the present invention;

[0038] Figures 2-5 This is a schematic diagram of the first continuous etching method.

[0039] Figures 6-10 This is a schematic diagram illustrating the second continuous etching method.

[0040] Figures 11-14 This is a schematic diagram of the first and second steps of the step-by-step etching method.

[0041] Figures 12-19 This is a schematic diagram of the third and fourth etching steps of the step-by-step etching method.

[0042] Figure 20 The images show a scanning electron microscope cross-sectional view and a top view of the phase change unit structure of the phase change memory of the present invention. Detailed Implementation

[0043] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, it should be understood that after reading the teachings of this invention, those skilled in the art can make various alterations or modifications to the invention, and these equivalent forms also fall within the scope defined by the appended claims.

[0044] Example 1

[0045] Depend on Figure 1 As shown, this embodiment provides a phase change memory, which has a substrate 1 and a plurality of electrode units; the electrode units include, from bottom to top, a blade electrode layer 2, a phase change material layer 3, a first adhesive layer 4, a gate material layer 5, a second adhesive layer 6, and a top electrode layer 7; trenches are left between the electrode units; a barrier layer 8 is deposited on the surface of the electrode units; and a dielectric layer 9 fills the trenches between the electrode units.

[0046] The first preparation process includes the following steps:

[0047] Preparation of film layers, such as Figure 2 As shown, it includes a substrate 101, a blade electrode layer 102, a phase change material layer 103, a first adhesive layer 104, a gate material layer 105, a second adhesive layer 106, a soft mask layer 107, a hard mask layer 108, and a photoresist layer 109.

[0048] The photoresist layer 109 is patterned and etched using inductively coupled plasma-reactive ion etching (ICP-RIE) to etch the hard mask layer 108, soft mask layer 107, second adhesion layer 106, gate material layer 105, first adhesion layer 104, and phase change material layer 103, stopping at the surface of 102, as shown. Figure 3 As shown.

[0049] The preferred material for the hard mask layer 108 is silicon oxide, and a more preferred material is low-temperature silicon oxide. The preferred material for the soft mask layer 107 is spin-coated organic carbon. In the second adhesive layer 106, the conductive material 1062 is preferably titanium nitride, while the thin film 1061 is preferably amorphous carbon. The first adhesive layer 104 uses the same material as the second adhesive layer 106, the thin film 1042 is the same as the thin film 1061, and the conductive material 1041 is the same as the conductive material 1062.

[0050] The etching gas used for each thin film layer is different. For etching the hard mask layer 108, gases that can be used include octafluorocyclobutane, hexafluorobutane, carbon tetrafluoride, trifluoromethane, difluoromethane, fluoromethane, argon, oxygen, hydrogen, carbon dioxide, and helium. A combination of oxygen and carbon tetrafluoride is preferred, and a combination of trifluoromethane, carbon tetrafluoride, argon, and oxygen is more preferred. For etching the soft mask layer 107, gases that can be used include octafluorocyclobutane, carbon tetrafluoride, trifluoromethane, difluoromethane, argon, oxygen, hydrogen, carbon dioxide, and helium. A combination of oxygen and carbon tetrafluoride is preferred, and carbon dioxide is more preferred. For etching the second adhesion layer 106, gases that can be used include boron trichloride, chlorine, hydrogen sulfide, carbon tetrafluoride, sulfur hexafluoride, silicon tetrachloride, nitrogen, hydrogen, argon, and helium. A combination of boron trichloride and argon is preferred, and a combination of boron trichloride, chlorine, and argon is more preferred. Thin film 1061 serves as a stop layer, allowing the conductive material 1062 to stop etching on its surface after etching, before switching the etching gas to proceed to the next etching step. Gases that can be used to etch the gate material layer 105 include boron trichloride, chlorine, hydrogen sulfide, carbon tetrafluoride, sulfur hexafluoride, silicon tetrachloride, nitrogen, hydrogen, argon, and helium. A combination of chlorine and argon is preferred, and a combination of hydrogen sulfide and helium is more preferred. The gas used for etching the first adhesion layer 104 is the same as that used for the second adhesion layer 106, and the gas used for etching the phase change material layer 103 is the same as that used for the gate material layer 105. After the phase change material layer 103 is etched, a silicon nitride thin film 110 is deposited on the surface using chemical vapor deposition, and the trenches are filled with silicon oxide 111. Figure 4 As shown, vias are formed in the phase change memory structure using photolithography etching, and tungsten is filled to form the top electrode, as shown. Figure 5 As shown.

[0051] The continuous etching method proposed in this embodiment also includes a second method, the steps of which are as follows: Figures 6 to 10 As shown.

[0052] The difference between this method and the continuous etching method mentioned above lies in the reverse deposition order of the hard mask layer 207 and the soft mask layer 208. Etching is stopped when the hard mask layer 207 is etched to half its depth, and the remaining photoresist layer 209 and soft mask layer 208 are removed using a high-flow-rate oxygen solution. Because the photoresist layer 209 and soft mask layer 208 are organic materials, they easily react with metal ions during subsequent etching to form difficult-to-remove organometallic compounds, causing post-etching contamination and defects, affecting device performance. Removing the photoresist layer 209 and soft mask layer 208 effectively avoids these problems. The remaining hard mask layer 207 is used as the mask layer for subsequent etching. The etching method for steps 203-206 is the same as the continuous etching method, and the same steps are used to deposit the silicon nitride barrier layer 210, the silicon oxide dielectric layer 211, and finally, the top electrode.

[0053] This invention also proposes a third method for preparing the phase change material layer and the via material layer in steps. For example... Figure 11 On the blade electrode layer, a phase change material layer 303, the first layer 3041 of the first adhesion layer, a hard mask layer 307, a soft mask layer 308, and a photoresist layer 309 are sequentially deposited. After patterning 309, the pattern is transferred to 307 through the first etching step, and the remaining 308 and 309 are removed, as shown below. Figure 12 The pattern is then transferred to 303 via a second etching step to obtain... Figure 13 After etching, a barrier layer and a dielectric layer are deposited, followed by chemical mechanical polishing to obtain... Figure 14 The structure. Furthermore, such as... Figure 15 The process involves depositing the second layer 3042 (first adhesion layer), the via material layer 305, the second adhesion layer 306, the hard mask layer 307, the soft mask layer 308, and the photoresist layer 309. After patterning 309, the pattern is transferred to 307 via a third etching step, removing the remaining layers 308 and 309. Figure 16 Then, the pattern is transferred to 3042 through the fourth etching step, such as... Figure 17 .like Figure 18 After etching, a barrier layer and a dielectric layer are deposited. The surface is planarized by chemical mechanical polishing, and then a top electrode via is fabricated using photolithography and etching. Finally, a metal electrode is filled to obtain the desired result. Figure 19 The final structure.

Claims

1. A phase-change memory, characterized in that: The phase change memory has a substrate (1) and a plurality of electrode units; the electrode units, from bottom to top, include a blade electrode layer (2), a phase change material layer (3), a first adhesive layer (4), a gate material layer (5), a second adhesive layer (6), and a top electrode layer (7); trenches are left between the electrode units; a barrier layer (8) is deposited on the surface of the electrode units; a dielectric layer (9) is filled in the trenches between the electrode units; the first adhesive layer (4) and the second adhesive layer (6) include conductive materials and thin films; wherein, the conductive material includes at least one of titanium nitride and graphene; the thin film includes at least one of diamond-like carbon film, carbon material film, silicon carbon material film, carbon nitride material film, and silicon carbon nitride material film; the thin film in the first adhesive layer (4) and the second adhesive layer (6) is bonded to the gate material layer (5).

2. The phase-change memory according to claim 1, characterized in that: The phase change material of the phase change material layer (3) includes at least one of germanium antimony tellurium-based, antimony tellurium-based, and germanium tellurium-based or doped compounds, and the doping element includes at least one of carbon, titanium, tantalum, oxygen, nitrogen, silicon, scandium, chromium, indium, tungsten, ruthenium, gallium, yttrium, and hafnium.

3. The phase-change memory according to claim 1, characterized in that: The selection tube material layer (5) includes at least one of sulfur-based, selenium-based, and tellurium-based materials or doped compounds, and the doping element includes at least one of carbon, nitrogen, germanium, silicon, arsenic, silver, boron, manganese, magnesium, and aluminum; or the selection tube material is a transition metal oxide material, and the transition metal includes at least one of titanium, vanadium, chromium, zirconium, yttrium, niobium, molybdenum, hafnium, tantalum, and tungsten.

4. The phase-change memory according to claim 1, characterized in that: The material of the barrier layer (8) is at least one of silicon nitride, silicon oxynitride, tungsten nitride, and tantalum nitride.

5. The phase-change memory according to claim 1, characterized in that: The material of the dielectric layer (9) includes at least one of low-temperature silicon oxide (LTO), high-density process silicon oxide (HDP), high aspect ratio process silicon oxide (HARP), tetraethyl orthosilicate silicon oxide, thermal silicon oxide, and silicon nitride.

6. A method for fabricating a phase-change memory as described in any one of claims 1 to 5, comprising the following steps: After the blade electrode layer is fabricated on the substrate, S1 sequentially deposits a phase change material layer, a first adhesive layer, a gate material layer, a second adhesive layer, a soft mask layer, a hard mask layer, and a photoresist layer. S2 lithography is followed by continuous etching to transfer the pattern from the photoresist to the phase change material layer and remove the remaining soft mask layer. S3 deposits a barrier layer and a dielectric layer, followed by chemical mechanical polishing; S4 uses photolithography and etching to fabricate the top electrode layer, thus obtaining the phase-change memory; or After S1 completes the blade electrode layer on the substrate, it sequentially deposits a phase change material layer, a first adhesive layer, a gate material layer, a second adhesive layer, a hard mask layer, a soft mask layer, and a photoresist layer. After S2 lithography, the pattern is transferred from the photoresist layer to the hard mask layer, part of the hard mask layer is retained, and the soft mask layer and photoresist layer are removed. S3 performs continuous etching to transfer the pattern from the hard mask layer to the phase change material layer and remove the remaining soft mask layer; S4 deposits a barrier layer and a dielectric layer, followed by chemical mechanical polishing; S5 uses photolithography and etching to fabricate the top electrode layer, thus obtaining the phase-change memory.

7. A method for fabricating a phase-change memory as described in any one of claims 1 to 5, comprising the following steps: After the blade electrode layer is fabricated on the substrate, the phase change material layer, the first adhesion layer, the hard mask layer, the soft mask layer, and the photoresist layer are deposited sequentially. After S2 photolithography, step-by-step etching is performed. The first etching step transfers the pattern to the hard mask layer while retaining part of the hard mask layer. In S3, the photoresist layer and soft mask layer are removed, and then the second etching step is performed to remove the hard mask layer and transfer the pattern to the phase change material layer. S4 removes the remaining hard mask, then deposits the barrier layer and dielectric layer in sequence, and then performs chemical mechanical polishing down to the first adhesion layer; The S5 deposition process includes a gate material layer, a second adhesion layer, a hard mask layer, a soft mask layer, and a photoresist layer. After photolithography, a third etching step is performed to transfer the pattern to the hard mask layer while retaining part of the hard mask layer. S6 removes the photoresist layer and soft mask layer, then performs the fourth etching step to remove the hard mask layer and transfer the pattern to the gate layer; S7 removes the remaining hard mask, then deposits a barrier layer and a dielectric layer, followed by chemical mechanical polishing; The S8 uses photolithography and etching to create the top electrode layer, thus obtaining the phase-change memory.

8. The preparation method according to claim 6 or 7, characterized in that: The material of the hard mask layer includes at least one of low-temperature silicon oxide, silicon nitride, amorphous silicon, polycrystalline silicon, diamond-like carbon film, and silicon oxynitride; the material of the soft mask layer includes at least one of organic carbon film, spin-coated carbon, spin-coated silicon, and amorphous carbon.

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