Method for sharing endat between shaft end and tip

Abstract

The application discloses a method for sharing an ENDAT by a shaft end and a terminal end, a driver and a controller are connected to a set of ENDAT; the driver reads angle information of the ENDAT periodically according to a normal flow; the controller end firstly searches for a time period in which a clock keeps high for 40us; the controller end only counts the clock line CLK and waits for completion of mode word output of the driver; the controller end waits for arrival of a start signal of the ENDAT, collects angle data, sets a timeout mechanism, and once the start signal does not arrive within a fixed time, the controller end data line DATA has a delay relative to the clock line CLK at a long distance, delay compensation is performed at the controller end, and an enabling mechanism is set; the application can realize servo control by sharing the same ENDAT by the shaft end and the terminal end, greatly simplifies design of a system, and reduces cost; the application has strong universality and portability; the application realizes delay compensation of the ENDAT by the shaft end and the terminal end, can be applied to the ENDAT of any speed and distance, and has strong adaptability.

Description

TECHNICAL FIELD

[0001] The present application relates to ENDAT dual-end data acquisition, in particular to a method for sharing ENDAT by shaft end and terminal end. BACKGROUND

[0002] In modern control systems, mainly composed of controlled objects and actuators, specifically such as a turntable system, which is driven by a motor to rotate the turntable to a specified position, where the motor is the actuator, and the turntable is the controlled object, the motor rotates to drive the turntable to rotate.

[0003] ENDAT can be said to be widely used in the control industry. As long as the system uses grating to measure angle, most systems need grating to achieve angle acquisition, especially the widely used grating manufacturers including Renishaw, Heidenhain and other large manufacturers. At present, most of them use ENDAT protocol to achieve angle data acquisition. In modern control systems, permanent magnet synchronous motor is widely used as an actuator because it does not need additional excitation winding. When the permanent magnet synchronous motor is used as an actuator, the widely used SVPWM is used as the control method, and the angle at the motor end needs to be known as the coordinate transformation of SVPWM; while the turntable as a controlled object needs to be accurately controlled to rotate to a specified angle, and also needs an angle measuring element to accurately obtain the position information of the terminal end.

[0004] This raises a problem that the motor end, that is, the shaft end, needs an angle measuring element to perform SVPWM algorithm, and the turntable end, that is, the terminal end, also needs to know the angle information for position closed loop. In the traditional method, an angle measuring element (ENDAT or rotary transformer) is installed at the motor end, and an angle measuring element (ENDAT) is also installed at the turntable end. The reason for this is that the electrical equipment (driver) for controlling the motor rotation is generally designed or purchased separately, while the electrical equipment (controller) for controlling the turntable rotation is another separate device, and the two are not related except for transmitting speed instructions.

[0005] Currently, there is no system in which the motor and the turntable share the same ENDAT angle measuring device. The reasons are two-fold. First, the ENDAT protocol is composed of a pair of differential clock lines and a pair of differential data lines. The clock line is input, and the data line is bidirectional. If connected to the driver and the controller at the same time, if there is no coordination between the two, simultaneous operation of the ENDAT will inevitably cause reading conflicts and cause faults. Second, if the ENDAT is connected to the driver or the controller, then additional communication equipment is needed to complete the transmission of the angle, which affects the real-time performance of the data and increases the complexity of the system. Therefore, the current shaft end and terminal end sharing the same ENDAT device have not been realized.

[0006] The present application is based on such a background, the method of sharing the same set of ENDAT for shaft end and end, the system composition is simple, the implementation is simple, and the universality is strong. SUMMARY

[0007] The present application is based on such a background, the method of sharing the same set of ENDAT for shaft end and end, the system composition is simple, the implementation is simple, and the universality is strong.

[0008] To achieve the above object, the present application provides the following technical scheme: a method for sharing the same set of ENDAT for shaft end and end, the specific method is as follows:

[0009] S01: the driver and the controller are connected to a set of ENDAT, the driver end adopts the traditional connection mode, the clock line CLK and the data line DATA of the controller end are connected to the input end of the controller, and the MAX3095 differential chip is used to realize it;

[0010] S02: the driver reads the angle information of ENDAT periodically according to the normal process, and the controller end first finds the time period in which the clock keeps high for 40us;

[0011] S03: the controller end only counts the clock line CLK, does not care about the mode word, and waits for the completion of the mode word output of the driver;

[0012] S04: the controller end waits for the arrival of the start signal of ENDAT, collects the angle data, sets the timeout mechanism, and returns to S02 once the start signal does not arrive within the fixed time;

[0013] S05: the data line DATA of the controller end relative to the clock line CLK has a delay when the distance is far, the delay is compensated at the controller end, and the enable mechanism is set.

[0014] As a preferred technical scheme of the present application, the data line and the clock line of the ENDAT in S01 are directly connected to the driver, the clock line is connected to the output of the driver, and the data line is connected to the bidirectional output of the driver.

[0015] As a preferred technical scheme of the present application, the angle information of ENDAT is read in S02, the clock line CLK is kept high before ENDAT starts to read data each time, the clock line CLK is continuously sampled in the program, when the clock line CLK is continuously high for 40us, it is considered that the state is idle at this time, and the clock line CLK is used as the starting condition, and the falling edge is waited.

[0016] As a preferred technical scheme of the present application, the controller end in S03 only counts the clock line CLK, and does not make any judgment on the data line DATA in the program, and starts counting the clock line CLK as soon as the falling edge of the clock line CLK comes, and records to 10, which indicates that the driver has completed the output of the mode word.

[0017] As a preferred technical scheme of the present application, the controller end in S04 waits for the arrival of the ENDAT start signal, then collects the data line DATA according to the falling edge of the clock line CLK, and then stores the collected angle in the corresponding register, and adds a timeout mechanism when the program waits for the arrival of the start signal, and the count value Cnt2 is accumulated during the waiting process, and if the start signal does not come within 10 clock line CLK periods, the waiting is stopped, and the program is directly jumped to S02 to perform sampling in the next period.

[0018] As a preferred technical scheme of the present application, the controller end in S05 performs delay compensation: when the clock line rises during the waiting process for the arrival of the start signal, the count Cnt3 is started, and the count is performed according to the system clock 20MHz, and if the start signal comes, the count value Cnt3 at this time is stored, and the time stored in Cnt3 is the advance amount of the clock line relative to the data line, and when the clock line CLK is used, the count in Cnt3 needs to be delayed and used;

[0019] When the value of Cnt3 is latched, the CLK needs to be delayed by the count value of Cnt3 before it is used; in order to ensure the reliability of the collection, this process is performed three times, and the latched Cnt3 is averaged, and this process is only performed during initialization, because once the distance is fixed, the delay is also relatively fixed; this module sets the enable end, and when it is not used, it can be directly skipped.

[0020] The present application has the advantages that the method can realize the sharing of the same ENDAT for the shaft end and the end, greatly simplifies the design of the system, and reduces the cost; the method of the present application realizes the sharing of the same ENDAT for the shaft end and the end, and has strong universality and portability; the present application realizes the delay compensation of the ENDAT for the shaft end and the end, and can be applied to any speed and distance of ENDAT, and has strong adaptability. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 The flowchart of the method of the present application;

[0022] Figure 2 The ENDAT protocol timing diagram of the present application;

[0023] Figure 3 The connection diagram of the driver and ENDAT of the present application;

[0024] Figure 4 The connection diagram of the controller and ENDAT of the present application;

[0025] Figure 5 The process diagram of the driver reading ENDAT of the present application;

[0026] Figure 6 The schematic diagram of the 40us high level of the collection clock line of the present application;

[0027] Figure 7 The schematic diagram of judging whether the clock line is in the idle state of the present application;

[0028] Figure 8 The schematic diagram of the process of the driver mode word output of the present application;

[0029] Figure 9 The flow chart of counting the driver mode output of the present application;

[0030] Figure 10 The flow chart of angle collection of the present application;

[0031] Figure 11 The partial enlargement of the delay of the data line DATA relative to the clock line CLK of the present application;

[0032] Figure 12 The flow chart of the delay compensation of the clock line CLK relative to the data line DATA of the present application. DETAILED DESCRIPTION

[0033] The preferred embodiments of the present application are described in detail below with reference to the accompanying drawings, so that the advantages and features of the present application can be more easily understood by those skilled in the art, and the protection scope of the present application can be more clearly defined.

[0034] Embodiment: please refer to Figure 1 The present application provides a technical solution: a method for sharing ENDAT by shaft end and terminal, and the specific method is as follows:

[0035] S01: the driver and the controller are jointly connected to a set of ENDAT, the driver end adopts the traditional connection mode, the clock line CLK and the data line DATA of the controller end are connected to the input end of the controller, and the MAX3095 differential chip is adopted to realize;

[0036] The data line and the clock line of ENDAT are directly connected to the driver, the clock line is connected to the output of the driver, and the data line is connected to the bidirectional output of the driver;

[0037] S02: the driver reads the angle information of the ENDAT periodically according to the normal flow, and the controller end firstly looks for the time period in which the clock line CLK keeps high for 40us;

[0038] Before the ENDAT starts reading data each time, the clock line CLK keeps high, and the clock line CLK is sampled constantly in the program. When the clock line CLK keeps high for 40us continuously, it is considered that the state is idle at this time, and this is used as the starting condition to wait for the falling edge of the clock line CLK;

[0039] S03: the controller end only counts the clock line CLK, and does not care about the mode word, and waits for the completion of the mode word output by the driver;

[0040] The data line DATA is not judged in the program. Once the falling edge of the clock line CLK comes, the counting of the clock line CLK is started, and is recorded to 10, which indicates that the driver has completed the output of the mode word at this time;

[0041] S04: the controller end waits for the arrival of the ENDAT starting signal, collects the angle data, sets the timeout mechanism, and returns to S02 once the starting signal does not arrive within a fixed time;

[0042] The controller end waits for the arrival of the ENDAT starting signal, and then collects the data line DATA according to the falling edge of the clock line CLK, and then stores the collected angle to the corresponding register. The program adds a timeout mechanism when waiting for the arrival of the starting signal. During the waiting process, the count value Cnt2 is accumulated. If the starting signal does not arrive within 10 clock line CLK periods, the waiting is stopped, and the program is directly jumped to S02 to perform sampling in the next period;

[0043] S05: the controller end data line DATA is far away from the clock line CLK, and there is a delay. The delay compensation is performed at the controller end, and the enable mechanism is set;

[0044] During the waiting process for the arrival of the starting signal, when the rising edge of the clock line comes, the counting Cnt3 is started, and the counting is performed according to the system clock 20MHz. If the starting signal arrives, the count value Cnt3 at this time is stored, and the time stored in Cnt3 is the advance amount of the clock line relative to the data line. When the clock line CLK is used, the counting in Cnt3 needs to be delayed for use;

[0045] When the value of Cnt3 is latched, the clock line CLK needs to be delayed for Cnt3 count value before use; in order to ensure the reliability of collection, the process is continued for three times, and the average value of the latched Cnt3 is taken, and the process is only carried out at the initialization time, because once the distance is fixed, the delay is also relatively fixed; this module sets the enable end, when not used, can directly skip.

[0046] Working principle: a method of sharing ENDAT by shaft end and end, the main implementation process of the application is as follows:

[0047] Figure 2 For the traditional ENDAT data protocol, as can be seen from the figure, in order to realize the reading of data, first of all, the first two clock data lines need to be kept idle, then the mode word (000111) is sent in the next time sequence, indicating that the angle information is read, then the start signal is waited for, then the error state is judged, the angle information is read and the CRC check code is realized. There are many ways to realize, the application realizes how the driver and the controller share a set of ENDAT, and how to realize the reading of ENDAT angle in the controller.

[0048] S01: the driver and the controller are connected to a set of ENDAT, the driver end adopts the traditional connection mode, the clock line CLK and the data line DATA of the controller end are connected to the input end of the controller;

[0049] The turntable, motor and a set of ENDAT angle measurement system are composed, wherein the data line and the clock line of the ENDAT are directly connected to the driver, the clock line is connected to the output of the driver, and the data line is connected to the bidirectional output (the direction of the control chip is needed to realize the bidirectional of the data line) of the driver. The driver reads the data of ENDAT according to the normal process, which has no difference with the normal system, such as Figure 3 ; the difference is that the clock line and the data line are also connected to the controller, but the data line and the clock line are connected to the input of the controller, and the application is realized by using the MAX3095 differential chip, as shown in Figure 4 .

[0050] Secondly, the reading of angle in the controller; the driver reads data according to the normal ENDAT data reading process as the master device, and the controller reads the angle information from the time sequence read by the driver as the slave device, the specific process is as follows:

[0051] As Figure 2As shown, the driver completes a normal ENDAT data reading process, first, 10 cycles of CLK are generated, the data line is set to output, the mode word 4 idle bits + 000111 is sent on the data line, a total of 10 bits, then the data line is set to output by continuously outputting CLK, waiting for the arrival of the start signal (high level) in ENDAT, and then reading the angle information and CRC information according to the clock. This process of the driver is certainly periodic, and the period is generally 1ms-10ms, so the controller as a slave device needs to determine which is the mode word sent by the driver and which is the data information of ENDAT according to the information on the clock line and the data line. In order to solve this problem, the application first lengthens the time axis of the reading process of the driver, as shown in Figure 5 .

[0052] As can be seen, the driver is periodic when reading ENDAT, and the period is 1ms-10ms, which may be different for different drivers. The reading rate of ENDAT is 100Kpbs-500Kbps, and the time of each bit is 10us-2us. In the period between normal reading, the clock remains high. The application takes advantage of this, when the clock remains high for a period of time, it is considered to be in an idle state, waiting for the falling edge of the clock to arrive, and once it arrives, it is considered that data transmission begins.

[0053] S02: The driver reads the angle information of ENDAT periodically according to the normal process, and the controller end first finds a period in which the clock remains high for 40us;

[0054] In the program, the high level of the clock line CLK is collected according to the sampling frequency, and the counting is performed, as shown in Figure 6 . Before each ENDAT starts to read data, the clock line CLK is high. The present application takes this as a breakthrough point, and the clock line CLK is continuously sampled in the program. When the clock line CLK is continuously high for 40us, it is considered to be in an idle state, and this is used as a starting condition to wait for the falling edge of the clock line CLK. The specific process is as shown in Figure 7 .

[0055] S03: The controller end only counts the clock line CLK, and does not care what the mode word is, and waits for the driver mode word output to be completed;

[0056] After the above step is completed, the program waits for the falling edge of the clock line CLK. Once the falling edge arrives, it means that the driver starts to output 10 bits of 2 idle bits + 000111 + 2 idle bits, as shown in Figure 8 .

[0057] In the program, no judgment is made on the data line DATA, and once the falling edge of the clock line CLK comes, the counting of the clock line CLK is started, and is recorded to 10, which indicates that the driver has completed the output of the mode word, and the specific flow is as shown in Figure 9 .

[0058] S04: The controller end waits for the arrival of the ENDAT start signal, collects the angle data, sets a timeout mechanism, and once the start signal does not arrive within a fixed time, returns to S02;

[0059] After the above step is completed, the mode word output is completed, and at this time, only the arrival of the start signal (high level) at the ENDAT end needs to be waited for, and then the data line DATA is collected according to the falling edge of the clock line CLK, and then the collected angle is stored in the corresponding register, and then S01 is started again. In order to prevent faults from occurring in the present application, a fault reset mechanism is also added to prevent the program from entering a dead loop. Specifically, the program waits for the arrival of the rising edge of the data line DATA, which indicates that the start signal is received at this time. Then, the data line DATA is sampled at the falling edge of the clock line CLK and is placed in the shift register Angle, and then the first step is re-entered. When the program is waiting for the arrival of the start signal, a timeout mechanism is added, and during the waiting process, the count value Cnt2 is accumulated. If the start signal does not arrive within 10 clock line CLK periods, the waiting is stopped, and the program is directly jumped to S02 for sampling in the next period. The specific flow is as shown in Figure 10 .

[0060] S05: The data line DATA relative to the clock line CLK at a long distance will have a delay, and the delay compensation is performed at the controller end, and an enable mechanism is set;

[0061] The present application realizes the delay compensation of the data line DATA relative to the clock line CLK, especially when the ENDAT is transmitted at a long distance (hundreds of meters). Due to the limitation of the ENDAT itself, the clock line CLK is output by the driver. After the driver outputs the mode word, the arrival of the ENDAT data is waited for. Since the ENDAT end places the angle information on the data line DATA at the rising edge of the clock line CLK, and the data line needs to be transmitted through a long distance to reach the receiving end of the driver or the controller, the phase of the clock line CLK and the data line DATA is offset, and the rising edge of the clock is not strictly aligned with the data DATA. For example, tD in the second red data line in Figure 2 , as shown in Figure 11 .

[0062] Clock line CLK and data line DATA have been staggered, once staggered half clock cycle, will cause the error of data collection, must carry out delay compensation. Specifically, in the process of waiting for the arrival of the start signal, when the rising edge of the clock line comes, start counting Cnt3, count according to the system clock 20MHz, if the start signal comes, the count value Cnt3 at this time is stored, then the time stored in Cnt3 is the advance amount of the clock line relative to the data line, when using the clock line CLK, the count in Cnt3 needs to be delayed for use, the specific flow is as shown in Figure 12

[0063] When the value of Cnt3 is latched, when using the clock line CLK, CLK needs to be delayed for Cnt3 count value before use. In order to ensure the reliability of collection, this process lasts three times, the average value of the latched Cnt3 is taken, this process is only carried out at the time of initialization, because once the distance is fixed, the delay is also relatively fixed. This module sets the enable end, when not used, can directly skip, increase the flexibility of the program, because in the short distance, it is not necessary to compensate.

[0064] The application finally realizes a method of sharing ENDAT at shaft end and end, which breaks through and innovates in system composition and method implementation, reduces the cost of the system, realizes simplicity, strong universality and strong portability.

[0065] The above embodiments only express several embodiments of the application, the description is more specific and detailed, but it cannot be understood as the limitation of the scope of the patent. It should be pointed out that for ordinary skilled in the art, without departing from the concept of the application, can make several modifications and improvements, which belong to the protection scope of the application.​

Claims

1. A method for sharing an ENDAT between a shaft end and a terminal end, characterized in that: The specific method is as follows: S01: The driver and controller are connected to a set of ENDATs. The driver side uses the traditional connection method, and the controller side clock line CLK and data line DATA are connected to the controller input terminal, which is implemented using the MAX3095 differential chip. S02: The driver periodically reads the angle information of ENDAT according to the normal process. The controller first searches for the time period when the clock remains high for 40us. Read the angle information of ENDAT. Before each ENDAT starts to read data, the clock line CLK is kept at a high level. The clock line CLK is continuously sampled in the program. During the initialization and waiting for the start signal, when the data line DATA on the controller side is far away from the clock line CLK, there will be a delay. Delay compensation is performed on the controller side, and an enabling mechanism is set. When the data line DATA on the controller side is close to the clock line CLK, delay compensation is skipped directly. When the clock line CLK is continuously high for 40us, it is considered to be in an idle state and used as a start condition to wait for the falling edge of the clock line CLK. If the falling edge of the clock line CLK is waiting to arrive, counting begins. S03: The controller only counts the clock line CLK, does not care what the mode word is, and waits for the driver mode word output to be completed; S04: The controller waits for the arrival of the ENDAT start signal, collects the angle data, and sets a timeout mechanism. If the start signal does not arrive within a fixed time, it returns to S02.

2. The method of using a common ENDAT for a shaft end and a terminal end according to claim 1, wherein: The data line and clock line of the ENDAT in the S01 are directly connected to the driver, the clock line is connected to the output of the driver, and the data line is connected to the bidirectional output of the driver.

3. The method of using a common ENDAT for a shaft end and a terminal end according to claim 1, wherein: The controller end in S03 only counts the clock line CLK, and does not make any judgment on the data line DATA in the program. Once the falling edge of the clock line CLK arrives, it starts counting the clock line CLK until it reaches 10, indicating that the driver has completed the output of the mode word.

4. The method of using a common ENDAT for a shaft end and a terminal end according to claim 1, wherein: In S04, the controller waits for the arrival of the ENDAT start signal, and then collects the data line DATA according to the falling edge of the clock line CLK, and then stores the collected angle in the corresponding register. When waiting for the start signal to arrive, the program adds a timeout mechanism. During the waiting process, the count value Cnt2 is accumulated. If the start signal has not arrived after 10 clock line CLK cycles, the waiting is stopped and the program jumps directly to S02 for sampling in the next cycle.

5. The method of using a common ENDAT for a shaft end and a terminal end according to claim 1, wherein: In the step S02, delay compensation is performed on the controller side: during the initialization process of waiting for the start signal to arrive, when the rising edge of the clock line arrives, the counter Cnt3 is started and counted according to the system clock 20MHz. If the start signal arrives, the count value Cnt3 at this time is stored. The time stored in Cnt3 is the advance amount of the clock line relative to the data line. When the clock line CLK is used, the count in Cnt3 needs to be delayed for use; After latching the value of Cnt3, when using the clock line CLK, it is necessary to delay CLK by the Cnt3 count value before using it; to ensure the reliability of the acquisition, this process is repeated three times, and the average value of the latched Cnt3 is taken. This process is only performed during initialization because once the distance is fixed, the delay is also relatively fixed; this module sets the enable terminal and can be skipped directly when not in use.

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