A multilayer circuit board and a method of manufacturing the same
By manufacturing buried/blind vias in segments and connecting them with conductive copper pillars, the problems of long processing cycles and high scrap rates caused by multiple laminations are solved, thus achieving efficient multilayer circuit board manufacturing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-03
- Publication Date
- 2026-04-07
AI Technical Summary
The existing technology requires multiple lamination processes to manufacture multilayer circuit boards, which leads to long processing cycles and increased scrap rates.
The process of fabricating buried/blind vias in multilayer circuit boards involves first fabricating buried/blind vias on some substrates, then fabricating conductive copper pillars, connecting the buried/blind vias in each substrate through the conductive copper pillars, and finally laminating all substrates together to complete the fabrication of multilayer circuit boards in a single lamination process.
It effectively shortens the processing cycle of multilayer circuit boards, reduces the difficulty of the process, and improves the success rate of processing.
Smart Images
Figure CN116133281B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit board manufacturing technology, and in particular to a multilayer circuit board and its manufacturing method. Background Technology
[0002] With the rapid development of miniaturization in electronic products, the integration of circuits in electronic products is becoming increasingly higher. As the carrier of circuits and many components in electronic products, the requirements for miniaturization of circuit boards are also increasing.
[0003] The main method for miniaturizing circuit boards is to use multi-layer circuit boards, where the circuit is placed within the multi-layer circuit boards. Specifically, the circuit is made on each layer of the circuit board according to a preset circuit pattern, and then several layers of circuit boards are laminated together. Through holes or blind holes are then made. However, the processing of buried / blind holes in this method requires lamination of the corresponding layers. If there are many buried / blind holes made in the circuit board, multiple laminations of multiple circuit boards are required. Each lamination requires a certain cycle and has a certain success rate, which leads to a long processing cycle and an increased scrap rate for multi-layer circuit boards. Summary of the Invention
[0004] Therefore, it is necessary to provide a multilayer circuit board and its manufacturing method to address the above-mentioned technical problems, so as to solve the problem that the manufacturing of multilayer circuit boards in the prior art requires multiple laminations, resulting in a long processing cycle and increased scrap rate.
[0005] In a first aspect, embodiments of the present invention provide a method for manufacturing a multilayer circuit board, comprising:
[0006] N substrates with metal layers on both sides are stacked sequentially through N-1 diaphragm layers, where N is an integer greater than 1;
[0007] Conductive blind vias are fabricated and electroplated at predetermined positions within each substrate, and the conductive blind vias are used to connect the circuit layers on both sides of each substrate.
[0008] Holes are made at predetermined positions in each of the diaphragm layers, and conductive metal pillars are fabricated in the holes. The two ends of the conductive metal pillars are used to connect to the conductive blind holes of the upper and lower substrates adjacent to the diaphragm layers, respectively.
[0009] Remove each of the aforementioned membrane layers, and fabricate circuit layers on the upper and lower surfaces of the upper and lower substrates adjacent to each of the aforementioned membrane layers;
[0010] In the N substrates, at least one substrate is stacked on the outer circuit layer of the bottom substrate through other diaphragm layers, and the metal layers of all substrates are pressed together.
[0011] A circuit layer is fabricated on the upper surface of the top substrate and the lower surface of the bottom substrate in the N substrates.
[0012] The above solution has the following beneficial effects:
[0013] The method for manufacturing a multilayer circuit board of the present invention involves first manufacturing buried / blind vias in some substrates, then manufacturing conductive copper pillars, connecting the buried / blind vias in each substrate through the conductive copper pillars, and then pressing all substrates together. Only one pressing is needed to complete the manufacturing of a multilayer circuit board containing multiple buried / blind vias, which effectively shortens the processing cycle of the multilayer circuit board, reduces the process difficulty, and improves the processing success rate.
[0014] Optionally, the process of fabricating and electroplating conductive blind vias at predetermined locations within each substrate includes:
[0015] At least one blind via is fabricated at a predetermined location for all substrates and all circuit layers, and metal is plated into each blind via to form the conductive blind via.
[0016] Optionally, making holes at predetermined positions in each of the membrane layers and fabricating conductive metal pillars within the holes includes:
[0017] Metal is electroplated at the location corresponding to the conductive blind hole in the diaphragm layer, and the conductive metal pillar is formed inside the conductive blind hole in the diaphragm layer.
[0018] Optionally, fabricating circuit layers on the upper and lower surfaces of the upper and lower substrates adjacent to each of the diaphragm layers includes:
[0019] Based on the preset circuit patterns of each of the metal layers, the circuit layers are fabricated on each of the metal layers.
[0020] Optionally, after laminating the metal layers of all substrates and before fabricating circuit layers on the upper surface of the top substrate and the lower surface of the bottom substrate among the N substrates, the fabrication method further includes:
[0021] Conductive vias are formed at predetermined positions on the upper surface of the top substrate or the lower surface of the bottom substrate among N substrates, for penetrating the N substrates, and the conductive vias are used to connect the respective metal layers of the N substrates.
[0022] In a second aspect, embodiments of the present invention provide a multilayer circuit board, comprising:
[0023] N first substrates with circuit layers on both sides are stacked and spaced apart in sequence, where N is an integer greater than 1;
[0024] N conductive blind vias, each of which is located within a first substrate, and each of which is electroplated with metal;
[0025] N-1 conductive metal pillars, each of which is connected to a conductive blind via of an adjacent first substrate in the upper and lower layers;
[0026] A second substrate is provided on the second substrate, and the N first substrates are provided on the diaphragm layer.
[0027] The above solution has the following beneficial effects:
[0028] The multilayer circuit board of the present invention sets the buried / blind vias of the multilayer circuit board as conductive buried / blind vias and conductive metal pillars of each single-layer circuit board. Each adjacent conductive buried / blind via is connected by conductive metal pillars. When manufacturing the conductive buried / blind vias, the buried / blind vias of some substrates can be manufactured first, and then the conductive copper pillars can be manufactured. The buried / blind vias in each substrate are connected by conductive copper pillars. Then all substrates are laminated. Only one lamination is needed to complete the manufacturing of a multilayer circuit board containing multiple buried / blind vias, which effectively shortens the processing cycle of the multilayer circuit board, reduces the process difficulty, and improves the processing success rate.
[0029] Optionally, the multilayer circuit board further includes: conductive vias, the conductive vias being disposed through the second substrate and the N first substrates, the conductive vias connecting the second substrate and each of the circuit layers of the N first substrates.
[0030] Optionally, the conductive metal pillar is a circular copper pillar.
[0031] Optionally, the diameter of the conductive metal pillar is larger than the diameter of the conductive blind hole.
[0032] Optionally, the height of the conductive metal column is greater than 0.05 mm and less than 0.15 mm. Attached Figure Description
[0033] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0034] Figure 1 This is a schematic diagram of a method for manufacturing a multilayer circuit board according to an embodiment of the present invention;
[0035] Figure 2-1 This is a schematic diagram of a stacked substrate structure provided in one embodiment of the present invention;
[0036] Figure 2-2This is a schematic diagram of an opening in a stacked substrate provided in one embodiment of the present invention;
[0037] Figure 2-3 This is a schematic diagram of metal plating inside a hole provided in one embodiment of the present invention;
[0038] Figure 2-4 This is a schematic diagram of a conductive metal column fabrication method provided in one embodiment of the present invention;
[0039] Figure 2-5 This is a schematic diagram of removing the diaphragm layer and fabricating the circuit layer according to one embodiment of the present invention;
[0040] Figure 2-6 This is a schematic diagram of a through hole provided in one embodiment of the present invention;
[0041] Figure 2-7 This is a schematic diagram of metal plating inside a through hole provided in one embodiment of the present invention;
[0042] Figure 3 This is a schematic diagram of the first multilayer circuit board structure provided in one embodiment of the present invention;
[0043] Figure 4 This is a schematic diagram of a second multilayer circuit board structure provided in one embodiment of the present invention;
[0044] The symbols are explained as follows:
[0045] 1. First substrate layer; 2. Second substrate layer; N, Nth substrate layer; M1, First separator layer; M2, Second separator layer; L1, First metal layer; L2, Second metal layer; L3, Third metal layer; L4, Fourth metal layer; L2N, 2Nth metal layer; X1, Buried / blind via; X11, First copper cladding layer; X2, Conductive metal pillar; X3, Through-hole; X31, Second copper cladding layer; S1, First circuit layer; S2, Second circuit layer; S3, Third circuit layer; S4, Fourth circuit layer; S2N, 2Nth circuit layer; S2N-1, 2N-1th circuit layer; S2(N+M)-1, 2(N+M)-1th circuit layer; S2(N+M), 2(N+M)th circuit layer. Detailed Implementation
[0046] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.
[0047] In one embodiment, a method such as Figure 1 The method for fabricating a multilayer circuit board shown includes the following steps:
[0048] Step S100: N substrates with metal layers on both sides are stacked sequentially through N-1 diaphragm layers, where N is an integer greater than 1.
[0049] See Figure 2-1 The first substrate 1 has a first metal layer L1 and a second metal layer L2 on both sides, the second substrate 2 has a third metal layer L3 and a fourth metal layer L4 on both sides, the second metal layer L2 and the third metal layer L3 are separated by a first separator layer M1, and so on, until the Nth substrate N is stacked, where N is an integer greater than 1.
[0050] In this embodiment, the substrate is made of insulating material with a thickness greater than 0.1 mm and less than 0.3 mm, preferably 0.2 mm; the metal layer is made of copper with a thickness greater than 0.02 mm and less than 0.04 mm, preferably 0.02 mm; and the diaphragm layer is a prepreg with a thickness greater than 0.05 mm and less than 0.15 mm, preferably 0.1 mm.
[0051] Step S200: Conductive blind vias are fabricated and electroplated at preset positions within each substrate. The conductive blind vias are used to connect the circuit layers on both sides of each substrate.
[0052] See Figure 2-2 A buried / blind via X1 is formed at a predetermined position in the first metal layer L1. The buried / blind via X1 extends sequentially downward from the first metal layer L1 to the second metal layer L2N, but does not penetrate the second metal layer L2N, thus forming a blind via. Alternatively, it can penetrate the second metal layer L2N. In this embodiment, the buried / blind via X1 can be formed by laser engraving or by other methods similar to mechanical drilling.
[0053] See Figure 2-3 Copper is electroplated on the inner wall of the buried / blind via X1 to form a first copper plating layer X11, which connects the various metal layers.
[0054] Step S300: Open holes at preset positions in each membrane layer, and fabricate conductive metal pillars in the holes. The two ends of the conductive metal pillars are used to connect to the conductive blind holes of the upper and lower substrates adjacent to the membrane layer, respectively.
[0055] See Figure 2-4 Holes for making conductive metal pillars are made at the positions corresponding to buried / blind vias X1 in the substrates on both sides of the diaphragm layer. The conductive metal pillars are made in the holes by electroplating copper. Taking the conductive metal pillar X2 in the second diaphragm layer M2 as an example, the two ends of the conductive metal pillar X2 are respectively connected to the conductive blind vias of the upper and lower substrates adjacent to the second diaphragm layer M2.
[0056] Step S400: Remove each diaphragm layer and fabricate circuit layers on the upper and lower surfaces of the upper and lower substrates adjacent to each diaphragm layer.
[0057] See Figure 2-5 Remove Figure 2-4 Each diaphragm layer in the process is fabricated into a circuit layer according to the corresponding circuit pattern in each metal layer, and the circuit layer includes conductive lines.
[0058] Step S500: At least one substrate is stacked on the outer circuit layer of the bottom substrate among N substrates through other diaphragm layers, and the metal layers of all substrates are pressed together.
[0059] See Figure 2-6 M substrates with metal layers on both sides are stacked on the outside of the 2Nth metal layer of the Nth substrate through a diaphragm layer, where M is an integer greater than 0. The circuit layers in the metal layers between the substrates can be prefabricated. Then, the metal layers of all the substrates are pressed together to form a multilayer circuit board with N+M substrates.
[0060] Step S600: Fabricate circuit layers on the upper surface of the top substrate and the lower surface of the bottom substrate among the N substrates.
[0061] See Figure 2-7 A circuit layer is fabricated in the first metal layer L1 of the top substrate of each of the N substrates, that is, the first metal layer 1, according to a preset circuit pattern. The circuit layer includes conductive lines. A circuit layer is fabricated in the second (N+M) metal layer of the bottom substrate, that is, the N+M metal layer, according to a preset circuit pattern. The circuit layer includes conductive lines.
[0062] Furthermore, on the upper surface of the top substrate of the N substrates, i.e. the first metal layer 1, or on the lower surface of the bottom substrate, i.e. the second (N+M)th metal layer of the N+M layer substrate, at a predetermined position, through holes of all metal layers and all substrates are made, and copper is electroplated in the through holes to form a second copper cladding layer X31, thereby forming a conductive through hole X3, which is used to connect each metal layer.
[0063] The method for manufacturing multilayer circuit boards in this embodiment involves segmenting the buried / blind vias of the multilayer circuit board, manufacturing buried / blind vias for each substrate segment, hollowing out the spacer layer between metal layers, thickening the corresponding spacer layer with copper plating, and finally achieving direct physical contact between the two metal layers through conductive metal pillars during lamination. This method achieves vertical interconnection of buried / blind vias without additional lamination, effectively shortening the processing cycle of multilayer circuit boards, reducing process difficulty, and improving the processing success rate.
[0064] In one embodiment, a method such as Figure 3 The multilayer circuit board shown includes:
[0065] The first substrate 1, and the first circuit layer S1 and the second circuit layer S2 attached to both sides of the first substrate 1, the second substrate 2, and the third circuit layer S3 and the fourth circuit layer S4 attached to both sides of the second substrate 2, and so on, until the Nth substrate N, and the 2Nth circuit layer S2N and the 2N-1th circuit layer S2N-1 attached to both sides of the Nth substrate N, the substrates with circuit layers are stacked in sequence at intervals, where N is an integer greater than 1.
[0066] The multilayer circuit board of this embodiment further includes: N conductive buried / blind vias X1 and N-1 conductive metal pillars X2. Each conductive buried / blind via X1 is located in each first substrate. The inner wall of each conductive buried / blind via X1 is plated with metal, which is copper, to form a first copper cladding layer X11. Each conductive metal pillar X2 is connected to the conductive buried / blind vias X1 of the upper and lower adjacent first substrates respectively. Each circuit layer is interconnected through the buried / blind vias X1 and the conductive metal pillars X2.
[0067] The multilayer circuit board of this embodiment further includes: M substrates, which are stacked together by a separator layer. The uppermost substrate of the M substrates has a first separator layer M1 on its upper circuit layer, and the aforementioned N stacked substrates are disposed on the first separator layer M1.
[0068] In this embodiment, the multilayer circuit board uses buried / blind vias as conductive buried / blind vias and conductive metal pillars on each single-layer circuit board. Adjacent conductive buried / blind vias are connected by conductive metal pillars. When fabricating these conductive buried / blind vias, the buried / blind vias of some substrates can be fabricated first, followed by the conductive copper pillars. The buried / blind vias in each substrate are then connected by the conductive copper pillars. Finally, all substrates are laminated together. Only one lamination is needed to complete the fabrication of a multilayer circuit board containing multiple buried / blind vias, effectively shortening the processing cycle of the multilayer circuit board, reducing the process difficulty, and improving the processing success rate.
[0069] In one embodiment, a method such as Figure 4 The multilayer circuit board shown is related to... Figure 3 The difference in the multilayer circuit board is that the multilayer circuit board also includes a conductive via X3, which is disposed through N substrates and M substrates. A second copper cladding layer X31 is disposed in the conductive via X3, and the circuit layers on both sides of all substrates are interconnected through the conductive via.
[0070] In this embodiment, the conductive metal pillar is cylindrical and made of copper; the diameter of the conductive metal pillar X2 is larger than the diameter of the buried / blind via X1, ensuring that the conductive metal pillar can effectively connect the buried / blind via X1 at both ends; in this embodiment, the substrate is made of insulating material with a thickness greater than 0.1 mm and less than 0.3 mm, preferably 0.2 mm; the metal layer is made of copper with a thickness greater than 0.02 mm and less than 0.04 mm, preferably 0.02 mm; the diaphragm layer is a prepreg with a thickness greater than 0.05 mm and less than 0.15 mm, preferably 0.1 mm.
[0071] In this embodiment, the multilayer circuit board uses buried / blind vias as conductive buried / blind vias and conductive metal pillars on each single-layer circuit board. Adjacent conductive buried / blind vias are connected by conductive metal pillars. When fabricating these conductive buried / blind vias, the buried / blind vias of some substrates can be fabricated first, followed by the conductive copper pillars. The buried / blind vias in each substrate are then connected by the conductive copper pillars. After all substrates are laminated, through-holes are fabricated. Only one lamination is required to complete the fabrication of a multilayer circuit board containing multiple buried / blind vias and through-holes, effectively shortening the processing cycle of the multilayer circuit board, reducing the process difficulty, and improving the processing success rate.
[0072] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.
Claims
1. A method for manufacturing a multilayer circuit board, characterized in that, include: N substrates with metal layers on both sides are stacked sequentially through N-1 diaphragm layers, where N is an integer greater than 1; Conductive blind vias are fabricated and electroplated at predetermined positions within each substrate, and the conductive blind vias are used to connect the circuit layers on both sides of each substrate. Holes are made at predetermined positions in each of the diaphragm layers, and conductive metal pillars are fabricated in the holes. The two ends of the conductive metal pillars are used to connect to the conductive blind holes of the upper and lower substrates adjacent to the diaphragm layers, respectively. Remove each of the aforementioned membrane layers, and fabricate circuit layers on the upper and lower surfaces of the upper and lower substrates adjacent to each of the aforementioned membrane layers; In the N substrates, at least one substrate is stacked on the outer circuit layer of the bottom substrate through other diaphragm layers, and the metal layers of all substrates are pressed together. A circuit layer is fabricated on the upper surface of the top substrate and the lower surface of the bottom substrate in the N substrates.
2. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, The process of fabricating and electroplating conductive blind vias at predetermined positions within each substrate includes: At least one blind via is fabricated at a predetermined location for all substrates and all circuit layers, and metal is plated into each blind via to form the conductive blind via.
3. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, Making holes at predetermined positions in each of the aforementioned membrane layers, and fabricating conductive metal pillars within the holes, includes: Metal is electroplated at the location corresponding to the conductive blind hole in the diaphragm layer, and the conductive metal pillar is formed inside the conductive blind hole in the diaphragm layer.
4. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, Fabricating circuit layers on the upper and lower surfaces of the upper and lower substrates adjacent to each of the aforementioned diaphragm layers includes: Based on the preset circuit patterns of each of the metal layers, the circuit layers are fabricated on each of the metal layers.
5. The method for manufacturing a multilayer circuit board according to claim 1, characterized in that, After laminating the metal layers of all substrates, and before fabricating circuit layers on the upper surface of the top substrate and the lower surface of the bottom substrate among the N substrates, the fabrication method further includes: Conductive vias are formed at predetermined positions on the upper surface of the top substrate or the lower surface of the bottom substrate among N substrates, for penetrating the N substrates, and the conductive vias are used to connect the respective metal layers of the N substrates.
6. A multilayer circuit board, characterized in that, A multilayer circuit board is fabricated using the method described in any one of claims 1-5, wherein the multilayer circuit board comprises: N first substrates with circuit layers on both sides are stacked and spaced apart in sequence, where N is an integer greater than 1; N conductive blind vias, each of which is located within a first substrate, and each of which is electroplated with metal; N-1 conductive metal pillars, each of which is connected to a conductive blind via of an adjacent first substrate in the upper and lower layers; The second substrate has a diaphragm layer disposed thereon, and the N first substrates with circuit layers attached to both sides are disposed thereon.
7. The multilayer circuit board according to claim 6, characterized in that, The multilayer circuit board also includes: A conductive via is provided through the second substrate and N first substrates, and the conductive via connects the second substrate and each of the circuit layers of the N first substrates with circuit layers on both sides.
8. The multilayer circuit board according to claim 6, characterized in that, The conductive metal pillar is a circular copper pillar.
9. The multilayer circuit board according to claim 6, characterized in that, The diameter of the conductive metal pillar is larger than the diameter of the conductive blind hole.
10. The multilayer circuit board according to claim 6, characterized in that, The height of the conductive metal column is greater than 0.05 mm and less than 0.15 mm.
Citation Information
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