A daisy-chain timer interconnection trigger system

Through the daisy-chain timer interconnection trigger system, the problem of inconsistent timing control of multiple timers in MCU application scenarios is solved, the synchronization and adjustable timing of timers are realized, and the reliability of data processing and system adaptability are improved.

CN116149222BActive Publication Date: 2025-07-29AMICRO SEMICONDUCTOR CO LTD
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Patent Information

Application Number
CN202310051686.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-02
Publication Date
2025-07-29
Estimated Expiration
2043-02-02

AI Technical Summary

Technical Problem

In MCU application scenarios, the timing control of multiple timers is inconsistent, resulting in the inability of each timer to start timing at the same time or the timing length is unadjustable, affecting data reliability and applicable scenarios.

Method used

The daisy-chain timer interconnect trigger system is adopted. Through multiple timers coupled daisy-chain, the trigger input and output are set, and other timers are synchronized or started in sequence with the reference timer to ensure that the timing start point is aligned and the timing length is adjustable.

Benefits of technology

It realizes synchronous timing and data processing of multiple timers under different temporal sequence conditions, improving data reliability and the system's ability to deal with various delay scenarios.

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Abstract

The present application discloses a daisy-chain ring type timer interconnection trigger system, which includes a plurality of timers coupled in a daisy-chain ring type. Each timer is provided with a trigger input terminal and a trigger output terminal. Among the plurality of timers, there is a reference timer. When the reference timer is configured to send out a trigger signal externally, the plurality of timers coupled to the trigger output terminal of the reference timer are configured to receive the trigger signal through their trigger input terminals, so as to drive each timer that needs to be synchronized except the reference timer to start timing simultaneously. When the reference timer is configured to send out a trigger signal externally, at least one timer coupled to the trigger output terminal of the reference timer is configured to receive the trigger signal through its trigger input terminal, so as to realize starting the timing of some or all of the timers in sequence starting from the reference timer.
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Description

Technical Field

[0001] The present invention relates to the technical field of timer triggering, and particularly relates to a daisy-chain type timer interconnection triggering system. Background Art

[0002] In some MCU application scenarios, the timing control requirements for certain modules are getting higher and higher, such as multiple ADCs sampling analog data and resetting, precise control of multiple motors, etc. Generally, for this type of timing control, multiple counter modules count to a certain value and then complete the timing work through trigger signals; the CPU configures each timer in a serial manner, and the pulse intervals generated between each timer are not fixed, resulting in that each timer cannot start counting simultaneously, or the timing length is not adjustable, so that the applicable timing scenarios are limited.

[0003] For example, after multiple electronic devices that rely on timers are serially connected or establish serial communication and perform digital conversion in sequence within the same timing time, since the clock pulses generated inside the timers used by different electronic devices are different and are not configured to be synchronized with a reference clock source or are out of sync with each other, the data processed and converted by each electronic device is unreliable data, or it is impossible to obtain the data itself. Summary of the Invention

[0004] The present application discloses a daisy-chain type timer interconnection triggering system, and the specific technical solution is as follows:

[0005] A daisy-chain type timer interconnection triggering system, the daisy-chain type timer interconnection triggering system includes multiple timers coupled in a daisy-chain manner, and each timer is provided with a trigger input terminal and a trigger output terminal; there is a reference timer among the multiple timers; when the reference timer is configured to send out a trigger signal externally, the multiple timers coupled to the trigger output terminal of the reference timer are configured to receive the trigger signal through their trigger input terminals to drive each timer that needs to be synchronized except the reference timer to start timing simultaneously; when the reference timer is configured to send out a trigger signal externally, at least one timer coupled to the trigger output terminal of the reference timer is configured to receive the trigger signal through its trigger input terminal to sequentially start timing of some or all of the timers starting from the reference timer; wherein, the time interval between the timing start points of two sequentially timed timers is configured to be the same value.

[0006] Further, among multiple timers coupled in a daisy-chain manner, there are the following connection methods: The connection method between the reference timer and one timer is that the trigger output terminal of the reference timer is coupled to the trigger input terminal of one timer, so that when the reference timer is configured to be in the host mode, the timer coupled to the trigger output terminal of the reference timer is configured to be in the slave mode; the reference timer is located at the center of the daisy chain; among each timer except the reference timer, the trigger output terminal of each timer is coupled to the trigger input terminal of the next timer, and the trigger input terminal of each timer is coupled to the trigger output terminal of the previous timer; wherein, the next timer coupled to the timer that is timing is a timer that is timing later relative to the timer that is timing; the previous timer coupled to the timer that is timing is a timer that is timing earlier relative to the timer that is timing.

[0007] Further, in the timers coupled in a daisy-chain manner, the trigger output terminal of the reference timer is coupled to the trigger input terminals of other timers, wherein the number of timers coupled in a daisy-chain manner is (N + 1); the number of timers coupled to the reference timer is N, and N is a positive integer; the number of timers that are sequentially started to time from the reference timer is less than or equal to (N + 1), wherein the timers that are sequentially started to time from the reference timer include the reference counter; or, the number of timers that need to be synchronized except the reference timer is less than or equal to N.

[0008] Further, among each timer coupled to the reference timer, there is at least one timer whose trigger output terminal is coupled to the trigger input terminal of the reference timer, so that when the reference timer is configured to be in the slave mode, the timer coupled to the trigger input terminal of the reference timer is configured to be in the host mode; the timer coupled to the trigger input terminal of the reference timer is the (2*m + 1)-th timer or the (2*m)-th timer, wherein m is a non-negative integer, and the maximum values of both (N + 1) and (2*m) are less than or equal to N.

[0009] Further, in the timers coupled to the reference timer, the time interval between the start time of each timer and the start time of the reference timer is a preset trigger period. When the time intervals between the start times of each timer are configured to be 0, each timer coupled to the reference timer is triggered to start timing simultaneously; wherein, each timer coupled to the reference timer is each timer except the reference timer; among each timer coupled to the reference timer, the timers that need to be synchronized are selected by software instructions; wherein, the preset trigger period is the sum of the timing period of the reference timer and a preset trigger delay, and the timing period of the reference timer is equal to the timing period of any other timer.

[0010] Further, among the respective timers coupled to the reference timer, the trigger output terminal of the i-th timer is coupled to the trigger input terminal of the (i + 1)-th timer, and the trigger output terminal of the N-th timer is coupled to the trigger input terminal of the 1st timer, so that the N timers form a ring chain structure connected end to end, providing a hardware basis for starting the timing of each timer in sequence starting from the reference timer, where i is within a preset integer range, the upper limit value of the preset integer range is (N - 1), and the lower limit value of the preset integer range is 1; and / or, among the respective timers coupled to the reference timer, the trigger input terminal of the i-th timer is coupled to the trigger output terminal of the (i + 1)-th timer, and the trigger input terminal of the N-th timer is coupled to the trigger output terminal of the 1st timer, so that the N timers form a ring chain structure connected end to end, providing a hardware basis for starting the timing of each timer in sequence starting from the reference timer, where i is within a preset integer range, the upper limit value of the preset integer range is (N - 1), and the lower limit value of the preset integer range is 1.

[0011] Further, when both timers are triggered by the reference timer to start timing simultaneously, the two timers start counting from the same timing start point; when starting the timing of each timer in sequence starting from the reference timer, the timing start point of each timer is aligned to the corresponding rising edge generated by a system clock source with a fixed clock frequency, the clock terminal of each timer is coupled to the system clock source, the trigger signal and the clock signal generated by the system clock source are in an edge-aligned state, and the time interval between the timing start points of two sequentially timed timers is equal to the sum of the timing period of the previously timed timer and the preset trigger delay.

[0012] Further, among the multiple timers coupled in a daisy chain loop, each timer includes a mode register, and the mode register includes a working mode configuration register and a trigger configuration register; the mode register is used to, when the timer to which it belongs is in the host mode, configure the functions that the externally coupled timer in the slave mode needs to execute through the internal working mode configuration register, and output a corresponding trigger signal to the externally coupled timer in the slave mode to trigger the externally coupled timer in the slave mode to execute the correspondingly configured functions.

[0013] Further, the working mode configuration register is used to configure whether the timer is in the host mode or the slave mode; the working mode configuration register is used to, when the timer is in the host mode, determine the trigger mode that the externally coupled timer in the slave mode needs to reach, and output a trigger signal to the externally coupled timer; the working mode configuration register is used to, when the timer is in the slave mode, determine the restart mode or pause mode that the timer needs to enter to enable timing after the timer to which it belongs receives the trigger signal.

[0014] Further, a trigger configuration register is triggered to select a trigger source according to the field information corresponding to an externally input trigger signal, and set a level trigger mode or an edge trigger mode to determine the trigger mode required to be achieved by the timer to which the trigger configuration register belongs; wherein different types of trigger sources respectively correspond to different field information of the same register, so as to facilitate the selection by the trigger configuration register; the timer to which the trigger configuration register belongs includes an internal edge detector, and each time the internal edge detector detects a rising edge of the trigger signal, a clock pulse is generated to activate the timing function triggered by the rising edge in the timer to which the trigger configuration register belongs.

[0015] Further, among multiple timers coupled in a daisy chain, two coupled timers are respectively configured as a first timer and a second timer through a working mode configuration register, wherein the trigger output terminal of the first timer is coupled to the trigger input terminal of the second timer to output the trigger signal generated by the trigger output terminal of the first timer to the second timer; the first timer is in a host mode, and the second timer is in a slave mode.

[0016] Further, when the trigger input terminal of the first timer is further coupled to the trigger output terminal of the second timer, the first timer is updated to be in a slave mode, and the second timer is updated to be in a host mode to output the trigger signal generated by the trigger output terminal of the second timer to the first timer; wherein the first timer and the second timer support being successively updated to any two coupled timers among multiple timers coupled in a daisy chain.

[0017] Further, the first timer includes a first mode register, and the first mode register includes a first working mode configuration register and a first trigger configuration register; the second timer includes a second mode register, and the second mode register includes a second working mode configuration register and a second trigger configuration register; when the first timer is in the host mode and the second timer is in the slave mode, the data output terminal of the first working mode configuration register is coupled to the data input terminal of the second trigger configuration register to transmit the trigger signal output by the first working mode configuration register to the second trigger configuration register; when the second timer is in the host mode and the first timer is in the slave mode, the data output terminal of the second working mode configuration register is coupled to the data input terminal of the first trigger configuration register to transmit the trigger signal output by the second working mode configuration register to the first trigger configuration register; wherein, among the multiple timers coupled in a daisy-chain, the trigger sequence for starting the timing of each timer in sequence starting from the reference timer, and the trigger sequence for starting the timing of each timer that needs to be synchronized except the reference timer at the same time are both from the timer in the host mode to the timer in the slave mode.

[0018] The technical effect of this application is that among the multiple timers coupled in a daisy-chain, it is possible to start the timing of some or all of the timers arranged on the ring chain simultaneously from the timer arranged at the center of the daisy-chain, or to trigger some or all of the timers connected on the ring chain in sequence to start timing successively, so as to meet the data processing requirements under different timing conditions, and also make the data processed and converted by each timer in the daisy-chain timer interconnection trigger system designed by this application become effective and reliable; improve the ability of the daisy-chain timer interconnection trigger system to cope with various delay scenarios.

[0019] In this application, among the multiple timers coupled in a daisy-chain, the reference timer located at the center of the daisy-chain can start the synchronous timing of multiple timers coupled to its trigger output terminal at the same time, so that the circuit modules that require multiple synchronous pulse signals to work can be started or reset simultaneously.

[0020] Since the trigger input terminal of the first timer is coupled to the trigger output terminal of the second timer, and at the same time the trigger output terminal of the first timer is coupled to the trigger input terminal of the second timer, and there is more than one such first timer in the same daisy-chain timer interconnection trigger system, there are multiple timers that can exchange roles between the host and the slave. Therefore, the multiple timers interconnected in a daisy-chain can not only be actively triggered as the host, but also be triggered as the slave, with high application flexibility.

[0021] Moreover, there is no specific order for triggering between multiple timers coupled in a daisy chain. It only needs to follow the correspondence between the master-slave modes determined by the configuration register in the daisy chain, and then the series-connected timers can be triggered in an orderly manner (the trigger output terminal of the previous timer is coupled to the trigger input terminal of the next timer), or multiple timers can be started to count simultaneously.

[0022] Among multiple timers coupled in a daisy chain, among the timers coupled to the reference timer, for the i-th timer, its trigger output terminal is coupled to the trigger input terminal of the (i + 1)-th timer, and the trigger output terminal of the N-th timer is coupled to the trigger input terminal of the 1st timer; or, among the timers coupled to the reference timer, for the i-th timer, its trigger input terminal is coupled to the trigger output terminal of the (i + 1)-th timer, and the trigger input terminal of the N-th timer is coupled to the trigger output terminal of the 1st timer, so that the N timers form a ring chain structure with the head and tail connected. To start counting for each timer in sequence starting from the reference timer, since the N-th timer is coupled to the 1st timer, the overall counting length can be cyclically changed between the N-th timer and the 1st timer, making the counting length adjustable with a wide adjustable range. Coupled with the fact that the timers coupled to the reference timer can count synchronously, the counting reset trigger operation of the daisy-chain timer interconnection trigger system can meet the requirements of various application scenarios, that is, both the synchronous counting range and the delay range can be effectively extended and are restricted by the configuration information of the register. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 FIG. is a schematic structural diagram formed by daisy-chain coupling of 7 timers disclosed in an embodiment of the present application. Among them, TIMER0 is used as the reference timer and is located at the center of the daisy chain.

[0024] Figure 2 FIG. is a schematic connection diagram of a first timer and a second timer disclosed in another embodiment of the present application. EMBODIMENTS

[0025] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be described and explained below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present application. Based on the embodiments provided in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0026] In order to flexibly utilize timers, including implementing the simultaneous timing of multiple timers triggered in the same hardware system and the sequential timing of multiple timers triggered one after another to meet the delay timing requirements in various scenarios, this embodiment discloses a daisy-chain timer interconnection triggering system. The daisy-chain timer interconnection triggering system includes multiple timers coupled in a daisy-chain manner, and each timer is provided with a trigger input terminal and a trigger output terminal; among the multiple timers, there is a reference timer. In this embodiment, the number of timers coupled in a daisy-chain manner is not limited, specifically, the number of timers forming a ring-chain structure is not limited, as long as the specific application scenario is satisfied. The daisy chain disclosed in this application is a wiring mode in which multiple timers are connected in series or in a loop. Each timer includes a trigger input terminal and a trigger output terminal, and each end can be coupled to the system bus. The third port in each timer is adapted to receive an enable control signal from the outside to control the internal counter to start counting from the initial count value, that is, to start the timer timing. Compared with the prior art, the multiple timers coupled in a daisy-chain manner disclosed in this embodiment can support both the serial triggering of multiple timers (that is, triggering timing in sequence according to a fixed clock cycle) and the parallel triggering of multiple timers (that is, realizing the simultaneous start of multiple timers in the same clock cycle).

[0027] When the reference timer is configured to send out a trigger signal externally, the multiple timers coupled to the trigger output terminal of the reference timer are configured to receive the trigger signal through their trigger input terminals to drive each of the timers that need to be synchronized except the reference timer to start timing simultaneously (which can also be understood as starting the synchronous timing of multiple timers), or it can also be described as simultaneously starting the timing of each of the timers that need to be synchronized except the reference timer; the timers that need to be synchronized here are not necessarily all the timers except the reference timer, but can be timers selected in advance through software instructions, and a symmetrical layout pattern of multiple timers centered on the reference timer can be formed, so that one timer can start multiple timers simultaneously. In the daisy-chain timer interconnection triggering system, the time intervals between the timing start points of each of the timers except the reference timer are equal. When the time interval between any two of the timers except the reference timer is 0, the synchronous start of timing of each of the timers except the reference timer can be achieved under the trigger of the reference timer. Considering extreme application scenarios, the best case is to drive all the timers except the reference timer to start timing simultaneously.

[0028] When the reference timer is configured to send out a trigger signal externally, at least one timer coupled to the trigger output end of the reference timer is configured to receive the trigger signal through its trigger input end, so as to realize starting the timing of some or all of the timers in sequence from the reference timer, that is, serially triggering multiple timers on the same daisy-chain structure. Specifically, starting from the reference timer, a timer is triggered to start timing every other counting cycle, and the timing start point of each timer can be aligned to the rising edge generated by the system clock source to achieve the effect of edge synchronization. When starting the timing of some or all of the timers in sequence from the reference timer, the trigger output end of the reference timer can be coupled only to the trigger input end of one timer, the trigger signal output by the reference timer is transmitted to this timer, and the trigger signal output by this timer is transmitted to the next timer, triggering multiple timers in sequence according to the established loop direction, and can return to the reference timer or the first timer triggered by the reference timer.

[0029] In this embodiment, among the multiple timers coupled in a daisy-chain, two adjacent timers can be directly connected by the trigger output end of one timer to the trigger input end of the other timer, or the trigger output end of one timer can be indirectly connected to the trigger input end of the other timer through a register. However, the delay time of the register, the counting cycle of the timer, and the clock cycle to which they are all connected are pre-configured. The time interval between the timing start points of two sequentially timed timers is configured to be the same value. For example, after the reference timer starts timing, after one timing cycle, a trigger signal is output to the coupled timer, and after a preset trigger delay, the coupled timer starts timing. At this time, it is default that the timing cycle (the initial count value and the maximum count value are the same) and the preset trigger delay configured for each timer coupled in a daisy-chain are the same. Another example is that after the reference timer starts timing, after a target time less than one timing cycle, a trigger signal is output to the coupled timer, and after a preset trigger delay, the coupled timer starts timing but the timing start point is aligned to the rising edge generated by the system clock source. At this time, it is default that the target time less than one timing cycle and the preset trigger delay configured for each timer coupled in a daisy-chain are the same.

[0030] In summary, in a plurality of timers coupled in a daisy-chain loop, it is possible to trigger some or all of the timers arranged on the loop chain to start timing simultaneously starting from the timer arranged at the center of the daisy chain, or to sequentially trigger some or all of the connected timers on the loop chain to perform timing, so as to meet the data processing requirements under different timing conditions, and also make the data converted and processed by each timer in the daisy-chain loop timer interconnection trigger system designed by this application become effective and reliable; improve the ability of the daisy-chain loop timer interconnection trigger system to cope with various delay scenarios.

[0031] It should be noted that when a plurality of timers are coupled in a daisy-chain loop, each timer respectively has two connection ends, and the connection ends can be connected to one of the connection ends of any timer, and the other connection end is connected to one of the connection ends of another timer, so that they are coupled in a daisy chain. For example, the two connection ends can be respectively a trigger input end and a trigger output end, which can be shown in the shape of an interface that can be conveniently connected in the entity, but the present invention is not limited thereto. In fact, each connection end can perform data output and input.

[0032] Preferably, the trigger input end and the trigger output end can be used to connect the timers into a daisy-chain arrangement separated from the system bus. The daisy-chain arrangement means that the trigger input end of one timer is electrically connected to the trigger output end of the adjacent timer. The connection can be completed by soldering, by layout using printed circuit or layout tools, or by connecting through socket pins.

[0033] Specifically, among a plurality of timers coupled in a daisy-chain loop, there are the following connection methods: the connection method between the reference timer and a timer is that the trigger output end of the reference timer is coupled to the trigger input end of a timer, so that when the reference timer is configured to be in the host mode, the timer coupled to the trigger output end of the reference timer is configured to be in the slave mode. Among them, the slave mode and the host mode are determined by the internal working mode configuration register, and at the same time, the transmission direction of the trigger signal is also determined, that is, it is determined that the timer in the host mode starts timing first, and then drives the timer in the slave mode to reset, start timing, or stop timing through the trigger signal. In the daisy-chain loop timer interconnection trigger system, the reference timer is located at the center of the daisy chain, and the remaining timers are arranged in a loop chain structure, forming a daisy-chain loop arrangement structure, including a plurality of timer series connection structures and a plurality of timer parallel connection structures.

[0034] In this embodiment, among each timer except the reference timer, the trigger output terminal of each timer is coupled to the trigger input terminal of the next timer, and the trigger input terminal of each timer is coupled to the trigger output terminal of the previous timer; when the direction from the trigger output terminal to the trigger input terminal is the transmission direction of the trigger signal, the timer where the trigger output terminal is located is in the host mode, the timer where the trigger output terminal is located is in the host mode, and the timer where the trigger input terminal is located is in the slave mode; it should be noted that the next timer coupled to the timer that is currently timing is a timer that is timing later relative to the timer that is currently timing. It can be understood that the next timer coupled to the currently triggered timer is a timer that is timing later relative to the currently triggered timer. Then, relative to the coupled next timer, the currently triggered timer is a timer that is timing earlier. The previous timer coupled to the timer that is currently timing is a timer that is timing earlier relative to the timer that is currently timing. It can be understood that the previous timer coupled to the currently triggered timer is a timer that is timing earlier relative to the currently triggered timer. Then, relative to the coupled previous timer, the currently triggered timer is a timer that is timing later. Thus, each timer is connected to a relatively earlier-timing timer and a relatively later-timing timer. For the same timer, the relatively earlier-timing timer is denoted as the upstream timer, and the relatively later-timing timer is denoted as the downstream timer. Each timer receives the trigger signal from the upstream timer and, when necessary, transmits its own generated trigger signal to the downstream timer. In this embodiment, the daisy-chain structure requires the field ID or storage address pre-configured in the register so that the controllers inside and outside the daisy-chain timer interconnection trigger system can communicate with specific timers.

[0035] As an embodiment, among the timers coupled in a daisy-chain, the reference timer is provided with one trigger output terminal, and the trigger output terminal of the reference timer is coupled to the trigger input terminals of other timers, that is, the trigger input terminals of the timers except the reference timer are all coupled to the only one trigger output terminal of the reference timer, so that the trigger signal output by the reference timer at its trigger output terminal can simultaneously trigger each timer except the reference timer to start timing. Each timer except the reference timer can share the same trigger signal output by the reference timer in terms of hardware connection relationship; among them, the number of timers coupled in a daisy-chain is (N + 1); the number of timers coupled to the reference timer is N, and N is a positive integer. Preferably, both the trigger input terminal of the timer and the trigger output terminal of the same timer can be coupled to the node outside the daisy-chain.

[0036] Refer to Figure 1It can be seen that the reference timer TIMER0 is connected in a daisy chain with six timers TIMER1, TIMER2, TIMER3, TIMER4, TIMER5, and TIMER6, which can also be understood as a daisy chain arrangement formed by connecting the trigger input terminal and the trigger output terminal to each other. TIMER0, as the reference timer, is located at the center of the daisy chain. The reference timer TIMER0 is provided with a trigger output terminal and a trigger input terminal. In order to completely represent the trigger signal flow relationship between the timers TIMER1, TIMER2, TIMER3, TIMER4, TIMER5, and TIMER6 and the reference timer TIMER0 respectively, then in Figure 1 six arrows radiating outward from the center are drawn successively around the reference timer TIMER0, Figure 1 there are seven timers in Figure 1 , N is equal to 6, and the seven timers can be configured by their respective internal registers to have the same functional type. In some embodiments, the number of timers starting to be timed from the reference timer is less than or equal to (N + 1), where the timers starting to be timed from the reference timer include the reference counter. For example, first start TIMER0 to start timing, then start TIMER1 to start timing, and then start TIMER2 or TIMER4 to start timing. In other embodiments, the number of timers that need to be synchronized except for the reference timer is less than or equal to N. For example, the reference timer starts timing and outputs trigger signals to the timers TIMER2, TIMER4, and TIMER6 that need to be synchronized respectively to start the timers TIMER2, TIMER4, and TIMER6 to start timing simultaneously.

[0037] As an embodiment, among the respective timers coupled to the reference timer, there is at least one timer whose trigger output terminal is coupled to the trigger input terminal of the reference timer, so that when the reference timer is configured to be in the slave mode, the timer coupled to the trigger input terminal of the reference timer is configured to be in the master mode. Then, the timers other than the reference timer can output trigger signals to the reference timer, causing the timers other than the reference timer to count first, and then trigger the reference timer to start counting or pause counting. In this embodiment, the timer coupled to the trigger input terminal of the reference timer is the (2*m + 1)-th timer or the (2*m)-th timer, where m is a non-negative integer, and the maximum values of (2*m + 1) and (2*m) are both less than or equal to N. (2*m + 1) represents an odd number between 1 and N, and (2*m) represents an even number between 1 and N. When the (2*m)-th timer does not represent the reference timer, although the trigger output terminals of the (2*m + 1)-th timer and the (2*m)-th timer can both be coupled to the same trigger input terminal of the reference timer, since the (2*m + 1)-th timer and the (2*m)-th timer start counting at different starting points of time, the same trigger input terminal of the reference timer receives the trigger signals output by the (2*m + 1)-th timer and the (2*m)-th timer successively without interference. The specific sequence is pre-configured according to the registers inside respectively; In Figure 1 In the corresponding embodiment, among the respective timers coupled to the reference timer TIMER0, the trigger output terminals of timer TIMER1, timer TIMER3, and timer TIMER5 are all coupled to the corresponding trigger input terminals of the reference timer TIMER0. At this time, the reference timer TIMER0 is provided with one trigger input terminal, then in some embodiments, timer TIMER1, timer TIMER3, and timer TIMER5 can be configured to be in the master mode, and at the same time, the reference timer TIMER0 is configured to be in the slave mode. Therefore, in this embodiment, there is no specific order for the triggers among the multiple timers coupled in a daisy-chain manner. Only by following the corresponding relationship between the master and slave modes determined by the configuration register in the daisy chain, the respective timers connected in series can be triggered orderly (the trigger output terminal of the previous timer is coupled to the trigger input terminal of the next timer) or multiple timers can be triggered to start counting simultaneously.

[0038] As an embodiment of driving each timer that needs to be synchronized outside the reference timer to start timing simultaneously, in the timers coupled to the reference timer, the time interval between the start time points of each timer and the start time point of the reference timer is a preset trigger period. The preset trigger period is the sum value of the timing period of the reference timer and the preset trigger delay. The timing period of the reference timer is equal to the timing period of any other timer, which is convenient for configuring the delay length and flexibly adjusting the required synchronous timing relationship. The timing period of the reference timer can be the time consumed from the initial count value to the maximum count value, so that the reference timer triggers the timer coupled to it to start timing after automatic overflow, thereby ensuring the reliability of automatic synchronous timing of each timer from the standard start time point.

[0039] In order to provide an effective adjustable hardware structure, each of these timers is in the daisy-chain timer interconnection trigger system. Each timer except the reference timer includes each timer that needs to be synchronized. The time interval between the start time points of each timer coupled to the reference timer is 0, so that each timer coupled to the reference timer starts timing simultaneously. And among the timers coupled to the reference timer, the timers that need to be synchronized are selected by software instructions and are multiple timers selected in the daisy-chain timer interconnection trigger system. Therefore, among the multiple timers coupled in a daisy-chain, the reference timer located at the center of the daisy chain can start multiple timers coupled to its trigger output end to start timing simultaneously, so that a circuit module that requires multiple synchronous pulse signals to work can be started or reset simultaneously.

[0040] As an embodiment, in the daisy-chain timer interconnection trigger system, among the timers coupled to the reference timer, the trigger output end of the i-th timer is coupled to the trigger input end of the (i + 1)-th timer, and the trigger output end of the N-th timer is coupled to the trigger input end of the 1st timer, so that N timers form a ring chain structure connected end to end. Moreover, in the ring chain structure, the timers are marked along a fixed clockwise direction, that is, the i-th timer and the (i + 1)-th timer are marked successively, where i is within a preset integer range. The upper limit value of the preset integer range is (N - 1), and the lower limit value of the preset integer range is 1. Corresponding to Figure 1 in which N is the value 6, and i can vary from the value 1 to 5. Thus, it provides a hardware basis for starting the timing of each timer in sequence from the reference timer. The time interval between the successive start times of two adjacent timers can be equal to the preset trigger period. Here, two adjacent timers can be represented by the i-th timer and the (i + 1)-th timer. For example Figure 1 the timer TIMER1 and the timer TIMER2 in Figure 1In the figure, the timers are marked as TIMER2, TIMER3, TIMER4, TIMER5, and TIMER6 in a clockwise direction starting from TIMER1. Since there is an arrow from TIMER1 to TIMER2 between TIMER1 and TIMER2, when TIMER1 is represented as the first timer, TIMER2 is represented as the second timer. Among them, the first timer is in the host mode, and the second timer is in the slave mode. The first timer is used to trigger the second timer to start timing. Another example Figure 1 For TIMER6 and TIMER1 in the figure, since there is an arrow from TIMER6 to TIMER1 between TIMER6 and TIMER1, the sixth timer TIMER6 is in the host mode, and the first timer TIMER1 is in the slave mode. The sixth timer TIMER6 is used to trigger the first timer TIMER1 to reset and start timing again or directly stop timing.

[0041] If it is considered that the i-th timer can interchange roles between the host mode and the slave mode, among the timers coupled to the reference timer, the trigger input terminal of the i-th timer is coupled to the trigger output terminal of the (i + 1)-th timer, and the trigger input terminal of the N-th timer is coupled to the trigger output terminal of the first timer, so that the N timers form a ring chain structure connected end to end. Moreover, the timers are marked in the reverse direction of the established clockwise direction in the ring chain structure, that is, the i-th timer and the (i + 1)-th timer are marked successively, where i is within a preset integer range. The upper limit value of the preset integer range is (N - 1), and the lower limit value is 1. Corresponding to Figure 1 in the figure, N is the value 6, and i can vary from the value 1 to 5. Thus, it provides a hardware basis for starting the timing of each timer in sequence from the reference timer. The time interval between the successive start of the timing of two timers can be equal to the preset trigger period. Here, the two timers started successively are represented by the (i + 1)-th timer and the i-th timer respectively. For example Figure 1 for TIMER2 and TIMER1 in the figure, Figure 1Starting from Timer TIMER1, the timers TIMER2, TIMER3, TIMER4, TIMER5, and TIMER6 are sequentially marked in the clockwise direction; since there is an arrow from TIMER2 to TIMER1 between Timer TIMER2 and Timer TIMER1, when Timer TIMER1 is represented as the first timer, Timer TIMER2 is represented as the second timer. Among them, the second timer is in the host mode, and the first timer is in the slave mode. The second timer is used to trigger the first timer to start timing. Another example Figure 1 For Timer TIMER1 and Timer TIMER6 in []. Since there is an arrow from TIMER1 to TIMER6 between Timer TIMER6 and Timer TIMER1, the first timer TIMER1 is in the host mode, and the sixth timer TIMER6 is in the slave mode. The first timer TIMER1 is used to trigger the sixth timer TIMER6 to start timing or directly stop timing.

[0042] It should be noted that when the arrangement order of multiple timers coupled to the reference timer changes, if the timing functions and trigger configuration information of each timer are the same, the overall timing effect will not change during the process of starting the timing of each timer in sequence from the reference timer. When the arrangement order of multiple timers that need to be synchronized and coupled to the reference timer changes, if the timing functions and trigger configuration information of each timer are the same, the synchronization timing sequence of each timer that needs to be synchronized except the reference timer does not change, that is, the overall synchronization timing effect does not change. Further, if a new timer is inserted into the daisy-chain timer interconnection trigger system, the tail node and head node of the ring structure may change, and at this time, the overall timing effect or the overall synchronization timing effect will change.

[0043] It should be noted that in the case where two timers are triggered by the reference timer to start timing simultaneously, under the action of the corresponding trigger signals, at the same timing starting point, for example, both start counting from the value 0. Among them, the trigger input ends of the two timers are both coupled to a trigger input end of the reference timer, so as to drive the two timers to start timing simultaneously through a trigger signal output by the reference timer.

[0044] It should be noted that when starting the timing of each timer in sequence from the reference timer, the timing start point of each timer (including the reference timer) is aligned to the corresponding rising edge generated by the system clock source with a fixed clock frequency. Then, the clock period of the trigger signal output by each timer is equal to the clock period generated by the system clock source, and the rising edge of the trigger signal is also aligned with the corresponding rising edge generated by the system clock source. Moreover, the time interval between the timing start points of two sequentially timed timers is equal to the sum of the timing period of the previously timed timer and the preset trigger delay. The preset trigger delay is preferably twice the clock period generated by the system clock source. The timing period of the timer is preferably to count from the value 0 to the maximum count value 60 under the drive of the system clock source. Among them, the timer increments by one count each time it detects a rising edge generated by the system clock source. If the timing period of the reference timer is equal to the timing period of any other timer, the time interval between the timing start points of two sequentially timed timers is equal to the preset trigger period. Then, it is possible to output the trigger signal once every other preset trigger period in the daisy-chain timer interconnection trigger system. When the daisy-chain timer interconnection trigger system is applied to an analog-to-digital converter, digital conversion can be performed within a fixed timing period, improving the reliability and controllability of data processing (it is possible to monitor whether the data is valid within a specified time).

[0045] In summary, among multiple timers coupled in a daisy-chain manner, among the timers coupled to the reference timer, the trigger output terminal of the i-th timer is coupled to the trigger input terminal of the (i + 1)-th timer, and the trigger output terminal of the N-th timer is coupled to the trigger input terminal of the 1st timer; or, among the timers coupled to the reference timer, the trigger input terminal of the i-th timer is coupled to the trigger output terminal of the (i + 1)-th timer, and the trigger input terminal of the N-th timer is coupled to the trigger output terminal of the 1st timer, so that the N timers form a ring structure with the head and tail connected. For starting the timing of each timer in sequence from the reference timer, since the N-th timer is coupled to the 1st timer, the overall timing length can be cyclically changed between the N-th timer and the 1st timer, making the timing length adjustable with a wide adjustable range. Coupled with the fact that the timers coupled to the reference timer can start timing simultaneously, the timing reset trigger operation of the daisy-chain timer interconnection trigger system can meet the requirements of various application scenarios, that is, the range of synchronous timing and the range of delay can be effectively extended and are restricted by the configuration information of the register.

[0046] As an embodiment, among multiple timers coupled in a daisy chain, each timer includes a mode register, and the mode register includes a working mode configuration register and a trigger configuration register; in this embodiment, the mode register is used to, when the timer to which it belongs is in the host mode, configure, through the internal working mode configuration register, the functions that the externally coupled timer in the slave mode needs to execute, and output a corresponding trigger signal to the externally coupled timer in the slave mode to trigger the externally coupled timer in the slave mode to execute the correspondingly configured functions. Among them, whether a timer is in the host mode or the slave mode depends on the field configuration information of the working mode configuration register; the function that the timer in the slave mode needs to execute is a timing function in this embodiment, and of course it can also be reset, start, stop or other functions. Preferably, the trigger signal is a flag signal for starting the timer in the slave mode to perform timing, and is generated by the working mode configuration register in the timer in the host mode (marked as Figure 2 MTO of the first timer), when the timer in the host mode receives the trigger signal transmitted by the timer in the host mode, it is specifically received by the trigger configuration register in the timer in the slave mode (marked as marked as Figure 2 ITI of the second timer) to form a trigger source, and this trigger source is sufficient to control the counting rhythm of the timer in the slave mode to be synchronized with the timer in the host mode, that is, every time the rising edge generated by the system clock source is detected, one count is added, although the real-time count values are not necessarily equal.

[0047] Based on the above embodiment, the working mode configuration register is used to configure whether the timer is in the host mode or the slave mode. Among them, the field information used by the working mode configuration register to configure the host mode and the field information used to configure the slave mode respectively occupy different bit positions, forming different functional flip-flops to control the same timer to execute corresponding functions. The working mode configuration register is used to, when the timer is in the host mode, determine the trigger mode that the externally coupled timer in the slave mode needs to reach, and output a trigger signal to the externally coupled timer, and the externally output trigger signal corresponds to Figure 2 the MTO shown, which is a level signal, to trigger the externally coupled timer to start timing in the next clock cycle after receiving the trigger signal, corresponding to Figure 2In the [system], after the second timer in slave mode receives the MTO signal, it delays for one clock cycle generated by the system clock source; the MTO signal is represented by the ITI signal. As an externally coupled timer, after receiving the trigger signal and then going through one clock cycle generated by the system clock source, the second timer starts timing. The working mode configuration register is also used to determine the restart mode or pause mode that the timer needs to enter when the timer is in slave mode, so as to enable timing after the timer in question receives the trigger signal. Among them, the pause mode is to trigger the timer that is currently timing to pause; the restart mode is to trigger the timer to clear and then start timing again. Specifically, it will be reset to synchronize with the timer that needs to be synchronized or configure the timing sequence to be synchronized with the timing sequence of the timer in master mode. The timer in slave mode configures the timing sequence to be synchronized with the timing sequence of the timer in master mode. Mainly, every time a rising edge is detected, the count value is incremented by one, so that the time interval between the timing start points of the two sequentially timed timers is a fixed value, that is, the preset trigger period.

[0048] In some embodiments, the timer includes a counter. After the internal working mode configuration register enables timing, the counter starts counting from the counting initial value (such as the value 0), so that the timer is reset to start timing simultaneously with the timer that needs to be synchronized, or configure the timing sequence to be synchronized with the timing sequence of the timer in master mode. It should be noted that when the working mode configuration register enables timing, the working mode configuration register generates a counting switch signal and sets the counting switch signal to high level, triggering the counter to start counting from the counting initial value (such as the value 0). If the counter is located in the trigger configuration register, then the trigger configuration register generates a clock pulse every time a rising edge is detected to activate the timing function triggered by the rising edge in the timer.

[0049] It should be noted that the externally coupled timer in slave mode is processed as a timer that is synchronized with the clock source (i.e., achieving the effect of triggering counting at the rising edge), or a timer that needs to be synchronized other than the reference timer. The timer in master mode configures the externally coupled timer in slave mode to be synchronized with the timer in master mode, and performs counting operations synchronously under the rising edge generated by the system clock source.

[0050] As an embodiment, a trigger configuration register is triggered to select a trigger source according to the field information corresponding to an externally input trigger signal, and an internal trigger source or an external trigger source is selected as the trigger signal without distinguishing between the host mode and the slave mode; preferably, the number of internal trigger sources is three, and each trigger source is arranged inside a timer in the form of a trigger. The external trigger source is a trigger signal received by the timer to which the trigger configuration register belongs from the outside. The external trigger source may be a trigger signal received from other timers and can provide the trigger signal for the timer in the slave mode. The trigger configuration register also sets a level trigger mode or an edge trigger mode according to relevant field information to determine the counting trigger condition of the timer where the trigger configuration register is located. After determining the trigger mode required by the timer to which the trigger configuration register belongs, each time a rising edge of the trigger signal is detected, a clock pulse is generated to activate the timing function triggered by the rising edge in the timer.

[0051] In some embodiments, the timer to which the trigger configuration register belongs includes an internal edge detector; the aforementioned counter can be represented by an internal edge detector or an edge detection circuit; each time an internal edge detector detects a rising edge of an externally input trigger signal, a clock pulse is generated, and the clock pulse is configured as an internal trigger source to form an internally generated trigger signal. In the same timer, the trigger signal can be transmitted to the working mode configuration register. After receiving the trigger signal, the working mode configuration register enables the counter and then sets the counting switch signal of the counter to a high-level signal, and the counter starts a counting operation, and the timer to which the trigger configuration register belongs is in a working state of timing.

[0052] It should be noted that different types of trigger sources respectively correspond to different field information of the same register to facilitate the selection by the trigger configuration register; on this basis, the trigger source, the level trigger mode, and the edge trigger mode respectively correspond to the field information occupied at different bit positions in the register. The above signal edge can be a rising edge or a falling edge, and a rising edge can be used to define the counting frequency of the timer.

[0053] As an embodiment, among multiple timers coupled in a daisy chain, two coupled timers are respectively configured as Figure 2The first timer and the second timer shown. Specifically, the trigger output terminal of the first timer is coupled to the trigger input terminal of the second timer to output the trigger signal MTO generated by the trigger output terminal of the first timer to the second timer, and the second timer receives the trigger signal ITI delayed by a certain delay time. Among them, the first timer is in the host mode, and the second timer is in the slave mode.

[0054] Based on the above embodiment, when the trigger input terminal of the first timer is further coupled to the trigger output terminal of the second timer, the first timer is updated to be in the slave mode, and the second timer is updated to be in the host mode to output the trigger signal generated by the trigger output terminal of the second timer to the first timer. Among them, the first timer and the second timer are any two timers coupled among multiple timers that support being successively updated to be coupled in a daisy chain manner, so that the same timer can perform role swapping between the host and the slave. Since the trigger input terminal of the first timer is coupled to the trigger output terminal of the second timer, and at the same time the trigger output terminal of the first timer is coupled to the trigger input terminal of the second timer, and there is not only one such first timer in the same daisy-chain timer interconnection trigger system, there are multiple timers that can perform role swapping between the host and the slave. Then, multiple timers interconnected in a daisy chain can be triggered actively as the host or be triggered as the slave, with relatively high application flexibility.

[0055] As an embodiment, as Figure 2 shown, the first timer includes a first mode register, and the first mode register includes a first working mode configuration register and a first trigger configuration register; the second timer includes a second mode register, and the second mode register includes a second working mode configuration register and a second trigger configuration register; the first timer can also be coupled to other timers in the daisy-chain timer interconnection trigger system. Of course, the second timer can also be coupled to other timers in the daisy-chain timer interconnection trigger system.

[0056] When the first timer is in the host mode and the second timer is in the slave mode, the data output terminal of the first working mode configuration register is coupled to the data input terminal of the second trigger configuration register to transmit the trigger signal output by the first working mode configuration register to the second trigger configuration register. Among them, the data input terminal of the first trigger configuration register can be coupled to the data output terminal of the working mode configuration register of its upstream timer, and the data output terminal of the second working mode configuration register can be coupled to the data input terminal of the trigger configuration register of its downstream timer. Specifically, the first working mode configuration register is used to determine the trigger mode required for the externally coupled second timer when the first timer is in the host mode, and output a trigger signal MTO (the first MTO signal from left to right) to the second timer; the second trigger configuration register is used to select the input ITI signal (the second ITI signal from left to right) as the trigger source according to the field information corresponding to the trigger signal input by the first working mode configuration register, and set the level trigger mode or the edge trigger mode to determine the trigger mode required for the second timer, and will also notify it to the second working mode configuration register. At the same time, the second timer includes an internal edge detector. Every time the internal edge detector detects a rising edge of the ITI signal, a clock pulse is generated to activate the timing function triggered by the rising edge in the second timer. Similarly, the first trigger configuration register is used to select the input ITI signal (the first ITI signal from left to right) as the trigger source according to the field information corresponding to the trigger signal input by the working mode configuration register of the upstream timer, and set the level trigger mode or the edge trigger mode to determine the trigger mode required for the first timer, and will also notify it to the first working mode configuration register. At the same time, the first timer includes an internal edge detector. Every time the internal edge detector detects a rising edge of the ITI signal, a clock pulse is generated to activate the timing function triggered by the rising edge in the first timer.

[0057] Based on the foregoing embodiments, when the master and slave roles are swapped, there is a situation where the second timer is in the master mode and the first timer is in the slave mode. The data output terminal of the second working mode configuration register is coupled to the data input terminal of the first trigger configuration register to transmit the trigger signal output by the second working mode configuration register to the first trigger configuration register. Among them, the data output terminal of the first working mode configuration register can be coupled to the data input terminal of the trigger configuration register of its downstream timer, and the data input terminal of the second trigger configuration register can be coupled to the data output terminal of the working mode configuration register of its upstream timer. Specifically, the second working mode configuration register is used to determine the trigger mode required for the externally coupled first timer when the second timer is in the master mode and output a trigger signal to the first timer. The first trigger configuration register is used to select a trigger source according to the field information corresponding to the trigger signal input by the second working mode configuration register, and set the level trigger mode or the edge trigger mode to determine the trigger mode required for the first timer, and will also notify it to the first working mode configuration register. At the same time, the first timer includes an internal edge detector. Each time the internal edge detector detects a rising edge of the trigger signal, a clock pulse is generated to activate the timing function triggered by the rising edge in the first timer. Similarly, the second trigger configuration register is used to select a trigger source according to the field information corresponding to the trigger signal input by the working mode configuration register of the upstream timer, and set the level trigger mode or the edge trigger mode to determine the trigger mode required for the second timer, and will also notify it to the second working mode configuration register. At the same time, the second timer includes an internal edge detector. Each time the internal edge detector detects a rising edge of the trigger signal, a clock pulse is generated to activate the timing function triggered by the rising edge in the second timer.

[0058] It should be noted that among multiple timers coupled in a daisy chain, the trigger order for starting the timing of each timer in sequence starting from the reference timer, as well as the trigger order for starting the synchronous timing of each timer that needs to be synchronized except the reference timer, are all from the timer in the master mode to the timer in the slave mode. Corresponding to Figure 2 In the case where the first timer is in the master mode and the second timer is in the slave mode, Figure 2 the trigger order between the two timers in Figure 2 is from the first timer to the second timer, as indicated by the arrow shown in Figure 2The arrows shown point to setting the host mode and the slave mode in sequence. Thus, the ring chain structure among multiple timers coupled in a daisy chain can achieve the purpose of cascaded triggering of multiple timers under the control of the aforementioned relevant configuration registers. For example, in the clockwise direction (from left to right), it can be realized that the timer in the previous host mode triggers the timer in the current host mode (equivalent to the timer in the previous slave mode) to start, the timer in the current host mode triggers the timer in the current slave mode to start, and the timer in the current slave mode (equivalent to the timer in the next host mode) triggers the timer in the next slave mode to start.

[0059] Although embodiments using a daisy-chain type architecture have been used to describe the present invention, the present invention is also highly suitable for other types of bus architectures. Such bus architectures include those configured to transfer a trigger signal from one timing device to another timing device (however the interrupt is transferred) and remember that the trigger signal has passed through it (to facilitate subsequent interrupt searches, e.g., using binary search).

[0060] The above embodiments merely represent several embodiments of the present invention. The descriptions thereof are relatively specific and detailed, but should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of this application, several modifications and improvements can still be made, and these all belong to the protection scope of this application.

Claims

1. A daisy-chain timer interconnection trigger system, characterized in that, The daisy-chain timer interconnection trigger system includes multiple timers coupled in a daisy-chain, and each timer is provided with a trigger input terminal and a trigger output terminal; Among the multiple timers, there is a reference timer; When the reference timer is configured to send out a trigger signal externally, the multiple timers coupled to the trigger output terminal of the reference timer are configured to receive the trigger signal through their trigger input terminals, so as to drive each timer that needs to be synchronized except the reference timer to start timing simultaneously; When the reference timer is configured to send out a trigger signal externally, at least one timer coupled to the trigger output terminal of the reference timer is configured to receive the trigger signal through its trigger input terminal, so as to realize starting the timing of some or all of the timers in sequence starting from the reference timer; Among them, the time interval between the timing start points of two timers that time in sequence is configured to be the same value; In the timers coupled in a daisy-chain, the trigger output terminal of the reference timer is coupled to the trigger input terminals of other timers. Among them, the number of timers coupled in a daisy-chain is (N + 1); the number of timers coupled to the reference timer is N, and N is a positive integer; The number of timers that are started to time in sequence starting from the reference timer is less than or equal to (N + 1). Among them, the timers that are started to time in sequence starting from the reference timer include the reference counter; or, the number of timers that need to be synchronized except the reference timer is less than or equal to N.

2. The daisy-chain ring type timer interconnection trigger system according to claim 1, wherein, Among the multiple timers coupled in a daisy-chain, there are the following connection methods: The connection method between the reference timer and a timer is that the trigger output terminal of the reference timer is coupled to the trigger input terminal of a timer, so that when the reference timer is configured to be in the host mode, the timer coupled to the trigger output terminal of the reference timer is configured to be in the slave mode; The reference timer is located at the center of the daisy-chain; Among each of the timers except the reference timer, the trigger output terminal of each timer is coupled to the trigger input terminal of the next timer, and the trigger input terminal of each timer is coupled to the trigger output terminal of the previous timer; Among them, the next timer coupled to the timer that is timing is a timer that times later relative to the timer that is timing; the previous timer coupled to the timer that is timing is a timer that times earlier relative to the timer that is timing.

3. The daisy-chain ring type timer interconnection trigger system according to claim 2, wherein Among the timers coupled to the reference timer, there is at least one timer whose trigger output terminal is coupled to the trigger input terminal of the reference timer, so that when the reference timer is configured to be in the slave mode, the timer coupled to the trigger input terminal of the reference timer is configured to be in the host mode; The timer coupled to the trigger input terminal of the reference timer is the (2*m + 1)-th timer or the (2*m)-th timer, where m is a non-negative integer, and the maximum values of (2*m + 1) and (2*m) are both less than or equal to N.

4. The daisy-chain ring type timer interconnection trigger system according to claim 2, wherein In a timer coupled to a reference timer, the time interval between the start time of each timer and the start time of the reference timer is a preset trigger period. When the time interval between the start times of each timer is configured to be 0, each timer coupled to the reference timer is triggered to start timing simultaneously; Among them, each timer coupled to the reference timer is each timer other than the reference timer; among the timers coupled to the reference timer, the timers that need to be synchronized are selected by software instructions; Among them, the preset trigger period is the sum of the timing period of the reference timer and the preset trigger delay, and the timing period of the reference timer is equal to the timing period of any other timer.

5. The daisy-chain ring type timer interconnection trigger system according to claim 2, wherein, Among the timers coupled to the reference timer, the trigger output terminal of the i-th timer is coupled to the trigger input terminal of the (i + 1)-th timer, and the trigger output terminal of the N-th timer is coupled to the trigger input terminal of the first timer, so that the N timers form a ring chain structure connected end to end, providing a hardware basis for starting the timing of each timer in sequence from the reference timer, where i is within a preset integer range, the upper limit value of the preset integer range is (N - 1), and the lower limit value of the preset integer range is 1; And / or, among the timers coupled to the reference timer, the trigger input terminal of the i-th timer is coupled to the trigger output terminal of the (i + 1)-th timer, and the trigger input terminal of the N-th timer is coupled to the trigger output terminal of the first timer, so that the N timers form a ring chain structure connected end to end, providing a hardware basis for starting the timing of each timer in sequence from the reference timer, where i is within a preset integer range, the upper limit value of the preset integer range is (N - 1), and the lower limit value of the preset integer range is 1.

6. The daisy-chain ring type timer interconnection trigger system according to claim 5, characterized in that When two timers are both triggered by the reference timer to start timing simultaneously, the two timers start counting from the same start time; When starting the timing of each timer in sequence from the reference timer, the start time of each timer is aligned to the corresponding rising edge generated by a system clock source with a fixed clock frequency, the clock terminal of each timer is coupled to the system clock source, the trigger signal is in an edge-aligned posture with the clock signal generated by the system clock source, and the time interval between the start times of two sequentially timed timers is equal to the sum of the timing period of the previously timed timer and the preset trigger delay.

7. The daisy-chain ring type timer interconnection triggering system according to claim 2, characterized in that, Among multiple timers coupled in a daisy chain, each timer includes a mode register, and the mode register includes a working mode configuration register and a trigger configuration register; The mode register is used to configure, when the timer to which it belongs is in the host mode, the functions that the externally coupled timer in the slave mode needs to execute through the internal working mode configuration register, and output a corresponding trigger signal to the externally coupled timer in the slave mode to trigger the externally coupled timer in the slave mode to execute the corresponding configured functions.

8. The daisy-chain ring type timer interconnection triggering system according to claim 7, wherein, The working mode configuration register is used to configure whether the timer is in the host mode or the slave mode; The working mode configuration register is used to determine the trigger mode required for the timer in slave mode externally coupled when the timer is in master mode, and output a trigger signal to the externally coupled timer. The working mode configuration register is used to determine the restart mode or pause mode that the timer needs to enter when the timer is in slave mode, so as to enable timing after the timer receives the trigger signal.

9. The daisy-chain ring type timer interconnection trigger system according to claim 8, wherein, The trigger configuration register is used to select a trigger source according to the field information corresponding to the externally input trigger signal, and set the level trigger mode or edge trigger mode to determine the trigger mode required for the timer to which the trigger configuration register belongs; among them, different types of trigger sources respectively correspond to different field information of the same register, so as to facilitate the selection by the trigger configuration register. The timer to which the trigger configuration register belongs includes an internal edge detector. Each time the internal edge detector detects a rising edge of the trigger signal, a clock pulse is generated to activate the timing function triggered by the rising edge in the timer to which the trigger configuration register belongs.

10. The daisy-chain ring type timer interconnection trigger system according to claim 9, wherein, Among multiple timers coupled in a daisy chain, two coupled timers are respectively configured as a first timer and a second timer through the working mode configuration register. Among them, the trigger output terminal of the first timer is coupled to the trigger input terminal of the second timer to output the trigger signal generated by the trigger output terminal of the first timer to the second timer; the first timer is in master mode, and the second timer is in slave mode.

11. The daisy-chain ring type timer interconnection trigger system according to claim 10, characterized in that, When the trigger input terminal of the first timer is also coupled to the trigger output terminal of the second timer, the first timer is updated to be in slave mode, and the second timer is updated to be in master mode to output the trigger signal generated by the trigger output terminal of the second timer to the first timer. Among them, the first timer and the second timer support being successively updated to any two coupled timers among multiple timers coupled in a daisy chain.

12. The daisy-chain ring type timer interconnection trigger system according to claim 11, characterized in that, The first timer includes a first mode register, and the first mode register includes a first working mode configuration register and a first trigger configuration register. The second timer includes a second mode register, and the second mode register includes a second working mode configuration register and a second trigger configuration register. When the first timer is in master mode and the second timer is in slave mode, the data output terminal of the first working mode configuration register is coupled to the data input terminal of the second trigger configuration register to transmit the trigger signal output by the first working mode configuration register to the second trigger configuration register. When the second timer is in master mode and the first timer is in slave mode, the data output terminal of the second working mode configuration register is coupled to the data input terminal of the first trigger configuration register to transmit the trigger signal output by the second working mode configuration register to the first trigger configuration register. Among the multiple timers coupled in a daisy chain, the triggering order for starting the timing of each timer in sequence starting from the reference timer, and the triggering order for starting the timing of each timer to be synchronized other than the reference timer simultaneously are both from the timer in the host mode to the timer in the slave mode.

Citation Information

Patent Citations

  • Ring based precise time data network clock phase adjustments

    CN104365043A

  • Phase control of clock signal based on feedback

    CN112882532A