Cold data identification methods and flash memory devices

Abstract

This application relates to the field of storage device applications and discloses a method for identifying cold data and a flash memory device. The method includes: constructing a logical block unit table, wherein the logical block unit table includes at least two logical block units, and each logical block unit includes at least two logical block addresses; inspecting each logical block unit in the logical block unit table to determine the logical block unit to be identified; and determining whether the logical block unit to be identified is cold data based on a preset cold / hot data determination algorithm. By constructing a logical block unit table and inspecting each logical block unit in the table to determine the logical block unit to be identified, this application can better determine the logical block unit to be identified. Furthermore, by using a preset cold / hot data determination algorithm to determine whether the logical block unit to be identified is cold data, this application can improve the accuracy of cold data identification, thereby improving the wear leveling effect.

Description

Technical Field

[0001] This application relates to the field of storage device applications, and in particular to a method for identifying cold data and a flash memory device. Background Technology

[0002] Flash memory devices, such as solid-state drives (SSDs), are hard drives made using arrays of solid-state electronic storage chips. An SSD consists of a control unit and storage units (FLASH or DRAM storage chips). With the development of SSDs, the functionality of SSD firmware has become increasingly complex, and the storage density and required capacity have increased. Besides the increased system capacity (P2L tables, L2P tables, trimbitmap tables, and other metadata), there is also some dummy data, RAID protection data, etc., all of which occupy the entire SSD's space, resulting in less usable capacity for the user.

[0003] To increase user capacity, cold data is typically read and compressed using software to reduce the storage space of cold data on the disk, thereby expanding user capacity.

[0004] Currently, cold data is usually identified by comparing the version number of the superblock written to the flash memory medium. This selection method is prone to inaccurate selection of cold data and low accuracy in cold data identification, resulting in poor wear leveling effect.

[0005] Therefore, existing technologies urgently need improvement. Summary of the Invention

[0006] This application provides a method for identifying cold data and a flash memory device, which solves the technical problem of low accuracy in cold data identification, improves the accuracy of cold data identification, and thus improves the wear leveling effect.

[0007] To address the aforementioned technical problems, the embodiments of this application provide the following technical solutions:

[0008] In a first aspect, embodiments of this application provide a method for identifying cold data, applied to a flash memory device, the method comprising:

[0009] Construct a logical block unit table, wherein the logical block unit table includes at least two logical block units, and each logical block unit includes at least two logical block addresses;

[0010] Each logic block cell in the logic block cell table is inspected to determine the logic block cell to be identified;

[0011] Based on a preset hot and cold data determination algorithm, it is determined whether the logic block unit to be identified is cold data.

[0012] In some embodiments, the logical block unit table includes table entry information, which includes:

[0013] The state information of each logical block unit, wherein the state information includes uncompressed state, compressed state; and,

[0014] The number of data reads for each logical block unit, the last read time for each logical block unit, and the last read time for each logical block address of each logical block unit; and,

[0015] A bitmap of logical block address ranges, wherein each logical block address range includes at least two logical block addresses; and,

[0016] The number of times the physical block corresponding to the logical block address has been erased.

[0017] In some embodiments, each logic block cell in the logic block cell table is inspected to determine the logic block cell to be identified, including:

[0018] Perform a routine inspection on the first logic block cell in the logic block cell table;

[0019] If a certain logic block unit satisfies the first condition, then the logic block unit is determined to be the logic block unit to be identified;

[0020] The first condition includes:

[0021] The current logical block unit's status information is uncompressed, and the number of times the current logical block unit has been read is less than a preset threshold, and the last read time of the current logical block unit is greater than a preset time threshold.

[0022] In some embodiments, the method further includes:

[0023] If a logic block unit does not meet the first condition, then it is further determined whether the logic block unit meets the second condition;

[0024] If the logic block unit satisfies the second condition, then the logic block unit is determined to be the logic block unit to be identified;

[0025] If the logic block unit does not meet the second condition, proceed to the next logic block unit, until all logic block units in the logic block unit table are traversed;

[0026] The second condition includes: the inspection level of the flash memory device is not equal to the preset level.

[0027] In some embodiments, the method further includes:

[0028] Determine the inspection level of flash memory devices, specifically including:

[0029] The inspection level of the flash memory device is determined based on its flash memory capacity. The inspection level can be either Level 1 or Level 2, with Level 1 being the default.

[0030] In some embodiments, determining whether a logic block unit to be identified is cold data is based on a preset hot / cold data determination algorithm, including:

[0031] The weighting value of the logic block unit to be identified is determined based on the parameters of the logic block unit to be identified and the information of the logic block address in the logic block unit to be identified.

[0032] Based on the weighted value and the inspection level of the flash memory device, determine whether the logical block cell to be identified is cold data.

[0033] In some embodiments,

[0034] The parameters of the logic block unit to be identified include: the last read time of the logic block unit to be identified and the number of times the data of the logic block unit to be identified has been read;

[0035] Information about the logical block address in the logical block unit to be identified includes: the last read time of the logical block address, the number of times the physical block corresponding to the logical block address has been erased, the read information of the logical block address range where the logical block address is located, and the number of times the logical block address range where the logical block address is located has been read.

[0036] Based on the parameters of the logic block unit to be identified and the information of the logic block address within that logic block unit, the weighting value of the logic block unit to be identified is determined, including:

[0037] Initialize the weighting values ​​of the logical block units to be identified;

[0038] Process the address of the first logical block in the logical block unit;

[0039] If the address of the logical block is a valid address, then update the weighting value of the logical block cell to be identified;

[0040] The number of data reads for the logic block cell to be identified is updated to the number of data reads for the logic block cell to be identified plus the number of erases for the physical block corresponding to the logic block address;

[0041] If the read information of the logical block address range where the logical block address is located has been read, then update the read count of the logical block address range where the logical block is located;

[0042] Enter the address of the next logical block in the logical block unit and repeat the above operation;

[0043] After traversing all the logical block addresses of the logical block unit to be identified, the weighting value of the logical block unit to be identified is updated to obtain the final weighting value of the logical block unit to be identified.

[0044] In some embodiments,

[0045] Initialize the weighting values ​​of the logical block units to be identified, including:

[0046] The initial weighting value of the logic block cell to be identified is the last read time of the logic block cell to be identified multiplied by the first weight.

[0047] Update the weighting values ​​of the logical block units to be identified, including:

[0048] Update the weighted value of the logical block unit to be identified to the weighted value of the logical block unit to be identified + the last read time of the logical block address * the second weight;

[0049] Update the weighted values ​​of the logic block units to be identified to obtain the final weighted values ​​of the logic block units to be identified, including:

[0050] The weighted value of the logical block cell to be identified is updated to the current weighted value - the number of data reads in the address range of the logical block cell to be identified * the third weight - the number of erases of the physical block corresponding to the logical block address * the fourth weight, so as to obtain the final weighted value of the logical block cell to be identified.

[0051] In some embodiments, the method further includes:

[0052] If the address of the logical block is invalid, proceed to the address of the next logical block.

[0053] If the information read within the address range of the logical block address where the current logical block address is located is not read, then proceed to the next logical block address.

[0054] In some embodiments, the method further includes:

[0055] If the logical block cell to be identified is determined to be cold data, the logical block cell to be identified is compressed, and the compressed data is written to the flash memory medium of the flash memory device.

[0056] In some embodiments, the method further includes:

[0057] When reading the physical block corresponding to the logical block address of the flash memory device, the table entry information of the logical block cell table is updated, specifically including:

[0058] Update the number of data reads of the logical block cell corresponding to the updated logical block address, update the last read time of the logical block cell corresponding to the updated logical block address, update the last read time of the updated logical block address, and update the bitmap of the logical block address range corresponding to the updated logical block address.

[0059] In some embodiments, the method further includes:

[0060] If the physical block corresponding to the logical block address is a compressed physical block, then the physical block is decompressed, and the status information of the logical block unit corresponding to the logical block address is updated to uncompressed.

[0061] Secondly, embodiments of this application provide a flash memory device, including:

[0062] At least one processor; and,

[0063] A memory that is communicatively connected to at least one processor; wherein,

[0064] The memory stores instructions that can be executed by at least one processor, which enables the at least one processor to perform a method for identifying cold data as described in the first aspect.

[0065] Thirdly, embodiments of this application also provide a non-volatile computer-readable storage medium storing computer-executable instructions for enabling a flash memory device to execute a cold data identification method as described in the first aspect.

[0066] The beneficial effects of this application embodiment are as follows: Unlike the prior art, this application embodiment provides a method for identifying cold data, applied to a flash memory device. The method includes: constructing a logical block cell table, wherein the logical block cell table includes at least two logical block cells, and each logical block cell includes at least two logical block addresses; performing a routine inspection on each logical block cell in the logical block cell table to determine the logical block cell to be identified; and determining whether the logical block cell to be identified is cold data based on a preset hot and cold data determination algorithm.

[0067] By constructing a logic block unit table and inspecting each logic block unit in the table to determine the logic block unit to be identified, this application can better identify the logic block unit to be identified. Furthermore, based on a preset hot and cold data determination algorithm, it can determine whether the logic block unit to be identified is cold data. This application can improve the accuracy of cold data identification, thereby improving the wear leveling effect. Attached Figure Description

[0068] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0069] Figure 1 This is a schematic diagram of the structure of a flash memory device provided in an embodiment of this application;

[0070] Figure 2 This is a schematic diagram of data processing on a flash memory medium provided in an embodiment of this application;

[0071] Figure 3 This is a flowchart illustrating a method for identifying cold data provided in an embodiment of this application;

[0072] Figure 4 This is a schematic diagram of a logic block unit provided in an embodiment of this application;

[0073] Figure 5 yes Figure 3 A detailed flowchart of step S32 in the process;

[0074] Figure 6 This is a flowchart illustrating a method for determining a logic block unit to be identified, provided in an embodiment of this application.

[0075] Figure 7 yes Figure 3 A detailed flowchart of step S33 in the process;

[0076] Figure 8 This is a flowchart illustrating a process for determining whether a logic block unit to be identified is cold data, provided in an embodiment of this application.

[0077] Figure 9 This is a schematic diagram of the structure of a flash memory device provided in an embodiment of this application. Detailed Implementation

[0078] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0079] It should be noted that, unless there is a conflict, the various features in the embodiments of this application can be combined with each other, all of which are within the protection scope of this application. Furthermore, although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than the module division in the device or the order in the flowchart. Moreover, the terms "first," "second," and "third" used in this application do not limit the data or execution order, but only distinguish identical or similar items with essentially the same function and effect.

[0080] The technical solution of this application will be described in detail below with reference to the accompanying drawings:

[0081] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of a flash memory device provided in an embodiment of this application;

[0082] like Figure 1 As shown, the flash memory device 100 includes a flash memory medium 110 and a controller 120 connected to the flash memory medium 110. The flash memory device 100 communicates with the host 200 via wired or wireless means to enable data exchange.

[0083] Flash memory medium 110, as the storage medium of flash memory device 100, is also called flash memory, Flash, Flash memory or Flash chip. It is a type of storage device and is a non-volatile memory that can retain data for a long time even without a current supply. Its storage characteristics are equivalent to hard disk, which makes flash memory medium 110 the basis for the storage medium of various portable digital devices.

[0084] The controller 120 includes a data converter 121, a processor 122, a cache 123, a flash memory controller 124, and an interface 125.

[0085] Data converter 121, connected to processor 122 and flash memory controller 124 respectively, is used to convert binary data to hexadecimal data and vice versa. Specifically, when flash memory controller 124 writes data to flash memory medium 110, data converter 121 converts the binary data to be written into hexadecimal data before writing it to flash memory medium 110. When flash memory controller 124 reads data from flash memory medium 110, data converter 121 converts the hexadecimal data stored in flash memory medium 110 into binary data, and then reads the converted data from the binary data page register. Data converter 121 may include a binary data register and a hexadecimal data register. The binary data register can be used to store data converted from hexadecimal to binary, and the hexadecimal data register can be used to store data converted from binary to hexadecimal.

[0086] The processor 122 is connected to the data converter 121, the cache 123, the flash memory controller 124, and the interface 125, respectively. The processor 122 can be connected to the data converter 121, the cache 123, the flash memory controller 124, and the interface 125 via a bus or other means. The processor is used to run non-volatile software programs, instructions, and modules stored in the cache 123, thereby implementing any method embodiment of this application.

[0087] The buffer 123 is mainly used to buffer the read / write commands sent by the host 200 and the read or write data obtained from the flash memory medium 110 according to the read / write commands sent by the host 200.

[0088] The flash controller 124 is connected to the flash media 110, the data converter 121, the processor 122, and the cache 123. It is used to access the back-end flash media 110 and manage various parameters and data I / O of the flash media 110; or, it is used to provide access interfaces and protocols, implement the corresponding SAS / SATA target protocol or NVMe protocol, obtain I / O instructions issued by the host 200, decode and generate internal private data results for execution; or, it is used to be responsible for the core processing of the flash translation layer (FTL).

[0089] Interface 125 connects host 200, data converter 121, processor 122, and buffer 123. It is used to receive data sent by host 200 or data sent by processor 122, so as to realize data transmission between host 200 and processor 122. Interface 125 can be SATA-2 interface, SATA-3 interface, SAS interface, MSATA interface, PCI-E interface, NGFF interface, CFast interface, SFF-8639 interface, and M.2 NVME / SATA protocol.

[0090] Currently, to increase user capacity, cold data is typically read and compressed using software to reduce the storage space of cold data on the disk, freeing up space for users to write more data, thereby meeting the demand for increased user capacity. Users only need to go through the decompression process when reading cold data, and it has no impact on reading hot data.

[0091] Please see Figure 2 , Figure 2 This is a schematic diagram of data processing on a flash memory medium provided in an embodiment of this application;

[0092] like Figure 2 As shown, by reading the raw data from the flash memory medium, it is determined whether the raw data is cold data. If so, the cold data is compressed in the cache to obtain compressed data, which is then written to the flash memory medium. It is understandable that if the host needs to read hot data from the flash memory medium, since the hot data has not been compressed, it can be read without decompression, thus not affecting data reading performance.

[0093] Understandably, due to the characteristics of flash memory devices, physical blocks containing existing data must be erased before new data can be written. Each erase reduces the lifespan of a physical block, so cold data is written to physical blocks with shorter lifespans whenever possible. Therefore, to improve lifespan, flash memory devices typically enable wear leveling, ensuring even writing across all physical blocks.

[0094] However, current wear leveling functions use a rather simplistic method to select cold data, such as comparing the version number of the superblock (sblk) written to the flash memory medium. This limited selection method can easily lead to inaccurate selection of cold data and low accuracy in cold data identification, resulting in poor wear leveling performance.

[0095] Based on this, this application provides a method for identifying cold data and a flash memory device to improve the accuracy of cold data identification and thus improve the effect of wear leveling.

[0096] For details, please refer to Figure 3 , Figure 3 This is a flowchart illustrating a method for identifying cold data provided in an embodiment of this application;

[0097] The cold data identification method is applied to flash memory devices. Specifically, the execution subject of the cold data identification method is one or at least two processors of the flash memory controller of the flash memory device.

[0098] like Figure 3 As shown, the method for identifying cold data includes:

[0099] Step S31: Construct a logical block unit table, wherein the logical block unit table includes at least two logical block units, and each logical block unit includes at least two logical block addresses;

[0100] Specifically, several logical block addresses (Lba) are defined as a logical block unit (Lbu). Each logical block unit corresponds to a unique number. The logical block unit table (Lbu table) includes at least two logical block units. Each logical block unit has the same number of logical block addresses, and each logical block address corresponds to a unique number.

[0101] The number of logical block addresses included in each logical block unit can be determined based on the preset granularity of the logical block unit. For example, the granularity can be 3, 4, or 5. It is understood that the granularity can be set according to specific needs and is not limited here.

[0102] For details, please refer to [link / reference]. Figure 4 , Figure 4 This is a schematic diagram of a logic block unit provided in an embodiment of this application;

[0103] like Figure 4 As shown, the granularity of the logical block unit is 4 logical block addresses. Each logical block unit (Lbu) includes 4 logical block addresses (Lba). For example, the logical block unit numbered 0 (Lbu 0) includes 4 logical block addresses (Lba), namely logical block address 0 (Lba0), logical block address 1 (Lba 1), logical block address 2 (Lba 2), and logical block address 3 (Lba3).

[0104] In this embodiment, the background hot and cold data identification mainly involves abstracting the logical block address (Lba) into logical block units (Lbu). Each Lbu is then assigned hot and cold identification attributes, such as the last read time (timestamp) of the logical block unit, the last read time (timestamp) of each logical block address within the logical block unit, the number of superblock erases (sblkerasecount), the number of reads, and the read range. During I / O operation, these attributes need to be updated and assigned values ​​in real time. The Lbu is then inspected in the background, and hot and cold weights are calculated based on the Lbu attributes. Finally, the Lbu is calibrated for hot and cold data, and cold data is sent to the compression module for compression processing, while hot data is recorded without special processing.

[0105] It is understandable that the logical block address (Lba) is a full-disk mapping for flash memory devices. During operation, the flash memory device is stored in a fixed cache, such as dynamic random access memory (DRAM) or double data rate synchronous dynamic random access memory (DDR SRAM), and its size is 1 / 1000 of the flash memory capacity of the flash memory device. The Lbu, on the other hand, is a logical partition of the Lba. The size of the Lbu is determined by the partition granularity and is stored in a cache, such as DDR.

[0106] In this embodiment of the application, by constructing a logical block unit table, which includes at least two logical block units and each logical block unit includes at least two logical block addresses, cold data can be identified at the granularity of logical block units based on the logical block unit table, thereby enabling better determination of hot and cold data.

[0107] Step S32: Inspect each logic block cell in the logic block cell table to determine the logic block cell to be identified;

[0108] Specifically, inspecting the logic block unit table refers to inspecting each logic block unit in the logic block unit table to determine whether each logic block unit is the logic block unit to be identified.

[0109] Please refer to the following: Figure 5 , Figure 5 yes Figure 3 A detailed flowchart of step S32 in the process;

[0110] like Figure 5 As shown, step S32 includes:

[0111] Step S321: Inspect the first logic block cell in the logic block cell table;

[0112] Specifically, starting from the first logical block cell in the logical block cell table, the entire logical block cell table is inspected. For example: Figure 4 The logic block unit (Lbu) with the number 0 in it.

[0113] In this embodiment of the application, the logic block unit table includes table entry information, which includes:

[0114] The state information of each logical block unit, wherein the state information includes uncompressed state, compressed state; and,

[0115] The number of data reads for each logical block unit, the last read time for each logical block unit, and the last read time for each logical block address of each logical block unit; and,

[0116] A bitmap of logical block address ranges, wherein each logical block address range includes at least two logical block addresses; and,

[0117] The number of times the physical block corresponding to the logical block address has been erased.

[0118] For details, please refer to Table 1 below, which shows the entry information of the logic block unit table.

[0119] Table Items Notes Lbu state Lbu status Lbu readcnt Lbu read count Lbu timestamp Lbu's last read timestamp Lbaepoch The last read epoch of an Lba in Lbu Lbarangebitmap A bitmap in Lbu indicating whether a range has been read. block erase cnt The total number of erases for a block corresponding to an Lba in Lbu.

[0120] Table 1

[0121] Here, Lbu state represents the state of the Lbu, i.e., the state information of the logical block unit. This state information includes an uncompressed state and a compressed state, with the uncompressed state including a compression failure state. This state information also includes a cold state and a hot state. In this embodiment, if cold data (code data) is found during inspection, the Lbu state is set to the cold state (code), and the compression module is notified to perform compression processing. When the compression module completes processing, if compression is successful, the Lbu state is set to the compressed state; if compression fails, the Lbu state is set to the uncompressed state or the compression failure state. Furthermore, during data read IO, the Lbu state is also used to determine whether decompression is needed.

[0122] Here, Lbu readcnt represents the number of times the data of a logical block unit is read, used to record the number of times the logical block unit is read. It can be understood that the number of times the data of a logical block unit is read is the sum of the number of times each logical block address within that logical block unit is read.

[0123] Wherein, Lbu timestamp represents the last read timestamp of Lbu, that is, the last read time of the logical block unit. The last read time of the logical block unit is used to record the time of the last read of the logical block unit.

[0124] Here, Lbaepoch represents the last read epoch of an Lba in the Lbu, which is the last read time of the logical block address in the logical block unit. When the host issues a read IO request, the Lba updates its Lba epoch in the Lbu table, marking the last read time of that logical block address.

[0125] Here, Lbarangebitmap represents the bitmap indicating whether a range in the Lbu has been read, i.e., a bitmap of logical block address ranges. Each logical block address range includes at least two logical block addresses. Lba range refers to a logical block address range, which is a smaller granularity in the Lbu. Each logical block address range corresponds to a bitmap (Lba rangebitmap). When the host issues a read IO request, it sets the Lba rangebitmap corresponding to the read Lba to 1. This Lba rangebitmap is an entry in the Lbu. Assuming an Lbu covers 1024 Lba, and the Lbu is divided into 32 Lbaranges, then an Lbarange is 1024 / 32 = 32. Therefore, the length of the Lbarangebitmap of an Lbu is 32, that is, the Lbarangebitmap is a 32-bit bitmap.

[0126] Here, `blockerasecnt` represents the total number of erases of the block corresponding to an Lba in the Lbu, which is the number of erases of the physical block corresponding to the logical block address. It can be understood that the Lba is a mapping of the entire disk, and the corresponding location is determined according to the mapping relationship. `blockerasecnt` is the number of erases of the physical block mapped to the Lba. `blockerasecnt` is the number of erases of the physical block corresponding to the Lba, and it is also the number of erases of the superblock (sblk) corresponding to the physical block. The superblock is a collection of multiple blocks. In this embodiment, the flash memory device is erased on a superblock basis. Therefore, the number of erases of the physical block corresponding to the logical block address is equal to the number of erases of the superblock.

[0127] It is understandable that, in terms of size order, Lbu > Lba range > Lba. An Lbu contains M Lbaranges, and an Lba range contains N Lbas. M * N = the number of Lba in an Lbu, that is, the number of Lba in an Lbu = the number of ranges in the Lbu * the number of Lba in the range.

[0128] Step S322: Determine the current logic block unit;

[0129] Specifically, when inspecting the logical block unit table, the system determines whether to send the Lbu to the hot / cold data determination module based on the table entry information stored in the Lbu table and the current inspection level.

[0130] At the beginning, the first logical block unit in the logical block unit table is taken as the current logical block unit. After processing the first logical block unit, the next logical block unit is taken as the current logical block unit.

[0131] Step S323: Determine whether the current logic block unit satisfies the first condition;

[0132] Specifically, the first condition includes: the current logical block unit's status information is uncompressed, the current logical block unit's data read count is less than a preset threshold, and the current logical block unit's last read time is greater than a preset time threshold.

[0133] If the current logic block unit satisfies the first condition, proceed to step S324;

[0134] If the current logic block unit does not meet the first condition, proceed to step S325;

[0135] Step S324: Determine the current logic block unit as the logic block unit to be identified;

[0136] Step S325: Determine whether the current logic block unit satisfies the second condition;

[0137] Specifically, the second condition includes that the inspection level of the flash memory device is not equal to the preset level.

[0138] In this embodiment, the inspection level is related to the flash memory capacity of the flash memory device. Specifically, determining the inspection level of the flash memory device includes:

[0139] The inspection level of the flash memory device is determined based on its flash memory capacity. The inspection level can be either Level 1 or Level 2, with Level 1 being the default.

[0140] Specifically, the inspection level of the flash memory device is determined based on the ratio of the remaining flash memory capacity to the total flash memory capacity. If the ratio of the remaining flash memory capacity to the total flash memory capacity is greater than or equal to a preset ratio threshold, the inspection level is determined to be the first level. If the ratio of the remaining flash memory capacity to the total flash memory capacity is less than the preset ratio threshold, the inspection level is determined to be the second level. That is, the inspection level is not equal to the first level. In this case, the current logic block unit satisfies the second condition.

[0141] It is understood that the inspection level in this application embodiment is dynamically adjusted based on changes in flash memory capacity. For example, during the inspection process, the inspection level is dynamically adjusted according to changes in the remaining flash memory capacity of the flash memory device. As data is continuously written, the remaining flash memory capacity of the flash memory device will continuously decrease. When the remaining flash memory capacity drops to a set threshold, the inspection level will be increased.

[0142] Furthermore, the total and remaining flash memory capacity of the flash memory device are represented by the number of logical block addresses (Lba). Specifically, the inspection level is dynamically adjusted based on the ratio of currently available logical block addresses (Lba) to the total number of logical block addresses (Lba) on the entire disk. For example, the inspection level can be set with six thresholds to measure the current available capacity on the disk. When writing data, the flash memory device performs a block opening operation, which can be understood as initializing physical blocks. What is initialized is a set of physical blocks, also called a superblock (sblk). During block opening, the available Lba on the disk is scanned, and the ratio of available Lba to the total number of Lba is calculated. The inspection level is adjusted based on the ratio. If the available Lba on the flash memory device is sufficient, it is level 0 (0base). As the space of the flash memory device gradually decreases, the inspection level will gradually increase, up to a maximum of level 5, making the conditions for cold data judgment more lenient and compressing more data to accommodate more data.

[0143] If the current logic block unit satisfies the second condition, proceed to step S324;

[0144] If the current logic block unit does not meet the second condition, proceed to step S326;

[0145] Step S326: Determine whether the current logic block unit is the last logic block unit;

[0146] Specifically, determining whether the current logical block unit is the last logical block unit includes: obtaining the number of the current logical block unit, determining whether the number of the current logical block unit is the last number in the logical block unit table, and if so, determining that the current logical block unit is the last logical block unit; otherwise, determining that the current logical block unit is not the last logical block unit.

[0147] If the current logic block unit is the last logic block unit, proceed to step S327;

[0148] If the current logic block unit is not the last logic block unit, return to step S322;

[0149] Specifically, proceed to the next logical block unit, and use the next logical block unit as the current logical block unit. Repeat the following steps to determine whether the next logical block unit is a logical block unit to be identified.

[0150] Step S327: End the inspection.

[0151] Specifically, if the current logical block unit is the last logical block unit, then it is determined that every logical block unit in the logical block unit table has been traversed, and the inspection of the logical block unit table ends at this time.

[0152] In this embodiment of the application, by setting a first condition and a second condition to determine whether the current logic block unit is the logic block unit to be identified, the logic block unit to be identified can be better identified, which is beneficial for determining the hot and cold data of the logic block unit and improving the identification accuracy of cold data.

[0153] In this embodiment, determining whether a logic block unit (Lbu) is cold data (codedata) is mainly accomplished in two steps: First, a rough judgment is made on the state of the logic block unit, such as the last read time and the number of reads of the Lbu; Second, if the rough judgment meets the conditions, it is sent to the hot / cold data determination algorithm, which performs a weighted summation of the states of each Lba in the Lbu related to hot / cold data to calculate whether it is cold data. Using these two steps to comprehensively determine whether a logic block unit is cold data can improve the accuracy of cold data identification.

[0154] Please refer to the following: Figure 6 , Figure 6 This is a flowchart illustrating a method for determining a logic block unit to be identified, provided in an embodiment of this application.

[0155] like Figure 6 As shown, the process for determining the logical block unit to be identified includes:

[0156] start;

[0157] Step S601: Determine the inspection level;

[0158] Specifically, the inspection level of the flash memory device is determined based on its flash memory capacity. The inspection level includes either Level 1 or Level 2, with Level 1 being the default.

[0159] Step S602: Inspect the logic block cell table to determine the current logic block cell;

[0160] Specifically, each logical block unit in the logical block unit table corresponds to a number, i.e., an index value. The index values ​​start from 0 and go up to the maximum index value. It can be understood that the maximum index value equals the number of logical block units in the logical block unit table minus 1. Assuming the number of logical block units in the logical block unit table is n, then the maximum index value is n-1.

[0161] Step S603: Determine whether the current index value is less than or equal to the maximum index value;

[0162] Specifically, assuming the current index value is index, determine whether index is less than or equal to n-1;

[0163] If the current index value is less than or equal to the maximum index value, proceed to step S604;

[0164] If the current index value is greater than the maximum index value, then the current inspection process ends.

[0165] Step S604: Determine whether the logic block unit is in an uncompressed state;

[0166] Specifically, determine whether the state information of the logic block unit is in an uncompressed state;

[0167] If the logic block unit is in an uncompressed state, proceed to step S605;

[0168] If the logic block unit is in a compressed state, proceed to step S609.

[0169] Step S605: Determine whether the number of data reads of the logic block unit is less than a preset threshold.

[0170] Specifically, the number of data reads for a logical block unit is the sum of the number of reads for each logical block address within that logical block unit. In this embodiment, the preset threshold number is set according to specific needs, for example, 500, 1000, etc.

[0171] If the number of data reads of a logic block unit is less than the preset threshold, proceed to step S606;

[0172] If the number of data reads of a logic block unit is greater than or equal to a preset threshold, proceed to step S609.

[0173] Step S606: Determine whether the last read time of the logic block unit is greater than a preset time threshold;

[0174] Specifically, the last read time of the logic block unit, i.e. the timestamp, is determined in this embodiment by converting the current time into the time interval recorded in the timestamp through an interface to determine whether the last read time of the logic block unit is greater than a preset time threshold, which is equivalent to determining whether the last read time interval of the logic block unit is greater than a preset time threshold.

[0175] If the last read time of a logic block unit is greater than a preset time threshold, proceed to step S607.

[0176] If the last read time of the logic block unit is less than or equal to the preset time threshold, proceed to step S609.

[0177] Step S607: Determine the current logic block unit as the logic block unit to be identified;

[0178] Step S608: Increment the current index value;

[0179] Specifically, incrementing the current index value includes: current index value = current index value + 1, to enter the next logical block unit, until all logical block units in the logical block unit table are traversed.

[0180] Step S609: Determine whether the inspection level is not equal to the first level.

[0181] Specifically, the inspection level is negatively correlated with the remaining flash memory capacity of the flash memory device; the less remaining flash memory capacity, the higher the inspection level. Understandably, if the inspection level is equal to the first level, it means there is a large amount of remaining flash memory capacity. In this case, the current logical block cell is not identified as the logical block cell to be identified.

[0182] If the inspection level is not equal to the first level, proceed to step S607;

[0183] If the inspection level is equal to the first level, proceed to step S608.

[0184] In this embodiment, the current logic block unit is determined to be the logic block unit to be identified by combining the status of the logic block unit, the number of data reads, and the last read time with the inspection level. This allows for better judgment of the logic block unit and further determination of whether the logic block unit needs to be judged as hot or cold data, thereby improving the recognition rate of cold data.

[0185] Step S33: Based on the preset hot and cold data determination algorithm, determine whether the logic block unit to be identified is cold data.

[0186] In this embodiment of the application, the preset hot and cold data determination algorithm is used to perform a weighted summation of the parameters of the logic block unit to be identified and the information of the logic block address of the logic block unit to obtain a weight value. Based on the weight value and the inspection level, it is determined whether the logic block unit to be identified is cold data. If the logic block unit to be identified is cold data, the logic block unit is compressed.

[0187] For details, please refer to [link / reference]. Figure 7 , Figure 7 yes Figure 3 A detailed flowchart of step S33 in the process;

[0188] like Figure 7 As shown, step S33 includes:

[0189] Step S331: Determine the weighting value of the logic block unit to be identified based on the parameters of the logic block unit to be identified and the information of the logic block address in the logic block unit to be identified;

[0190] Specifically, the parameters of the logic block unit to be identified include: the last read time of the logic block unit to be identified and the number of times the data of the logic block unit to be identified has been read;

[0191] The information of the logical block address in the logical block unit to be identified includes: the last read time of the logical block address, the number of times the physical block corresponding to the logical block address has been erased, the read information of the logical block address range where the logical block address is located, and the number of times the logical block address range where the logical block address is located has been read.

[0192] Specifically, based on the parameters of the logic block unit to be identified and the information of the logic block address within that logic block unit, the weighting value of the logic block unit to be identified is determined, including:

[0193] Initialize the weighting values ​​of the logical block units to be identified;

[0194] Specifically, the weighted value of the logic block unit to be identified is the last read time of the logic block unit to be identified multiplied by the first weight.

[0195] Process the address of the first logical block in the logical block unit;

[0196] If the address of the logical block is a valid address, then update the weighting value of the logical block cell to be identified;

[0197] Specifically, the weighted value of the logic block unit to be identified is the weighted value of the logic block unit to be identified plus the last read time of the logic block address multiplied by the second weight.

[0198] The number of data reads for the logic block cell to be identified is updated to the number of data reads for the logic block cell to be identified plus the number of erases for the physical block corresponding to the logic block address;

[0199] If the read information of the logical block address range where the logical block address is located has been read, then update the read count of the logical block address range where the logical block is located;

[0200] Enter the address of the next logical block in the logical block unit and repeat the above operation;

[0201] After traversing all the logical block addresses of the logical block unit to be identified, the weighting value of the logical block unit to be identified is updated to obtain the final weighting value of the logical block unit to be identified.

[0202] Specifically, the weighted value of the logical block unit to be identified is updated to the current weighted value - the number of data reads in the address range of the logical block where the logical block unit to be identified is located * the third weight - the number of erases of the physical block corresponding to the logical block address * the fourth weight, so as to obtain the final weighted value of the logical block unit to be identified.

[0203] Step S332: Determine whether the logical block cell to be identified is cold data based on the weighted value and the inspection level of the flash memory device.

[0204] Specifically, based on the final weighted value and the inspection level, it is determined whether the logical block unit to be identified is cold data.

[0205] In this embodiment of the application, the method further includes:

[0206] If the address of the logical block is invalid, proceed to the address of the next logical block.

[0207] If the information read within the address range of the logical block address where the current logical block address is located is not read, then proceed to the next logical block address.

[0208] In this embodiment of the application, the method further includes:

[0209] If the logical block cell to be identified is determined to be cold data, the logical block cell to be identified is compressed, and the compressed data is written to the flash memory medium of the flash memory device.

[0210] Please refer to the following: Figure 8 , Figure 8 This is a flowchart illustrating a process for determining whether a logic block unit to be identified is cold data, provided in an embodiment of this application.

[0211] like Figure 8 As shown, the process for determining whether a logical block unit to be identified is cold data includes:

[0212] start;

[0213] Step S801: Initialize the weighting value of the logic block cell to be identified as the last read time of the logic block cell to be identified * the first weight;

[0214] Specifically, when determining the hot / cold data of a logic block unit to be identified using a preset hot / cold data determination algorithm, assuming the weighting value is weight, the hot / cold data determination algorithm adds the last read time Lbutimestamp of Lbu to the weight, that is:

[0215] The initial weighting value of the logic block cell to be identified is equal to the last read time of the logic block cell to be identified multiplied by the first weight.

[0216] Specifically, the last read time of the logical block unit to be identified is converted by the interface into the time interval between the current time and the time stamp recorded in the timestamp, and the last read time interval is obtained. It can be understood that the last read time of the logical block unit to be identified can intuitively reflect that the current data is likely to be read soon.

[0217] Specifically, the first weight is a weight optimized through experimental models, which can be set according to specific needs and is not limited here.

[0218] Step S802: Traverse the timestamp of each logical block address of the logical block unit to be identified;

[0219] Specifically, it iterates through the state of each logical block address (Lba) in the logical block unit (Lbu) to be identified, such as the timestamp, and performs a weighted summation of the timestamps.

[0220] Specifically, the current logical block address corresponds to an index value. Assuming a logical block unit (Lbu) includes N logical block addresses (Lba), the index value of the first logical block address is 0, the index value of the second logical block address is 1, ..., and the index value of the Nth logical block address is (N-1).

[0221] Step S803: Determine whether the current index value is less than or equal to the maximum index value;

[0222] Specifically, if the number of logical block units in the logical block unit table is N, then the maximum index value is N-1. Determine whether the current index value is less than or equal to the maximum index value. If so, proceed to step S804.

[0223] If the current index value is greater than the maximum index value, it means that all logical block addresses in the logical block unit have been traversed, and then proceed to step S811;

[0224] Step S804: Obtain the timestamp of the current logical block address based on the current index value;

[0225] Specifically, based on the current index value, the timestamp (epoch) of the current logical block address (Lba) is determined. Understandably, the Lba's timestamp (epoch) records the time of the last read of the Lba. The program weights this timestamp in the weight; a larger epoch indicates a longer time since the last read, thus increasing the likelihood that it is codedata, and consequently, a larger weight.

[0226] It is understandable that the last read timestamp (Lbu timestamp) of a logical block unit is equal to the last read timestamp (Lba epoch) of the last logical block address read within the logical block unit (Lbu).

[0227] Step S805: Determine whether the current logical block address is a valid logical block address;

[0228] Specifically, determining whether the current logical block address is a valid logical block address includes:

[0229] The validity of a logical block address is determined by checking whether the physical address corresponding to the current logical block address has been written to or released by the program. If the physical address corresponding to the current logical block address has been written to or released by the program, then the physical address (Pma) corresponding to that logical block address is a special address, such as 0xFFFFFFFF, which can be used to determine whether the logical block address is valid.

[0230] If the physical address corresponding to the current logical block address has been written, then the current logical block address is determined to be a valid logical block address, and then proceed to step S806.

[0231] If the physical address corresponding to the current logical block address is released by the program, then the current logical block address is determined to be an invalid logical block address, and the process proceeds to step S810.

[0232] Understandably, if the current logical block address Lba is invalid, the current calculation is skipped; if the current logical block address Lba is valid, the next calculation is performed.

[0233] Step S806: Weighted value = Weighted value + Timestamp of the current logical block address * Second weight;

[0234] Specifically, if the current logical block address is a valid logical block address, then update the current weighted value = weighted value + timestamp of the current logical block address * second weight.

[0235] In this embodiment of the application, the second weight is obtained through experimental model testing based on factors such as total disk capacity, physical block lifetime, and factors that indirectly reflect the hot or cold state of data.

[0236] Step S807: Number of data reads = Number of data reads + Number of erases of the physical block corresponding to the current logical block address;

[0237] Specifically, updating the current data read count equals the total data read count plus the number of erases of the physical block corresponding to the current logical block address. The number of erases (Lbaerasecnt) of the physical block corresponding to the current logical block address records the number of erases of the physical block mapped to the logical block address (Lba). It's understandable that due to the characteristics of Nand flash memory, rewriting to the same physical location requires prior erasure. Therefore, the more times a physical block is erased, the more times it has been written to, and the more times it might be read. This reduces the likelihood that the logical block unit is cold data (codedata). During algorithm execution, the number of erases (Lbaerasecnt) of the physical block corresponding to each logical block address in the current logical block unit is added to the current logical block unit's erase count (eraseCnt).

[0238] Step S808: Determine whether the address range of the logical block containing the current logical block address has been read;

[0239] Specifically, determine whether the address range of the current logical block address has been read;

[0240] If so, proceed to step S809;

[0241] If not, proceed to step S810;

[0242] Step S809: Number of reads of the logical block address range = Number of reads of the logical block address range + 1;

[0243] Specifically, if the logical block address range has been read, then the number of times the logical block address range has been read is equal to the number of times the logical block address range has been read plus 1.

[0244] Step S810: Increment the current index value;

[0245] Specifically, the current index value is incremented by 1 to move to the next logical block address.

[0246] Step S811: Weighted value = Weighted value - Number of data reads within the logical block address range where the current logical block address is located * Third weight;

[0247] Specifically, the number of data reads within the logical block address range of the current logical block address is determined by the bitmap (Lba rangebitmap) of the corresponding logical block address range. The Lba rangebitmap is marked during HostRead, recording whether the bitmap of the logical block address range (Lba range) corresponding to the current logical block address (Lba) is set. If the bitmap is 1, the number of data reads within the logical block address range of the current logical block address (rangeCnt) is incremented by 1. It can be understood that a bitmap value of 1 indicates that data has been read, thus reducing the likelihood of cold data (codedata). After traversing all logical block addresses of the logical block unit, the weighted value is subtracted from the weighted value of rangeCnt, i.e., the weighted value = weighted value - number of data reads within the logical block address range of the current logical block address * third weight.

[0248] It should be noted that the third weight corresponding to rangeCnt is set according to the experimental model. rangeCnt reflects whether a certain segment of Lba in Lbu has been read, indirectly reflecting the hot and cold status of Lbu data. Unlike timestamp, which is a time dimension determination, rangeCnt is a spatial dimension determination of hot and cold data.

[0249] Step S812: Weighted value = Weighted value - Number of data reads of the current logical block unit * Fourth weight;

[0250] Specifically, the current logical block cell's data read count (eraseCnt) is the sum of the physical block erase counts corresponding to all logical block addresses of that logical block cell. After traversing all logical block addresses of the logical block cell, the weighted value is subtracted from eraseCnt and then weighted, i.e., weighted value = weighted value - current logical block cell's data read count * fourth weight.

[0251] It is understandable that `eraseCnt` records the last time a physical block was erased. Due to the characteristics of flash memory devices, data stored in a physical block cannot be directly overwritten; the physical block must first be erased. The more times it is erased, the more times the physical block has been written to, and therefore, the more times it may have been read. Thus, it can indirectly reflect the status of hot and cold data. However, because it is an indirect reflection, its weight is reduced. In this embodiment, the fourth weight is less than the third weight. The third weight is obtained through experimental model testing based on factors such as total disk capacity, physical block lifespan, and the indirect reflection of data hot and cold status.

[0252] It should be noted that eraseCnt represents the number of times the physical block corresponding to the Lba has been erased. Due to the characteristics of flash memory devices, if there is data in the current physical block, it must be erased before it can be rewritten. The more times it is erased, the more times the physical block has been written. The more times it is written, the greater the probability of it being read. range is a small segment of Lba in Lbu. When the host issues a Read, it may not read every Lba in Lbu. For example, if Lbu has 10 Lba ranges and 20 Lbas are read, 10 of which belong to range 0 and 10 belong to range 9, then rangeCnt is 2.

[0253] In this embodiment, by statistically analyzing eraseCnt and rangeCnt, where eraseCnt reflects the number of times a physical block is written at the physical level, indirectly reflecting the probability of it being cold data, and rangeCnt records the number of times the range within the Lbu is read at the logical level, reflecting the probability of it being cold data, the accuracy of cold data identification is improved by determining whether the logical block unit to be identified is cold data from both temporal and spatial dimensions.

[0254] Step S813: Determine whether compression is needed based on the weighted value and inspection level;

[0255] Specifically, each inspection level corresponds to a weighted threshold. For example, the inspection levels include the first level and the second level. The first level corresponds to the first weighted threshold, and the second level corresponds to the second weighted threshold. Based on the current inspection level and the weighted threshold corresponding to the current inspection level, it is determined whether the logic block unit needs to be compressed.

[0256] For example, suppose there are six inspection levels, from level one to level six. Level one represents ample available space on the flash memory device, while a higher number indicates less available space. Furthermore, the inspection level is dynamically adjusted based on the available space on the flash memory device, and the corresponding weighted threshold values ​​are also divided into six levels: first weighted threshold, second weighted threshold, third weighted threshold, fourth weighted threshold, fifth weighted threshold, and sixth weighted threshold.

[0257] When the inspection level is the first level, the weighted threshold corresponding to the first level is the first weighted threshold. At this time, if the calculated final weighted value is greater than the first weighted threshold, it is determined that the logic block unit needs to be compressed; if the calculated final weighted value is less than or equal to the first weighted threshold, it is determined that the logic block unit does not need to be compressed.

[0258] If compression is determined to be necessary, proceed to step S814;

[0259] If compression is determined to be unnecessary, then the process ends.

[0260] Step S814: Notify the compression module to compress the logic block unit.

[0261] Specifically, if it is determined that the logic block unit needs to be compressed, the compression module is notified to compress the logic block unit.

[0262] Specifically, the flash memory device includes a cache module, which includes dynamic random access memory, such as Double Data Rate Synchronous Dynamic Random Access Memory (DDR SRAM). A compression module is located in the cache module. By reading logical block cells from the flash memory medium into the cache module, the compression module compresses the logical block cells to obtain compressed data, and then writes the compressed data back to the flash memory medium.

[0263] It is understood that the compression in this embodiment is performed on a logical block unit basis. That is, the physical blocks corresponding to at least two logical block addresses (Lba) of one logical block unit (Lbu) are compressed as a group, and the compression process is performed by the compression module. It is understood that the length of the compressed data is determined by the compression algorithm. Different compression algorithms or different data patterns can lead to different lengths of compressed data.

[0264] It is understandable that cold data refers to user data that is not frequently used. Compressing this data in the background will not significantly affect the performance of the flash memory device. Furthermore, by compressing cold data in the background, the user capacity of the flash memory device can be increased without adding more flash memory chips.

[0265] In this embodiment of the application, the method further includes:

[0266] When reading the physical block corresponding to the logical block address of the flash memory device, the table entry information of the logical block cell table is updated, specifically including:

[0267] Update the number of data reads of the logical block cell corresponding to the updated logical block address, update the last read time of the logical block cell corresponding to the updated logical block address, update the last read time of the updated logical block address, and update the bitmap of the logical block address range corresponding to the updated logical block address.

[0268] It is understandable that the last read time of a logical block address is equal to the last read time of the logical block cell corresponding to that logical block address.

[0269] In this embodiment of the application, the method further includes:

[0270] If the physical block corresponding to the logical block address is a compressed physical block, then the physical block is decompressed, and the status information of the logical block unit corresponding to the logical block address is updated to uncompressed.

[0271] In this embodiment of the application, a method for identifying cold data is provided and applied to a flash memory device. The method includes: constructing a logical block cell table, wherein the logical block cell table includes at least two logical block cells, and each logical block cell includes at least two logical block addresses; inspecting each logical block cell in the logical block cell table to determine the logical block cell to be identified; and determining whether the logical block cell to be identified is cold data based on a preset hot and cold data determination algorithm.

[0272] By constructing a logic block unit table and inspecting each logic block unit in the table to determine the logic block unit to be identified, this application can better identify the logic block unit to be identified. Furthermore, based on a preset hot and cold data determination algorithm, it can determine whether the logic block unit to be identified is cold data. This application can improve the accuracy of cold data identification, thereby improving the wear leveling effect.

[0273] In the embodiments of this application, during the read process, the program traverses the issued logical block address (Lba) and increments the read count (readcnt count) of the logical block unit (Lbu) corresponding to the logical block address (Lba), updates the last read timestamp (Lbutimestamp) of the logical block unit (Lbu), records the last read timestamp (Lba epoch) of the logical block address, and sets the corresponding position of the bitmap (Lba rangebitmap) of the logical block address range to 1.

[0274] Understandably, if the data corresponding to the read request is compressed, the data will be decompressed and the state (Lbustate) of the corresponding logical block unit will be changed to uncompressed.

[0275] For example: The host issues a read command to sequentially read Lba 0 to Lba 15. Assume these 16 Lba entries are uncompressed data, belonging to Lbu 0 (assuming an Lbu has 256 Lba entries, 32 Lbarange entries, and a 32-bit Lbarange bitmap), and Lba 0 to Lba 7 belong to range 0 of Lbu 0, while Lba 8 to Lba 15 belong to range 1 of Lbu 0. Then, the data entries in Lbu 0 will change as follows:

[0276] ① Since the logical block addresses correspond to uncompressed data, Lbustate is uncompressed;

[0277] ②Lbureadcnt will increment the count by 16;

[0278] ③Lbutimestamp will be updated to the timestamp of the last read Lba, which is the timestamp of Lba 15;

[0279] ④ The timestamp Lbaepoch will be updated from Lba 0 to Lba 15;

[0280] ⑤ The bitmaps of Lbarange 0 and Lbarange 1 will also be set, that is, the 0th and 1st bits in the 32-bit bitmap will be set to 1;

[0281] ⑥ Because the blockerasecnt corresponding to Lba is only incremented during block erasure, it is not counted during the read process.

[0282] After a period of time, assuming this data has not been read, when Lbu 0 is inspected, its entries will be evaluated. If the conditions are met, Lbu 0 will be sent to the hot / cold data determination algorithm for processing. The algorithm will traverse Lba 0 to Lba 255 of Lbu 0, performing a weighted summation on the specific entries to determine whether the logical block unit is cold data (codedata). If it is cold data (codedata), the logical block unit will be sent to the compression module for compression processing.

[0283] In this embodiment of the application, the data inside the flash memory device is divided into hot and cold categories by weighting the data horizontally and vertically, calculating and comparing them in the time and space dimensions respectively; then, the cold data is compressed using a compression module so that the reading latency and reading performance are not affected when the user reads the hot data, and the amount of user data can be increased after the cold data is compressed.

[0284] Please see Figure 9 , Figure 9 This is a schematic diagram of the structure of a flash memory device provided in an embodiment of this application;

[0285] like Figure 9 As shown, the flash memory device 900 includes: at least one processor 901; and a memory 902 communicatively connected to the at least one processor 901. Figure 9The example described uses a processor 901. Memory 902 stores instructions executable by at least one processor 901. These instructions, when executed by at least one processor 901, enable the processor 901 to perform the cold data identification method mentioned in the above embodiments. The processor 901 and memory 902 can be connected via a bus or other means. Figure 9 Taking the example of a connection between China and Israel via a bus.

[0286] The processor 901 can be any type of processor with one or more processing cores. It can perform single-threaded or multi-threaded operations, used for parsing instructions to perform operations such as fetching data, performing logical operations, and sending out processing results.

[0287] The processor 901 is used to construct a logical block unit table, wherein the logical block unit table includes at least two logical block units, and each logical block unit includes at least two logical block addresses; to inspect each logical block unit in the logical block unit table to determine the logical block unit to be identified; and to determine whether the logical block unit to be identified is cold data based on a preset hot and cold data determination algorithm.

[0288] By constructing a logic block unit table and inspecting each logic block unit in the table to determine the logic block unit to be identified, this application can better identify the logic block unit to be identified. Furthermore, based on a preset hot and cold data determination algorithm, it can determine whether the logic block unit to be identified is cold data. This application can improve the accuracy of cold data identification, thereby improving the wear leveling effect.

[0289] The memory 902, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, such as the program instructions / modules corresponding to the cold data identification method in the embodiments of this application. The processor 901 implements the cold data identification method in the above method embodiments by running the non-transitory software programs, instructions, and modules stored in the memory 902.

[0290] The memory 902 may include a program storage area and a data storage area. The program storage area may store the operating system and application programs required for at least one function. The data storage area may store data created based on the use of the remote control device. Furthermore, the memory 902 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device.

[0291] The memory 902 stores instructions that can be executed by at least one processor 901; the at least one processor 901 is used to execute the instructions to implement the cold data identification method in any of the above method embodiments.

[0292] Furthermore, embodiments of this application also provide a non-transitory computer-readable storage medium storing computer-executable instructions, which are executed by one or more processors 901, enabling the one or more processors 901 to perform the cold data identification method in any of the above method embodiments.

[0293] Furthermore, embodiments of this application also provide a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program, the computer program being operable to cause a computer to execute the cold data identification method in any of the above method embodiments. This computer program product can be a software installation package.

[0294] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0295] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented using software plus a general-purpose hardware platform, or of course, using hardware. Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program in a computer program product instructing related hardware. The computer program can be stored in a non-transitory computer-readable storage medium. The computer program includes program instructions, which, when executed by a related device, cause the related device to execute the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0296] The above-described product can execute the cold data identification method provided in the embodiments of this application, and has the corresponding functional modules and beneficial effects for executing the cold data identification method. Technical details not described in detail in this embodiment can be found in the cold data identification method provided in the embodiments of this application.

[0297] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them; under the concept of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of this application as described above. For the sake of brevity, they are not provided in detail; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method for identifying cold data, characterized in that, Applied to flash memory devices, the method includes: Construct a logical block unit table, wherein the logical block unit table includes at least two logical block units, and each logical block unit includes at least two logical block addresses; Each logic block unit in the logic block unit table is inspected to determine the logic block unit to be identified; Based on a preset hot and cold data determination algorithm, it is determined whether the logic block unit to be identified is cold data; The algorithm for determining whether the logic block unit to be identified is cold data, based on a preset hot / cold data determination algorithm, includes: The weighting value of the logic block unit to be identified is determined based on the parameters of the logic block unit to be identified and the information of the logic block address in the logic block unit to be identified. Based on the weighted value and the inspection level of the flash memory device, determine whether the logic block cell to be identified is cold data; The parameters of the logic block unit to be identified include: the last read time of the logic block unit to be identified and the number of times the data of the logic block unit to be identified has been read. The information of the logical block address in the logical block unit to be identified includes: the last read time of the logical block address, the number of times the physical block corresponding to the logical block address has been erased, the read information of the logical block address range where the logical block address is located, and the number of times the logical block address range where the logical block address is located has been read. The step of determining the weighted value of the logical block unit to be identified based on the parameters of the logical block unit to be identified and the information of the logical block address in the logical block unit to be identified includes: Initialize the weighting values ​​of the logic block units to be identified; The address of the first logical block in the logical block unit is processed; If the logical block address is a valid address, then update the weighting value of the logical block unit to be identified; The number of data reads for the logical block unit to be identified is updated to the number of data reads for the logical block unit to be identified plus the number of erases for the physical block corresponding to the logical block address; If the read information of the logical block address range where the logical block address is located has been read, then update the read count of the logical block address range where the logical block is located; Enter the address of the next logical block in the logical block unit and repeat the above operation; After traversing all the logical block addresses of the logical block unit to be identified, the weighting value of the logical block unit to be identified is updated to obtain the final weighting value of the logical block unit to be identified.

2. The method according to claim 1, characterized in that, The logical block unit table includes table entry information, which includes: The state information of each logical block unit, wherein the state information includes an uncompressed state and a compressed state; and, The number of data reads for each logical block unit, the last read time for each logical block unit, and the last read time for each logical block address of each logical block unit; and, A bitmap of logical block address ranges, wherein each logical block address range includes at least two logical block addresses; and, The number of times the physical block corresponding to the logical block address has been erased.

3. The method according to claim 2, characterized in that, The step of inspecting each logic block unit in the logic block unit table to determine the logic block unit to be identified includes: Perform a routine inspection on the first logic block unit in the logic block unit table; If a certain logic block unit satisfies the first condition, then the logic block unit is determined to be the logic block unit to be identified; The first condition includes: The current logical block unit's status information is uncompressed, and the number of times the current logical block unit has been read is less than a preset threshold, and the last read time of the current logical block unit is greater than a preset time threshold.

4. The method according to claim 3, characterized in that, The method further includes: If a logic block unit does not meet the first condition, then it is further determined whether the logic block unit meets the second condition; If the logic block unit satisfies the second condition, then the logic block unit is determined to be the logic block unit to be identified; If the logic block unit does not meet the second condition, proceed to the next logic block unit, until all logic block units in the logic block unit table are traversed; The second condition includes: the inspection level of the flash memory device is not equal to the preset level.

5. The method according to claim 4, characterized in that, The method further includes: Determining the inspection level of the flash memory device specifically includes: The inspection level of the flash memory device is determined based on its flash memory capacity, wherein the inspection level includes a first level or a second level, and the preset level is the first level.

6. The method according to claim 1, characterized in that, The initialization of the weighted value of the logical block unit to be identified includes: The weighted value of the logic block unit to be identified is the last read time of the logic block unit to be identified multiplied by the first weight. Updating the weighted value of the logical block unit to be identified includes: The weighted value of the logical block unit to be identified is updated to the weighted value of the logical block unit to be identified + the last read time of the logical block address * the second weight; The step of updating the weighted value of the logical block unit to be identified, to obtain the final weighted value of the logical block unit to be identified, includes: The weighted value of the logical block cell to be identified is updated to the current weighted value - the number of data reads in the address range of the logical block cell to be identified * the third weight - the number of erases of the physical block corresponding to the logical block address * the fourth weight, so as to obtain the final weighted value of the logical block cell to be identified.

7. The method according to claim 1 or 6, characterized in that, The method further includes: If the address of the logical block is invalid, proceed to the address of the next logical block. If the information read within the address range of the logical block address where the current logical block address is located is not read, then proceed to the next logical block address.

8. The method according to claim 1, characterized in that, The method further includes: If the logical block unit to be identified is determined to be cold data, the logical block unit to be identified is compressed, and the compressed data is written to the flash memory medium of the flash memory device.

9. The method according to claim 1, characterized in that, The method further includes: When reading the physical block corresponding to the logical block address of the flash memory device, the table entry information of the logical block cell table is updated, specifically including: Update the number of data reads of the logical block unit corresponding to the logical block address, update the last read time of the logical block unit corresponding to the logical block address, update the last read time of the logical block address, and update the bitmap of the logical block address range corresponding to the logical block address.

10. The method according to claim 9, characterized in that, The method further includes: If the physical block corresponding to the logical block address is a compressed physical block, then the physical block is decompressed, and the status information of the logical block unit corresponding to the logical block address is updated to uncompressed.

11. A flash memory device, characterized in that, include: At least one processor; as well as, A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the cold data identification method according to any one of claims 1-10.

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