Method of forming a semiconductor structure
By oxidizing the second sidewall to form a uniform oxide layer and combining it with plasma etching, the problem of insufficient pattern transfer accuracy in multiple patterning processes was solved, and high-precision patterning of semiconductor structures was achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SEMICON MFG INT (SHANGHAI) CORP
- Filing Date
- 2021-11-25
- Publication Date
- 2026-07-24
AI Technical Summary
Existing multi-patterning processes in semiconductor manufacturing suffer from insufficient patterning transfer accuracy, especially during oxide layer removal, where uneven oxide layer thickness leads to sidewall separation or incomplete removal within the first trench.
By oxidizing the second sidewall to form a uniform oxide layer, it is ensured that the remaining portion can be formed in the first tank when the oxide layer is removed, thus avoiding sidewall separation. The remaining sidewall is then completely removed using plasma etching, improving the accuracy of pattern transfer.
This improved the precision of patterned transfer in semiconductor structures, ensuring the integrity of sidewalls and the accuracy of the patterned structure, thus meeting design requirements.
Smart Images
Figure CN116169019B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a method for forming a semiconductor structure. Background Technology
[0002] In semiconductor device manufacturing processes, photolithography is typically used to transfer patterns from a photomask onto a substrate. The photolithography process includes: providing a substrate; forming photoresist on the semiconductor substrate; exposing and developing the photoresist to form a patterned photoresist, thereby transferring the pattern from the photomask to the photoresist; etching the substrate using the patterned photoresist as a mask, thereby transferring the pattern from the photoresist to the substrate; and removing the photoresist.
[0003] As the size of semiconductor devices continues to shrink, the critical dimensions of photolithography are gradually approaching or even exceeding the physical limits of photolithography, thus posing even more severe challenges to photolithography technology. In order to further reduce the size of semiconductor devices based on existing photolithography processes, multiple patterning processes have been proposed. This process is promising because it can form smaller masks and overcomes the photolithography limits that cannot be achieved by single patterning.
[0004] However, the formation process of multiple patterning techniques in the existing technology still has many problems. Summary of the Invention
[0005] The technical problem solved by this invention is to provide a method for forming a semiconductor structure that meets the design requirements of pattern transfer and improves the accuracy of pattern transfer.
[0006] To address the aforementioned problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a layer to be etched; forming a plurality of sacrificial layers on the layer to be etched, wherein adjacent sacrificial layers have at least one first trench and one second trench, the width of the second trench being greater than the width of the first trench; forming a first sidewall on the sidewalls and top surface of the sacrificial layers and on the top surface of the layer to be etched; forming a second sidewall on the surface of the first sidewall, wherein the second sidewall fills the first trench; oxidizing the second sidewall to form an oxide layer; removing the oxide layer to form a retained portion within the first trench; etching back the first sidewall until the top surface of the layer to be etched is exposed; removing the sacrificial layers to form a first patterned structure on the layer to be etched; and etching the layer to be etched using the first patterned structure as a mask to form a fin.
[0007] Optionally, the method of oxidizing the second sidewall to form an oxide layer includes: oxidizing all of the second sidewall located on the top surface of the second tank and the sacrificial layer into the oxide layer.
[0008] Optionally, the method of oxidizing the second sidewall to form an oxide layer includes oxidizing a portion of the second sidewall located on the top surface of the second tank and the sacrificial layer into the oxide layer.
[0009] Optionally, the thickness of the oxide layer is 40% to 80% of the thickness of the second sidewall.
[0010] Optionally, after removing the oxide layer and before re-etching the first sidewall, the method further includes: removing the remaining second sidewall located on the second trench and the top surface of the sacrificial layer.
[0011] Optionally, the process of removing the remaining second sidewalls located on the second trench and the top surface of the sacrificial layer employs a first remote plasma etching process, wherein the gases in the first remote plasma etching process include NF3 and NH3.
[0012] Optionally, the parameters of the oxidation treatment include: oxidizing gases: O2 and O3; oxidation time: 1 minute to 3 minutes.
[0013] Optionally, the process for removing the oxide layer employs a second remote plasma etching process, wherein the gases used in the second remote plasma etching process include NF3 and NH3.
[0014] Optionally, the formation process of the first sidewall includes: atomic layer deposition process; the material of the first sidewall includes: silicon nitride.
[0015] Optionally, the process for forming the second sidewall includes atomic layer deposition; the material of the second sidewall includes amorphous silicon.
[0016] Optionally, the layer to be etched includes: a substrate, a mask structure located on the substrate, a first etch stop layer located on the mask structure, a first sacrificial film located on the first etch stop layer, and a second etch stop layer located on the first sacrificial film.
[0017] Optionally, the method of etching the layer to be etched using the first patterned structure as a mask to form the fin includes: etching the second etch stop layer and the first sacrificial film using the first patterned structure as a mask to form a plurality of mutually discrete second patterned structures; and etching the first etch stop layer, the mask structure, and the substrate using the second patterned structure as a mask to form the fin.
[0018] Optionally, the mask structure includes: a first mask layer and a second mask layer located on the first mask layer.
[0019] Optionally, the retaining portion is connected to the first sidewall adjacent to the first groove.
[0020] Compared with the prior art, the technical solution of the present invention has the following advantages:
[0021] In the semiconductor structure formation method of the present invention, the second sidewall is oxidized to ensure that the oxide layer formed by the oxidation of the second sidewall has a uniform thickness. This ensures that the oxide layer is removed, forming a retaining portion in the first trench, thereby preventing adjacent first sidewalls in the first trench from separating from each other, thus meeting the design requirements for pattern transfer.
[0022] Furthermore, the method for oxidizing the second sidewall to form an oxide layer includes: completely oxidizing the second sidewall located on the second groove and the top surface of the sacrificial layer into the oxide layer. Since the second sidewall located on the second groove and the top surface of the sacrificial layer is completely oxidized into the oxide layer, after removing the oxide layer, there is no residue of the second sidewall on the sidewall of the sacrificial layer, thereby effectively improving the accuracy of the graphic transmission.
[0023] Furthermore, the method for oxidizing the second sidewall to form an oxide layer includes: oxidizing a portion of the second sidewall located on the second trench and the top surface of the sacrificial layer into the oxide layer; after removing the oxide layer and before re-etching the first sidewall, further including: removing the remaining second sidewall located on the second trench and the top surface of the sacrificial layer. Since the oxide layer formed after oxidizing the second sidewall has a relatively uniform thickness, the thickness of the unoxidized second sidewall on the sidewall of the sacrificial layer is also relatively uniform, ensuring that the unoxidized second sidewall on the sidewall of the sacrificial layer can be completely and simultaneously removed, thereby effectively improving the accuracy of pattern transfer. Attached Figure Description
[0024] Figure 1 This is a schematic diagram of a semiconductor structure formation method;
[0025] Figures 2 to 10 This is a schematic diagram of each step in the method for forming a semiconductor structure according to an embodiment of the present invention;
[0026] Figures 11 to 13 This is a schematic diagram of the steps in a method for forming a semiconductor structure according to another embodiment of the present invention. Detailed Implementation
[0027] As described in the background section, the formation process of multiple patterning techniques in the prior art still has many problems. These will be explained in detail below with reference to the accompanying drawings.
[0028] Figure 1This is a schematic diagram of a semiconductor structure formation method.
[0029] Please refer to Figure 1 A layer 100 to be etched is provided, the layer 100 including adjacent first region I and second region II; a first sacrificial layer 101, a second sacrificial layer 102 and a plurality of third sacrificial layers 103 are formed, the first sacrificial layer 101 and the second sacrificial layer 102 are located on the first region I, a first groove (not shown) is formed between the first sacrificial layer 101 and the second sacrificial layer 102, the plurality of third sacrificial layers 103 are located on the second region II, a second groove (not shown) is formed between adjacent third sacrificial layers 103, the width dimension d2 of the second groove is greater than the width dimension d1 of the first groove; a first sidewall 104 is formed on the sidewalls and top surfaces of the first sacrificial layer 101, the second sacrificial layer 102 and the third sacrificial layer 103 and the top surface of the layer 100 to be etched; a second sidewall 105 is formed on the first sidewall 104, the second sidewall 105 filling the first groove.
[0030] In this embodiment, the material of the second sidewall 105 is amorphous silicon. After the second sidewall 105 is formed, the surface of the amorphous silicon is naturally oxidized into an oxide layer. Because the spacing between the first sacrificial layer 101 and the second sacrificial layer 102 is different from the spacing between adjacent third sacrificial layers 103, the thickness of the oxide layers formed by the oxidation of the amorphous silicon on the first sacrificial layer 101, the second sacrificial layer 102, and the third sacrificial layer 103 is also different.
[0031] In the subsequent pattern transfer process, the oxide layer and the remaining second sidewalls 105 need to be removed. However, due to the different thicknesses of the oxide layers, after the oxide layers are completely removed, the thicknesses of the remaining second sidewalls 105 on the first sacrificial layer 101, the second sacrificial layer 102, and the third sacrificial layer 103 are also different. If the etching dose is increased to ensure that the second sidewalls 105 on the sidewalls of the first sacrificial layer 101, the second sacrificial layer 102, and the third sacrificial layer 103 are completely removed, it is easy to completely remove the second sidewalls 105 located in the first trench, causing the structure that originally required the first sidewalls 104 on the sidewalls of the first sacrificial layer 101 and the second sacrificial layer 102 to be merged to separate, which does not meet the design requirements of pattern transfer. If the etching dose is reduced to ensure that the second sidewalls 105 located in the first trench are not completely removed, it is easy to cause the second sidewalls 105 on the sidewalls of the first sacrificial layer 101, the second sacrificial layer 102, and the third sacrificial layer 103 to not be completely removed at the same time, thus affecting the accuracy of pattern transfer.
[0032] Based on this, the present invention provides a method for forming a semiconductor structure, which involves oxidizing the second sidewall to ensure that the oxide layer formed by oxidizing the second sidewall has a uniform thickness. This ensures that the oxide layer is removed, and a retention portion is formed in the first trench, thereby preventing the first sidewall on the sidewall of the first sacrificial layer and the second sacrificial layer from separating from each other, thus meeting the design requirements for pattern transfer.
[0033] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0034] Figures 2 to 10 This is a schematic diagram of the steps in the method for forming a semiconductor structure according to an embodiment of the present invention.
[0035] Please refer to Figure 2 Provide the layer to be etched.
[0036] In this embodiment, the layer to be etched includes: a substrate 200, a mask structure 201 located on the substrate 200, a first etch stop layer 202 located on the mask structure 201, a first sacrificial film 203 located on the first etch stop layer 202, and a second etch stop layer 204 located on the first sacrificial film 203.
[0037] In this embodiment, the substrate 200 is made of silicon; in other embodiments, the substrate may also be made of germanium, silicon germanide, silicon carbide, gallium arsenide, or indium gallium ionide.
[0038] In this embodiment, the mask structure 201 includes a first mask layer 201a and a second mask layer 201b located on the first mask layer 201a.
[0039] The first mask layer 201a is made of nitrogen-doped silicon carbide. The first mask layer 201a formed by nitrogen-doped silicon carbide has good adhesion to the substrate. When the substrate 200 is subsequently etched using the etched first mask layer 201a as a mask, the first mask layer 201a is not prone to peeling or warping. Therefore, the first mask layer 201a has a good ability to maintain the etched pattern, which is beneficial to make the opening morphology formed in the substrate 200 good and effectively improves the accuracy of the etched pattern.
[0040] The second mask layer 201b is made of titanium nitride. The second mask layer 201b has good adhesion to the first mask layer 201a. The second mask layer 201b can protect the surface of the first mask layer 201a during subsequent etching of the substrate 200, so that the first mask layer 201a will not be thinned. Moreover, the second mask layer 201b has high physical strength. During subsequent etching of the layer to be etched, the pattern of the second mask layer 201b and the first mask layer 201a can remain stable, which is conducive to forming an opening with a good morphology.
[0041] In other embodiments, the mask structure may also be a single-layer structure.
[0042] In this embodiment, the material of the first sacrificial film 203 is amorphous silicon; in other embodiments, the material of the first sacrificial film may also be silicon nitride, silicon carbide, silicon carbonitride, silicon carbonitride, silicon oxynitride, silicon oxynitride, boron nitride, or boron carbonitride.
[0043] In this embodiment, the first etch stop layer 202 and the second etch stop layer 204 are made of silicon nitride.
[0044] In this embodiment, the layer to be etched includes an adjacent first region I and a second region II.
[0045] Please refer to Figure 3 A plurality of sacrificial layers are formed on the layer to be etched, and there is at least one first trench 208 and one second trench 209 between adjacent sacrificial layers, wherein the width dimension d2 of the second trench 209 is greater than the width dimension d1 of the first trench 208.
[0046] In this embodiment, the plurality of sacrificial layers include: a first sacrificial layer 205, a second sacrificial layer 206, and a plurality of third sacrificial layers 207. The first sacrificial layer 205 and the second sacrificial layer 206 are located on the first region I, and a first groove 208 is provided between the first sacrificial layer 205 and the second sacrificial layer 206. The plurality of third sacrificial layers 207 are located on the second region II, and a second groove 209 is provided between adjacent third sacrificial layers 207.
[0047] In this embodiment, the first sacrificial layer 205, the second sacrificial layer 206, and several third sacrificial layers 207 are formed using a multi-patterning process.
[0048] In this embodiment, the purpose of the width dimension d2 of the second groove 209 being greater than the width dimension d1 of the first groove 208 is to ensure that the subsequently formed first sidewall and second sidewall can fill the first groove 208 but not the second groove 209, thereby enabling the first sacrificial layer 205 and the second sacrificial layer 206 to be combined and then graphically transmitted to meet the design requirements.
[0049] Please refer to Figure 4 A first sidewall 210 is formed on the sidewall and top surface of the sacrificial layer and on the top surface of the layer to be etched.
[0050] In this embodiment, the first sidewall 210 is formed on the sidewalls and top surfaces of the first sacrificial layer 205, the second sacrificial layer 206 and the third sacrificial layer 207, as well as on the top surface of the layer to be etched.
[0051] In this embodiment, the first sidewall 210 is formed by atomic layer deposition; the material of the first sidewall 210 is silicon nitride.
[0052] Please refer to Figure 5 A second sidewall 211 is formed on the surface of the first sidewall 210, and the second sidewall 211 fills the first groove 208.
[0053] In this embodiment, the second sidewall 211 is formed by atomic layer deposition; the material of the second sidewall 211 is amorphous silicon.
[0054] Since the material of the second sidewall 211 is amorphous silicon, the oxide layer formed after the second sidewall 211 is oxidized is silicon oxide, thereby ensuring that the material of the oxide layer is different from the material of the first sidewall 210, so as to reduce the etching damage to the first sidewall 210 during the subsequent removal of the oxide layer.
[0055] Please refer to Figure 6 The second sidewall 211 is oxidized to form an oxide layer 212.
[0056] In this embodiment, the method of oxidizing the second sidewall 211 to form an oxide layer 212 includes: partially oxidizing the second sidewall 211 located on the top surface of the second trench 209 and the sacrificial layer into the oxide layer. Specifically, all of the second sidewall 211 located on the top surface of the second trench 209 and the first sacrificial layer 205, the second sacrificial layer 206, and the third sacrificial layer 207 is oxidized into the oxide layer 212.
[0057] In this embodiment, the parameters of the oxidation treatment include: oxidizing gases: O2 and O3; oxidation time: 1 minute to 3 minutes.
[0058] Please refer to Figure 7 Remove the oxide layer 212 and form a retention portion 213 in the first groove 208.
[0059] In this embodiment, the retaining part 213 can be connected to the adjacent first side wall 210 within the first groove 208. The retaining part 213 can either fill the first groove 208 completely or not.
[0060] In this embodiment, by oxidizing the second sidewall 211, the thickness of the oxide layer 212 formed by the oxidation of the second sidewall 211 remains uniform. This ensures that the oxide layer 212 is removed, forming a retention portion 213 in the first groove 208, thereby preventing the adjacent first sidewalls 210 (i.e., the first sidewalls 210 on the sidewalls of the first sacrificial layer 205 and the second sacrificial layer 206) in the first groove 208 from separating from each other, thus meeting the design requirements for graphical transmission.
[0061] In this embodiment, since the aspect ratio of the first groove 208 will further increase after the first sidewall 210 is formed, during the oxidation process of the second sidewall 211, the second sidewall 211 located in the first groove 208 is difficult to be completely oxidized due to the large aspect ratio of the first groove 208. Therefore, after the oxide layer 212 is removed, a portion of the second sidewall 211 is still retained in the first groove 208, forming the retention portion 213. The retention portion 213 can ensure the connection of the first sidewall 210 on the sidewalls of the first sacrificial layer 205 and the second sacrificial layer 206.
[0062] In this embodiment, since the second sidewall 211 located on the top surface of the second groove 209 and the first sacrificial layer 205, the second sacrificial layer 206 and the third sacrificial layer 207 is completely oxidized to the oxide layer 212, after removing the oxide layer 212, there is no residue of the second sidewall 211 on the sidewalls of the first sacrificial layer 205, the second sacrificial layer 206 and the third sacrificial layer 207, thereby effectively improving the accuracy of graphic transmission.
[0063] In this embodiment, the process for removing the oxide layer 212 employs a first remote plasma etching process, wherein the gases used in the first remote plasma etching process include NF3 and NH3.
[0064] Please refer to Figure 8 After removing the oxide layer 212, the first sidewall 210 is etched back until the top surface of the layer to be etched is exposed.
[0065] In this embodiment, the process of etching back the first sidewall 210 adopts a wet etching process; in other embodiments, the process of etching back the first sidewall can also adopt a dry etching process.
[0066] Please refer to Figure 9 After forming the first patterned structure 214, the sacrificial layer is removed, and the first patterned structure 214 is formed on the layer to be etched.
[0067] In this embodiment, the first sacrificial layer 205, the second sacrificial layer 206, and the third sacrificial layer 207 are specifically removed.
[0068] In this embodiment, the process of removing the first sacrificial layer 205, the second sacrificial layer 206, and the third sacrificial layer 207 is a wet etching process; in other embodiments, the process of removing the first sacrificial layer 205, the second sacrificial layer 206, and the third sacrificial layer 207 can also be a dry etching process.
[0069] Please refer to Figure 10 The layer to be etched is etched using the first patterned structure 214 as a mask to form the fin 215.
[0070] In this embodiment, the method of etching the layer to be etched using the first patterned structure 214 as a mask to form the fin 215 includes: etching the second etch stop layer 204 and the first sacrificial film 203 using the first patterned structure 214 as a mask to form a plurality of mutually discrete second patterned structures (not shown); and etching the first etch stop layer 202, the mask structure 201 and the substrate 200 using the second patterned structures as a mask to form the fin 215.
[0071] Figures 11 to 13 This is a schematic diagram of the steps in a method for forming a semiconductor structure according to another embodiment of the present invention.
[0072] This embodiment further describes the method for forming a semiconductor structure based on the above embodiments. The difference between this embodiment and the above embodiments is that: after forming the second sidewall 211 (as shown in the image), Figure 5 As shown in the figures, the second sidewall 211 portion located on the second groove 209 and the top surface of the sacrificial layer is oxidized into the oxide layer 212. A detailed description will follow with reference to the accompanying drawings.
[0073] Please refer to Figure 11 The second sidewall 211 is oxidized to form an oxide layer 212.
[0074] In this embodiment, the second sidewall 211 located on the top surface of the second groove 209 and the sacrificial layer is partially oxidized into the oxide layer 212. Specifically, the second sidewall 211 located on the top surface of the second groove 209 and the first sacrificial layer 205, the second sacrificial layer 206 and the third sacrificial layer 207 is partially oxidized into the oxide layer 212.
[0075] In this embodiment, the parameters of the oxidation treatment include: oxidizing gases: O2 and O3; oxidation time: 1 minute to 3 minutes.
[0076] In this embodiment, the thickness of the oxide layer 212 is 40% to 80% of the thickness of the second sidewall 211.
[0077] Please refer to Figure 12 Remove the oxide layer 212 and form a retention portion 213 in the first groove 208.
[0078] In this embodiment, the retaining part 213 can be connected to the adjacent first side wall 210 within the first groove 208. The retaining part 213 can either fill the first groove 208 completely or not.
[0079] In this embodiment, the process for removing the oxide layer 212 employs a second remote plasma etching process, wherein the gases used in the second remote plasma etching process include NF3 and NH3.
[0080] Please refer to Figure 13 Remove the remaining second sidewall 211 located on the second groove 209 and the top surface of the sacrificial layer.
[0081] In this embodiment, specifically, the remaining second sidewalls 211 located on the top surfaces of the second groove 209, the first sacrificial layer 205, the second sacrificial layer 206, and the third sacrificial layer 207 are removed.
[0082] In this embodiment, the oxide layer 212 formed after the second sidewall 211 is oxidized has a relatively uniform thickness. Therefore, the thickness of the unoxidized second sidewall 211 on the sidewalls of the first sacrificial layer 205, the second sacrificial layer 206, and the third sacrificial layer 207 is also relatively uniform, ensuring that the unoxidized second sidewall 211 on the sidewalls of the first sacrificial layer 205, the second sacrificial layer 206, and the third sacrificial layer 207 can be completely and simultaneously removed, thereby effectively improving the accuracy of graphic transmission.
[0083] In this embodiment, the process of removing the remaining second sidewalls 211 located on the top surfaces of the second trench 209, the first sacrificial layer 205, the second sacrificial layer 206, and the third sacrificial layer 207 is a second remote plasma etching process, and the gases in the second remote plasma etching process include NF3 and NH3.
[0084] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. A method for forming a semiconductor structure, characterized in that, include: Provide the layer to be etched; A plurality of sacrificial layers are formed on the layer to be etched, and there is at least one first trench and one second trench between adjacent sacrificial layers, wherein the width of the second trench is greater than the width of the first trench. A first sidewall is formed on the sidewall and top surface of the sacrificial layer, and on the top surface of the layer to be etched; A second sidewall is formed on the surface of the first sidewall, and the second sidewall fills the first groove; The second sidewall is oxidized to form an oxide layer; Remove the oxide layer to form a retention portion in the first tank; Etch the first sidewall back until the top surface of the layer to be etched is exposed; Remove the sacrificial layer and form a first patterned structure on the layer to be etched; The layer to be etched is etched using the first patterned structure as a mask to form a fin.
2. The method for forming a semiconductor structure as described in claim 1, characterized in that, The method of oxidizing the second sidewall to form an oxide layer includes: oxidizing the entire second sidewall located on the top surface of the second tank and the sacrificial layer into the oxide layer.
3. The method for forming a semiconductor structure as described in claim 1, characterized in that, The method of oxidizing the second sidewall to form an oxide layer includes oxidizing a portion of the second sidewall located on the top surface of the second tank and the sacrificial layer into the oxide layer.
4. The method for forming a semiconductor structure as described in claim 3, characterized in that, The thickness of the oxide layer is 40% to 80% of the thickness of the second sidewall.
5. The method for forming a semiconductor structure as described in claim 3, characterized in that, After removing the oxide layer and before re-etching the first sidewall, the process further includes removing the remaining second sidewall located on the second trench and the top surface of the sacrificial layer.
6. The method for forming a semiconductor structure as described in claim 5, characterized in that, The process of removing the remaining second sidewalls located on the second trench and the top surface of the sacrificial layer employs a first remote plasma etching process, wherein the gases used in the first remote plasma etching process include NF3 and NH3.
7. The method for forming a semiconductor structure as described in claim 2 or 3, characterized in that, The parameters of the oxidation treatment include: oxidizing gases: O2 and O3; oxidation time: 1 minute to 3 minutes.
8. The method for forming a semiconductor structure as described in claim 2 or 3, characterized in that, The process for removing the oxide layer employs a second remote plasma etching process, wherein the gases used in the second remote plasma etching process include NF3 and NH3.
9. The method for forming a semiconductor structure as described in claim 1, characterized in that, The formation process of the first sidewall includes: atomic layer deposition process; the material of the first sidewall includes: silicon nitride.
10. The method for forming a semiconductor structure as described in claim 1, characterized in that, The process for forming the second sidewall includes atomic layer deposition; the material of the second sidewall includes amorphous silicon.
11. The method for forming a semiconductor structure as described in claim 1, characterized in that, The layer to be etched includes: a substrate, a mask structure located on the substrate, a first etch stop layer located on the mask structure, a first sacrificial film located on the first etch stop layer, and a second etch stop layer located on the first sacrificial film.
12. The method for forming a semiconductor structure as described in claim 11, characterized in that, The method of etching the layer to be etched using the first patterned structure as a mask to form a fin includes: etching the second etch stop layer and the first sacrificial film using the first patterned structure as a mask to form a plurality of mutually discrete second patterned structures; and etching the first etch stop layer, the mask structure, and the substrate using the second patterned structure as a mask to form the fin.
13. The method for forming a semiconductor structure as described in claim 11, characterized in that, The mask structure includes: a first mask layer and a second mask layer located on the first mask layer.
14. The method for forming a semiconductor structure as described in claim 1, characterized in that, The retaining portion is connected to the first sidewall adjacent to the first groove.