An imaging method, device and equipment for suppressing array crosstalk and a storage medium

Abstract

The application relates to an imaging method and device for suppressing array crosstalk, equipment and a storage medium, which comprises the following steps: dividing a pixel array into multiple sub-arrays, wherein each sub-array comprises m*n pixels, and dividing a corresponding gating period of each sub-array into N time sequences, wherein N<=m*n; sequentially turning on the gating signals of the pixels at the same position in each sub-array to enable the pixels to enter a detection mode, wherein the opening time of the gating signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of crosstalk and the time when the total probability of crosstalk in the array reaches a peak; and performing image splicing on N data images in each sub-array. The method can effectively avoid the detection of the optical crosstalk signals of adjacent pixels caused by the fact that all the pixels simultaneously enter an avalanche standby state in a traditional frame frequency synchronization mode, and finally performs image splicing, so that the influence of crosstalk on the detection imaging quality is avoided to the greatest extent.

Description

Technical Field

[0001] This invention relates to the field of avalanche diode technology, and in particular to an imaging method, apparatus, device, and storage medium for suppressing array crosstalk. Background Technology

[0002] Single-photon avalanche photodiodes (SPADs) currently have wide applications in quantum secure communication, quantum imaging, lidar, biomedicine, and integrated circuit testing. When the APD enters Geiger mode, i.e., when an external circuit provides a reverse bias voltage V... r Higher than the device's breakdown voltage V br At this point, the instantaneous response current of the device to extremely weak light can reach the mA level, meaning that the SPAD has single-photon detection capability. Near-infrared single-photon detection arrays made using SPADs as pixels obtain three-dimensional spatial information and form images by combining photon counting and photon time of flight.

[0003] The current development trend of SPAD arrays both domestically and internationally is to reduce the pixel pitch (e.g., 25 μm and below) and increase the array size (e.g., 320×256 and above) to further optimize imaging quality. However, further reductions in pixel pitch are greatly limited by optical crosstalk within the detector array: when a pixel in the SPAD array is in an avalanche state due to photon detection or thermal excitation, a large number of carriers generated by the multiplication layer have a certain probability of recombination, producing a small number of photons with energy near the bandgap of the multiplication layer. These emitted photons have a certain probability of entering adjacent pixels, and because their energy is greater than the bandgap of the absorption layer, they are absorbed by the adjacent pixels, causing an avalanche. This miscounting phenomenon is called optical crosstalk.

[0004] In related technologies, currently, taking a detector array composed of back-illuminated cells as an example, the mainstream methods for reducing crosstalk mainly include: ① For crosstalk generated by direct transmission paths between adjacent pixels, this can be effectively reduced by etching deep isolation trenches between pixels and filling them with absorbing metal; ② For crosstalk paths generated by reflection at the substrate-back electrode metal interface, reflection can be reduced by changing the electrodes to absorbing metal; ③ For crosstalk paths generated by reflection at the substrate-light-receiving aperture interface coated with antireflection film, a filter layer with a bandgap between the multiplication layer and the absorption layer can be added to the epitaxial structure to selectively absorb crosstalk photons while remaining transparent to photons of the target wavelength being detected; this method also has the same suppression effect on path ②. However, none of the above methods completely solve the crosstalk problem, especially the latter two paths; according to the latest report from MIT Lincoln Lab in 2018, selective wet etching to completely remove the substrate can basically eliminate crosstalk in ② and ③, but achieving this process is quite difficult.

[0005] Therefore, it is necessary to design a new imaging method, device, equipment, and storage medium to suppress array crosstalk in order to overcome the above problems. Summary of the Invention

[0006] This invention provides an imaging method for suppressing array crosstalk, which solves the problem that the solutions used in related technologies cannot completely solve the crosstalk or have high manufacturing difficulty.

[0007] Firstly, an imaging method for suppressing array crosstalk is provided, comprising the following steps: dividing a pixel array into multiple subarrays, wherein each subarray includes m×n pixels, and dividing the gating period corresponding to each subarray into N time sequences, where N≤m×n; sequentially activating the gating signals of pixels at the same position in each subarray to enable them to enter the detection mode, wherein the activation time of the gating signal of each pixel in each subarray is determined based on the spatial distribution characteristics of crosstalk and the time when the total probability of crosstalk in the array reaches its peak; and stitching together the N data images in each subarray.

[0008] In some embodiments, the time when the total crosstalk probability in the array reaches its peak is T. The step of sequentially activating the gating signals of pixels at the same position in each subarray to put them into the detection mode includes: activating the gating signal of the starting pixel in each subarray, while simultaneously deactivating the gating signals of the remaining pixels in each subarray, so that the starting pixel in each subarray enters the detection mode; within time T, activating the gating signals of pixels in each subarray that are not directly adjacent to the starting pixel, while simultaneously deactivating the gating signals of the remaining pixels in each subarray, so that the pixels in each subarray that are not directly adjacent to the starting pixel enter the detection mode.

[0009] In some embodiments, the pixels that are not directly adjacent to the starting pixel include pixels that are diagonally opposite the starting pixel.

[0010] In some embodiments, the step of sequentially activating the gating signals of pixels at the same position in each subarray to enter the detection mode further includes: when the time is greater than T, activating the gating signals of pixels in each subarray that are directly adjacent to the starting pixel, while deactivating the gating signals of the remaining pixels in each subarray, so that the pixels in each subarray that are directly adjacent to the starting pixel enter the detection mode.

[0011] In some embodiments, when m = n = 2, each subarray has 4 pixels, defined as pixel A, pixel B, pixel C, and pixel D, where pixels A and B are diagonally opposite each other, and pixels C and D are diagonally opposite each other. The gating period corresponding to each subarray is divided into 4 time sequences, each time sequence corresponding to one pixel. The step of sequentially activating the gating signals of pixels at the same position in each subarray to put them into detection mode includes: activating the gating signal of pixel A in each subarray while deactivating the gating signals of the other pixels, and emitting a laser when the rising edge of the gating occurs, thus pixel A enters detection mode; activating the gating signal of pixel B in each subarray while deactivating the gating signals of the other pixels, and emitting a laser when the rising edge of the gating occurs, thus pixel B enters detection mode; activating the gating signal of pixel D or pixel C in each subarray while deactivating the gating signals of the other pixels, and emitting a laser when the rising edge of the gating occurs, thus pixel D or pixel C enters detection mode.

[0012] In some embodiments, when m = n = 3, each subarray has 9 pixels, defined as pixel A, pixel B, pixel C, pixel D, pixel E, pixel F, pixel G, pixel H, and pixel I. Pixel A is located at the center of the subarray, pixels B, D, F, and H are located at the four corners, pixel C is directly adjacent to pixels B and D, pixel E is directly adjacent to pixels D and F, and pixel G is directly adjacent to pixels F and H. The gating period corresponding to each subarray is divided into 6 time sequences. The step of sequentially activating the gating signals of pixels at the same position in each subarray to enter the detection mode includes: activating the gating signal of pixel A in each subarray while simultaneously deactivating the gating signals of the other pixels; laser emission occurring simultaneously with the rising edge of the gating signal, pixel A entering the detection mode; activating the gating signal of pixel B in each subarray... The gating signal simultaneously disables the gating signals of all other pixels. Upon the rising edge of the gating signal, laser emission occurs, and pixel B enters detection mode. Similarly, the gating signals of pixels F and C in each subarray are enabled, while the gating signals of all other pixels are disabled. Upon the rising edge of the gating signal, laser emission occurs, and pixels F and C enter detection mode. The same applies to pixels D and G in each subarray; the same applies to pixels E and H in each subarray; and the same applies to pixels I in each subarray. Upon the rising edge of the gating signal, laser emission occurs, and pixels I enter detection mode.

[0013] In some embodiments, if the time at which the total crosstalk probability in the array reaches its peak is T, then the time for each timing sequence is greater than T / 2.

[0014] Secondly, an imaging device for suppressing array crosstalk is provided, comprising: a partitioning module for dividing a pixel array into multiple subarrays, wherein each subarray includes m×n pixels, and the gating period corresponding to each subarray is divided into N time sequences, where N≤m×n; a control module for sequentially activating the gating signals of pixels at the same position in each subarray to enable them to enter the detection mode, wherein the activation time of the gating signal of each pixel in each subarray is determined according to the spatial distribution characteristics of crosstalk and the time when the total probability of crosstalk in the array reaches its peak; and an image stitching module for stitching together the N data images in each subarray.

[0015] Thirdly, an electronic device is provided, the electronic device including a processor, the processor being configured to execute at least one line of program code, causing the electronic device to perform the method described above.

[0016] Fourthly, a computer-readable storage medium is provided, characterized in that the storage medium stores at least one piece of program code, which is read by a processor to cause an electronic device to perform the above-described method.

[0017] The beneficial effects of the technical solution provided by this invention include:

[0018] This invention provides an imaging method, apparatus, device, and storage medium for suppressing array crosstalk. By dividing the pixel array into multiple sub-arrays and dividing each gating period, for each sub-array, each pixel is selectively activated based on the spatial distribution characteristics of crosstalk and the time when the total probability of crosstalk in the array reaches its peak. This effectively avoids the detection of optical crosstalk signals of adjacent pixels caused by all pixels simultaneously entering avalanche standby state in the traditional frame rate synchronization mode. Finally, the images are stitched together, thereby minimizing the impact of crosstalk on the detection imaging quality. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 A flowchart illustrating an imaging method for suppressing array crosstalk, provided as an embodiment of the present invention;

[0021] Figure 2 This is an example diagram of a 5×5 region in a SPAD array provided in an embodiment of the present invention;

[0022] Figure 3 This is an example diagram of a 2×2 subarray provided in an embodiment of the present invention;

[0023] Figure 4 This is an example diagram showing the timing of a 2×2 subarray provided in an embodiment of the present invention;

[0024] Figure 5 This is an example diagram of a 3×3 subarray provided in an embodiment of the present invention;

[0025] Figure 6 This is an example diagram showing the timing of a 3×3 subarray provided in an embodiment of the present invention. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] The present invention provides an imaging method, apparatus, device and storage medium for suppressing array crosstalk, which can solve the problems of crosstalk or high process difficulty that the solutions used in related technologies cannot completely solve.

[0028] See Figure 1 and Figure 2 The image shown illustrates an imaging method for suppressing array crosstalk provided by an embodiment of the present invention. This method is applicable to single-photon avalanche photodiode (SPAD) arrays and may include the following steps:

[0029] S1: Divide the pixel array into multiple subarrays, where each subarray includes m×n pixels. Divide the gating period corresponding to each subarray into N time sequences, where N ≤ m×n. The number of time sequences in each gating period can be equal to or unequal to the number of pixels in each subarray. When the number of time sequences is equal to the number of pixels, one time sequence within each gating period corresponds one-to-one with one pixel in each subarray. When dividing each gating period into multiple time sequences, the high-level duration of the quench circuit gating signal (i.e., the gating period) can be divided into equal time segments. Each subarray is also spatially divided into m×n pixels, where m and n are both integers greater than or equal to 2. The maximum value of m×n depends on the processing capability of the high-speed readout circuit for the sampled signal.

[0030] S2: Sequentially activate the gating signals of pixels at the same location in each subarray to put them into detection mode. The activation time of the gating signal for each pixel in each subarray is determined based on the spatial distribution characteristics of crosstalk and the time when the total crosstalk probability in the array (i.e., the total dark count caused by all crosstalk) reaches its peak. That is, the activation time of each pixel in each subarray is different, and pixels in each subarray are selectively activated at different times.

[0031] S3: Perform image stitching on the N data images in each subarray. Finally, during data acquisition, processing, and output, image stitching is performed. This can stitch together the N data images in each subarray, and can also stitch together data images from multiple subarrays for image stitching and restoration processing to recover the complete original image.

[0032] Optical crosstalk is mainly related to chip size and three-dimensional structure: clearly, the probability of a photon entering an adjacent pixel is inversely proportional to the pixel spacing. In addition to the crosstalk path, the existence of crosstalk cascading effects further affects the temporal and spatial distribution of crosstalk probability.

[0033] In this embodiment, since the pixel array is divided into multiple sub-arrays and each gating cycle is also divided, for each sub-array, each pixel is selectively turned on according to the spatial distribution characteristics of crosstalk and the time when the total probability of crosstalk in the array reaches its peak. The opening order of pixels at different positions can be determined based on the spatial distribution characteristics and cascading effect (temporal characteristics) of crosstalk. Time-division multiplexing gating is used to suppress SPAD array crosstalk, which can effectively avoid the detection of optical crosstalk signals of adjacent pixels caused by all pixels entering avalanche standby state at the same time in the traditional frame rate synchronization mode. Finally, image stitching is performed. Furthermore, when the total probability of crosstalk in the array reaches its peak, the crosstalk influence on pixels around the starting pixel is reduced, thereby minimizing the impact of crosstalk on the detection imaging quality.

[0034] In some embodiments, the time at which the total crosstalk probability in the array reaches its peak is set to T. The step of sequentially activating the gating signals of pixels at the same position in each subarray to put them into the detection mode may include: activating the gating signal of the starting pixel in each subarray while deactivating the gating signals of the remaining pixels in each subarray, so that the starting pixel in each subarray enters the detection mode; within time T, activating the gating signals of pixels in each subarray that are not directly adjacent to the starting pixel while deactivating the gating signals of the remaining pixels in each subarray, so that the pixels in each subarray that are not directly adjacent to the starting pixel enter the detection mode. Since the pixels immediately adjacent to the starting pixel are more affected by the starting pixel than pixels in other positions, in this embodiment, when the total crosstalk probability in the array reaches its peak, the pixels directly adjacent to the starting pixel are turned off. This avoids a significant crosstalk impact on the pixels directly adjacent to the starting pixel when the total crosstalk probability in the array reaches its peak. Pixels not directly adjacent to the starting pixel are relatively far away from the starting pixel, so turning on these non-directly adjacent pixels minimizes the crosstalk impact of the starting pixel on them. In this way, the pixels directly adjacent to the starting pixel can avoid the peak time of the crosstalk probability. This timing strategy helps reduce the overall crosstalk probability of the array and effectively prevents the true target signal from being missed due to interference from crosstalk signals from adjacent pixels entering the dead time prematurely in active quenching mode.

[0035] The specific value of the time T when the total crosstalk probability in the array reaches its peak can be determined through statistical experiments on the arrival interval of avalanche events. Dark counts are divided into intrinsic dark counts and crosstalk-introduced dark counts. The former follows a Poisson process, while the latter is a non-Poisson process. The two are distinguished by the significant difference in their distribution over time, and the time T can be obtained from this. In some preferred embodiments, experiments have determined that the crosstalk-introduced dark counts basically reach their peak within 2 ns after the initial pixel emits crosstalk light (the specific distribution varies slightly depending on the absorber layer material), that is, the time T when the total crosstalk probability in the array reaches its peak is 2 ns.

[0036] Preferably, the pixels not directly adjacent to the starting pixel include pixels diagonally opposite the starting pixel. The probability of a neighboring pixel being affected by crosstalk from the starting pixel is approximately 10 times that of a diagonally opposite pixel. Among the pixels closest to the starting pixel, diagonally opposite pixels are the first to be affected. Assuming the starting pixel's gate opening time is greater than or equal to 1 ns, followed by the opening of diagonally opposite pixels, directly adjacent pixels can avoid the peak crosstalk probability time within 2 ns.

[0037] Of course, in other embodiments, it can also be a cell that is located in the same row or column as the starting cell and is spaced by one or more cells.

[0038] In some embodiments, sequentially activating the gating signals of pixels at the same position in each subarray to enter the detection mode may further include: when the time is greater than T, activating the gating signals of pixels directly adjacent to the starting pixel in each subarray, while simultaneously deactivating the gating signals of the remaining pixels in each subarray, so that the pixels directly adjacent to the starting pixel in each subarray enter the detection mode. In this embodiment, activating the pixels directly adjacent to the starting pixel after avoiding the peak time of the total crosstalk probability in the array can effectively reduce the crosstalk impact of the starting pixel on directly adjacent pixels.

[0039] In some preferred embodiments, see Figure 3 and Figure 4 As shown, when m = n = 2, each subarray has 4 pixels, which can be defined as pixel A, pixel B, pixel C, and pixel D. Pixel A and pixel B are diagonally opposite each other, as are pixels C and D. Pixel A is directly adjacent to pixels C and D, and pixel B is also directly adjacent to pixels C and D. The gating period corresponding to each subarray is divided into 4 time sequences, with each time sequence corresponding to one pixel. That is, the gating period is also divided into 2×2 time sequences.

[0040] The step of sequentially activating the gating signals of pixels at the same position in each subarray to put them into detection mode may include:

[0041] The gating signal for pixel A in each subarray is turned on while the gating signals for the other pixels are turned off (i.e., the gating signals for pixels B, C, and D are turned off). When the rising edge of the gating signal for pixel A arrives, the laser is emitted, and pixel A enters the detection mode. That is, pixel A is the starting pixel.

[0042] The gating signal of B pixel in each subarray is turned on while the gating signals of the other pixels are turned off (that is, the gating signals of A pixel, C pixel and D pixel are turned off). When the rising edge of the gating signal of B pixel arrives, the laser is emitted and B pixel enters the detection mode.

[0043] To activate the detection mode, activate the gating signal for cell D in each subarray while deactivating the gating signals for the remaining cells (i.e., deactivate the gating signals for cells A, C, and B). When the rising edge of the gating signal for cell D arrives, the laser is emitted, and the corresponding cell D enters detection mode. Alternatively, activate the gating signal for cell C in each subarray while deactivating the gating signals for the remaining cells (i.e., deactivate the gating signals for cells A, B, and D). When the rising edge of the gating signal for cell C arrives, the laser is emitted, and the corresponding cell C enters detection mode.

[0044] In this embodiment, the opening order of pixels A, B, C, and D can be ABDC or ABCD. Alternatively, in other embodiments, the gating period for each subarray can be divided into three time sequences, with pixels D and C being turned on simultaneously. However, in this embodiment, pixels D and C are turned on separately in different time sequences to avoid issues arising when they are turned on simultaneously. Figure 3 When the C cell in the upper right subarray and the D cell in the lower left subarray are turned on simultaneously, they influence each other.

[0045] In some alternative embodiments, see Figure 5 and Figure 6 As shown, when m = n = 3, each subarray has 9 pixels, defined as pixel A, pixel B, pixel C, pixel D, pixel E, pixel F, pixel G, pixel H and pixel I. Pixel A is located at the center of the subarray, while pixels B, D, F and H are located at the four corners. Pixel C is directly adjacent to pixels B and D, pixel E is directly adjacent to pixels D and F, and pixel G is directly adjacent to pixels F and H. In this embodiment, the gating period corresponding to each subarray is divided into 6 time sequences.

[0046] The step of sequentially activating the gating signals of pixels at the same position in each subarray to put them into detection mode may include:

[0047] The gating signal of pixel A in each subarray is turned on while the gating signals of the other pixels are turned off. When the rising edge of the gating signal for pixel A arrives, the laser is emitted, and pixel A enters the detection mode. That is, pixel A is the starting pixel.

[0048] The gating signal of B-cell in each subarray is turned on while the gating signal of the other cells is turned off. When the rising edge of the gating signal of B-cell arrives, the laser is emitted and B-cell enters the detection mode.

[0049] The gating signals of F and C pixels in each subarray are turned on while the gating signals of the remaining pixels are turned off. When the rising edge of the gating signal of F and C pixels arrives, the laser is emitted, and F and C pixels enter the detection mode.

[0050] The gating signals of D and G pixels in each subarray are turned on while the gating signals of the remaining pixels are turned off. When the rising edge of the gating signal of D and G pixels arrives, the laser is emitted, and D and G pixels enter the detection mode.

[0051] The gating signals of E and H pixels in each subarray are turned on while the gating signals of the remaining pixels are turned off. When the rising edge of the gating signal of E and H pixels arrives, the laser is emitted, and E and H pixels enter the detection mode.

[0052] The gating signal of cell I in each subarray is turned on while the gating signal of the other cells is turned off. When the rising edge of the gating signal of cell I arrives, the laser is emitted and cell I enters the detection mode.

[0053] This embodiment only illustrates one possible activation sequence for a 3×3 subarray. In other embodiments, other activation sequences can also be adopted. For example, if pixel A is the starting pixel, then pixel D, F, or H can be activated in the second timing sequence. The activation sequence of other pixels can be followed by the sequence listed in the example above. In this embodiment, pixels B, D, F, and H, located diagonally opposite pixel A, are activated separately in different timing sequences. This avoids the situation where pixels B, D, F, and H at the four corners are activated simultaneously. Figure 5 The F pixel of the top-left subarray, the B pixel of the bottom-right subarray, the D pixel of the bottom-left subarray, and the H pixel of the top-right subarray are all turned on simultaneously, thus influencing each other.

[0054] In some embodiments, assuming the time when the total crosstalk probability in the array reaches its peak is T, then the time of each timing sequence is greater than T / 2. After the second timing sequence is completed, the peak time of the total crosstalk probability in the array can be successfully avoided.

[0055] In this embodiment, the 2×2 subarray scheme of the basic unit is suitable for situations where the pixel pitch is ≥20μm and the spatial resolution and effective fill rate are relatively small; the 3×3 subarray scheme of the basic unit is suitable for situations where the pixels are compact (pixel pitch <20μm) and there is redundancy in spatial resolution and effective fill rate. In this case, in addition to the advantage of suppressing crosstalk, this scheme also has the complementary relationship between each detection pixel. That is, due to the compact pixels and the possibility of a large number of photons arriving at the same time, when one pixel enters the dead time, nearby pixels in the ready state have a certain probability of effective detection. In addition, the distance between pixels entering the gate opening state at the same time changes from 2 to 3 (vertical) or diagonal, further reducing the probability of crosstalk.

[0056] This invention also provides an imaging device for suppressing array crosstalk, which may include: a partitioning module for dividing a pixel array into multiple subarrays, wherein each subarray includes m×n pixels, and the gating period corresponding to each subarray is divided into N time sequences, where N≤m×n; a control module for sequentially activating the gating signals of pixels at the same position in each subarray to put them into detection mode, wherein the activation time of the gating signal of each pixel in each subarray is determined according to the spatial distribution characteristics of crosstalk and the time when the total probability of crosstalk in the array reaches its peak; and an image stitching module for stitching together the N data images in each subarray. The imaging device for suppressing array crosstalk provided by this invention can implement any of the above-mentioned imaging methods for suppressing array crosstalk, which will not be elaborated further here.

[0057] This invention also provides an electronic device, which includes a processor for executing at least one line of program code to cause the electronic device to perform the above-described method.

[0058] This invention also provides a computer-readable storage medium storing at least one piece of program code, which is read by a processor to cause an electronic device to perform the above-described method.

[0059] Through the above description of the embodiments, those skilled in the art will understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. Furthermore, the storage system access method embodiment provided in the above embodiments belongs to the same concept, and its specific implementation process is detailed in the method embodiments, which will not be repeated here.

[0060] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0061] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0062] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0063] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, essentially, or the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. It can also be hardware language code, such as Verilog, VHDL, etc. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, external hard drives, ROM, RAM, magnetic disks, or optical disks.

[0064] In the description of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B. The "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. Furthermore, "at least one" means one or more, and "multiple" means two or more. The terms "first," "second," etc., do not limit the quantity or order of execution, and "first," "second," etc., do not necessarily imply differences.

[0065] In this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or illustration. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0066] It should be noted that all information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, stored data, displayed data, etc.), and signals involved in this application are authorized by the user or fully authorized by all parties, and the collection, use, and processing of related data must comply with the relevant laws, regulations, and standards of the relevant countries and regions. For example, all data access requests involved in this application were obtained with full authorization.

[0067] All of the above-mentioned optional technical solutions can be combined in any way to form optional embodiments of this disclosure, and will not be described in detail here.

[0068] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. An imaging method of suppressing array cross-talk, characterized by, It comprises the following steps: dividing the pixel array into a plurality of sub-arrays, wherein each sub-array comprises m x n pixels, and dividing the corresponding gate period of each sub-array into N time sequences, wherein N≤m x n; sequentially turning on the gate signals of the pixels at the same position in each sub-array to make them enter the detection mode, wherein the opening time of the gate signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of the crosstalk and the time at which the total probability of the crosstalk in the array reaches a peak value; performing image splicing on the N data maps in each sub-array; the time at which the total probability of the crosstalk in the array reaches a peak value is T, and the sequentially turning on the gate signals of the pixels at the same position in each sub-array to make them enter the detection mode comprises: turning on the gate signals of the starting pixels in each sub-array while turning off the gate signals of the remaining pixels in each sub-array to make the starting pixels in each sub-array enter the detection mode; within time T, turning on the gate signals of the pixels in each sub-array that are not directly adjacent to the position of the starting pixels while turning off the gate signals of the remaining pixels in each sub-array to make the pixels in each sub-array that are not directly adjacent to the position of the starting pixels enter the detection mode; when the time is greater than T, turning on the gate signals of the pixels in each sub-array that are directly adjacent to the position of the starting pixels while turning off the gate signals of the remaining pixels in each sub-array to make the pixels in each sub-array that are directly adjacent to the position of the starting pixels enter the detection mode.

2. The imaging method for suppressing array crosstalk according to claim 1, wherein: the pixels in each sub-array that are not directly adjacent to the position of the starting pixels include the pixels that are diagonally opposite to the starting pixels.

3. The imaging method of suppressing array cross-talk according to claim 1, wherein, when m = n = 2, there are 4 pixels in each sub-array, which are defined as A pixels, B pixels, C pixels and D pixels, wherein the A pixels and the B pixels are diagonally opposite to each other, and the C pixels and the D pixels are diagonally opposite to each other, and the corresponding gate period of each sub-array is divided into 4 time sequences, and each time sequence corresponds to one pixel; the sequentially turning on the gate signals of the pixels at the same position in each sub-array to make them enter the detection mode comprises: turning on the gate signals of the A pixels in each sub-array while turning off the gate signals of the remaining pixels, and the gate rising edge arrives at the same time as the laser emission, and the A pixels enter the detection mode; turning on the gate signals of the B pixels in each sub-array while turning off the gate signals of the remaining pixels, and the gate rising edge arrives at the same time as the laser emission, and the B pixels enter the detection mode; turning on the gate signals of the D pixels or the C pixels in each sub-array while turning off the gate signals of the remaining pixels, and the gate rising edge arrives at the same time as the laser emission, and the corresponding D pixels or C pixels enter the detection mode.

4. The imaging method of suppressing array cross-talk according to claim 1, wherein, When m = n = 3, there are 9 pixels in each sub-array, which are defined as A pixel, B pixel, C pixel, D pixel, E pixel, F pixel, G pixel, H pixel and I pixel respectively, wherein the A pixel is located at the center position of the sub-array, the B pixel, the D pixel, the F pixel and the H pixel are located at the four corner positions of the sub-array, the C pixel is directly adjacent to the B pixel and the D pixel, the E pixel is directly adjacent to the D pixel and the F pixel, the G pixel is directly adjacent to the F pixel and the H pixel, and each sub-array corresponding gate period is divided into 6 time sequences; the control module is configured to sequentially open the gate signals of the pixels at the same position in each sub-array to enable the pixels to enter the detection mode, wherein the opening time of the gate signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of the crosstalk and the time T at which the total probability of the crosstalk in the array reaches the peak value; the image splicing module is configured to perform image splicing on the N data images in each sub-array; the control module is configured to sequentially open the gate signals of the pixels at the same position in each sub-array to enable the pixels to enter the detection mode, wherein the opening time of the gate signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of the crosstalk and the time T at which the total probability of the crosstalk in the array reaches the peak value; the control module is configured to sequentially open the gate signals of the pixels at the same position in each sub-array to enable the pixels to enter the detection mode, wherein the opening time of the gate signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of the crosstalk and the time T at which the total probability of the crosstalk in the array reaches the peak value; the control module is configured to sequentially open the gate signals of the pixels at the same position in each sub-array to enable the pixels to enter the detection mode, wherein the opening time of the gate signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of the crosstalk and the time T at which the total probability of the crosstalk in the array reaches the peak value; the control module is configured to sequentially open the gate signals of the pixels at the same position in each sub-array to enable the pixels to enter the detection mode, wherein the opening time of the gate signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of the crosstalk and the time T at which the total probability of the crosstalk in the array reaches the peak value; the control module is configured to sequentially open the gate signals of the pixels at the same position in each sub-array to enable the pixels to enter the detection mode, wherein the opening time of the gate signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of the crosstalk and the time T at which the total probability of the crosstalk in the array reaches the peak value; the control module is configured to sequentially open the gate signals of the pixels at the same position in each sub-array to enable the pixels to enter the detection mode, wherein the opening time of the gate signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of the crosstalk and the time T at which the total probability of the crosstalk in the array reaches the peak value; the control module is configured to sequentially open the gate signals of the pixels at the same position in each sub-array to enable the pixels to enter the detection mode, wherein the opening time of the gate signals of the pixels in each sub-array is determined according to the spatial distribution characteristics of the crosstalk and the time T at which the total probability of the crosstalk in the array reaches the peak value; 6. An imaging device that suppresses array cross-talk, characterized by comprising: ​ ​ ​ ​ ​ ​ In time T, the gate signals of the pixels not directly adjacent to the position of the starting pixel in each sub-array are turned on, and the gate signals of the remaining pixels in each sub-array are turned off, so that the pixels not directly adjacent to the position of the starting pixel in each sub-array enter the detection mode; In time greater than T, the gate signals of the pixels directly adjacent to the position of the starting pixel in each sub-array are turned on, and the gate signals of the remaining pixels in each sub-array are turned off, so that the pixels directly adjacent to the position of the starting pixel in each sub-array enter the detection mode.

7. An electronic device, comprising: The electronic device includes a processor configured to execute at least one program code to cause the electronic device to perform the method of any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, The storage medium stores at least one program code, which is read by the processor to cause the electronic device to perform the method of any one of claims 1-5.

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