Display panel, preparation method thereof and display device

Abstract

The present disclosure relates to the technical field of display, and provides a display panel, a preparation method thereof and a display device. The display panel comprises a switching circuit and a source driving circuit. The switching circuit comprises a plurality of switching modules. A control end of the switching module is used for receiving a switching control signal. A first end is used for receiving a data signal. A second end is connected to a data line of a display area. The source driving circuit comprises a data signal output module and a voltage adjusting module. The data signal output module is used for outputting a data signal through a source signal line connected thereto. One source signal line is connected to each switching module in one switching circuit. The voltage adjusting module is used for outputting a switching control signal. The signal amplitude of the switching control signal is proportional to the maximum gray scale voltage of a corresponding sub-pixel. The number of the voltage adjusting modules is less than or equal to the number of the switching modules in the switching circuit. The signal amplitudes of the switching control signals output by at least part of the voltage adjusting modules are different. In this way, the power consumption can be reduced.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and more specifically, to a display panel, a method for manufacturing the same, and a display device. Background Technology

[0002] In flexible wearable devices, multi-wire selector switches are often required to save space. However, in related technologies, flexible wearable devices suffer from high power consumption.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] The purpose of this disclosure is to overcome the shortcomings of the prior art and provide a display panel, a method for manufacturing the same, and a display device.

[0005] According to one aspect of this disclosure, a display panel is provided, including a display area and a non-display area disposed at least on one side of the display area. The display area includes a plurality of pixel units arranged in an array along a row and column direction, and the pixel units include a plurality of sub-pixels with different maximum grayscale voltages. The display panel further includes: a plurality of switching circuits located in the non-display area, each switching circuit including: a plurality of switching modules, wherein a control terminal of each switching module is used to receive a switching control signal, a first terminal is used to receive a data signal, and a second terminal is connected to a data line of the display area; a source driving circuit located in the non-display area, the source driving circuit including: a data signal output module for outputting a data signal through a source signal line connected thereto, wherein one source signal line corresponds to one of the switching modules in the switching circuit; and a plurality of voltage adjustment modules for outputting the switching control signal, wherein the signal amplitude of the switching control signal is proportional to the maximum grayscale voltage of the corresponding sub-pixel; wherein the number of voltage adjustment modules is less than or equal to the number of switching modules in the switching circuit, and at least some of the voltage adjustment modules output different signal amplitudes of the switching control signal.

[0006] In an exemplary embodiment of this disclosure, the switching module connecting the same seed pixel and the source signal line reuses the same voltage regulation module.

[0007] In an exemplary embodiment of this disclosure, the number of voltage regulation modules is the same as the number of sub-pixels in the pixel unit.

[0008] In an exemplary embodiment of this disclosure, the pixel unit includes a first sub-pixel R, a second sub-pixel G, and a third sub-pixel B, wherein the maximum grayscale voltage of the second sub-pixel is greater than the maximum grayscale voltage of the first sub-pixel and the maximum grayscale voltage of the third sub-pixel; the source driving circuit includes a first voltage adjustment module for outputting a first switch control signal, a second voltage adjustment module for outputting a second switch control signal, and a third voltage adjustment module for outputting a third switch control signal, wherein the signal amplitude of the second switch control signal is greater than the signal amplitude of the first switch control signal and the signal amplitude of the third switch control signal.

[0009] In an exemplary embodiment of this disclosure, the pixel unit includes m sub-pixels, the switching circuit includes n switching modules, where n and m are both natural numbers, and n is an integer multiple of m; the source driving circuit further includes multiple signal transmission lines, one of the signal transmission lines connects to one of the switching modules, and each switching module connected to the same seed pixel is connected to the same voltage regulation module through the corresponding signal transmission line.

[0010] In an exemplary embodiment of this disclosure, the source drive circuit further includes: a voltage output module, the output terminal of which is connected to each of the voltage regulation modules, the voltage output module being used to output a reference voltage signal; a digital module, which is connected to the voltage regulation module and the switch module respectively, the digital module being used to output the switch control signal to the corresponding switch module according to a preset timing sequence; wherein, the voltage regulation module is further used to adjust the reference voltage signal into a switch control signal of a corresponding amplitude; the signal transmission line includes a first component and a second component, the first component being connected between the digital module and the switch module, and the second component being connected between the voltage regulation module and the digital module.

[0011] In an exemplary embodiment of this disclosure, the display panel further includes a gate driving circuit for performing line scanning on the display panel; wherein the gate driving circuit and the voltage adjustment module share the same voltage output module.

[0012] In an exemplary embodiment of this disclosure, the voltage regulation circuit includes a low-dropout linear regulator.

[0013] In an exemplary embodiment of this disclosure, the switching circuit is a multiplexer, and the switching module is a transistor.

[0014] In an exemplary embodiment of this disclosure, the non-display area includes a transition area and a bonding area, the transition area being connected between the display area and the bonding area, the source drive circuit being located in the bonding area, and the switch circuit being located in the transition area; wherein, the width of the transition area in a first direction is smaller than the width of the bonding area in the first direction, and the first direction intersects the overall extension direction from the display area to the bonding area.

[0015] In an exemplary embodiment of this disclosure, the width of the transition area in the first direction gradually decreases in the direction from the binding area to the display area.

[0016] In an exemplary embodiment of this disclosure, the display panel further includes: a substrate; an active layer located on one side of the substrate, the active layer including: a plurality of first active portions spaced apart in the first direction when projected onto the substrate, each first active portion including a first sub-active portion, a second sub-active portion, and a third sub-active portion connected sequentially in the first direction, the first sub-active portion and the third sub-active portion being used to form a channel region of the switching module; and a first conductive layer located on the side of the active layer opposite to the substrate, the first conductive layer including: a plurality of first conductive portions corresponding one-to-one with the first active portions. The first conductive portion includes a first sub-conductive portion, a second sub-conductive portion, and a third sub-conductive portion connected in sequence. The orthographic projection of the first sub-conductive portion onto the substrate covers the orthographic projection of the first sub-active portion onto the substrate. The orthographic projection of the third sub-active portion onto the substrate covers the orthographic projection of the third sub-active portion onto the substrate. The first sub-conductive portion and the second sub-conductive portion are used to form the control terminal of the switching module. The second sub-conductive portion is connected between the first sub-conductive portion and the third sub-conductive portion on the side of the first sub-conductive portion and the third sub-conductive portion away from the display area.

[0017] In an exemplary embodiment of this disclosure, the orthographic projection of the second sub-conductive portion onto the substrate is separate from the orthographic projection of the third sub-active portion onto the substrate.

[0018] In an exemplary embodiment of this disclosure, the active layer includes a plurality of repeating units, the number of which is the same as the number of switching circuits. Each repeating unit includes f active structures, and each active structure includes two first active parts. The switching circuit includes k switching modules, where f = (k+1) / 2 when k is odd and f = k / 2 when k is even.

[0019] In an exemplary embodiment of this disclosure, the active structure further includes: a second active portion connected between two adjacent first active portions, the second active portion forming a first end of two adjacent switching modules; two third active portions connected to the side of the first active portion away from the other first active portion, the third active portions forming a second end of two adjacent switching modules; the display panel further includes: a second conductive layer located on the side of the first conductive layer away from the substrate, the second conductive layer including: a plurality of source signal lines extending along the second direction in the orthographic projection of the substrate and spaced apart in the first direction; a third conductive layer located on the side of the second conductive layer away from the substrate, the third conductive layer including: a plurality of first adapter lines corresponding one-to-one with the source signal lines, the first adapter lines including: a first connecting portion extending along the first direction in the orthographic projection of the substrate. The system includes: multiple second connecting portions, each corresponding to a plurality of second active portions and respectively connected to the first connecting portion; the second connecting portions extending along a second direction in the orthographic projection on the substrate; the second connecting portions also connecting to corresponding second active portions via vias; multiple signal transmission lines, each signal transmission line including: a first transmission portion extending along the first direction in the orthographic projection on the substrate; the first transmission portion connecting to a corresponding first sub-conductive portion via vias; a second transmission portion connecting to the first transmission portion and connected to the voltage regulation module; the second transmission portion extending along the second direction in the orthographic projection on the substrate; and multiple second adapter lines corresponding to a third active portion and extending along the second direction in the orthographic projection on the substrate and spaced apart in the first direction; the second adapter lines connecting to the corresponding third active portion via vias and connected to the corresponding data line.

[0020] According to a second aspect of this disclosure, a method for fabricating a display panel is also provided, for fabricating the display panel described in any embodiment of this disclosure. The method includes: providing a substrate, the substrate having a display area located at least on one side of the display area and a non-display area, the display area including a plurality of pixel units arrayed along a row and column direction, the pixel units including a plurality of sub-pixels with different maximum grayscale voltages; forming an active layer on one side of the substrate using a deposition process, the active layer including a plurality of first active portions, the plurality of first active portions being spaced apart in a first direction on the orthographic projection of the substrate, each first active portion including a first sub-active portion, a second sub-active portion and a third sub-active portion sequentially connected in the first direction, the first sub-active portion and the third sub-active portion being used to form a groove of the switching module. The active layer is formed on the side of the active layer away from the substrate using a deposition process. The first conductive layer includes a plurality of first conductive portions, which are disposed one-to-one with the first active portions. Each first conductive portion includes a first sub-conductive portion, a third sub-conductive portion, and a second sub-conductive portion connected in sequence. The orthographic projection of the first sub-conductive portion on the substrate covers the orthographic projection of the first sub-active portion on the substrate, and the orthographic projection of the second sub-active portion on the substrate covers the orthographic projection of the second sub-active portion on the substrate. The first sub-conductive portion and the second sub-conductive portion are used to form the control terminal of the switching module. The third conductive portion is connected between the first conductive portion and the second conductive portion on the side of the first conductive portion and the second conductive portion away from the display area.

[0021] According to a third aspect of this disclosure, a display device is also provided, including the display panel described in any embodiment of this disclosure.

[0022] The display panel disclosed herein includes a source driving circuit and a switching circuit. A switching circuit includes multiple switching modules, and each switching module is connected to a data line to output a data signal to a column of sub-pixels. The source driving circuit includes multiple voltage adjustment modules. The signal amplitude of the switching control signal output by the voltage adjustment module is proportional to the maximum grayscale voltage of its corresponding sub-pixel. In other words, the voltage adjustment module corresponding to different sub-pixels can output voltage signals of different magnitudes. Thus, compared with the prior art, which only outputs a voltage signal of one magnitude to control different switching modules in the switching circuit, the source driving circuit of this disclosure can reduce the overall power consumption.

[0023] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0024] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0025] Figure 1 This is a schematic diagram of the structure of a display panel according to one embodiment of the present disclosure;

[0026] Figure 2 for Figure 1 A schematic diagram showing the connection between the switching circuit and other components.

[0027] Figure 3 Another implementation Figure 1 A schematic diagram showing the connection between the switching circuit and other components.

[0028] Figure 4 This is a schematic diagram of the structure of a voltage regulation circuit according to one embodiment of the present disclosure;

[0029] Figure 5 This is a schematic diagram of the structure of a switching circuit and other devices according to one embodiment of the present disclosure;

[0030] Figure 6 for Figure 5 A cross-sectional view along the direction of the dashed line AA;

[0031] Figures 7-15 This is a process flow diagram of a display panel manufacturing method according to one embodiment of the present disclosure. Detailed Implementation

[0032] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. Matching reference numerals in the drawings denote matching or similar structures, and therefore detailed descriptions of them will be omitted. Furthermore, the drawings are merely illustrative of this disclosure and are not necessarily drawn to scale.

[0033] Figure 1 This is a schematic diagram of the structure of a display panel according to one embodiment of the present disclosure. Figure 2 for Figure 1 A schematic diagram showing the connection between the switching circuit and other components, such as... Figure 1 and Figure 2As shown, the display panel may further include a source drive circuit DIC and multiple switch circuits MUX. The switch circuits MUX may include multiple switch modules. The control terminal of the switch module is used to receive switch control signals, the first terminal is used to receive data signals, and the second terminal is connected to the data line Data of the display area AA. The source drive circuit DIC may include a data signal output module Source and multiple voltage adjustment modules 100. The data signal output module Source can be used to output data signals through the source signal line Source line connected to it, and one source signal line Source line corresponds to each switch module in a switch circuit MUX. The voltage adjustment modules 100 can be used to output switch control signals. The number of voltage adjustment modules 100 is less than or equal to the number of switch modules in the switch circuit MUX, and at least some of the voltage adjustment modules 100 output switch control signals with different signal amplitudes.

[0034] The display panel disclosed herein includes a source drive circuit (DIC) and a switching circuit (MUX). A switching circuit (MUX) includes multiple switching modules. Each switching module is connected to a data line (Data) to output data signals to a column of sub-pixels. The source drive circuit (DIC) includes multiple voltage regulation modules (100). The signal amplitude of the switching control signal output by the voltage regulation module (100) is proportional to the maximum grayscale voltage of its corresponding sub-pixel. In other words, the voltage regulation module (100) corresponding to different sub-pixels can output voltage signals of different magnitudes. Thus, compared with the prior art, which only outputs a voltage signal of one magnitude to control different switching modules in the switching circuit, the source drive circuit (DIC) of this disclosure can reduce overall power consumption.

[0035] like Figure 1 As shown, the display panel of this disclosure may include a display area AA and a non-display area NA disposed at least on one side of the display area AA. The display area AA includes a plurality of pixel units arranged in an array along the row and column directions, and the pixel units include a variety of sub-pixels with different maximum grayscale voltages. The switching circuit MUX and the source drive circuit DIC may be located in the non-display area NA.

[0036] The amplitude of the switch control signal disclosed herein is proportional to the maximum grayscale voltage of the corresponding sub-pixel. In the field of display technology, grayscale is used to represent the brightness levels of a display screen. The brightness of a display screen does not change continuously, but rather changes according to predefined brightness levels, which are the grayscale levels of the display screen. The driver integrated circuit (DIC) can obtain the grayscale values ​​of each pixel of the image to be displayed through the motherboard connected to it. After obtaining the grayscale values ​​of each pixel, the driver integrated circuit (DIC) can determine the grayscale voltage of the image to be displayed through the bounding point voltage in its built-in Gamma module. Typically, each grayscale value corresponds to a grayscale voltage; the higher the grayscale value, the larger its corresponding grayscale voltage, and correspondingly, the higher the display brightness.

[0037] Understandably, a seed pixel has the same maximum grayscale voltage, and a seed pixel can be understood as a sub-pixel that displays the same color. For example, a display panel may include three types of sub-pixels: a first sub-pixel, a second sub-pixel, and a third sub-pixel. The first sub-pixel is an R sub-pixel, the second sub-pixel is a G sub-pixel, and the third sub-pixel is a B sub-pixel. Therefore, all first sub-pixels, second sub-pixels, and third sub-pixels in the display panel share the same seed pixel. Correspondingly, all first sub-pixels, second sub-pixels, and third sub-pixels have the same maximum grayscale voltage.

[0038] Different types of sub-pixels have different maximum grayscale voltages. For example, taking the above-mentioned display panel as having three types of sub-pixels, namely the first sub-pixel R, the second sub-pixel G, and the third sub-pixel B, the maximum grayscale voltages of the first sub-pixel R, the second sub-pixel G, and the third sub-pixel B are all different.

[0039] In this disclosed display panel, the display area may include multiple pixel units arranged in an array along the row and column directions, where the row direction refers to the pixel row direction and the column direction refers to the pixel column direction. It is understood that a column of sub-pixels consists of sub-pixels displaying the same color, that is, sub-pixels with the same maximum grayscale voltage.

[0040] A switch module is connected to a data line to provide data signals to a column of sub-pixels, and the column of sub-pixels is the same seed pixel. The control terminal of the switch module receives a switch control signal. Thus, the switch control signal of this disclosure has a one-to-one correspondence with the type of sub-pixel. That is, a switch control signal ultimately controls the connection of a type of sub-pixel to the source signal line.

[0041] The amplitude of the switching control signal output by the voltage regulation module 100 is proportional to the maximum grayscale voltage of the corresponding sub-pixel. This means that the larger the maximum grayscale value of the sub-pixel, the larger the amplitude of the switching control signal received by the switching module controlling that sub-pixel. In other words, the amplitude of the switching control signal received by the switching module corresponding to a sub-pixel with a large maximum grayscale voltage can be greater than the amplitude of the switching control signal received by the switching module corresponding to a sub-pixel with a small maximum grayscale voltage. Therefore, the amplitude of the switching control signal in this disclosure can be determined based on the maximum grayscale voltage of the corresponding sub-pixel, so that the switching control signal can activate the corresponding switching module. For example, a pixel unit includes a first sub-pixel R, a second sub-pixel G, and a third sub-pixel B. It is known that the maximum grayscale voltage Vgreen of sub-pixel G > the maximum grayscale voltage Vred of sub-pixel R > the maximum grayscale voltage Vblue of sub-pixel B. Assuming the switching module controlling sub-pixel R is the first switching module, the switching module controlling sub-pixel G is the second switching module, and the switching module controlling sub-pixel B is the third switching module, and the first switching module is controlled by a first switching control signal, the second switching module by a second switching control signal, and the third switching module by a third switching control signal, then correspondingly, the signal amplitude of the second switching control signal can be greater than the signal amplitude of the first switching control signal, and the signal amplitude of the first switching control signal can be greater than the signal amplitude of the third switching control signal. Thus, by setting the signal amplitude of each switching control signal according to the maximum grayscale voltage of its corresponding sub-pixel, each voltage adjustment module 100 can output a switching control signal that meets the requirements, thereby avoiding unnecessary power consumption caused by the signal amplitude of the switching control signal exceeding its required turn-on voltage. As we know, the switching circuit needs to be frequently switched on and off to output data signals to different pixel columns. Taking a Mux1:6 as an example, one switching circuit includes 6 switching modules. The resolution of commonly used wearable products is 384x384. Within one frame of data, the number of times the Mux switches on and off for one source signal line is 384x6 = 2304. The entire screen has 384x3 / 6 = 192 source signal lines. When the entire screen refreshes once, the total number of times the Mux switches on and off is 2304x192 = 442368 times, which is a very high switching frequency. When the source drive circuit DIC outputs a switching control signal with only one signal amplitude to control all switching modules, the signal amplitude of this switching control signal is greater than the actual signal amplitude required by the switching modules corresponding to the B and R sub-pixels. The high level of the switching control signal is usually 7V, and the low level is usually -7V, which is relatively high. Combined with the aforementioned number of switches, this ultimately leads to the Mux consuming a lot of power.Therefore, compared with the existing technology where the source drive circuit DIC only outputs a switch control signal of one signal amplitude to control all switch modules, the source drive circuit DIC of this disclosure can reduce the power consumption of the switch modules, that is, the display panel of this disclosure has lower power consumption.

[0042] It should be understood that the sub-pixel corresponding to the switch control signal described in this disclosure can be interpreted as the switch module connected to the sub-pixel being controlled by the switch control signal. For example, if a first sub-pixel is connected to a first switch module, and the control terminal of the first switch module receives a first switch control signal, then the first sub-pixel is the sub-pixel corresponding to the first switch control signal.

[0043] The number of voltage regulation modules 100 is less than or equal to the number of switching modules in the switching circuit MUX. For example, if a switching circuit MUX includes six switching modules, then the number of voltage regulation modules 100 in the source drive circuit DIC is less than or equal to 6; or, if a switching circuit MUX includes nine switching modules, then the number of voltage regulation modules 100 in the source drive circuit DIC is less than or equal to 9. In other words, the number of voltage regulation modules 100 in the source drive circuit DIC of this disclosure does not exceed the number of switching modules in the switching circuit MUX.

[0044] At least some of the voltage adjustment modules 100 output switching control signals with different amplitudes. This is to avoid all voltage adjustment modules 100 outputting switching control signals of the same magnitude, allowing each voltage adjustment module 100 to adapt to the maximum grayscale voltage of the corresponding sub-pixel when outputting signals. This disclosure may allow some voltage adjustment modules 100 to output switching control signals with the same amplitude, or it may allow all voltage adjustment modules 100 to output switching control signals with different amplitudes. For example, the source drive circuit DIC may include six voltage adjustment modules 100, where three voltage adjustment modules 100 output switching control signals with different amplitudes. Alternatively, the switching control signals output by the six voltage adjustment modules 100 may have different amplitudes.

[0045] In the source driver circuit (DIC), the data signal output module (Source) is connected to the source signal line (Source line) to output data signals to the sub-pixels of the display area (AA). This disclosure specifies that one source signal line corresponds to each switching module in a switching circuit (MUX). This reduces the number of source signal lines, thereby reducing their space requirements and thus the size of the source driver circuit (DIC). The saved space can be used to install other components, further reducing the overall size of the display device.

[0046] The following description, in conjunction with the accompanying drawings, further illustrates this disclosed solution.

[0047] like Figure 2 As shown, in an exemplary embodiment, the switching circuit MUX can be a multiplexer, and the switching module can be a transistor. Under the control of each switching control signal, any transistor can be turned on to output the data signal in the data signal output module Source to the sub-pixel of the corresponding column. One switching circuit MUX can connect one source signal line in the source drive circuit DIC to multiple data lines Data in the display area AA, thereby saving the number of source signal lines and thus saving space in the neck position of the display panel in the non-display area NA.

[0048] Furthermore, in an exemplary embodiment, the switching module in the switching circuit can be as follows: Figure 2 As shown, the switches are staggered in the row direction, meaning the switches are not on the same straight line; or, switches connecting the same seed pixel are in the same row, while switches connecting different types of sub-pixels are not in the same row; or switches connecting the same pixel unit are in the same row, while switches connecting different pixel units are staggered in the row direction.

[0049] Figure 3 Another implementation Figure 1 A schematic diagram showing the connection between the switching circuit and other components, such as... Figure 3As shown, in an exemplary embodiment, each switch module connected to the same seed pixel and source signal line can reuse the same voltage regulation module 100. That is, switch modules connected to the same seed pixel and source signal line use the same switch control signal output by the voltage regulation module 100. In this way, the number of voltage regulation modules 100 can be further reduced, thereby saving the space occupied by the source drive circuit DIC. For example, a display panel may include three types of sub-pixels: a first sub-pixel R, a second sub-pixel G, and a third sub-pixel B. The source drive circuit (DIC) may include three voltage adjustment modules: a first voltage adjustment module 10, a second voltage adjustment module 20, and a third voltage adjustment module 30. The control terminals of each switch module connecting the first sub-pixel to the source signal line are connected to the first voltage adjustment module 10; the control terminals of each switch module connecting the second sub-pixel to the source signal line are connected to the second voltage adjustment module 20; and the control terminals of each switch module connecting the third sub-pixel to the source signal line are connected to the third voltage adjustment module 30. The first voltage adjustment module 10, the second voltage adjustment module 20, and the third voltage adjustment module 30 can independently set the turn-on voltage of the switch modules controlling the RGB sub-pixels in the MUX of the switching circuit. (Comparison) Figure 2 and Figure 3 As can be seen, this exemplary embodiment can reduce the number of voltage regulation modules 100 by reusing the voltage regulation module 100, thereby saving space for the source drive circuit DIC. By saving space for the source drive circuit DIC, the size of the display panel can be further reduced, which is conducive to the miniaturization of the display device and improves the portability of the display device.

[0050] In an exemplary embodiment, a pixel unit may include m sub-pixels, and a switching circuit may include n switching modules, where n is an integer multiple of m. For example, if a pixel unit includes three sub-pixels R, G, and B, then a switching circuit may include 3 switching modules, 6 switching modules, 9 switching modules, 12 switching modules, etc.

[0051] In an exemplary embodiment, the number of voltage adjustment modules 100 is the same as the number of sub-pixels contained in a pixel unit. For example, a pixel unit may include three sub-pixels: a first sub-pixel, a second sub-pixel, and a third sub-pixel. The source drive circuit DIC may then include three voltage adjustment modules: a first voltage adjustment module 10 to a third voltage adjustment module 30. Thus, the same voltage adjustment module 100 is reused by the switching modules controlling the same seed pixel in different switching circuits MUX, minimizing the space occupied by the source drive circuit DIC.

[0052] like Figure 3 As shown, in an exemplary embodiment, the source drive circuit DIC may further include multiple signal transmission lines T-lines, each signal transmission line T-line connecting to a switching module, and each switching module connected to the same seed pixel connecting to the same voltage regulation module 100 via a corresponding signal transmission line T-line. For example, with Figure 3 For example, multiple switch modules may include first switch module MUX1 to sixth switch module MUX6. First switch module MUX1 and fourth switch module MUX4 are both connected to the first sub-pixel. Therefore, first switch module MUX1 and fourth switch module MUX4 are both connected to the third voltage regulation module 300 through their respective signal transmission lines (T-lines). Similarly, second switch module MUX2 and fifth switch module MUX5 are both connected to the second voltage regulation module 20, and third switch module MUX3 and sixth switch module MUX6 are both connected to the first voltage regulation module 10.

[0053] like Figure 3 As shown, in an exemplary embodiment, the source drive circuit DIC may further include a voltage output module 200 and a digital module 300. The output terminal of the voltage output module 200 is connected to each voltage regulation module 100, and the voltage output module 200 can be used to output a reference voltage signal. The digital module 300 is connected to the voltage regulation module 100 and the switching module respectively, and the digital module 300 can be used to output a switching control signal to the corresponding switching module according to a preset timing sequence. Specifically, the voltage output module 200 outputs a reference voltage signal, and then the voltage regulation module 100 adjusts the reference voltage signal into a switching control signal of corresponding amplitude for output. For example, the voltage regulation module 100 may include a low-dropout linear regulator (LDO), and the circuit structure of the LDO can be as follows... Figure 4As shown, it consists of a series regulating transistor VT, sampling resistors R1 and R2, and a comparator amplifier A. The specific principle of the low-dropout linear regulator (LDO) can be found in existing technology and will not be elaborated here. The input terminal of the LDO is connected to the voltage output module 200, and the output terminal is connected to the digital module 300. It can adjust the reference voltage signal into a switching control signal of corresponding amplitude for output. For example, if the reference voltage signal is 7V and the amplitude of the switching control signal corresponding to the first sub-pixel is 5V, the LDO can step down the 7V reference voltage signal to a 5V signal for output, so that the voltage regulation module 100 can output a switching control signal of corresponding amplitude. Based on this, the signal transmission line T-line can include a first component TL1 and a second component TL2. The first component TL1 is connected between the digital module 300 and the switching module, and the second component TL2 is connected between the voltage regulation module 100 and the digital module 300. Of course, in other embodiments, the voltage regulation module 100 can also be implemented by other buck-boost circuits. This disclosure does not impose any special limitations on the specific circuit structure of the voltage regulation module 100.

[0054] Furthermore, in the exemplary embodiment, the signal transmission lines T-lines corresponding to different categories of sub-pixels can have different arrangement orders. Taking, for example, a first signal transmission line T-line1 connecting to a switch module corresponding to a first sub-pixel R, a second signal transmission line T-line2 connecting to a switch module corresponding to a second sub-pixel G, and a third signal transmission line T-line3 connecting to a switch module corresponding to a third sub-pixel B, in the column direction, each signal transmission line, arranged from farthest to closest to the switch module, can be T-line1 T-line1 T-line2 T-line2 T-line3 T-line3, or T-line3 T-line3 T-line2 T-line2 T-line1 T-line1, or T-line2 T-line2 T-line1 T-line1 T-line3 T-line3. Further, in this exemplary embodiment, the arrangement order of each signal transmission line can be adjusted according to the signal amplitude of the switch control signal transmitted by the signal transmission line. For example, since the signal amplitude on the second signal transmission line T-line2 is greater than the signal amplitude on the first signal transmission line T-line1, which is greater than the signal amplitude on the third signal transmission line T-line3, the signal transmission lines in the column direction can be arranged in order of distance from the switch module from farthest to closest as follows: T-line2 T-line2 T-line1 T-line1 T-line3 T-line3. This reduces the transmission distance of the signal transmission line with the smaller signal amplitude, ensuring that the switch control signal can still match the turn-on voltage required by the corresponding switch module after voltage drop loss on the line. This avoids the problem of mismatch between the switch control signal and the turn-on voltage required by the corresponding switch module due to line loss.

[0055] As is known, display panels typically also include a gate driving circuit (not shown in the figure). The gate driving circuit is used to perform row scanning on the display panel; that is, the gate driving circuit can output a gate control signal to control the transistors in the same row pixel circuit to conduct row scanning. In an exemplary embodiment, the gate driving circuit and the voltage adjustment module can reuse the same voltage output module 200. That is, the source driving circuit DIC of this disclosure does not need to add an additional voltage output module 200. By reusing the same voltage output module 200 with the gate driving circuit, the circuit structure can be simplified and space can be saved.

[0056] like Figure 1As shown in the exemplary embodiment, the non-display area NA of the display panel may include a transition area (i.e., the neck position in the figure) and a bonding area (i.e., the Pad area in the figure). The transition area connects the display area AA and the bonding area. The width of the transition area in the first direction X is smaller than the width of the bonding area in the first direction X. Furthermore, the width of the transition area in the first direction X gradually decreases in the direction from the bonding area to the display area. The first direction X intersects the overall extension direction from the display area AA to the bonding area. The source drive circuit DIC is located in the bonding area, and the switching circuit MUX is located in the transition area. The width of the transition area is smaller than the width of the bonding area; for example, the width of the transition area may gradually decrease from the bonding area towards the display area AA. In this exemplary embodiment, the switching circuit MUX is located in the transition area. One switching circuit MUX can connect one source data line Data to multiple data lines Data, thus reducing the space occupied by the source data line Data and saving space in the transition area. The overall extension direction from the display area AA to the binding area can be the second direction Y, and the first direction X intersects with the second direction Y. For example, the first direction X can correspond to the pixel row direction of the display area AA, and the second direction Y can correspond to the pixel column direction of the display area AA.

[0057] Figure 5 This is a schematic diagram of the structure of a switching circuit and other devices according to one embodiment of the present disclosure. Figure 6 for Figure 5 A cross-sectional view along the direction of the dashed line AA, as shown below. Figure 5 , Figure 6 As shown, in an exemplary embodiment, the display panel may include a substrate BP and an active layer ACT, a first conductive layer Gate1, a second conductive layer Gate2 and a third conductive layer SD1 sequentially stacked on one side of the substrate BP. An insulating layer may be present between two adjacent conductive layers. This will not be elaborated on here. The circuit structure for forming the switching circuit MUX will be further described below.

[0058] In an exemplary embodiment, the active layer ACT may include a plurality of first active portions ACT1, the plurality of first active portions ACT1 being spaced apart on the orthographic projection of the substrate BP in the first direction X. Each first active portion ACT1 may include a first sub-active portion ACT1-1, a second sub-active portion ACT1-2, and a third sub-active portion ACT1-3 connected sequentially in the first direction X. The first sub-active portions ACT1-1 and the third sub-active portions ACT1-3 are used to form the channel region of the switching module. The first conductive layer Gate1 may include a plurality of first conductive portions G1, each first conductive portion G1 corresponding to a first active portion ACT1. Each first conductive portion G1 may include a first active portion ACT1 connected sequentially in the first direction X. A first sub-conductive part G1-1, a second sub-conductive part G1-2, and a third sub-conductive part G1-3 are provided. The orthographic projection of the first sub-conductive part G1-1 onto the substrate BP covers the orthographic projection of the first sub-active part ACT1-1 onto the substrate BP. The orthographic projection of the third sub-conductive part G1-3 onto the substrate BP covers the orthographic projection of the third sub-active part ACT1-3 onto the substrate BP. The first sub-conductive part G1-1 and the third sub-conductive part G1-3 are used to form the control terminal of the switching module. The second sub-conductive part G1-2 is connected between the first sub-conductive part G1-1 and the third sub-conductive part G1-3 on the side away from the display area AA. Specifically, the first sub-conductive part G1-1 forms one control terminal of the switching module, and the third sub-conductive part G1-3 forms the other control terminal of the switching module, making the switching module a dual-gate structure. By setting the switching module to a dual-gate structure, the stability of the control terminal voltage of the switching module can be improved, the leakage current of the switching module can be reduced, and the source voltage crosstalk between RGB sub-pixels can be reduced. The second sub-conductive part G1-2 connects the first sub-conductive part G1-1 and the third sub-conductive part G1-3, thereby electrically connecting the two control terminals of the switching module. The second sub-conductive part G1-2 connects the first sub-conductive part G1-1 and the third sub-conductive part G1-3 on the side away from the display area AA, so that the first sub-conductive part G1-1 and the third sub-conductive part G1-3 form a parallel structure, making the dual-control terminal structure of the switching module equivalent to forming two switches, enhancing the ability to suppress leakage current.

[0059] like Figure 5 As shown, in an exemplary embodiment, the orthographic projection of the second sub-conductive portion G1-2 onto the substrate BP is separate from the orthographic projection of the second sub-active portion ACT1-2 onto the substrate BP. That is, the orthographic projection of the second sub-conductive portion G1-2 onto the substrate BP does not overlap with the orthographic projection of the second sub-active portion ACT1-2 onto the substrate BP. Thus, the second sub-conductive portion G1-2 will not affect the current flowing through the switching module, thereby not affecting the performance of the switching module.

[0060] In an exemplary embodiment, the active layer ACT includes multiple repeating units Q, the number of which is the same as the number of switching circuits MUX. Each repeating unit Q includes f active structures ACT0, and each active structure ACT0 includes two first active portions ACT1. The switching circuit MUX includes k switching modules; when k is odd, f = (k+1) / 2; when k is even, f = k / 2. Specifically, because the active structure ACT0 in one repeating unit Q is used to form the channel region of each switching module in one switching circuit MUX, the number of repeating units Q is the same as the number of switching circuits MUX. Each active structure ACT0 includes two first active portions ACT1, meaning the channel regions of two switching modules are connected together through the active layer structure. Thus, two adjacent switching modules can reuse the same conductive structure to connect the source data line Data. Thus, by multiplexing the same conductive structure in pairs of switching modules to connect the source data line Data, when the switching circuit MUX includes k switching modules, f = (k+1) / 2 when k is odd and f = k / 2 when k is even. For example, if a switching circuit MUX includes six switching modules, then a repeating unit Q can include three active structures ACT0. Alternatively, if a switching circuit MUX includes nine switching modules, then a repeating unit Q can include five active structures ACT0.

[0061] Furthermore, it should be understood that in this exemplary embodiment, an active structure ACT0 includes two first active portions ACT1, meaning the channel regions of two switching modules are connected together through an active layer structure. Compared to one active structure corresponding to one first active portion, forming one channel region of a switching module, this simplifies the process steps. Moreover, when one active structure forms one channel region of a switching module, the increased number of active structures means increased gaps. Therefore, this exemplary embodiment can save space and further reduce the space occupied by the switching circuit. Furthermore, because the active layer structures of the two channel regions are connected together, this exemplary embodiment can increase the gap between adjacent active structures, thereby improving heat dissipation.

[0062] In an exemplary embodiment, the active structure ACT0 may further include a second active part ACT2 and two third active parts ACT3. The second active part ACT2 is connected between two adjacent first active parts ACT1, and can be used to form the first ends of two adjacent switch modules. The two third active parts ACT3 are connected to the side of the first active part ACT1 away from the other first active part ACT1, and can be used to form the second ends of two adjacent switch modules. That is, the second active part ACT2 is located in the middle of the active structure ACT0, and serves as the first ends of two switch modules respectively. The third active parts ACT3 are located on both sides of the active structure ACT0, and serve as the second ends of two switch modules respectively. By connecting the second active part ACT2 to the source signal line, the first ends of two adjacent switch modules can be connected to the source signal line. By connecting the third active part ACT3 to the signal transmission line T-line, the second ends of two adjacent switch modules can be connected to the corresponding signal transmission line T-line respectively.

[0063] In an exemplary embodiment, the second conductive layer Gate2 may include multiple source lines. The source lines are projected onto the substrate BP along the second direction Y and are spaced apart in the first direction X. One source line corresponds to a repeating unit Q of an active layer ACT, that is, one source line connects to each switching module in a switching circuit MUX.

[0064] In an exemplary embodiment, the third conductive layer SD1 may include multiple first adapter lines S1, multiple signal transmission lines T-line, and multiple second adapter lines, wherein:

[0065] The first adapter cable S1 may include a first connecting part S1-1 and a plurality of second connecting parts S1-2. The first connecting part S1-1 extends along the first direction X in the orthographic projection of the substrate BP. The plurality of second connecting parts S1-2 correspond one-to-one with the plurality of second active parts ACT2 and are respectively connected to the first connecting part S1-1. The second connecting part S1-2 extends along the second direction Y in the orthographic projection of the substrate BP. The second connecting part S1-2 is also connected to the corresponding second active part ACT2 through a via, thereby connecting the first end of the two switching modules. Then, the first end of the two switching modules is connected to the source signal line through the first connecting part S1-1.

[0066] As described above, the signal transmission line T-line may include a first component TL1 and a second component TL2. The first component TL1 is connected between the digital module and the switching module, and the second component TL2 is connected between the voltage regulation module and the digital module. The first component TL1 may include a first transmission part TL1-1 and a second transmission part TL1-2. The first transmission part TL1-1 extends along the first direction X in the orthogonal projection of the substrate BP, and is connected to the corresponding first sub-conductive part G1-1 through a via. The second transmission part TL1-2 is connected to the first transmission part TL1-1 and to the corresponding voltage regulation module 100. The second transmission part TL1-2 extends along the second direction Y in the orthogonal projection of the substrate BP. That is, the signal transmission line T-line is connected to the control terminal of the corresponding switching module through the first transmission part TL1-1, and then connected to the voltage regulation module 100 through the second transmission part TL1-2, thereby connecting the control terminal of the switching module to the corresponding voltage regulation module 100. It should be understood that, since the source drive circuit DIC also includes a digital module 300, the second transmission section TL1-2 of the signal transmission line T-line is first connected to the digital module 300 and then connected to the voltage regulation module 100.

[0067] Multiple second adapter lines S2 are provided one-to-one with the third active part ACT3 and extend along the second direction Y in the orthographic projection of the substrate BP and are spaced apart in the first direction X. The second adapter lines S2 are connected to the corresponding third active part ACT3 through vias and are also connected to the corresponding data line Data. The second adapter lines S2 are connected to the first end of the switch module through the third active part ACT3 via vias, and are also connected to the data line Data, thereby connecting the first end of the switch module to the data line Data of the display area AA. In addition, the second component TL2 may be located on the same conductive layer or a different conductive layer as the first component TL1, and this disclosure does not make any special limitation in this regard.

[0068] As shown above, the first end of the switch module is connected to the data line Data of the display area AA through the second adapter cable S2, the second end of the switch module is connected to the source signal line through the first adapter cable S1, and the control end of the switch module is connected to the voltage regulation module 100 through the signal transmission line T-line.

[0069] This disclosure also provides a method for manufacturing a display panel, used to manufacture the display panel described in the above embodiments of this disclosure. The manufacturing method may include the following steps:

[0070] S110, such as Figure 7As shown, a substrate BP is provided, the substrate BP having a display area AA located at least on one side of a non-display area NA, the display area AA including a plurality of pixel units arranged in an array along a row and column direction, the pixel units including a plurality of sub-pixels with different maximum gray level voltages.

[0071] The substrate BP can be a flexible plastic. For example, the substrate BP can be polyethersulfone (PES), polyallyl ester, polyimide (PI), etc.

[0072] S120. An active layer ACT is formed on one side of the substrate BP using a deposition process. The active layer ACT includes a plurality of first active portions ACT1. The plurality of first active portions ACT1 are distributed at intervals in the first direction X when projected onto the substrate BP. Each first active portion ACT1 includes a first sub-active portion ACT1-1, a second sub-active portion ACT1-2, and a third sub-active portion ACT1-3 connected sequentially in the first direction X. The first sub-active portion ACT1-1 and the third sub-active portion ACT1-3 are used to form the channel region of the switching module.

[0073] In an exemplary embodiment, such as Figure 8 As shown, before forming the active layer ACT, a buffer layer can also be formed on the substrate BP. The buffer layer can completely cover the substrate BP, thereby forming a flat surface. Therefore, the buffer layer can include materials capable of forming a flat surface.

[0074] Then, as Figure 8 As shown, a semiconductor material is deposited on a buffer layer using a deposition process to form an active layer ACT. The semiconductor material can be LTPS or LTPO, etc., and this disclosure does not specifically limit it. Then, a patterning process is used to pattern the active layer ACT to form the above-mentioned active layer ACT structure.

[0075] In an exemplary embodiment, multiple spaced active structures ACT0 can be formed in the active layer ACT using a patterning process. An active structure ACT0 can include two first active parts ACT1, that is, the channel regions of two switching modules are connected together through the active layer ACT structure. In this way, two adjacent switching modules can reuse the same conductive structure to connect the source data line Data.

[0076] In an exemplary embodiment, the formed active structure ACT0 may further include a second active part ACT2 and two third active parts ACT3. The second active part ACT2 is connected between two adjacent first active parts ACT1, and can be used to form the first ends of two adjacent switch modules. The two third active parts ACT3 are connected to the side of the first active part ACT1 away from the other first active part ACT1, and can be used to form the second ends of two adjacent switch modules. That is, the second active part ACT2 is located in the middle of the active structure ACT0, and serves as the first ends of two switch modules respectively. The third active parts ACT3 are located on both sides of the active structure ACT0, and serve as the second ends of two switch modules respectively. By connecting the second active part ACT2 to the source signal line, the first ends of two adjacent switch modules can be connected to the source signal line. By connecting the third active part ACT3 to the signal transmission line T-line, the second ends of two adjacent switch modules can be connected to the corresponding signal transmission line T-line respectively.

[0077] In an exemplary embodiment, the thickness of the first semiconductor layer can be 10 to 100 nm, for example, 10 nm, 30 nm, 50 nm, 70 nm, 80 nm, 100 nm, etc.

[0078] S130. A first conductive layer Gate1 is formed on the side of the active layer ACT away from the substrate BP using a deposition process. The first conductive layer Gate1 includes a plurality of first conductive portions G1, which are disposed one-to-one with the first active portions ACT1. Each first conductive portion G1 includes a first sub-conductive portion G1-1, a third sub-conductive portion G1-3, and a second sub-conductive portion G1-2 connected in sequence. The orthographic projection of the first sub-conductive portion G1-1 on the substrate BP covers the orthographic projection of the first sub-active portion ACT1-1 on the substrate BP. The orthographic projection of the second sub-active portion ACT1-2 on the substrate BP covers the orthographic projection of the second sub-active portion ACT1-2 on the substrate BP. The first sub-conductive portion G1-1 and the second sub-conductive portion G1-2 are used to form the control terminal of the switching module. The third conductive portion is connected between the first conductive portion G1 and the second conductive portion G2 on the side of the first conductive portion G1 and the second conductive portion G2 away from the display area AA.

[0079] In an exemplary embodiment, such as Figure 9As shown, before forming the first conductive layer Gate1, a first gate insulating layer GI1 can be formed on the side of the buffer layer away from the substrate BP using a deposition process. For example, a full-layer first gate insulating layer GI1 can be formed on the side of the active layer ACT away from the substrate BP using a magnetron sputtering process, and the first gate insulating layer GI1 covers the active layer ACT. The material of the first gate insulating layer GI1 can be, for example, SiOx, and the thickness of the first gate insulating layer GI1 can be, for example, 50–150 nm, such as 50 nm, 70 nm, 90 nm, 100 nm, 110 nm, 120 nm, 140 nm, 150 nm, etc.

[0080] Then, as Figure 10 As shown, a first conductive layer, Gate1, can be formed by depositing a metal material using the Sputter process. The material of the first conductive layer, Gate1, can be, for example, Mo. Then, the first conductive layer, Gate1, can be patterned using a patterning process to form a switch module corresponding to the above-mentioned dual-gate structure. By setting the switch module to a dual-gate structure, the stability of the control terminal voltage of the switch module can be improved, the leakage current of the switch module can be reduced, and the source voltage crosstalk between RGB sub-pixels can be reduced.

[0081] In an exemplary embodiment, the thickness of the first conductive layer Gate1 can be, for example, 200-300 nm, such as 200 nm, 230 nm, 250 nm, 270 nm, 290 nm, 300 nm, etc.

[0082] In an exemplary embodiment, such as Figure 11 As shown, a second gate insulating layer GI2 can be deposited using plasma-enhanced chemical vapor deposition (PECVD). The second gate insulating layer GI2 covers the first conductive layer Gate1 on the side of the first conductive layer Gate1 away from the substrate BP. The material of the second gate insulating layer GI2 can be, for example, SiNx, and its thickness can be, for example, 50-150 nm, such as 50 nm, 70 nm, 90 nm, 110 nm, 130 nm, 140 nm, 150 nm, etc.

[0083] In an exemplary embodiment, such as Figure 12 As shown, after forming the second gate insulating layer GI2, a metal material can be deposited using the Sputter process to form the second conductive layer Gate2. The material of the second conductive layer Gate2 can be, for example, Mo, etc., and then the second conductive layer Gate2 can be patterned using a patterning process.

[0084] In an exemplary embodiment, such as Figure 13As shown, after forming the second conductive layer Gate2, an interlayer insulating layer (ILD) can be formed on the side of the second conductive layer Gate2 away from the substrate BP using a PECVD process. The material of the interlayer insulating layer ILD can include, for example, SiNx, SiOx, etc., and a CNT drilling process is performed to form multiple vias H to expose the first sub-conductive portion G1-1 in the first conductive layer Gate1 and the second active portion ACT2 and the third active portion ACT3 in the active layer ACT, which are correspondingly connected to the source signal line and signal transmission line T-line of the third conductive layer SD1. The thickness of the interlayer insulating layer ILD can be 150-350 nm, for example, 150 nm, 200 nm, 250 nm, 300 nm, etc.

[0085] In an exemplary embodiment, such as Figure 14 As shown, after forming the interlayer insulating layer (ILD), a third conductive layer (SD1) can be formed by depositing conductive material using a sputter process. The material of the third conductive layer (SD1) can include metallic materials, such as molybdenum, aluminum, copper, titanium, niobium, or an alloy thereof, or a molybdenum / titanium alloy or a stack, or a titanium / aluminum / titanium stack. The third conductive layer (SD1) is then patterned to obtain multiple first adapter lines (S1), multiple signal transmission lines (T-lines), and multiple second adapter lines as described in the above embodiment. For example, the third conductive layer (SD1) is a titanium / aluminum / titanium stack structure, and the thickness of each layer can be 50 nm, 550 nm, and 30 nm, respectively.

[0086] In an exemplary embodiment, such as Figure 15 As shown, after the third conductive layer SD1 is formed, a planarization layer PLN and a pixel defining layer PDL can be formed on the side of the third conductive layer SD1 away from the substrate BP by spin coating and exposure, development and curing.

[0087] This disclosure also provides a display device, which may include the display panel described in any of the above embodiments of this disclosure. The display device may be, for example, a flexible wearable device, such as a watch.

[0088] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the generality of this disclosure and include, but are not disclosed herein, common knowledge or customary techniques in the art. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the claims.

Claims

1. A display panel, characterized in that, include: Multiple switching circuits, the switching circuits including: Multiple switch modules, wherein the control terminal of the switch module is used to receive switch control signals, the first terminal is used to receive data signals, and the second terminal is connected to the data line of the display area; Source drive circuit, the source drive circuit includes: A data signal output module is used to output a data signal through a source signal line connected thereto, and one source signal line is connected to each of the switch modules in the switch circuit. Multiple voltage regulation modules are provided, wherein the voltage regulation modules are used to output the switch control signal, the number of voltage regulation modules is less than or equal to the number of switch modules in the switch circuit, and at least some of the voltage regulation modules output switch control signals with different signal amplitudes. Substrate; An active layer, located on one side of the substrate, the active layer comprising: Multiple first active portions are spaced apart on the orthographic projection of the substrate in a first direction. Each first active portion includes a first sub-active portion, a second sub-active portion, and a third sub-active portion connected sequentially in the first direction. The first sub-active portion and the third sub-active portion are used to form the channel region of the switching module. A first conductive layer is located on the side of the active layer opposite to the substrate, and the first conductive layer includes: Multiple first conductive portions are provided, each corresponding to a first active portion. Each first conductive portion includes a first sub-conductive portion, a second sub-conductive portion, and a third sub-conductive portion connected in sequence. The orthographic projection of the first sub-conductive portion on the substrate covers the orthographic projection of the first sub-active portion on the substrate. The orthographic projection of the third sub-conductive portion on the substrate covers the orthographic projection of the third sub-active portion on the substrate. The first and third sub-conductive portions are used to form the control terminal of the switching module. The second sub-conductive portion is connected between the first and third sub-conductive portions on the side of the first and third sub-conductive portions away from the display area.

2. The display panel according to claim 1, characterized in that, The system includes a display area and a non-display area disposed at least on one side of the display area. The display area includes a plurality of pixel units arranged in an array along a row and column direction. The pixel units include a variety of sub-pixels with different maximum grayscale voltages. The switching circuit and the source driving circuit are both located in the non-display area. The amplitude of the switch control signal is proportional to the maximum gray level voltage of the corresponding sub-pixel.

3. The display panel according to claim 2, characterized in that, Switching modules that connect the same seed pixel and source signal line reuse the same voltage regulation module.

4. The display panel according to claim 3, characterized in that, The number of voltage regulation modules is the same as the number of sub-pixels in the pixel unit.

5. The display panel according to claim 3, characterized in that, The pixel unit includes a first sub-pixel R, a second sub-pixel G, and a third sub-pixel B, wherein the maximum gray level voltage of the second sub-pixel is greater than the maximum gray level voltage of the first sub-pixel and the maximum gray level voltage of the third sub-pixel. The source drive circuit includes a first voltage regulation module for outputting a first switch control signal, a second voltage regulation module for outputting a second switch control signal, and a third voltage regulation module for outputting a third switch control signal, wherein the signal amplitude of the second switch control signal is greater than the signal amplitude of the first switch control signal, and the signal amplitude of the third switch control signal is greater than the signal amplitude of the third switch control signal.

6. The display panel according to claim 3, characterized in that, The pixel unit includes m sub-pixels, and the switching circuit includes n switching modules, where n and m are both natural numbers, and n is an integer multiple of m; The source drive circuit also includes multiple signal transmission lines, one of which connects to one of the switch modules, and each switch module connected to the same seed pixel is connected to the same voltage regulation module through the corresponding signal transmission line.

7. The display panel according to claim 6, characterized in that, The source drive circuit further includes: A voltage output module, the output terminal of which is connected to each of the voltage regulation modules, is used to output a reference voltage signal; A digital module is connected to the voltage regulation module and the switch module respectively. The digital module is used to output the switch control signal to the corresponding switch module according to a preset timing sequence. The voltage regulation module is also used to adjust the reference voltage signal into a switching control signal with a corresponding amplitude. The signal transmission line includes a first component and a second component. The first component is connected between the digital module and the switch module, and the second component is connected between the voltage regulation module and the digital module.

8. The display panel according to claim 7, characterized in that, The display panel further includes a gate driving circuit, which is used to perform line scanning on the display panel; The gate drive circuit and the voltage regulation module share the same voltage output module.

9. The display panel according to claim 1, characterized in that, The voltage regulation module includes a low-dropout linear regulator.

10. The display panel according to claim 1, characterized in that, The switching circuit is a multiplexer, and the switching module is a transistor.

11. The display panel according to claim 2, characterized in that, The non-display area includes a transition area and a bonding area. The transition area connects the display area and the bonding area. The source drive circuit is located in the bonding area, and the switching circuit is located in the transition area. The width of the transition area in the first direction is smaller than the width of the binding area in the first direction, and the first direction intersects the overall extension direction from the display area to the binding area.

12. The display panel according to claim 11, characterized in that, The width of the transition area in the first direction gradually decreases in the direction from the binding area to the display area.

13. The display panel according to claim 1, characterized in that, The orthographic projection of the second sub-conductive part onto the substrate is separate from the orthographic projection of the second sub-active part onto the substrate.

14. The display panel according to claim 1, characterized in that, The active layer includes multiple repeating units, the number of which is the same as the number of switching circuits. Each repeating unit includes f active structures, and each active structure includes two first active parts. The switching circuit includes k switching modules. When k is odd, f = (k+1) / 2; when k is even, f = k / 2.

15. The display panel according to claim 14, characterized in that, The active structure also includes: The second active part is connected between two adjacent first active parts, and the second active part is used to form the first end of two adjacent switch modules; Two third active units are connected to the side of the first active unit away from the other first active unit, and the third active units are used to form the second ends of two adjacent switching modules; The display panel also includes: A second conductive layer is located on the side of the first conductive layer opposite to the substrate, and the second conductive layer includes: The plurality of source signal lines extend along the second direction and are spaced apart in the first direction, as shown by the orthogonal projection of the substrate. A third conductive layer is located on the side of the second conductive layer opposite to the substrate, and the third conductive layer includes: Multiple first adapter cables, each corresponding to one of the source signal lines, include: The first connecting portion extends along the first direction in the orthographic projection of the substrate. A plurality of second connecting portions correspond one-to-one with a plurality of second active portions and are respectively connected to the first connecting portion. The second connecting portions extend along the second direction in the orthographic projection of the substrate. The second connecting portions are also connected to the corresponding second active portions through vias. Multiple signal transmission lines, the signal transmission lines including: A first transmission section extends along the first direction in the orthographic projection of the substrate, and the first transmission section is connected to the corresponding first sub-conductive section through a via. The second transmission unit is connected to the first transmission unit and to the corresponding voltage regulation module, and the second transmission unit extends along the second direction in the orthographic projection of the substrate. Multiple second adapter lines are provided corresponding to the third active part and extend along the second direction in the orthographic projection of the substrate and are spaced apart in the first direction. The second adapter lines are connected to the corresponding third active part through vias and are also connected to the corresponding data line.

16. A method for manufacturing a display panel, characterized in that, The method for preparing the display panel according to claim 1 includes: A substrate is provided having a display area and a non-display area located at least on one side of the display area, the display area including a plurality of pixel units arranged in an array along a row and column direction, the pixel units including a plurality of sub-pixels with different maximum gray level voltages; An active layer is formed on one side of a substrate using a deposition process. The active layer includes a plurality of first active portions. The plurality of first active portions are distributed at intervals in the first direction when projected onto the substrate. Each first active portion includes a first sub-active portion, a second sub-active portion, and a third sub-active portion connected sequentially in the first direction. The first sub-active portion and the third sub-active portion are used to form the channel region of the switching module. A first conductive layer is formed on the side of the active layer away from the substrate using a deposition process. The first conductive layer includes a plurality of first conductive portions, each corresponding to a first active portion. Each first conductive portion includes a first sub-conductive portion, a second sub-conductive portion, and a third sub-conductive portion connected in sequence. The orthographic projection of the first sub-conductive portion onto the substrate covers the orthographic projection of the first sub-active portion onto the substrate, and the orthographic projection of the third sub-conductive portion onto the substrate covers the orthographic projection of the third sub-active portion onto the substrate. The first and third sub-conductive portions are used to form the control terminal of the switching module. The second sub-conductive portion is connected between the first and third sub-conductive portions on the side of the first and third sub-conductive portions away from the display area.

17. A display device, characterized in that, Includes the display panel as described in any one of claims 1-15.

Images