Semiconductor device and method for forming the same

Abstract

The present application discloses a semiconductor device and a method for forming the same. The method comprises: providing a substrate, wherein the substrate surface includes an inwardly recessed contact hole, a connecting circuit is formed within the contact hole, a gap is formed between the connecting circuit and the sidewalls of the contact hole, and the connecting circuit comprises metal / metal nitride / doped polysilicon; performing at least one oxidation process on the contact hole to convert the silicon on the surface of the contact hole and the silicon on the sidewalls of the connecting circuit into silicon oxide; and forming an isolation layer that conformally covers the connecting circuit, the contact hole, and the substrate surface. The present application can reduce the impact of residual silicide on the performance of the corresponding semiconductor device, optimize the performance of the resulting semiconductor device, and improve the stability of the resulting semiconductor device.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for forming the same. Background Art

[0002] Semiconductor structures such as memories and / or transistors usually use contact plugs to connect upper and lower functional areas or active areas to achieve interconnection between related functional areas, such as Figure 1a and 1b As shown, the contact plug 103 can interconnect the upper bit line 104 and the lower active area 1021. The above-mentioned contact plug is often set in the contact hole. When studying the semiconductor device including the above-mentioned structure, the inventor found that such semiconductor device has the problem of unstable performance. Summary of the Invention

[0003] In view of this, the present application provides a semiconductor device and a method for forming the same to solve the problem of unstable performance of the corresponding semiconductor device.

[0004] The present application provides a method for forming a semiconductor device, comprising:

[0005] Providing a substrate, wherein a surface of the substrate includes an inwardly recessed contact hole, a connection circuit is formed in the contact hole, a gap is formed between the connection circuit and a sidewall of the contact hole, and the connection circuit includes metal / metal nitride / doped polysilicon;

[0006] performing at least one oxidation process on the contact hole to form silicon oxide on the silicon on the surface of the contact hole and the silicon on the sidewall of the connection circuit;

[0007] An isolation layer is formed to conformally cover the connection circuit, the contact hole, and the substrate surface.

[0008] Optionally, the contact hole is subjected to at least one oxidation treatment, comprising: after the contact hole is subjected to the first oxidation reaction, a second oxidation is performed on the surface of the contact hole and the silicon on the side wall of the connecting circuit, so that the silicon on the surface of the contact hole and the silicon on the side wall of the connecting circuit are completely converted into silicon oxide.

[0009] Optionally, before performing a second oxidation on the surface of the contact hole and the silicon on the sidewall of the connection circuit, the forming method further comprises: removing the silicon oxide.

[0010] Optionally, the removing of the silicon oxide includes: removing the silicon oxide so that the bottom surface of the sidewall of the contact hole is lower than the bottom of the connecting circuit.

[0011] Optionally, the bottom of the contact hole has a first silicon oxide layer, the sidewall of the connection circuit has a second silicon oxide layer, and the thickness of the first silicon oxide layer is greater than the thickness of the second silicon oxide layer.

[0012] Optionally, the doped polysilicon includes SiP.

[0013] Optionally, the connection circuit includes a contact plug located on a surface of the contact hole and a bit line structure located on a surface of the contact plug.

[0014] Optionally, a plurality of isolation structures spaced apart from each other and a plurality of active areas isolated by the isolation structures are formed in the substrate; the sidewalls of the contact holes expose the isolation structures, and at least a portion of the bottom exposes the active areas.

[0015] The present application also provides a semiconductor device, comprising:

[0016] a substrate, wherein a surface of the substrate includes an inwardly recessed contact hole, a connecting circuit is formed in the contact hole, a gap is formed between the connecting circuit and a sidewall of the contact hole, a first silicon oxide layer is formed at a bottom of the contact hole, a second silicon oxide layer is formed on a sidewall of the connecting circuit, and a thickness of the first silicon oxide layer is greater than a thickness of the second silicon oxide layer;

[0017] An isolation layer conformally covers the connection circuit, the contact hole and the substrate surface.

[0018] Optionally, the connection circuit includes metal / metal nitride / doped polysilicon.

[0019] The above-mentioned semiconductor device and its formation method, by performing at least one oxidation treatment on the contact hole, so that the silicon element on the surface of the contact hole and the silicide on the side wall of the connection circuit form corresponding silicon oxide, can reduce the impact of the residual silicide on the performance of the corresponding semiconductor device, optimize the performance of the obtained semiconductor device, and thus improve the stability of the obtained semiconductor device.

[0020] Furthermore, after the contact hole is oxidized for the first time, the present application can also perform a second oxidation on the surface of the contact hole and the silicon on the side wall of the connecting circuit, so that the silicide on the surface of the contact hole and the silicide on the side wall of the connecting circuit are completely converted into silicon oxide, thereby achieving the purpose of eliminating the silicide on the surface of the contact hole and the side wall of the connecting circuit, and can further improve the performance of the resulting semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1a A top view of the semiconductor device during research;

[0023] Figure 1b for Figure 1a corresponding cross-sectional views;

[0024] Figure 2 This is a flow chart of a method for forming a semiconductor device in one embodiment of the present application;

[0025] Figure 3a and Figure 3b This is a schematic diagram of the structure obtained in each step of an embodiment of the present application;

[0026] Figure 4 Schematic diagram of the structure of a semiconductor device in one embodiment of the present application;

[0027] Figure 5 Schematic diagram of the structure of a semiconductor device in one embodiment of the present application;

[0028] Figure 6 Schematic diagram of the semiconductor device structure in one embodiment of the present application. DETAILED DESCRIPTION

[0029] The inventor has studied semiconductors such as memory. The top view of such semiconductor devices can be referred to Figure 1a As shown, along Figure 1a The cross-section of AA' can be referred to Figure 1b As shown, the semiconductor device includes a semiconductor substrate 101 and a film layer 106 on the surface of the semiconductor substrate 101. An isolation structure 102 is formed within the semiconductor substrate 101, dividing the semiconductor substrate 101 into a plurality of active regions 1021. Word lines WL are also formed within the semiconductor substrate 101, intersecting the active regions 1021. The semiconductor substrate 101 also includes a contact hole 110, partially located within the isolation structure 102, with the sidewalls exposing the isolation structure 102. A contact plug 103 is formed within the contact hole 110, with a bit line 104 formed on the surface of the contact plug 103. The inventors have discovered that due to the materials and / or processes used during the formation process, a certain amount of silicide, such as SiP, is present at corners 110a of the contact hole 110. Subsequent processing based on this condition can easily affect the performance of the resulting semiconductor device.

[0030] In response to the above problems, the present application performs at least one oxidation treatment on the contact hole so that the silicon elements on the surface of the contact hole and the silicon elements on the side wall of the connecting circuit form corresponding silicon oxides, thereby reducing the impact of residual silicide on the performance of the corresponding semiconductor device, optimizing the performance of the resulting semiconductor device, and thus improving the stability of the resulting semiconductor device.

[0031] The following, in conjunction with the accompanying drawings, clearly and completely describes the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of this application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.

[0032] In a first aspect, the present application provides a method for forming a semiconductor device, referring to Figure 2 As shown, the forming method includes S210 to S230.

[0033] S210 provides a substrate 310. The surface of the substrate 310 includes an inwardly recessed contact hole 311. A connection circuit 320 is formed in the contact hole 311. A gap is formed between the connection circuit 320 and the sidewall of the contact hole 311. The connection circuit 320 comprises metal / metal nitride / doped polysilicon. Optionally, the doped polysilicon comprises a semiconductor material doped with corresponding particles, such as SiP (silicon phosphide).

[0034] Specifically, the connection circuit 320 may include at least one of metal, metal nitride, and doped polysilicon, for example, Figure 3a As shown, the connection circuit 320 includes, from bottom to top, a doped semiconductor layer 320 a formed of doped polysilicon, a metal nitride layer 320 b formed of metal nitride, and a metal layer 320 c formed of metal.

[0035] Specifically, the connection circuit 320 includes a contact plug located on the surface of the contact hole 311 and a bit line structure (not shown in the figure) located on the surface of the contact plug.

[0036] Optionally, the substrate 310 may include a semiconductor material. For example, the substrate 310 may be a silicon substrate, a silicon-germanium substrate, or a silicon-on-insulator substrate.

[0037] In one example, if Figure 3aAs shown, the substrate 310 is formed with a plurality of isolation structures 312 spaced apart from each other and a plurality of active regions 313 isolated by each of the isolation structures 312. The sidewalls of the contact holes 311 expose the isolation structures 312, and at least a portion of the bottom exposes the active regions 313. The isolation structures 312 can be formed using a shallow trench isolation process; specifically, the isolation structures 312 can be formed in corresponding trenches, which can be referred to as "isolation trenches." The active regions 313 can form corresponding functional regions within the substrate 310, and the bottom of the connection circuit 320 can contact the portion of the active region 313 exposed by the corresponding contact hole 311 to electrically lead out the corresponding active region 313.

[0038] Alternatively, as Figure 3a As shown, the surface of the substrate 310 may further include a film layer 314 to provide protection, isolation or interconnection functions for related structures inside the substrate 310 .

[0039] S220 , performing at least one oxidation process on the contact hole 311 , so that silicon on the surface of the contact hole 311 and silicon on the sidewall of the connection circuit 320 form silicon oxide.

[0040] Due to the materials and / or processes used in the process of forming structures such as the connecting circuit 320, a certain amount of silicides such as SiP remain on the surface of the contact hole 311 and the sidewalls of the connecting circuit 320. These silicides are likely to affect the performance of the semiconductor device to be formed. In the above step S220, the contact hole 311 is oxidized at least once to form corresponding silicon oxides on the silicon surface of the contact hole 311 and the silicon surface of the sidewalls of the connecting circuit 320, which can reduce the impact of the residual silicide on the performance of the semiconductor device to be formed.

[0041] S230, Ref. Figure 3b As shown, an isolation layer 330 is formed to conformally cover the connection circuit 320 , the contact hole 311 and the surface of the substrate 310 .

[0042] The isolation layer 330 conformally covers the various structures within the contact hole 311 and on the surface of the substrate 310 to provide isolation and protection for the various structures. The isolation layer 330 can be formed using a deposition process. The isolation layer 330 can be made of an isolation material such as SiN (silicon nitride).

[0043] The above-mentioned method for forming a semiconductor device, by performing at least one oxidation treatment on the contact hole 311, so that the silicon element on the surface of the contact hole 311 and the silicide on the side wall of the connection circuit 320 form corresponding silicon oxide, can reduce the impact of the residual silicide on the performance of the corresponding semiconductor device, optimize the performance of the obtained semiconductor device, and thus improve the stability of the obtained semiconductor device.

[0044] In one embodiment, the contact hole 311 is subjected to at least one oxidation treatment, including: after the contact hole 311 is subjected to the first oxidation reaction, the surface of the contact hole 311 and the silicon on the side wall of the connecting circuit 320 are subjected to a second oxidation reaction, so that the silicide on the surface of the contact hole 311 and the silicide on the side wall of the connecting circuit 320 are completely converted into silicon oxide, thereby achieving the purpose of eliminating the silicide on the surface of the contact hole 311 and the side wall of the connecting circuit 320, and further improving the performance of the semiconductor device.

[0045] In one example, before performing a second oxidation on the surface of the contact hole 311 and the silicon on the sidewalls of the connecting circuit 320, the formation method further includes: removing the silicon oxide on the surface of the contact hole 311 and the sidewalls of the connecting circuit 320, so that the oxidation reaction is more complete when performing a second oxidation on the silicide on the surface of the contact hole 311 and the sidewalls of the connecting circuit 320.

[0046] In one example, removing the silicon oxide includes: referring to Figure 4 As shown, the removal of the silicon oxide results in the bottom surface 311 a of the contact hole sidewall being lower than the bottom 320 d of the link circuit.

[0047] In one example, reference Figure 5 and Figure 6 As shown, the bottom of the contact hole 311 has a first silicon oxide layer 341, and the side wall of the connecting circuit 320 has a second silicon oxide layer 342. The thickness of the first silicon oxide layer 341 is greater than the thickness of the second silicon oxide layer 342 to prevent the related structure at the bottom of the contact hole 311 from short-circuiting with the connecting circuit 320.

[0048] The above-described method for forming a semiconductor device, by performing at least one oxidation process on the contact hole 311, converts the silicon element on the surface of the contact hole 311 and the silicide on the sidewalls of the connecting circuit 320 into corresponding silicon oxide. This can reduce the impact of residual silicide on the performance of the corresponding semiconductor device, optimize the performance of the resulting semiconductor device, and thus improve the stability of the resulting semiconductor device. Furthermore, after the first oxidation reaction of the contact hole 311, a second oxidation reaction can be performed on the surface of the contact hole 311 and the silicon on the sidewalls of the connecting circuit 320 to completely convert the silicide on the surface of the contact hole 311 and the silicide on the sidewalls of the connecting circuit 320 into silicon oxide, thereby eliminating the silicide on the surface of the contact hole 311 and the sidewalls of the connecting circuit 320, and further improving the performance of the resulting semiconductor device.

[0049] In a second aspect, the present application provides a semiconductor device, such as Figure 6 As shown, the semiconductor device includes:

[0050] A substrate 310 includes an inwardly recessed contact hole 311 on its surface. A connection circuit 320 is formed in the contact hole 311. A gap is formed between the connection circuit 320 and the sidewalls of the contact hole 311. A first silicon oxide layer 341 is formed at the bottom of the contact hole 311. A second silicon oxide layer 342 is formed on the sidewalls of the connection circuit 320. The first silicon oxide layer 341 is thicker than the second silicon oxide layer 342.

[0051] The isolation layer 314 conformally covers the connection circuit 320 , the contact hole 311 and the surface of the substrate 310 .

[0052] Optionally, the connection circuit includes metal / metal nitride / doped polysilicon.

[0053] The above-mentioned semiconductor device can be formed by the method for forming a semiconductor device described in any of the above-mentioned embodiments, and has all the beneficial effects of the method for forming a semiconductor device described in any of the above-mentioned embodiments, which will not be described in detail here.

[0054] Although the present application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on reading and understanding this specification and the accompanying drawings. The present application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the above-mentioned components, the terms used to describe such components are intended to correspond to any component (unless otherwise indicated) that performs the specified function of the component (e.g., it is functionally equivalent), even if the structure is not necessarily equivalent to the disclosed structure that performs the function in the exemplary implementation of this specification shown herein.

[0055] That is, the above description is merely an embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structural or equivalent process transformations made using the contents of the description and drawings of this application, such as the mutual combination of technical features between the various embodiments, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.

[0056] In addition, in the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, for structural elements with the same or similar characteristics, the present application may use the same or different reference numerals to identify them. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0057] In this application, the word "exemplary" is used to mean "serving as an example, illustration or description". Any embodiment described in this application as "exemplary" is not necessarily to be construed as being more preferred or more advantageous than other embodiments. The above description is provided to enable any person skilled in the art to implement and use the present application. In the above description, various details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be elaborated in detail to avoid obscuring the description of the present application with unnecessary details. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest scope consistent with the principles and features disclosed in this application.

Claims

1. A method for forming a semiconductor device, characterized in that: The forming method comprises: Providing a substrate, wherein the surface of the substrate includes an inwardly recessed contact hole, a connection circuit is formed in the contact hole, a gap is formed between the connection circuit and the sidewall of the contact hole, and the connection circuit includes metal, metal nitride and doped polysilicon; performing at least one oxidation process on the contact hole to form silicon oxide on the doped polysilicon on the surface of the contact hole and the doped polysilicon on the sidewall of the connection circuit; forming an isolation layer conformally covering the connection circuit, the contact hole, and the substrate surface; The at least one oxidation treatment of the contact hole comprises: after the first oxidation reaction of the contact hole, a second oxidation of the surface of the contact hole and the doped polysilicon on the sidewall of the connection circuit is performed, so that the doped polysilicon on the surface of the contact hole and the doped polysilicon on the sidewall of the connection circuit are completely converted into silicon oxide; Before performing a second oxidation on the surface of the contact hole and the doped polysilicon on the sidewall of the connection circuit, the forming method further comprises: removing the silicon oxide.

2. The method for forming a semiconductor device according to claim 1, wherein: The removing of the silicon oxide comprises: Removing the silicon oxide causes the bottom surface of the contact hole sidewall to be lower than the bottom of the connection circuit.

3. The method for forming a semiconductor device according to claim 1, wherein: The bottom of the contact hole has a first silicon oxide layer, the sidewall of the connection circuit has a second silicon oxide layer, and the thickness of the first silicon oxide layer is greater than the thickness of the second silicon oxide layer.

4. The method for forming a semiconductor device according to claim 1, wherein: The doped polysilicon includes SiP.

5. The method for forming a semiconductor device according to claim 1, wherein: The connection circuit includes a contact plug located on a surface of the contact hole and a bit line structure located on a surface of the contact plug.

6. The method for forming a semiconductor device according to claim 1, wherein: A plurality of isolation structures spaced apart from each other and a plurality of active areas isolated by the isolation structures are formed in the substrate; the sidewalls of the contact holes expose the isolation structures, and at least a portion of the bottom exposes the active areas.

7. A semiconductor device, characterized in that: The semiconductor device is formed by the method for forming a semiconductor device according to any one of claims 1 to 6, comprising: a substrate, wherein a surface of the substrate includes an inwardly recessed contact hole, a connecting circuit is formed in the contact hole, a gap is formed between the connecting circuit and a sidewall of the contact hole, a first silicon oxide layer is formed at a bottom of the contact hole, a second silicon oxide layer is formed on a sidewall of the connecting circuit, and a thickness of the first silicon oxide layer is greater than a thickness of the second silicon oxide layer; An isolation layer conformally covers the connection circuit, the contact hole and the substrate surface.

8. The semiconductor device according to claim 7, wherein: The connection circuit includes metal, metal nitride and doped polysilicon.

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