Power device screening method and device, electronic equipment and storage medium

Abstract

Embodiments of the present application provide a power device screening method and device, electronic equipment and storage medium, comprising: obtaining a test result of a power device after wafer packaging by static current detection; when it is determined that the power device meets a preset quality requirement based on the test result, adjusting the static current according to production quality requirements; detecting the power device based on the adjusted static current to obtain a target power device, thereby reducing product quality risk and improving the service life of the device in general, and accurately locating the abnormal reason of the power device.

Description

Technical Field

[0001] This application relates to the field of power semiconductor technology, specifically to a method, apparatus, electronic device, and storage medium for screening power devices. Background Technology

[0002] Power losses during operation cause power electronic devices to heat up, and excessively high temperatures will shorten the device's lifespan or even burn it out. The main losses in power devices include turn-on, turn-off, and conduction losses.

[0003] To prevent problems such as excessive losses leading to shortened device lifespan and failure, in related technologies, for example, the main board of the inverter air conditioner outdoor unit controller contains several power chips such as IGBTs. During the final assembly and testing of the air conditioner, if there are quality problems with the power devices, the test process may result in board explosion. It is often difficult to analyze such failed devices because most of the chips have been burned out and the failure points have been destroyed. Even with a combination of various failure analysis methods, it is difficult to observe the failure morphology.

[0004] Therefore, how to accurately and effectively screen and separate devices with high losses, and ensure the reliability and lifespan of chips, is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0005] In view of the above problems, this application provides a method, apparatus, electronic device and storage medium for screening power devices, so as to screen out defects in the chips of power devices by adjusting the static current and testing multiple times, and accurately locate the cause of power device abnormalities.

[0006] In a first aspect, embodiments of this application provide a method for screening power devices. The method includes: obtaining test results of power devices after wafer packaging by detecting static current; adjusting the static current according to production quality requirements when it is determined that the power device meets preset quality requirements based on the test results; and detecting the power device based on the adjusted static current to screen and obtain target power devices.

[0007] In one embodiment, adjusting the static current according to production quality requirements includes: adjusting the static current in equal increments based on the production quality requirements; and increasing or decreasing the static current based on the equal increments.

[0008] In one embodiment, the method further includes: when the power device fails to meet the preset quality requirements based on the test results, adding a first non-conforming label to the power device; and when the power device fails to meet the production quality requirements based on the adjusted static current, adding a second non-conforming label to the power device.

[0009] In one embodiment, the screening to obtain the target power device includes: adding a first non-conforming label and a second non-conforming label to the power device and classifying and screening them according to the label category to obtain the target power device.

[0010] In one embodiment, the method further includes: acquiring information on a first power device carrying a first non-conforming label that has been screened out from the power devices and information on a second power device carrying a second non-conforming label that has been screened out from the power devices; and monitoring the first power device information and the second power device information.

[0011] In one embodiment, before obtaining the test results of the power device after wafer packaging by detecting static current, the method further includes: obtaining the detection results of the wafer fabrication by detecting a preset static current.

[0012] Secondly, embodiments of this application provide a power device screening apparatus, comprising: an acquisition module for acquiring test results of power devices after wafer packaging by detecting static current; an adjustment module for adjusting the static current according to production quality requirements when the power device meets preset quality requirements based on the test results; and a screening module for detecting the power device based on the adjusted static current to screen out target power devices.

[0013] In one embodiment, the adjustment module includes: a tiered adjustment module, used to adjust the static current in tiers proportionally based on the production quality requirements; and a current magnitude adjustment module, used to increase or decrease the static current based on the proportional tiers.

[0014] Thirdly, embodiments of this application provide an electronic device comprising: at least one processor and a memory; the processor being configured to execute a computer program stored in the memory to implement the power device screening method as described in any embodiment of the first aspect.

[0015] Fourthly, embodiments of this application provide a computer storage medium storing one or more programs, which can be executed by an electronic device as described in the third aspect to implement the power device screening method as described in any embodiment of the first aspect.

[0016] This application provides a method, apparatus, electronic device, and storage medium for screening power devices, comprising: obtaining test results of power devices after wafer packaging by detecting static current; determining that the power devices meet preset quality requirements based on the test results; adjusting the static current according to production quality requirements; and detecting the power devices based on the adjusted static current to screen out target power devices, thereby reducing product quality risks and improving the general service life of devices, and accurately locating the causes of power device abnormalities.

[0017] It should be understood that the content described in this section is not intended to identify key or important features of the embodiments of this application, nor is it intended to limit the scope of this application. Other features of this application will become readily apparent from the following description. Attached Figure Description

[0018] The present application will be described in more detail below based on embodiments and with reference to the accompanying drawings.

[0019] Figure 1 A flowchart illustrating a power device screening method according to an embodiment of this application is shown.

[0020] Figure 2 A schematic flowchart of an exemplary implementation of a power device screening method proposed in one embodiment of this application is shown.

[0021] Figure 3 A schematic diagram of an IGBT chip structure proposed in one embodiment of this application is shown;

[0022] Figure 4 A structural block diagram of a power device screening device according to an embodiment of this application is shown;

[0023] Figure 5 A structural block diagram of an electronic device for performing a power device selection method according to an embodiment of this application is shown.

[0024] Figure 6 A computer-readable storage medium for storing or carrying a method for screening power devices according to an embodiment of the present application is shown. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0026] In related technologies, power devices with quality issues may experience board failure during testing. Analyzing such failed devices is often difficult because most of the chip is burned out, and the failure points are destroyed. Even with multiple failure analysis methods combined, it is difficult to observe the failure morphology.

[0027] In chip wafer testing, excessively high current testing cannot be used, and the wafer-to-packaged product process involves packaging. Therefore, wafer testing cannot accurately and effectively screen out devices with high losses. It can only ensure that the chip parameters are within a certain acceptable operating range, but cannot guarantee the chip's reliability and lifespan. Therefore, a method for accurately screening for hidden defects is needed.

[0028] To address the aforementioned issues and considering the problems existing in the prior art, the applicant proposes a power device screening method, apparatus, electronic device, and storage medium according to embodiments of this application. This method can obtain test results of power devices after wafer packaging by detecting static current. Based on the test results, when it is determined that the power device meets preset quality requirements, the static current is adjusted according to production quality needs. Furthermore, considering that excessively high current testing cannot be used in chip wafer testing, the current is adaptively adjusted according to production requirements. The power device is then tested based on the adjusted static current to screen out target power devices, eliminate defective chips, ensure device quality, reduce production quality risks, and improve device lifespan. The power device screening method will be described in detail in subsequent embodiments.

[0029] The power device selection method involved in the embodiments of this application can be applied to, for example, Figure 4 The power device screening device 300 shown is similar to... Figure 5 The illustrated electronic device 200. Electronic devices 200 can be one or more, and may also include devices such as mobile phones and computers; however, this application embodiment does not specifically limit this.

[0030] Please see Figure 1 , Figure 1 This is a flowchart illustrating a power device screening method provided in an embodiment of this application. The method may include steps S110 to S130.

[0031] Step S110: Obtain the test results of the power device after wafer packaging by detecting static current.

[0032] In this embodiment of the application, the static current can be tested at the rated current, which can be set according to the testing requirements.

[0033] Step S120: When the power device meets the preset quality requirements based on the test results, adjust the static current according to the production quality requirements.

[0034] In the embodiments of this application, the test results can characterize whether the power device is qualified, and the generation instruction requirements can be set according to the power device's ability to bear large current or rated power.

[0035] Step S130: Detect the power device based on the adjusted quiescent current to screen out the target power device.

[0036] The adjusted quiescent current can be multiples of the initial quiescent current, and the adjusted quiescent current can be used to screen out devices with high losses.

[0037] In this embodiment, the static current is adjusted according to production quality requirements. Considering that excessively high current cannot be used in chip wafer testing, the current is adaptively adjusted based on production requirements. Power devices are then tested based on the adjusted static current to screen out target power devices, eliminate defective chips, ensure device quality, reduce production quality risks, and improve device lifespan.

[0038] In order to more accurately determine the product status of power devices and facilitate further accurate testing of power devices.

[0039] In some embodiments, adjusting the static current according to production quality requirements in step S120 may include steps S122 to S124.

[0040] Step S122: Adjust the static current in equal increments based on production quality requirements.

[0041] Step S124: Adjust the static current by increasing or decreasing it according to the proportional steps.

[0042] In this embodiment, the chip loss must be evaluated during both the wafer testing and packaging stages. In some cases, small current levels can be set for testing and screening, while in other cases, larger current levels can be added for testing.

[0043] To facilitate the individual determination of the power devices to be eliminated.

[0044] In some embodiments, the power device screening method may further include steps S140 to S150.

[0045] Step S140: If the power device does not meet the preset quality requirements based on the test results, add a first non-conforming label to the power device.

[0046] Step S150: If the power device is determined to be non-compliant with production quality requirements by testing the power device based on the adjusted static current, a second non-compliance label is added to the power device.

[0047] The first and second non-conforming labels can be applied using various marking methods, and this application does not limit them.

[0048] In this embodiment, different labels are added to distinguish defective products according to their packaging. Upon receipt of the goods, they can be inspected separately to facilitate the classification and confirmation of rejected power devices.

[0049] In some embodiments, step S130 may include step S132.

[0050] Step S132: Add the first non-conforming label and the second non-conforming label to the power devices and filter them out according to the label category to obtain the target power devices.

[0051] In this embodiment, the target power device is obtained by removing all defective devices.

[0052] In some embodiments, the power device screening method may further include steps S160 to S170.

[0053] Step S160: Obtain information on the first power device carrying the first non-conforming label that was screened out from the power devices, and information on the second power device carrying the second non-conforming label that was screened out from the power devices.

[0054] Step S170: Monitor the information of the first power device and the information of the second power device.

[0055] In this embodiment of the application, the test method can be used to statistically monitor abnormal data such as Vcesat being too large and uncontrollable on the device itself, and further compare it with the control data in the production process. This allows for a direct identification of the process manufacturing node where the abnormality occurred, and improvements can be made.

[0056] In some embodiments, the power device screening method may further include step S102.

[0057] Step S102: Obtain the detection results after wafer fabrication by using a preset static current.

[0058] In summary, this application takes into account that excessively high current testing cannot be used during the wafer testing stage of the chip, as it would damage the chip itself. Therefore, the chip loss must be evaluated in both the wafer and post-packaging stages. This can be achieved by adjusting the current to perform small-current segmented testing and screening, and then by increasing the current to the corresponding large current test. Under the impact of a brief high current, defective chips are screened out, ensuring device quality, reducing production quality risks, and improving device lifespan.

[0059] Please see Figure 2 , Figure 2An exemplary implementation of the power device selection method of this application is as follows:

[0060] The manufacturing process for power devices is complex, involving wafer production and packaging. The produced wafers often need to be compatible with the packaging process. However, due to the characteristics of the materials themselves and limitations in process capabilities, testing is often used during product manufacturing to screen out defective products and identify hidden defects.

[0061] In some aspects, such as Figure 3 The schematic diagram of the IGBT chip structure shown illustrates how, during the wafer packaging process, uncontrollable factors can cause fluctuations in the packaging process, resulting in the C-electrode metal material penetrating from 3 to 2. See the attached diagram for details. Figure 1 As shown by the dashed ellipse of number 3, after this situation occurs, the value of the on-state saturation voltage drop of the chip will be slightly larger, and the curve will rebound severely. However, because the test current in the wafer production test stage is small, while the current in the packaging test stage is large, it is impossible to completely screen out the corresponding power devices according to the normal test method for such anomalies.

[0062] Therefore, this application requires screening through both low-current and high-current tests, and these tests must not affect the device itself. This application uses a tiered screening method, such as... Figure 2 The flowchart is shown below:

[0063] S1: After the chip fabrication is completed, wafer testing is carried out. An additional Vcesat test with rated current is added, namely Vcesat@40A. Due to the production control requirements of the wafer itself, the current cannot be too large during wafer testing. At most, the rated current can be used to screen out some defective products.

[0064] S2: After the wafer testing is completed, it is shipped out and arranged to be packaged into finished products at the packaging plant.

[0065] S3: After packaging, the IGBT undergoes packaging testing. The conditions are set to a rated current test of 5A. Devices that are not within the specification range are screened out, and the devices in this stage are separated by setting a grading system.

[0066] S4: Vcesat also adds a test at rated current and twice the rated current, namely Vcesat@40A and Vcesat@80A, with longer test times, to ensure that hidden defects in IGBT chips are completely screened out.

[0067] S5: Defective products can be distinguished according to their packaging and can be tested separately upon receipt.

[0068] This testing method can be used to statistically monitor abnormal data such as excessively large and uncontrollable Vcesat values ​​of the device itself, and further compare them with the control data in the production process. This allows for a more intuitive identification of the process manufacturing node where the abnormality occurred, and improvements can be made.

[0069] In this embodiment, Figure 3 In the image, we see a cross-section of an IGBT chip. The bottom layer of metal is the collector (C), the outermost layer is the emitter (E), and the internal trench is the gate (G). The number 1 indicates the back metal material, which is easily penetrated by 3. The number 2 indicates the abnormality where the metal in 1 passes through 3. 3 represents the structural layer corresponding to the device.

[0070] Please see Figure 4 , Figure 4 The present application provides a structural block diagram of a power device screening device 300, which includes: an acquisition module 310, an adjustment module 320, and a screening module 330, wherein:

[0071] The acquisition module 310 is used to acquire the test results of the power device after wafer packaging by detecting the static current.

[0072] The adjustment module 320 is used to adjust the static current according to production quality requirements when the power device meets the preset quality requirements based on the test results.

[0073] The screening module 330 is used to detect the power device based on the adjusted quiescent current in order to screen out the target power device.

[0074] Preferably, the adjustment module 320 includes: a graded adjustment module and a current magnitude adjustment module, wherein:

[0075] The determination module is used to determine the fault information at the corresponding location of the AR virtual model based on the structural state of the AR virtual model.

[0076] The grading adjustment module is used to adjust the static current in equal proportions based on the production quality requirements.

[0077] The current adjustment module is used to increase or decrease the static current based on the proportional steps.

[0078] It should be noted that this application also includes other modules that perform the above methods, which correspond to the method part and will not be described again here. The device embodiments in this application correspond to the aforementioned method embodiments. The specific principles in the device embodiments can be found in the content of the aforementioned method embodiments and will not be described again here.

[0079] In the several embodiments provided in this example, the coupling between modules can be electrical, mechanical, or other forms of coupling.

[0080] Furthermore, the functional modules in the various embodiments of the present invention can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0081] Please see Figure 5 , Figure 5 This is a structural block diagram of an electronic device 200 that can perform the above-described power device screening method, provided in an embodiment of this application. The electronic device 200 may be a smartphone, tablet computer, computer, or portable computer.

[0082] The electronic device 200 also includes a processor 202 and a memory 204. The memory 204 stores programs that can execute the contents of the foregoing embodiments, and the processor 202 can execute the programs stored in the memory 204.

[0083] The processor 202 may include one or more cores for data processing and message matrix units. The processor 202 connects to various parts of the electronic device 200 using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 204, and by calling data stored in the memory 204. Optionally, the processor 202 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 202 may integrate one or more of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem / decoder. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the displayed content; and the modem / decoder handles wireless communication. It is understood that the modem / decoder may also be implemented separately through a communication chip, without being integrated into the processor.

[0084] Memory 204 may include random access memory (RAM) or read-only memory (ROM). Memory 204 can be used to store instructions, programs, code, code sets, or instruction sets. Memory 204 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (e.g., instructions for a user to obtain random numbers), instructions for implementing the various method embodiments described below, etc. The data storage area may also store data (e.g., random numbers) created by the terminal during use.

[0085] Electronic device 200 may also include a network module and a screen. The network module is used to receive and transmit electromagnetic waves, converting electromagnetic waves into electrical signals, thereby enabling communication with communication networks or other devices, such as audio playback devices. The network module may include various existing circuit elements used to perform these functions, such as antennas, radio frequency transceivers, digital signal processors, encryption / decryption chips, SIM cards, memory, etc. The network module can communicate with various networks such as the Internet, corporate intranets, and wireless networks, or communicate with other devices via wireless networks. The aforementioned wireless networks may include cellular telephone networks, wireless local area networks, or metropolitan area networks. The screen can display interface content and facilitate data interaction.

[0086] Please refer to Figure 6 , Figure 6 This diagram illustrates a structural block diagram of a computer-readable storage medium according to an embodiment of this application. The computer-readable storage medium 400 stores program code 410, which can be called by a processor to execute the methods described in the above method embodiments.

[0087] The computer-readable storage medium 400 may be an electronic memory such as flash memory, EEPROM (Electrically Erasable Programmable Read-Only Memory), EPROM, hard disk, or ROM. Optionally, the computer-readable storage medium includes a non-transitory computer-readable storage medium. The computer-readable storage medium 400 has storage space for program code 410 that performs any of the method steps described above. This program code 410 can be read from or written to one or more computer program products. The program code 410 may, for example, be compressed in a suitable form.

[0088] This application also provides a computer program product or computer program that includes computer instructions stored in a computer-readable storage medium 400. A processor of a computer device reads the computer instructions from the computer-readable storage medium 400, and the processor 202 executes the computer instructions, causing the computer device to perform the power device selection method described in the various optional implementations above.

[0089] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A method for screening power devices, characterized in that, The method includes: The detection results are obtained by detecting the wafer after it has been fabricated using a preset static current. Obtain test results of power devices after wafer packaging by detecting static current; When the power device is determined to meet the preset quality requirements based on the test results, the static current is adjusted according to the production quality requirements. The power devices are tested based on the adjusted static current to screen out target power devices; the adjusted static current is used to screen out power devices that have introduced latent defects during the packaging process. The adjustment of the static current according to production quality requirements includes: Based on the aforementioned production quality requirements, the static current is adjusted proportionally in stages. The static current is adjusted by increasing or decreasing the proportional step-by-step.

2. The power device screening method according to claim 1, characterized in that, The method further includes: When the power device fails to meet the preset quality requirements based on the test results, a first non-conforming label is added to the power device. If the power device is determined to be non-compliant with production quality requirements based on the adjusted static current, a second non-conforming label is added to the power device.

3. The power device screening method according to claim 2, characterized in that, The screening process yields the target power devices, including: The power devices are categorized and screened by label type after adding a first non-conforming label and a second non-conforming label to obtain the target power device.

4. The power device screening method according to claim 3, characterized in that, The method further includes: Obtain information on the first power device carrying the first non-conforming label that was screened out from the power devices, and information on the second power device carrying the second non-conforming label that was screened out from the power devices; Monitor the information of the first power device and the information of the second power device.

5. A power device screening device, characterized in that, The device includes: The acquisition module is used to acquire the detection results of the wafer after it has been fabricated and tested by a preset static current, as well as the test results of the power device after it has been packaged and tested by a static current. An adjustment module is used to adjust the static current according to production quality requirements when the power device meets the preset quality requirements based on the test results. A screening module is used to detect the power devices based on the adjusted static current in order to screen out target power devices; the adjusted static current is used to screen out power devices that have introduced latent defects during the packaging process. The adjustment module includes: The graded adjustment module is used to adjust the static current in equal grades according to the production quality requirements. The current adjustment module is used to increase or decrease the static current based on the proportional steps.

6. An electronic device, characterized in that, The electronic device includes a memory and a processor, wherein the memory stores program code that can run on the processor, and when the program code is executed by the processor, it implements the power device screening method as described in any one of claims 1 to 4.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores program code that is invoked by one or more processors to execute the power device selection method as described in any one of claims 1 to 4.

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