Integrated circuit engineering data processing method and system

Abstract

The embodiment of the application discloses an integrated circuit engineering data processing method and system. The integrated circuit engineering data processing method comprises the following steps: obtaining initial engineering data and requirement parameter information, wherein the initial engineering data is an integrated circuit data file designed by using EDA software; performing standardized data conversion on the initial engineering data based on a preset standardization rule to obtain standardized engineering data; performing parameter extraction on the standardized engineering data based on a preset parameter extraction rule to obtain integrated circuit product characteristic parameters; generating stacking and board information according to the integrated circuit product characteristic parameters; and generating integrated circuit processing information according to the requirement parameter information and the stacking and board information. Through the structuralization, standardization definition and design of the processing procedure of the integrated circuit engineering data, the efficiency and quality loss are reduced by checking and correcting each operation module in time. In addition, the automatic function improves the processing efficiency of the engineering data.

Description

Technical Field

[0001] This application relates to the field of integrated circuit engineering data processing, and in particular to an integrated circuit engineering data processing method and system. Background Technology

[0002] Before manufacturing integrated circuits, product design and processing are required to ensure quality and performance. However, due to the complexity of integrated circuit design, differences in standardization levels, product diversity, and stringent performance requirements, traditional engineering data processing methods are inefficient, struggle to achieve optimal product quality, and are prone to errors in the engineering process.

[0003] With the development of integrated circuit technology, integrated circuit designs are becoming increasingly complex. Traditional engineering data processing methods rely on manual acquisition and processing of integrated circuit design data, such as layer stack-up structures, circuit patterns, impedance control, and warpage. However, when faced with complex integrated circuit design data, traditional engineering data processing methods suffer from low processing efficiency, difficulty in quality control, and inability to meet the requirements of automated operations. Therefore, there is a need for a more efficient integrated circuit engineering data processing method. Summary of the Invention

[0004] This application aims to at least address one of the technical problems existing in the prior art. To this end, embodiments of this application provide an integrated circuit engineering data processing method and system, which can improve the processing efficiency of integrated circuit engineering data.

[0005] In a first aspect, embodiments of this application provide an integrated circuit engineering data processing method, comprising: acquiring initial engineering data and requirement parameter information, wherein the initial engineering data is an integrated circuit data file designed using EDA software; performing standardized data conversion on the initial engineering data based on preset standardization rules to obtain standardized engineering data; extracting parameters from the standardized engineering data based on preset parameter extraction rules to obtain integrated circuit product characteristic parameters; generating stack-up information based on the requirement parameter information and the integrated circuit product characteristic parameters; and generating integrated circuit processing information based on the requirement parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information.

[0006] In some embodiments of this application, the preset standardization rules include: line layer conversion rules, solder mask conversion rules, character layer conversion rules, nettop layer conversion rules, outline layer conversion rules, and drill layer conversion rules; the standardization data conversion based on the preset standardization rules to obtain standardized engineering data includes: converting the line layers in the initial engineering data according to the line layer conversion rules to obtain standard line layer data; converting the solder mask layers in the initial engineering data according to the solder mask conversion rules to obtain standard solder mask layer data; and converting the initial engineering data according to the character layer conversion rules. The initial engineering data is converted according to the following steps: First, the character layer is converted to obtain standard character layer data. Second, the shape layer in the initial engineering data is converted according to the shape layer conversion rules to obtain standard shape layer data. Third, the borehole layer in the initial engineering data is converted according to the borehole layer conversion rules to obtain standard borehole layer data. Fourth, the nettable layer in the initial engineering data is converted according to the nettable layer conversion rules to obtain standard nettable data. Finally, the standardized engineering data is obtained based on the standard line layer data, the standard solder mask layer data, the standard character layer data, the standard nettable data, the standard shape layer data, and the standard borehole layer data.

[0007] In some embodiments of this application, the step of extracting parameters from the standardized engineering data based on preset parameter extraction rules to obtain integrated circuit product characteristic parameters includes: obtaining the preset parameter extraction rules corresponding to the integrated circuit product characteristic parameters, wherein the preset parameter extraction rules include: parameter range and parameter identifier; locating parameters in the standardized engineering data according to the parameter identifier to obtain the position information of each integrated circuit product characteristic parameter in the standardized engineering data; and extracting the integrated circuit product characteristic parameters located within the parameter range according to the position information.

[0008] In some embodiments of this application, the integrated circuit product characteristic parameters include one or more of the following: impedance information, linewidth information, BGA information, via information, aspect ratio information, dielectric layer thickness information, copper layer information, solder mask information, and board thickness information; the stack-up and panelization information parameters include one or more of the following: impedance type information, impedance accuracy, board thickness accuracy, dielectric information, and linewidth accuracy; generating stack-up and panelization information based on the required parameter information and the integrated circuit product characteristic parameters includes: obtaining the impedance accuracy and impedance type information based on the impedance information, the linewidth information, and the BGA information; obtaining the linewidth accuracy based on the board thickness information, the copper layer information, the via information, and the aspect ratio information; obtaining the dielectric information based on the impedance information and the dielectric layer thickness information; and obtaining the board thickness accuracy based on the linewidth accuracy, the board thickness information, the copper layer information, the solder mask information, and the dielectric information.

[0009] In some embodiments of this application, the requirement parameter information includes one or more of the following: panel quantity information, MARK point coordinate information, tool information, or product parameter information; the integrated circuit processing information includes one or more of the following: panel information, edge sealing information, stack-up information, process flow information, processing parameter information, processing tool information for each layer, and material information; generating integrated circuit processing information based on the requirement parameter information, the integrated circuit product characteristic parameters, and the stack-up and panel information includes: generating the panel information and edge sealing information based on the panel quantity information and the MARK point coordinate information; generating the material information based on the panel information, the stack-up information, the tool information, and the product characteristic parameter information; generating the process flow information based on the panel information, the stack-up information, the tool information, the product characteristic parameter information, and the material information; generating the processing parameter information based on the panel information, the stack-up information, the tool information, the product characteristic parameter information, and the process flow information; and generating the processing tool information for each layer based on the product characteristic parameter information, the process flow information, the tool information, and the material information.

[0010] In some embodiments of this application, the initial engineering data includes auxiliary data, which may include one or more of the following depending on the design: irregular groove data, irregular hole data, special surface treatment layer, dense hole data, or resin plugging data; after the initial engineering data is standardized based on preset standardization rules to obtain standardized engineering data, the method further includes: obtaining auxiliary definition rules; performing standardized data conversion on the auxiliary data according to the auxiliary definition rules to obtain auxiliary standardized data; and updating the standardized engineering data using the auxiliary standardized data.

[0011] In some embodiments of this application, before generating integrated circuit processing information based on the demand parameter information, the integrated circuit product characteristic parameters, and the stacking and panelization information, the method further includes: performing first-level parameter detection on the demand parameter information, the integrated circuit product characteristic parameters, and the stacking and panelization information; when it is determined that a parameter in the stacking and panelization information is within a first preset parameter range, generating a pass detection first state; when it is determined that a parameter in the demand parameter information, the integrated circuit product characteristic parameters, and the stacking and panelization information is within a second preset parameter range but not within the first preset parameter range, generating a reminder verification first state and identifying the corresponding parameter as a reminder verification first state, wherein the first preset parameter range is a subset of the second preset parameter range; when it is determined that a parameter in the demand parameter information, the integrated circuit product characteristic parameters, and the stacking and panelization information is outside the second preset parameter range, generating a forced modification first state and identifying the corresponding parameter as a forced modification first state.

[0012] In some embodiments of this application, after generating integrated circuit processing information based on the demand parameter information, the integrated circuit product characteristic parameters, and the stacking and panelization information, the method further includes: obtaining processing parameters of the production equipment; selecting optimization parameters in a preset processing database based on the processing parameters of the production equipment; and performing modular adaptation of the integrated circuit processing information based on the optimization parameters to obtain integrated circuit adaptation information corresponding to the processing parameters of the production equipment.

[0013] In some embodiments of this application, after obtaining the integrated circuit adaptation information corresponding to the processing parameters of the production equipment, the method further includes: performing secondary parameter verification on the generated integrated circuit adaptation information; when it is determined that each parameter in the integrated circuit adaptation information is within a third preset parameter range, generating a pass detection second state; when it is determined that each parameter in the integrated circuit adaptation information is within a fourth preset parameter range but not within the third preset range, generating a reminder verification second state and marking the corresponding parameter as a reminder verification second state, wherein the third preset parameter range is a subset of the fourth preset parameter range; when it is determined that each parameter in the integrated circuit adaptation information is outside the fourth preset parameter range, generating a forced modification second state and marking the corresponding parameter as a forced modification second state.

[0014] Secondly, embodiments of this application also provide an integrated circuit engineering data processing system, comprising: a data acquisition module for acquiring initial engineering data and requirement parameter information, wherein the initial engineering data is an integrated circuit data file designed using EDA software; a data conversion module for performing standardized data conversion on the initial engineering data based on preset standardization rules to obtain standardized engineering data; a parameter extraction module for extracting parameters from the standardized engineering data based on preset parameter extraction rules to obtain integrated circuit product characteristic parameters; a data processing module for generating stack-up and panelization information based on the requirement parameter information and the integrated circuit product characteristic parameters; and an integrated circuit processing information generation module for generating integrated circuit processing information based on the requirement parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information.

[0015] Thirdly, embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the integrated circuit engineering data processing method as described in the first aspect of this application.

[0016] Fourthly, embodiments of this application also provide a computer-readable storage medium storing a program that is executed by a processor to implement the integrated circuit engineering data processing method as described in the first aspect of this application.

[0017] The embodiments of this application include at least the following beneficial effects: This application provides an integrated circuit engineering data processing method and system. The method acquires initial engineering data and requirement parameter information, then performs a standardized transformation based on preset standardization rules to obtain standardized engineering data. This standardized engineering data is then automatically extracted based on preset parameter extraction rules to obtain integrated circuit product characteristic parameters. The requirement parameter information and integrated circuit product characteristic parameters are then used to generate stack-up and panelization information. Finally, the requirement parameter information, integrated circuit product characteristic parameters, and stack-up and panelization information are combined to generate integrated circuit processing information. This application's embodiment converts initial engineering data into standardized format data through standardization transformation, facilitating the subsequent automated parameter extraction process to obtain complete and accurate integrated circuit product characteristic parameters. The integrated circuit processing information is then generated based on the requirement parameter information, integrated circuit product characteristic parameters, and stack-up and panelization information. This automated process improves the processing efficiency of integrated circuit engineering data and expands the application scope of integrated circuit product processing.

[0018] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0019] Figure 1 This is a flowchart of the integrated circuit engineering data processing method provided in the embodiments of this application; Figure 2 yes Figure 1 The flowchart of step S200 in the middle; Figure 3 yes Figure 1 The flowchart of step S300 in the middle; Figure 4 yes Figure 1 The flowchart of step S400 in the middle; Figure 5 This is a flowchart of an automated calculation provided in another embodiment of this application; Figure 6 yes Figure 1 The flowchart of step S500 in the middle; Figure 7 This is a flowchart of an integrated circuit engineering data processing method provided in another embodiment of this application; Figure 8 This is a flowchart of an integrated circuit engineering data processing method provided in another embodiment of this application; Figure 9 This is a flowchart of an integrated circuit engineering data processing method provided in another embodiment of this application; Figure 10 This is a flowchart of an integrated circuit engineering data processing method provided in another embodiment of this application. Figure 11 This is a schematic diagram of the functional modules of the integrated circuit engineering data processing system provided in the embodiments of this application; Figure 12 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0021] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0022] In the description of this application, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the system or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0023] In the description of this application, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0024] In the description of this application, unless otherwise expressly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.

[0025] To better understand the technical solutions provided in this application, the terms used herein are explained accordingly: Printed Circuit Board (PCB): A crucial component of the electronics industry. Almost every electronic device, from small items like watches and calculators to large systems like computers, communication devices, and military weaponry, utilizes PCBs to enable electrical interconnection between integrated circuits and other electronic components. A PCB consists of an insulating substrate, connecting wires, and solder pads for mounting and soldering electronic components, serving the dual function of conductive traces and an insulating base. PCBs replace complex wiring, simplifying the assembly and soldering of electronic products by achieving electrical connections between components.

[0026] Integrated circuit (IC) substrate: A substrate used to package bare IC chips. Its function is to carry semiconductor IC chips, with internal wiring to conduct connections between the chip and the circuit board, while also protecting, fixing, and supporting the IC chip, providing heat dissipation channels, and serving as an intermediate product connecting the chip and the PCB.

[0027] Before manufacturing, integrated circuit engineering design data needs to be preprocessed. However, due to the current development of integrated circuit technology, the high complexity of integrated circuit design and the lack of unified design standards, traditional integrated circuit data processing methods are difficult to handle data with high complexity and inconsistent design standards. This can result in incomplete or inaccurate integrated circuit engineering data, or failure to detect design errors in integrated circuits in a timely manner. As a result, the processing of engineering data is inefficient, and errors may occur at the engineering processing end, making it difficult to obtain the best product quality.

[0028] Based on this, the embodiments of this application provide an integrated circuit engineering data processing method and system, which can be used for printed circuit boards and integrated circuit carriers. Through standardization conversion, the initial engineering data is converted into data in a standardized format, which facilitates the subsequent automated parameter extraction process to obtain complete and accurate integrated circuit product characteristic parameters. Then, based on the integrated circuit product characteristic parameters, requirement parameter information, stack-up and panelization information, integrated circuit processing information is generated. The automated process improves the processing efficiency of integrated circuit engineering data and expands the application scope of integrated circuit product processing.

[0029] The integrated circuit engineering data processing method according to embodiments of this application is described below.

[0030] Reference Figure 1 This application provides a method for processing integrated circuit engineering data. The method includes the following steps: S100. Obtain initial project data and requirement parameter information.

[0031] In one embodiment, the initial engineering data is an integrated circuit data file designed using EDA software. Common EDA software includes Allegro, SPICE, EWB, PROTEL, and PADS. Allegro is an application that can be used with integrated circuit, PCB, and package co-design systems and application software platforms for collaborative design solutions, efficiently optimizing I / O buffers and interconnections between integrated circuits, packages, and PCBs. SPICE is a mixed analog and digital circuit simulation EDA software that can perform various circuit simulations, stimulus setup, temperature and noise analysis, analog control, waveform output, data output, and simultaneously display analog and digital simulation results in the same window. It also allows users to create their own components and component libraries. EWB is a circuit simulation software that is relatively compact compared to other EDA software. It has powerful mixed analog and digital circuit simulation capabilities, simulating almost 100% of the results of real circuits. It also provides instruments such as multimeters, oscilloscopes, signal generators, sweep generators, logic analyzers, digital signal generators, logic converters, voltmeters, and ammeters on the desktop for ease of use. PROTEL is a complete, all-encompassing circuit design system, including schematic drawing, mixed-signal simulation of analog and digital circuits, multilayer printed circuit board design, programmable logic device design, chart generation, circuit table generation, and macro operation support. Using automatic routing on multilayer printed circuit boards, it can achieve 100% routing completion for high-density PCBs. PADS is a PCB design software widely used in today's most active industrial fields such as communications, semiconductors, consumer electronics, and medical electronics due to its powerful interactive layout and routing functions and ease of use. It is understandable that different users may use different EDA software, and the parameter definitions, parameter ranges, and file formats of the integrated circuit data files obtained from the EDA software may differ. Therefore, this application embodiment performs standardized data conversion on the integrated circuit data files through the following steps.

[0032] S200. Based on preset standardization rules, the initial engineering data is transformed into standardized engineering data.

[0033] In some embodiments, the preset standardization rules include: line layer conversion rules, solder mask layer conversion rules, outline layer conversion rules, character layer conversion rules, nettop layer conversion rules, and drill layer conversion rules.

[0034] In one embodiment, the preset standardization rules define the applicable parameter range, parameter name, and other rules for different parameters. That is, this embodiment uses preset standardization rules to standardize different parameters. For example, the parameters that need to be standardized may be: circuit layer, solder mask layer, outline layer, or drill layer. Therefore, for the aforementioned parameters, this embodiment provides corresponding preset standardization rules, namely: circuit layer conversion rules for circuit layer parameters, solder mask conversion rules for solder mask layer parameters, outline layer conversion rules for outline layer parameters, and drill layer conversion rules for drill layers.

[0035] In one embodiment, reference is made to Figure 2 Step S200 includes: Among them, reference Figure 2 Step S200 includes: S210. Convert the line layer in the initial engineering data according to the line layer conversion rules to obtain standard line layer data.

[0036] In one embodiment, the circuit layer is the routing information of different layers on the IC carrier board. The function of the circuit layer is to lay the path for power signals to connect various devices, thereby enabling signal transmission.

[0037] In one embodiment, the line layer conversion rule includes: line layer name information, line layer graphic attributes, line layer parameter names, and line layer parameter values. The line layers in the initial engineering data are converted according to the line layer conversion rule to obtain standard line layer data. The specific conversion steps are: 1) Load the file; 2) Select the layer to be converted; 3) Determine whether it is a line layer; 4) If it is a line layer, determine whether the line layer graphic attributes, line layer parameter names, and line layer parameter values ​​are missing; 5) Convert the line layer according to the layer name information, line layer graphic attributes, line layer parameter names, and line layer parameter values.

[0038] In one embodiment, the loaded file is an integrated circuit data file. The selected layer for conversion is the circuit layer in the integrated circuit data file. The determination of whether it is a circuit layer involves further determining whether the selected layer is a circuit layer, determining whether the circuit layer's graphic attributes, parameter names, and parameter values ​​are missing, and converting the selected circuit layer according to the circuit layer conversion rules to obtain standard circuit layer data.

[0039] S220. Convert the solder resist layer in the initial engineering data according to the solder resist layer conversion rules to obtain standard solder resist layer data.

[0040] In one embodiment, the solder mask layer is divided into a top solder mask layer and a bottom solder mask layer, and the solder mask layer is located on various parts other than the solder pads. Figure 1A layer of coating, such as solder resist, is used to prevent these areas from being painted. If the coating is applied to the top of the pad, it is called the top solder resist; if it is applied to the bottom of the pad, it is called the bottom solder resist. The solder resist layer is used to match the pads during the design process and is automatically generated.

[0041] In one embodiment, the solder mask conversion rule includes: solder mask layer name information, solder mask graphic attributes, solder mask parameter names, and solder mask parameter values. The circuit layers in the initial engineering data are converted according to the solder mask conversion rule to obtain standard solder mask data. The specific steps are: 1) Load the file; 2) Select the layer to be converted; 3) Determine if it is a solder mask layer; 4) If it is a solder mask layer, determine if the solder mask graphic attributes, solder mask parameter names, and solder mask parameter values ​​are missing; 5) Convert according to the layer name information, solder mask graphic attributes, solder mask parameter names, and solder mask parameter values.

[0042] In one embodiment, the loaded file is an integrated circuit data file, and the selected layer for conversion is the solder mask layer selected from the integrated circuit data file. The determination of whether it is a solder mask layer involves further determining whether the selected layer is a solder mask layer, and determining whether the solder mask layer graphic attributes, solder mask layer parameter names, and solder mask layer parameter values ​​are missing. The selected solder mask layer is then converted according to the solder mask layer conversion rules to obtain standard solder mask layer data.

[0043] S230. Convert the shape layer in the initial engineering data according to the shape layer conversion rules to obtain standard shape layer data.

[0044] In one embodiment, the outline layer includes information such as printed text, outline, and size on the IC substrate.

[0045] In one embodiment, the shape layer conversion rule includes the shape layer's layer name information, shape layer graphic attributes, shape layer parameter names, and shape layer parameter values. The shape layers in the initial engineering data are converted according to the shape layer conversion rule to obtain standard shape layer data. The specific steps are: 1) Loading the file; 2) Selecting the layer to be converted; 3) Determining if it is a shape layer; 4) If it is a shape layer, determining if the shape layer's graphic attributes, shape layer parameter names, and shape layer parameter values ​​are missing; 5) Converting according to the layer name information, shape layer graphic attributes, shape layer parameter names, and shape layer parameter values. For example, loading the file involves loading an integrated circuit data file; selecting the layer to be converted from the integrated circuit data file is to select the layer to be converted as a shape layer; determining if it is a shape layer involves further determining whether the selected layer is a shape layer, checking if the shape layer's graphic attributes, shape layer parameter names, and shape layer parameter values ​​are missing, and converting the selected shape layer according to the shape layer conversion rule to obtain standard shape layer data.

[0046] S240. Convert the borehole layers in the initial engineering data according to the borehole layer conversion rules to obtain standard borehole layer data.

[0047] In one embodiment, the drilling layer is divided into through-holes, blind vias, and buried vias. Blind vias are electroplated holes that connect the outermost circuit layer of the IC substrate to an adjacent inner layer; because the opposite side is not visible, they are called blind vias. Buried vias are connections between any circuit layers within the IC substrate that do not extend to the outer layer; they are also known as vias that do not extend to the surface of the IC substrate. Through-holes are used to conduct or connect copper foil traces between conductive patterns in different layers of the IC substrate.

[0048] In one embodiment, the borehole layer conversion rule includes: borehole layer name information, borehole layer graphic attributes, borehole layer parameter names, and borehole layer parameter values. The initial engineering data's line layers are converted according to the borehole layer conversion rule to obtain standard borehole layer data. The specific steps are: 1) Loading the file; 2) Selecting the data to be converted; 3) Determining if it is a borehole layer; 4) If it is a borehole layer, determining whether the borehole layer graphic attributes, borehole layer parameter names, and borehole layer parameter values ​​are missing, and converting according to the layer name information; 5) Converting the borehole layer based on the borehole layer graphic attributes, borehole layer parameter names, and borehole layer parameter values.

[0049] In one embodiment, the loaded file is an integrated circuit data file, and the selected data for conversion is the drill layer selected from the integrated circuit data file. The determination of whether it is a drill layer involves further determining whether the selected data is a drill layer, and determining whether the drill layer graphic attributes, drill layer parameter names, and drill layer parameter values ​​are missing. The selected drill layer is then converted according to the drill layer conversion rules to obtain standard drill layer data.

[0050] In one embodiment, a script can be used to convert the circuit layers in the initial engineering data according to the drilling layer conversion rules. The specific implementation process is as follows: load the integrated circuit engineering file, check the conversion drilling layer in the interface, the script will determine whether the file contains drilling layer data, determine whether the layer name is correct based on the drilling layer name information, and determine whether the drilling layer graphic attributes, drilling layer parameter names, and drilling layer parameter values ​​are missing. If the information is incomplete, a warning message will be issued. If the information is complete, the conversion operation can be performed. Finally, the conversion is successful, and standard drilling layer data is obtained. The effect can be viewed by previewing.

[0051] S250. Convert the character layer in the initial project data according to the character layer conversion rules to obtain standard character layer data.

[0052] In one embodiment, the character layer is used to label the component numbers and symbols, facilitating circuit identification during circuit board fabrication. The character layer conversion rules include: character layer name information, character layer graphic attributes, character layer parameter names, and character layer parameter values. The initial engineering data's circuit layers are converted according to the character layer conversion rules to obtain standard character layer data. The specific steps are: 1) Load the file; 2) Select the data to be converted; 3) Determine if it is a character layer; 4) If it is a character layer, determine if the character layer graphic attributes, character layer parameter names, and character layer parameter values ​​are missing, and convert according to the layer name information; 5) Convert the character layer based on the character layer graphic attributes, character layer parameter names, and character layer parameter values.

[0053] In one embodiment, the loaded file is an integrated circuit data file, and the selected data for conversion is the data to be converted as a character layer in the integrated circuit data file. To determine whether it is a character layer, it is further determined whether the selected data is a character layer, and whether the character layer graphic attributes, character layer parameter names, and character layer parameter values ​​are missing. The selected character layer is converted according to the character layer conversion rules to obtain standard character layer data.

[0054] S260. Transform the network surface in the initial engineering data according to the network surface transformation rules to obtain standard network surface data.

[0055] In one embodiment, the network surface is a definition of the electrical connections between components in the electrical schematic. It is used to represent the electronic open and short circuit information between components. It is a textual expression of the component connection network extracted from the graphical schematic. It plays a very important role in the circuit board design process and is a bridge connecting the electrical schematic and the circuit board.

[0056] In one embodiment, the network surface transformation rules include: network surface layer name information, network surface graphic attributes, network surface parameter names, and network surface parameter values. The initial engineering data's line layers are transformed according to the network surface transformation rules to obtain standard network surface data. The specific steps are: 1) Loading the file; 2) Selecting the data to be transformed; 3) Determining if it is a network surface; 4) If it is a network surface, determining whether the network surface graphic attributes, network surface parameter names, and network surface parameter values ​​are missing, and transforming the network surface according to the layer name information; 5) Transforming the network surface based on the network surface graphic attributes, network surface parameter names, and network surface parameter values.

[0057] In one embodiment, the loaded file is an integrated circuit data file, and the selected data for conversion is the data to be converted as a nettop layer in the integrated circuit data file. The determination of whether it is a nettop layer involves further determining whether the selected data is a nettop layer, and determining whether the nettop layer graphic attributes, nettop layer parameter names, and nettop layer parameter values ​​are missing. The selected nettop layer is then converted according to the nettop layer conversion rules to obtain standard nettop layer data.

[0058] S270. Standardized engineering data are obtained based on standard line layer data, standard solder mask layer data, standard character layer data, standard net surface layer data, standard outline layer data, and standard bore layer data.

[0059] In one embodiment, standardized engineering data is obtained by summarizing standard circuit layer data, standard solder mask layer data, standard outline layer data, and standard borehole layer data. It should be noted that it is not necessary to obtain all six types of data to obtain standardized engineering data; one or more of these types can be selected and combined based on the initial engineering data to obtain standardized engineering data.

[0060] In one embodiment, steps S210 to S260 can all be implemented using a script to convert the corresponding layers in the initial engineering data according to preset standardization rules. The specific implementation process is as follows: After loading the integrated circuit engineering file, select the corresponding layer to convert in the interface (the layer can be: circuit layer, solder mask layer, character layer, nettop layer, outline layer, and drill layer). The script will determine whether the file contains the selected layer, check the layer name information to determine if the layer name is correct, and then determine whether the layer's graphic attributes, parameter names, and parameter values ​​are missing. If the information is incomplete, a warning message will be issued; if the information is complete, the conversion operation can be performed. Finally, the conversion is successful, and standard layer data (which can be: standard circuit layer data, standard solder mask layer data, standard character layer data, standard nettop layer data, standard outline layer data, and standard drill layer data) is obtained. The effect can be previewed.

[0061] The following describes a specific embodiment. After steps S210 to S260, the data layers in the initial engineering data are transformed to obtain a standardized engineering data data structure, which is illustrated below. In this embodiment, the standardized engineering data data structure is shown in Table 1. The attributes in Table 1 include: layer name, material, type, thickness, dielectric constant (DK), and weight. For example, based on preset standardization rules, the initial engineering data is transformed to obtain standardized engineering data. Taking the solder mask layer as an example, the standardized engineering data data structure includes at least, but is not limited to: name as top solder mask, material as solder resist, type as solder mask, thickness of 0.01016 mm, and dielectric constant (DK) of 3.5.

[0062] Table 1:

[0063] Once standardized engineering data is obtained, perform the following steps to extract the data.

[0064] S300: Based on preset parameter extraction rules, parameters are extracted from standardized engineering data to obtain integrated circuit product characteristic parameters.

[0065] In some embodiments, the extraction rules include: parameter range and parameter identifier, wherein the parameter range is the range of parameter values ​​of different parameters, and the parameter identifier is the parameter name of a preset parameter.

[0066] In one embodiment, refer to Figure 3 Step S300 includes: S310. Obtain the preset parameter extraction rules corresponding to the characteristic parameters of integrated circuit products.

[0067] S320. Based on the parameter identifier, perform parameter positioning in the standardized engineering data to obtain the location information of each integrated circuit product characteristic parameter in the standardized engineering data.

[0068] S330. Extract the characteristic parameters of integrated circuit products that are within the parameter range based on the location information.

[0069] In some embodiments, obtaining preset parameter extraction rules corresponding to the characteristic parameters of integrated circuit products involves the following steps: searching a rule base, where preset parameter extraction rules are pre-stored; and extracting preset parameter extraction rules that match the characteristic parameters of integrated circuit products. It is understood that the preset parameter extraction rules are pre-generated and stored in the rule base. The generation process can be based on prior knowledge or generated after statistical calculation of multiple characteristic parameters of integrated circuit products. This embodiment does not specifically limit the generation process.

[0070] In some embodiments, according to the preset parameter extraction rules corresponding to the characteristic parameters of the integrated circuit product, the parameter name and the range of parameter values ​​of the preset parameters are obtained. For example, when the characteristic parameter of the integrated circuit product is impedance information, according to the preset parameter extraction rules, if the parameter identifier and parameter range in the standardized engineering data match the impedance information, parameter extraction is performed to obtain the characteristic parameter of the integrated circuit product that is impedance information.

[0071] In some embodiments, parameter positioning is performed in standardized engineering data based on parameter identifiers to obtain the location information of each integrated circuit product characteristic parameter in the standardized engineering data. The specific steps are to determine whether the parameter identifiers of the preset extraction rules and the parameter identifiers of the standardized engineering data match, and to obtain the location information of the product characteristic parameters and the range of values ​​of each product characteristic parameter.

[0072] In some embodiments, the parameter identifiers of the preset extraction rules are matched with the parameter identifiers in the standardized engineering data to locate the position information of the integrated circuit product characteristic parameters in the standardized engineering data, and the value range of the integrated circuit product characteristic parameters that match the parameter identifiers of the preset extraction rules and the parameter identifiers in the standardized engineering data is extracted based on the position information.

[0073] S400 generates stack-up and panelization information based on demand parameter information and integrated circuit product characteristic parameters.

[0074] In some embodiments, the characteristic parameters of integrated circuit products include one or more of the following: impedance information, linewidth information, BGA information, via density information, aspect ratio information, dielectric layer thickness information, copper layer information, solder mask information, and board thickness information. Impedance information refers to information such as the dielectric constant of the dielectric, signal layer, reference layer, single-ended impedance or differential impedance, coplanar and non-coplanar impedance, and impedance tolerance.

[0075] Line width information refers to the width of the conductor. For example, a wider conductor can carry a larger current, but it also occupies more space. BGA information indicates the pin configuration of a component. In this embodiment, the BGA information indicates whether this configuration is used. BGA packaging utilizes SMT solder paste to connect to the carrier board or uses wire bonding. BGA packaging offers advantages such as smaller package area, increased functionality, more pins, high reliability, good electrical performance, and low overall cost.

[0076] The via density information refers to the via spacing. A via spacing between 0.4-1.0mm provides good heat dissipation, essentially acting as a thin copper conduit penetrating the IC substrate's surface along its thickness, allowing heat from the heat-generating components to be rapidly conducted to other heat dissipation layers via the back of the IC substrate. The aspect ratio information is the ratio of the via diameter to the substrate thickness. The dielectric layer thickness information indicates the thickness of the dielectric layer between the stacked layers. The substrate thickness information refers to the thickness of the IC substrate. The substrate thickness primarily depends on factors such as the number of layers, copper thickness / weight, dielectric thickness, the substrate used, and the operating environment. The copper layer information includes parameters such as copper layer thickness, copper layer type, and residual copper percentage. The solder mask information describes the solder mask as a thin polymer layer placed on the substrate to protect the copper from oxidation and short circuits during operation, and it also protects the IC substrate from environmental influences. Solder mask information includes parameters such as solder mask thickness, solder mask color, and solder mask material.

[0077] In some embodiments, the parameters of the stacking and panel information include one or more of the following: impedance type information, impedance accuracy, board thickness accuracy, dielectric information, and linewidth accuracy information. Impedance type information refers to the type of impedance, common types include characteristic impedance, differential impedance, coplanar impedance, non-coplanar impedance, and single-ended impedance. Characteristic impedance is the resistance encountered by a square wave signal (called a pulse) composed of voltage and time, which is transmitted in integrated circuits in electronic information products such as computers and wireless communications. Differential impedance involves two identical signal waveforms of opposite polarities input to the driver, transmitted through two differential lines, and the two differential signals are subtracted at the receiving end. Impedance accuracy is the accuracy calculated after comparing the calculated impedance with a standard value. Board thickness accuracy is the accuracy calculated after comparing the calculated board thickness with a standard value. Dielectric information refers to the prepreg, which is an uncured sheet before lamination, also known as prepreg material, mainly used as an adhesive and insulating material for the inner conductive patterns of multilayer structures. After the prepreg insulating material is laminated, the semi-cured epoxy resin is extruded, begins to flow and solidify, bonding the multilayer structure together to form a reliable insulating layer. Linewidth accuracy information is the precision calculated after comparing the linewidth with a standard value.

[0078] In some embodiments, an integrated circuit engineering data processing system is constructed to execute the aforementioned integrated circuit engineering data processing method. For example... Figure 5 As shown, the required results can be calculated using the automated calculation function provided by the integrated circuit engineering data processing system. The automated calculation function includes: parameter input, automated calculation, matching rule base, and parameter output. Parameter input involves inputting the parameters to be used for calculation. The automated calculation includes multiple steps: parameter acquisition, framework generation, material selection, stack-up generation, automatic verification, impedance calculation, stack-up sorting, and integrated output. Specifically, parameter acquisition involves obtaining the parameters used for calculation; framework generation involves generating the calculation framework related to the parameters; material selection involves determining the materials used in the product; stack-up generation involves generating stack-up structure information and parameters; automatic verification involves verifying the accuracy of the data; impedance calculation involves calculating the impedance value; stack-up sorting involves sorting the stack-up structure; and integrated output involves packaging and outputting the data. Matching the underlying rule base automatically matches the corresponding rule base based on the parameters during the automated calculation process. Parameter output displays the calculated parameters on the interface. For example, if impedance accuracy is required, simply input the impedance information, linewidth information, and BGA information parameters into the automated calculation function provided by the integrated circuit engineering data processing system. The automated calculation using this function will then yield the impedance accuracy.

[0079] In one embodiment, reference is made to Figure 4 Step S400 includes: S410. Obtain impedance accuracy and impedance type information based on impedance information, line width information, and BGA information.

[0080] In some embodiments, impedance accuracy and impedance type information are obtained based on impedance information, line width information, and BGA information. The steps include parameter acquisition, impedance calculation, and output of impedance accuracy and impedance type information. Impedance calculation involves calculating the impedance and impedance type based on the impedance information, line width information, and BGA information, and obtaining the impedance accuracy based on the comparison between the impedance value and the theoretical value. The theoretical value can be set according to actual requirements.

[0081] In some embodiments, input impedance information, linewidth information, and BGA information are acquired, and impedance accuracy and impedance type data are output through automated impedance calculation. The automated impedance calculation is a programmed implementation that automates the acquisition of the aforementioned parameters, impedance calculation, impedance accuracy, and output of impedance type information.

[0082] S420: The linewidth accuracy is obtained based on the board thickness information, copper layer information, dense via information, and depth-to-diameter ratio information.

[0083] In some embodiments, the linewidth accuracy is obtained based on board thickness information, copper layer information, via density information, and aspect ratio information. The steps are parameter acquisition, linewidth calculation, and linewidth accuracy output. Specifically, the linewidth calculation involves calculating the linewidth based on impedance information, board thickness information, copper layer information, via density information, and aspect ratio information. The linewidth accuracy is obtained by comparing the linewidth value with the theoretical value, where the theoretical value can be set according to actual requirements.

[0084] In some embodiments, input board thickness information, copper layer information, dense via information, and aspect ratio information are acquired, and linewidth accuracy data is output through automated linewidth calculation. The automated linewidth calculation involves automating the acquisition of the aforementioned parameters, linewidth calculation, and linewidth accuracy output through programming.

[0085] S430. Obtain dielectric information based on impedance information and dielectric layer thickness information.

[0086] In some embodiments, dielectric information is obtained based on impedance information and dielectric layer thickness information. The steps include parameter acquisition, dielectric calculation, and dielectric information output. The dielectric calculation involves calculating the dielectric design value and then comparing it with the theoretical value to obtain the dielectric information. The theoretical value can be set according to actual requirements.

[0087] In some embodiments, input impedance information and dielectric layer thickness information are acquired, and dielectric information is output through automated dielectric calculation. Automated dielectric calculation involves automating the acquisition of these parameters, the dielectric calculation, and the dielectric output through programming.

[0088] S440: The board thickness accuracy is obtained based on the line width accuracy, board thickness information, copper layer information, solder mask information, and dielectric information.

[0089] In some embodiments, the board thickness accuracy is obtained based on the linewidth accuracy, board thickness information, copper layer information, solder mask information, and dielectric information. The steps are parameter acquisition, board thickness calculation, and board thickness accuracy output. Specifically, the board thickness calculation involves calculating the board thickness value based on the linewidth accuracy, board thickness information, copper layer information, solder mask information, and dielectric information, and obtaining the board thickness accuracy based on the comparison between the calculated board thickness value and the theoretical value. The theoretical value can be set according to actual requirements.

[0090] In some embodiments, linewidth accuracy, board thickness information, copper layer information, solder mask information, and dielectric information are acquired, and board thickness accuracy data is output through automated thick-plate calculation. The automated thick-plate calculation involves automating the acquisition of the aforementioned parameters, the automated thick-plate calculation, and the output of the thick-plate accuracy data through programming.

[0091] The above steps are used to obtain information on the stacked structure and panels, and then subsequent processes are executed based on the processing requirements.

[0092] S500 generates integrated circuit processing information based on demand parameter information, integrated circuit product characteristic parameters, and stack-up and panelization information.

[0093] In one embodiment, integrated circuit processing information includes one or more of the following: panelization information, edge sealing information, layer stacking information, process flow information, processing parameter information, processing tool information for each layer, and material information. The processing tool information for each layer includes one or more of the following: circuit layer, solder mask layer, drilling layer, outline layer, and special processing layer. Panelization information is provided for production convenience. For PCB manufacturers, the substrate is generally large, so many boards are made at once, and then cut off piece by piece; the cutting information forms the panelization information. Edge sealing information refers to whether copper plating is required on the board edges, how to design the processing tool holes, tool pads, etc.

[0094] Layer stack-up information refers to the solder mask, copper layer, and insulating layer that form the IC substrate before the final circuit design is determined. Layer stack-up information is a collection of parameter information for each layer. Process flow information refers to the IC substrate manufacturing process. Processing parameter information consists of the processing data required when manufacturing the IC substrate. Layer processing tool information is a list of tools required when manufacturing each layer of the IC substrate. Material information includes raw material information such as substrate, copper foil, solder mask, cutting tools, and other precious metals. Therefore, integrated circuit processing information is production-related information that the PCB manufacturer needs to determine during processing.

[0095] In one embodiment, the demand parameter information can be information related to the manufacturer's production needs. In this embodiment, the demand parameter information includes one or more of the following: panel quantity information, MARK point coordinate information, tooling information, and product parameter information. The panel quantity information refers to the number of IC carrier boards used to assemble multiple IC carrier board units into a larger finished board. The MARK point coordinate information serves as a reference point, providing a reference point for the placement of all components in the mounting process. The tooling information refers to the tools used in processing the IC carrier board. The product parameter information refers to the parameters possessed by this product, such as impedance information, trace width information, BGA information, and via information.

[0096] In one embodiment, simply loading the integrated circuit data file into the integrated circuit engineering data processing system allows the acquisition of required parameter information on the interface.

[0097] In one embodiment, reference is made to Figure 6 Step S500 includes: S510. Generate panel information and edge banding information based on panel quantity information and MARK point coordinate information.

[0098] In some embodiments, panel information and edge banding information are generated based on panel quantity information and MARK point coordinate information. The steps are parameter acquisition, panel and edge banding calculation, and output of panel and edge banding information.

[0099] In some embodiments, the number of panels and the coordinates of the MARK points are obtained, and the panel information and edge sealing information are output through automated calculations of paneling and edge sealing.

[0100] S520: Generate material information based on panel information, stacking information, tooling information, and product characteristic parameter information.

[0101] In some embodiments, material information is generated based on panel information, stacking information, tooling information, and product characteristic parameter information. The steps are parameter acquisition, material calculation, and material information output.

[0102] In some embodiments, material information is generated by acquiring panel information, stacking information, tooling information, and product characteristic parameter information, and then output through automated material calculation.

[0103] S530: Process flow information generated based on panel information, stacking information, tooling information, product characteristic parameters, and material information.

[0104] In some embodiments, process flow information is generated based on panel information, stacking information, tooling information, product characteristic parameter information, and material information. The steps are parameter acquisition, process flow calculation, and process flow information output.

[0105] In some embodiments, process flow information is generated by acquiring panel information, stacking information, tooling information, product characteristic parameter information, and material information, and the process flow information is output through automated process flow calculation.

[0106] S540. Generate the processing parameter information based on the panel information, stacking information, tool information, product characteristic parameter information, and process flow information.

[0107] In some embodiments, processing parameter information is generated based on panel information, stacking information, tool information, product characteristic parameter information, and process information. The steps are parameter acquisition, processing parameter calculation, and processing parameter information output.

[0108] In some embodiments, processing parameter information is generated by acquiring panel information, stacking information, tool information, product characteristic parameter information, and process information, and the processing parameter information is output through automated calculation of the processing parameters.

[0109] S550 generates machining tool information for each layer based on product characteristic parameters, process flow information, tool information, and material information.

[0110] In some embodiments, machining tool information for each layer is generated based on product characteristic parameter information, process flow information, tool information, and material information. The steps are parameter acquisition, machining tool calculation for each layer, and machining tool information output for each layer.

[0111] In some embodiments, product characteristic parameter information, process flow information, tool information, and material information are obtained to generate machining tool information for each layer. Through automated calculation of machining tools at each layer, machining tool information for each layer is output.

[0112] In some embodiments, the initial engineering data includes auxiliary data, which includes one or more of the following: irregular slot data, irregular hole data, dense hole information, or resin plugging data. Irregular slot data refers to irregularly shaped drill holes, which are automatically converted into a set of multiple single holes during the drilling program. Irregular hole data includes information on the spacing, location, and quantity of irregular holes. Dense hole information indicates that if the hole spacing is between 0.4-1.0 mm, it is equivalent to a thin copper conduit penetrating the surface of the substrate along its thickness direction, allowing heat from the heating element to be rapidly conducted to other heat dissipation layers through the back of the substrate. Resin plugging data refers to the use of resin to plug the holes; which holes need to be plugged is determined based on data such as hole coordinates, hole diameter, and hole quantity.

[0113] In one embodiment, reference is made to Figure 7 After step S200, the integrated circuit engineering data processing method further includes: S710, Obtain auxiliary definition rules.

[0114] In some embodiments, the auxiliary definition rules are auxiliary parameter names and auxiliary parameter values. Auxiliary definition is used when the parameters that the EDA design software may not fully recognize are not fully identifiable. This involves pre-defining parameters that cannot be fully recognized, and then identifying these auxiliary parameter names during the standardization transformation.

[0115] S720. Perform standardized data transformation on the auxiliary data according to the auxiliary definition rules to obtain auxiliary standardized data.

[0116] In some embodiments, auxiliary data is standardized and transformed according to auxiliary definition rules to obtain auxiliary standardized data. The steps are: obtaining auxiliary parameters, standardizing and transforming auxiliary parameters, and outputting auxiliary data.

[0117] In some embodiments, step S720 may involve obtaining the auxiliary parameter name and auxiliary parameter value, locating the auxiliary data by matching the auxiliary parameter name with the auxiliary parameter name in the auxiliary definition rule, and then judging according to the parameter information and auxiliary parameter value of the auxiliary data to obtain the auxiliary standardized data.

[0118] S730. Update standardized engineering data using auxiliary standardized data.

[0119] In some embodiments, auxiliary standardized data is added to the standardized engineering data to form new standardized engineering data.

[0120] In one embodiment, to further improve processing accuracy and efficiency, after obtaining the required parameter information, integrated circuit product characteristic parameters, and stack-up and panelization information, a first parameter detection is performed, referring to... Figure 8 The steps for performing primary parameter testing on demand parameter information, integrated circuit product characteristic parameters, and stack-up and panel information include: S810. When it is determined that the parameters in the stacked structure and panel information are within the first preset parameter range, a first state of passing the detection is generated.

[0121] S820. When it is determined that the parameters in the demand parameter information, integrated circuit product characteristic parameters, and stacking and panel information are within the range of the second preset parameters but not within the range of the first preset parameters, a reminder verification first state is generated, and the corresponding parameter is marked as the reminder verification first state.

[0122] S830. When it is determined that the parameters in the demand parameter information, integrated circuit product characteristic parameters and stack-up and panel information are outside the range of the second preset parameters, a forced modification first state is generated, and the corresponding parameter is marked as the forced modification first state.

[0123] In some embodiments, steps S810 to S830 specifically involve: inputting parameter information, and then providing feedback on the detection status based on the judgment result determined by comparing the parameter information with a preset parameter information range.

[0124] In some embodiments, steps S810 to S830 are specifically implemented by inputting demand parameter information, integrated circuit product characteristic parameters, and stacking and panelization information parameters, and determining the range of the parameters. For example, when the parameters in the demand parameter information, integrated circuit product characteristic parameters, and stacking and panelization information are within a first preset parameter range, feedback is given by detecting a first state. The detection of the first state indicates that processing operations can be performed.

[0125] When the requirement parameters, integrated circuit product characteristic parameters, and stack-up and panelization information parameters are within the first and second preset parameter ranges, a feedback reminder to verify the first state is issued. This reminder indicates that some parameters may need modification, but the minimum processing requirements can be met without modification. When the requirement parameters, integrated circuit product characteristic parameters, and stack-up and panelization information parameters are outside the second preset parameter range, a forced modification of the detection state is issued, and the system is locked until the detection passes, preventing the next step from proceeding.

[0126] Understandably, the primary purpose of Level 1 parameter verification is to check the conformity of design capabilities and the degree of design standardization, and to check for issues such as design errors, designs exceeding processing capabilities, or design anomalies.

[0127] It is also understood that this embodiment... Figure 8 The order of steps S810 to S830 is not specifically limited, and the order of steps can be adjusted or some steps can be reduced or added according to actual needs.

[0128] In some embodiments, each parameter has a corresponding first preset parameter range and a second preset parameter range, and the first preset parameter range is a subset of the second preset parameter range. For example, for overlay information, the first preset parameter range is [A1, B1], where B1 is greater than A1, and the second preset parameter range is [C1, D1], where D1 is greater than C1, and A1 is greater than C1, D1 is greater than B1. The order on the coordinate axis is: C1->A1->B1->D1. When a parameter in the overlay information is within the parameter range [A1, B1], feedback is provided indicating that the first state can be detected, signifying that the next operation can proceed. When a parameter in the overlay information is within the parameter range [C1, A1) or (B1, D1], feedback is provided reminding the user to verify the first state, indicating that manual verification is required before proceeding to the next operation. When a parameter in the overlay information is within a parameter range less than C1 or greater than D1, feedback is provided forcibly modifying the first state, indicating that manual modification is required before proceeding to the next operation. A1, B1, C1, and D1 can be set according to actual needs.

[0129] In one embodiment, reference is made to Figure 9 Integrated circuit engineering data processing includes automated graphics processing. Integrated circuit engineering data processing methods also include the following steps: S910. Obtain the processing parameters of the production equipment.

[0130] S920. Select optimized parameters from the preset processing database based on the processing parameters of the production equipment.

[0131] S930. Modularly adapt the integrated circuit processing information according to the optimized parameters to obtain the integrated circuit adaptation information corresponding to the processing parameters of the production equipment.

[0132] In one embodiment, after obtaining the processing parameters of the production equipment, the processing parameters of the production equipment are matched with the parameters in the preset processing database to select the optimized parameters. Then, based on the actual capabilities of each manufacturer, the optimized parameters, and the integrated circuit processing information, modular judgment and matching are performed to obtain integrated circuit adaptation information.

[0133] In one embodiment, to further improve processing accuracy and efficiency, secondary parameter verification is performed on the aforementioned integrated circuit adaptation information, referring to... Figure 10The steps for secondary parameter verification include: Step S1010: When it is determined that each parameter in the integrated circuit adaptation information is within the range of the third preset parameters, a second pass detection state is generated.

[0134] Step S1020: When it is determined that each parameter in the integrated circuit adaptation information is within the fourth preset parameter range but not within the third preset parameter range, a second reminder verification state is generated, and the corresponding parameter is marked as the second reminder verification state.

[0135] Step S1030: When it is determined that each parameter in the integrated circuit adaptation information is outside the range of the fourth preset parameter, a second forced modification state is generated, and the corresponding parameter is marked as the second forced modification state.

[0136] In some embodiments, steps S1010 to S1030 specifically involve: inputting parameter information, and then providing feedback on the detection status based on the judgment result of comparing the parameter information with a preset parameter information range. For example, inputting each parameter from the integrated circuit adaptation information and determining the range within which the parameters fall.

[0137] For example, when the parameters in the integrated circuit adaptation information are within the third preset parameter range, feedback indicates that the second state has been detected, and processing can proceed based on the characteristics of the second state. When the parameters in the integrated circuit adaptation information are between the third and fourth preset parameter ranges, feedback prompts to verify the second state. This reminder to verify the second state indicates that some parameters may need to be modified, but the minimum processing requirements can be met without modification. When the parameters in the integrated circuit adaptation information are outside the fourth preset parameter range, feedback forces a modification to the detection state, and the system locks itself until the detection passes, preventing the next step from proceeding.

[0138] It is also understood that this embodiment... Figure 10 The order of steps S1010 to S1030 is not specifically limited, and the order of steps can be adjusted or some steps can be reduced or added according to actual needs.

[0139] In some embodiments, each parameter has a corresponding third preset parameter range and a fourth preset parameter range, and the third preset parameter range is a subset of the fourth preset parameter range. For example, for overlay information, the third preset parameter range is [A2, B2], where B2 is greater than A2, and the fourth preset parameter range is [C2, D2], where D2 is greater than C2, and A2 is greater than C2, D2 is greater than B2. The order on the coordinate axis is: C2->A2->B2->D2. When a parameter in the overlay information is within the parameter range [A2, B2], feedback is provided indicating that the next step can be performed by detecting the second state. When a parameter in the overlay information is within the parameter range [C2, A2) or (B2, D2], feedback is provided reminding the user to verify the second state, indicating that manual verification is required before proceeding to the next step. When a parameter in the overlay information is within a parameter range less than C2 or greater than D2, feedback is provided forcibly modifying the second state, indicating that manual modification is required before proceeding to the next step. A2, B2, C2, and D2 can be set according to actual needs.

[0140] Understandably, the secondary parameter verification process is primarily used for self-calibration of the correctness of the generated integrated circuit processing information. Essentially, it involves standardizing and calibrating the generated integrated circuit processing information. Its preset rules differ from those of the primary parameter verification (reflected in the difference between the parameters and the preset parameter ranges), and its calibration purpose also differs, focusing on the correctness of the processing quality. Both the primary and secondary parameter verification processes employ pre-screening rules and automated verification, representing crucial steps in improving the quality of engineering data processing.

[0141] In one embodiment, the overall implementation steps of this solution are as follows: Step 1: Obtain initial engineering data and requirement parameter information, and perform standardized transformation. The initial engineering data includes integrated circuit data files designed using EDA software, and the requirement parameter information includes at least one of the following: panel quantity information, MARK point coordinate information, tooling information, or product parameter information. Based on preset standardization rules, the initial engineering data is standardized to obtain standardized engineering data.

[0142] Step 2: Obtain auxiliary standardized data, which includes at least one of the following: irregular groove / hole data, irregular hole data, dense hole data, or resin plug hole data. Obtain auxiliary definition rules; perform standardized data transformation on the auxiliary data according to the auxiliary definition rules to obtain auxiliary standardized data; update the standardized engineering data using the auxiliary standardized data.

[0143] Step 3: Extract integrated circuit product characteristic parameters, which include at least one of the following: impedance information, linewidth information, BGA information, via density information, aspect ratio information, dielectric layer thickness information, copper layer information, solder mask information, and board thickness information. Obtain the preset parameter extraction rules corresponding to the integrated circuit product characteristic parameters. The preset parameter extraction rules include: parameter range and parameter identifier; locate the parameters in standardized engineering data based on the parameter identifier to obtain the position information of each integrated circuit product characteristic parameter in the standardized engineering data; extract the integrated circuit product characteristic parameters located within the parameter range based on the position information.

[0144] Step 4: Calculate the stack-up and panelization information. The parameters for this information include: impedance type, impedance accuracy, board thickness accuracy, dielectric information, and linewidth accuracy. Impedance accuracy is obtained from the impedance information, linewidth information, and BGA information; linewidth accuracy is obtained from the board thickness information, copper layer information, via density information, and aspect ratio information; dielectric information is obtained from the impedance information and dielectric layer thickness information; and board thickness accuracy is obtained from the linewidth accuracy, board thickness information, copper layer information, solder mask information, and dielectric information.

[0145] Step 5: Primary Parameter Detection and Feedback. Primary parameter detection is performed on the stack-up and panelization information, integrated circuit product characteristic parameters, and requirement parameters. Specifically, primary parameter detection includes: detecting parameters in the requirement parameters, integrated circuit product characteristic parameters, and stack-up and panelization information. When a parameter in the stack-up and panelization information is within a first preset parameter range, a "pass" status is generated. When a parameter in the requirement parameters, integrated circuit product characteristic parameters, and stack-up and panelization information is within a second preset parameter range but not within the first preset parameter range, a "reminder verification" status is generated, and the corresponding parameter is marked as being in the "reminder verification" status. When a parameter in the requirement parameters, integrated circuit product characteristic parameters, and stack-up and panelization information is outside the second preset parameter range, a "forced modification" status is generated, and the corresponding parameter is marked as being in the "forced modification" status.

[0146] Step Six: Calculate the integrated circuit manufacturing information, which includes one or more of the following: panel information, edge sealing information, stack-up information, process flow information, manufacturing parameter information, processing tool information for each layer, and material information. The panel information and edge sealing information are generated based on the panel quantity information and MARK point coordinates. Material information is generated based on the panel information, stack-up information, tool information, and product characteristic parameter information. Process flow information is generated based on the panel information, stack-up information, tool information, product characteristic parameter information, and material information. Manufacturing parameter information is generated based on the panel information, stack-up information, tool information, product characteristic parameter information, and process flow information. Processing tool information for each layer is generated based on the product characteristic parameter information, process flow information, tool information, and material information.

[0147] Step 7: Calculate the integrated circuit adaptation information and obtain the processing parameters of the production equipment; select optimized parameters in the preset processing database according to the processing parameters of the production equipment; perform modular adaptation of the integrated circuit processing information according to the optimized parameters to obtain the integrated circuit adaptation information corresponding to the processing parameters of the production equipment.

[0148] Step 8: Secondary parameter detection and feedback of detection status. Secondary parameter verification is performed on the integrated circuit adaptation information. The steps of secondary parameter verification include: When it is determined that each parameter in the integrated circuit adaptation information is within the third preset parameter range, a second pass detection status is generated. When it is determined that each parameter in the integrated circuit adaptation information is within the fourth preset parameter range but not within the third preset parameter range, a second reminder verification status is generated, and the corresponding parameter is marked as the second reminder verification status. When it is determined that each parameter in the integrated circuit adaptation information is outside the fourth preset parameter range, a second forced modification status is generated, and the corresponding parameter is marked as the second forced modification status.

[0149] Step 9: Output a list of tools required for each process step.

[0150] Step 10: Output the integrated circuit manufacturing and processing data list.

[0151] Step 11: Packaging tool list and integrated circuit manufacturing and processing data list.

[0152] The technical solution provided in this application involves acquiring initial engineering data and requirement parameter information, then performing standardized data conversion on the initial engineering data based on preset standardization rules to obtain standardized engineering data. Next, parameters are extracted from the standardized engineering data based on preset parameter extraction rules to obtain integrated circuit product characteristic parameters. Then, stack-up and panelization information is generated based on the requirement parameter information, integrated circuit product characteristic parameters, and stack-up and panelization information. Finally, integrated circuit processing information is generated based on the requirement parameter information, integrated circuit product characteristic parameters, and stack-up and panelization information. Therefore, the beneficial effects are that it can acquire complete and accurate integrated circuit design parameters, convert them into standardized data format, and generate product characteristic parameters by matching them with the system's rule base.

[0153] This application also provides an integrated circuit engineering data processing system that can implement the above-described integrated circuit engineering data processing method, see reference. Figure 11 The system includes: The data acquisition module 1110 is used to acquire initial engineering data and requirement parameter information. The initial engineering data is an integrated circuit data file designed using EDA software.

[0154] The data conversion module 1120 is used to perform standardized data conversion on the initial engineering data based on preset standardization rules to obtain standardized engineering data.

[0155] The parameter extraction module 1130 is used to extract parameters from standardized engineering data based on preset parameter extraction rules to obtain characteristic parameters of integrated circuit products.

[0156] The data processing module 1140 is used to generate stack-up and panelization information based on the demand parameter information and the characteristic parameters of the integrated circuit product.

[0157] The primary parameter verification module 1150 is used to perform primary parameter detection on the required parameter information, the integrated circuit product characteristic parameters, and the stack-up and panel information.

[0158] The integrated circuit processing information generation module 1160 is used to generate integrated circuit processing information based on demand parameter information, integrated circuit product characteristic parameters, and stack-up and panelization information.

[0159] The secondary parameter verification module 1170 is used to perform secondary parameter verification on the generated integrated circuit adaptation information.

[0160] The specific implementation of the integrated circuit engineering data processing system in this embodiment is basically the same as the specific implementation of the integrated circuit engineering data processing method described above, and will not be repeated here.

[0161] This invention also provides an electronic device, comprising: At least one memory; At least one processor; At least one program; The program is stored in a memory, and the processor executes the at least one program to implement the integrated circuit engineering data processing method described above. The electronic device can be any smart terminal, including mobile phones, tablets, personal digital assistants (PDAs), and in-vehicle computers.

[0162] Please see Figure 12 , Figure 12 The hardware structure of an electronic device according to another embodiment is illustrated. The electronic device includes: The processor 1201 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present invention. The memory 1202 can be implemented in the form of ROM (Read Only Memory), static storage device, dynamic storage device, or RAM (Random Access Memory). The memory 1202 can store the operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 1202 and is called and executed by the processor 1201 to execute the integrated circuit engineering data processing method of the embodiments of this invention. The input / output interface 1203 is used to implement information input and output; Communication interface 1204 is used to enable communication and interaction between this device and other devices. Communication can be achieved via wired means (e.g., USB, Ethernet cable) or wireless means (e.g., mobile network, Wi-Fi, Bluetooth). Bus 1205 transmits information between various components of the device (e.g., processor 1201, memory 1202, input / output interface 1203, and communication interface 1204); The processor 1201, memory 1202, input / output interface 1203 and communication interface 1204 are connected to each other within the device via bus 1205.

[0163] This application embodiment also provides a storage medium, which is a computer-readable storage medium, storing a computer program that, when executed by a processor, implements the above-described integrated circuit engineering data processing method.

[0164] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory and non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof. This application provides an integrated circuit engineering data processing method and system, wherein the scheme and system of this application provide a structured and standardized definition and design for the processing of integrated circuit engineering data, reducing efficiency loss by verifying each operation module and correcting it in a timely manner. In addition, the automation function greatly improves the processing efficiency of engineering data. Furthermore, the system's primary and secondary firewalls effectively avoid quality problems caused by design flaws and front-end engineer errors, thereby completely controlling the quality of integrated circuit engineering.

[0165] The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0166] Those skilled in the art will understand that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, storage device storage or other magnetic storage systems, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0167] It should also be understood that the various implementation methods provided in this application can be combined arbitrarily to achieve different technical effects. The above is a detailed description of the preferred embodiments of this application, but this application is not limited to the above-described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application.

Claims

1. A method for processing integrated circuit engineering data, characterized in that, include: Acquire initial engineering data and requirement parameter information, wherein the initial engineering data is an integrated circuit data file designed using EDA software; The initial engineering data is standardized by performing a standardized data transformation based on preset standardization rules to obtain standardized engineering data. Based on preset parameter extraction rules, parameters are extracted from the standardized engineering data to obtain integrated circuit product characteristic parameters. The integrated circuit product characteristic parameters include one or more of the following: impedance information, linewidth information, BGA information, dense via information, aspect ratio information, dielectric layer thickness information, copper layer information, solder mask information, and board thickness information. Based on the required parameter information and the characteristic parameters of the integrated circuit product, stack-up and panel information is generated. The parameters of the stack-up and panel information include one or more of the following: impedance type information, impedance accuracy, board thickness accuracy, dielectric information, and linewidth accuracy. The system performs first-level parameter detection on the demand parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information. When a parameter in the stack-up and panelization information is determined to be within a first preset parameter range, a first pass detection state is generated. When a parameter in the demand parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information is determined to be within a second preset parameter range but not within the first preset parameter range, a first reminder verification state is generated, and the corresponding parameter is marked as a first reminder verification state. The first preset parameter range is a subset of the second preset parameter range. When a parameter in the demand parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information is determined to be outside the second preset parameter range, a first forced modification state is generated, and the corresponding parameter is marked as a first forced modification state. Based on the demand parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information, integrated circuit processing information is generated; The step of generating stack-up and panel information based on the required parameter information and the integrated circuit product characteristic parameters includes: obtaining the impedance accuracy and impedance type information based on the impedance information, the linewidth information, and the BGA information; obtaining the linewidth accuracy based on the board thickness information, the copper layer information, the dense via information, and the aspect ratio information; obtaining the dielectric information based on the impedance information and the dielectric layer thickness information; and obtaining the board thickness accuracy based on the linewidth accuracy, the board thickness information, the copper layer information, the solder mask information, and the dielectric information.

2. The integrated circuit engineering data processing method according to claim 1, characterized in that, The preset standardization rules include: line layer conversion rules, solder mask layer conversion rules, character layer conversion rules, nettop layer conversion rules, outline layer conversion rules, and drill layer conversion rules; the standardization data transformation of the initial engineering data based on the preset standardization rules to obtain standardized engineering data includes: The line layer in the initial engineering data is converted according to the line layer conversion rules to obtain standard line layer data; The solder resist layer in the initial engineering data is converted according to the solder resist layer conversion rule to obtain standard solder resist layer data; The character layers in the initial engineering data are converted according to the character layer conversion rules to obtain standard character layer data; The shape layer in the initial engineering data is converted according to the shape layer conversion rules to obtain standard shape layer data; The borehole layers in the initial engineering data are converted according to the borehole layer conversion rules to obtain standard borehole layer data; The network surface in the initial engineering data is transformed according to the network surface transformation rules to obtain standard network surface data; The standardized engineering data is obtained based on the standard line layer data, the standard solder mask layer data, the standard character layer data, the standard nettop layer data, the standard outline layer data, and the standard bore layer data.

3. The integrated circuit engineering data processing method according to claim 2, characterized in that, The step of extracting parameters from the standardized engineering data based on preset parameter extraction rules to obtain integrated circuit product characteristic parameters includes: Obtain the preset parameter extraction rule corresponding to the characteristic parameters of the integrated circuit product, wherein the preset parameter extraction rule includes: parameter range and parameter identifier; Based on the parameter identifier, the parameter is located in the standardized engineering data to obtain the location information of each integrated circuit product characteristic parameter in the standardized engineering data; Based on the location information, extract the characteristic parameters of the integrated circuit product that are within the parameter range.

4. The integrated circuit engineering data processing method according to claim 1, characterized in that, The required parameter information includes one or more of the following: panel quantity information, MARK point coordinate information, tool information, or product parameter information; the integrated circuit processing information includes one or more of the following: panel information, edge sealing information, stack-up information, process flow information, processing parameter information, processing tool information for each layer, and material information; integrated circuit processing information is generated based on the required parameter information, the integrated circuit product characteristic parameters, and the stack-up and panel information, including: The panel information and edge sealing information are generated based on the panel quantity information and the MARK point coordinate information; The material information is generated based on the panel information, the stacking information, the cutting tool information, and the product characteristic parameter information; The process flow information is generated based on the panel information, the stacking information, the tool information, the product characteristic parameter information, and the material information; The processing parameter information is generated based on the panel information, the stacking information, the tool information, the product characteristic parameter information, and the process flow information; The processing tool information for each layer is generated based on the product characteristic parameters, the process flow information, the tool information, and the material information.

5. The integrated circuit engineering data processing method according to claim 1, characterized in that, The initial engineering data includes auxiliary data, which may include one or more of the following depending on the design: irregular groove data, irregular hole data, special surface treatment layer, dense hole data, or resin plugging data; after standardizing the initial engineering data based on preset standardization rules to obtain standardized engineering data, the method further includes: Obtain auxiliary definition rules; The auxiliary data is standardized and transformed according to the auxiliary definition rules to obtain auxiliary standardized data. The standardized engineering data is updated using the auxiliary standardized data.

6. The integrated circuit engineering data processing method according to any one of claims 1 to 5, characterized in that, After generating integrated circuit processing information based on the demand parameter information, the integrated circuit product characteristic parameters, and the stacking and panelization information, the method further includes: Obtain the processing parameters of the production equipment; Optimization parameters are selected from the preset processing database based on the processing parameters of the production equipment; Based on the optimized parameters, the integrated circuit processing information is modularly adapted to obtain the integrated circuit adaptation information corresponding to the processing parameters of the production equipment.

7. The integrated circuit engineering data processing method according to claim 6, characterized in that, After obtaining the integrated circuit adaptation information corresponding to the processing parameters of the production equipment, the method further includes: The generated integrated circuit adaptation information is subjected to secondary parameter verification; When it is determined that each parameter in the integrated circuit adaptation information is within the range of the third preset parameter, a second detection pass state is generated. When it is determined that each parameter in the integrated circuit adaptation information is within the fourth preset parameter range but not within the third preset range, a reminder verification second state is generated, and the corresponding parameter is marked as the reminder verification second state. The third preset parameter range is a subset of the fourth preset parameter range. When it is determined that each parameter in the integrated circuit adaptation information is outside the range of the fourth preset parameter, a forced modification second state is generated, and the corresponding parameter is marked as the forced modification second state.

8. An integrated circuit engineering data processing system, characterized in that, include: The data acquisition module is used to acquire initial engineering data and requirement parameter information, wherein the initial engineering data is an integrated circuit data file designed using EDA software; The data conversion module is used to perform standardized data conversion on the initial engineering data based on preset standardization rules to obtain standardized engineering data; The parameter extraction module is used to extract parameters from the standardized engineering data based on preset parameter extraction rules to obtain integrated circuit product characteristic parameters. The integrated circuit product characteristic parameters include one or more of the following: impedance information, linewidth information, BGA information, dense via information, aspect ratio information, dielectric layer thickness information, copper layer information, solder mask information, and board thickness information. The data processing module is used to generate stack-up and panelization information based on the demand parameter information and the integrated circuit product characteristic parameters. The parameters of the stack-up and panelization information include one or more of the following: impedance type information, impedance accuracy, board thickness accuracy, dielectric information, and linewidth accuracy. The module performs first-level parameter detection on the demand parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information. When a parameter in the stack-up and panelization information is determined to be within a first preset parameter range, a "pass detection first state" is generated. When a parameter in the demand parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information is determined to be within a second preset parameter range but not within the first preset parameter range, a "reminder verification first state" is generated, and the corresponding parameter is identified as a "reminder verification first state." The first preset parameter range is a subset of the second preset parameter range. When a parameter in the demand parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information is determined to be outside the second preset parameter range, a "forced modification first state" is generated, and the corresponding parameter is identified as a "forced modification first state." An integrated circuit processing information generation module is used to generate integrated circuit processing information based on the demand parameter information, the integrated circuit product characteristic parameters, and the stack-up and panelization information. The step of generating stack-up and panel information based on the required parameter information and the integrated circuit product characteristic parameters includes: obtaining the impedance accuracy and impedance type information based on the impedance information, the linewidth information, and the BGA information; obtaining the linewidth accuracy based on the board thickness information, the copper layer information, the dense via information, and the aspect ratio information; obtaining the dielectric information based on the impedance information and the dielectric layer thickness information; and obtaining the board thickness accuracy based on the linewidth accuracy, the board thickness information, the copper layer information, the solder mask information, and the dielectric information.

9. An integrated circuit engineering data processing device, characterized in that, include: At least one processor; And, a memory communicatively connected to the at least one processor; The processor executes the method as described in any one of claims 1 to 7 by calling a computer program stored in the memory.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions for causing a computer to perform the method as described in any one of claims 1 to 7.

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