A method for manufacturing a high-voltage micro light emitting device

Abstract

The application provides a preparation method of a high-voltage micro light-emitting device, which is used for realizing the connection of a plurality of LED units isolated from each other by a channel on the surface of a substrate; wherein the bridge electrode extends to the recess exposed part of the LED unit and the transparent conductive layer of the adjacent LED unit by being stacked on the glass insulation layer, so as to be arranged in series with the two adjacent LED units; the first passivation layer is etched to form an opening to expose the mesa, so that the effective area of the transparent conductive layer can be accurately controlled, and the light-emitting area of each LED unit of the high-voltage micro light-emitting device is ensured to be consistent; in addition, the first passivation layer can also be used as a current blocking layer to realize uniform current distribution and prevent current aggregation of the LED unit. Meanwhile, the glass insulation layer is formed in the channel to reduce the height difference of the bridge electrode extending to the two LED units, and since the glass system has good mechanical structure and chemical stability, the problem of bridge metal disconnection can be well improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of light emitting diodes, in particular to a preparation method of high-voltage micro light emitting device. BACKGROUND

[0002] With the rise of LED chip manufacturing industry and the development of scientific research field, the new generation of chips are required to have high performance, low cost and more focus on the stability of the device, so high-voltage flip-chip LED chip emerges as the times require, high-voltage flip-chip LED can realize multi-unit interconnection of power chip, effectively reduce the driving current, at the same time, the chip can be directly driven by high voltage, which can save the driving cost and improve the overall life of the light source; due to the flip-chip structure, reasonable electrode design can improve the light reflection efficiency, reduce the current from the aggregation effect, and realize wireless welding, which is good for heat dissipation and helps to reduce cost and light decay.

[0003] However, in the prior art, when the bridge electrode is evaporated to realize the interconnection of the two adjacent LED units, due to the large inclination angle of the mesa sidewall, the evaporation is difficult and the evaporation thickness is insufficient, so that the bridge electrode is easy to crack, which leads to large interconnection resistance between the sub-LED units of the high-voltage LED chip, so that the high-voltage LED chip is invalid; even the bridge electrode is directly disconnected, which makes the high-voltage LED chip unable to emit light.

[0004] At the same time, in the prior art, SiO2 is usually used as the passivation layer, however, as the passivation layer, the water vapor isolation ability of SiO2 is general, and it is easy to fail in long-term aging in high-humidity environment, which leads to the decrease of leakage parameter VF4 under micro-current application.

[0005] In addition, in the application of small-size LED chip, when the transparent conductive layer is etched through photoresist mask, the etching line width of the transparent conductive layer is not easy to control due to the diffraction of photoetching, which finally affects the effective light emitting area of the transparent conductive layer.

[0006] Therefore, the present application provides a preparation method of high-voltage micro light emitting device. SUMMARY

[0007] The present application provides a preparation method of high-voltage micro light emitting device to solve the problems of poor reliability of bridge electrode and poor etching control precision of transparent conductive layer in high-voltage micro light emitting device.

[0008] In order to achieve the above purpose, the technical scheme adopted by the present application is as follows:

[0009] A preparation method of high-voltage micro light emitting device is used to realize the connection of a plurality of LED units isolated by channels on the surface of a substrate, and the preparation method comprises the following steps:

[0010] S01, providing an epitaxial structure, the epitaxial structure comprising a substrate and an epitaxial stack disposed on a surface of the substrate, the epitaxial stack comprising at least a first type semiconductor layer, an active region and a second type semiconductor layer stacked in sequence on the surface of the substrate;

[0011] S02, forming a plurality of recesses and mesas by etching the epitaxial stack to expose part of the first type semiconductor layer, the recesses and mesas being oppositely disposed;

[0012] S03, forming a plurality of LED units spaced apart from each other by a through channel by deep etching the epitaxial stack to expose the surface of the substrate;

[0013] S04, making a first passivation layer, the first passivation layer covering each of the LED units and exposing at least part of the surface of the recess and the mesa corresponding to each of the LED units, respectively;

[0014] S05, depositing a transparent conductive layer on the exposed part of each of the mesas;

[0015] S06, forming a vitrification insulation layer in the through channel;

[0016] S07, making a bridge electrode, the bridge electrode extending to the exposed part of the recess of the LED unit and the transparent conductive layer of the adjacent LED unit by being laminated on the vitrification insulation layer to connect the two adjacent LED units;

[0017] S08, depositing a first electrode and a second electrode, the first electrode being disposed at one end of the micro light emitting device by being laminated on the exposed part of the recess, and the second electrode being disposed at the other end of the micro light emitting device by being laminated on the surface of the transparent conductive layer.

[0018] Preferably, the vitrification insulation layer is formed by curing the photoresist by reducing the ambient temperature.

[0019] Preferably, the making of the vitrification insulation layer specifically comprises:

[0020] First, spin-coating an adhesive on the surface of each of the LED units and performing a soft-baking process;

[0021] Next, spin-coating a photoresist and retaining only the photoresist in the through channel by an exposure and development process;

[0022] Finally, curing the photoresist.

[0023] Preferably, the photoresist is cured gradually by adjusting the ambient temperature multiple times.

[0024] Preferably, the photoresist layer comprises a BCB photoresist.

[0025] Preferably, the LED unit comprises a flip-chip LED unit, further comprising an insulating mirror covering each of the LED unit and the bridge electrode, and holding the first electrode, and another LED unit having a second electrode for external contact.

[0026] Preferably, a second passivation layer is further provided on the surface of the LED unit, the second passivation layer being provided on the side surface of the insulating mirror away from the LED unit, and the first electrode and the second electrode being extended by being laminated on the second passivation layer.

[0027] Preferably, the insulating mirror and the second passivation layer are etched by the same ICP etching process to expose the recess and the transparent conductive layer, thereby realizing the deposition points of the first electrode and the second electrode.

[0028] Preferably, the ICP etching process is realized by adjusting the gas source in the ICP etching process.

[0029] Preferably, the ICP etching process uses CH x F y as the etching gas and O2 / Ar as the auxiliary gas, wherein X+Y≤4; and the etching gas, the auxiliary gas, and the values of x and y are adjusted to realize the ICP etching process.

[0030] Preferably, a metal electrode layer is further provided on the surface of the transparent conductive layer, and the second electrode is in contact with the metal electrode layer.

[0031] Preferably, the first passivation layer and the second passivation layer comprise an insulating material layer with high thermal conductivity.

[0032] Preferably, the first passivation layer and the second passivation layer comprise one or more of an AlN layer, a BN layer, and an Al2O3 layer.

[0033] The preparation method of the high-voltage micro light emitting device provided by the application can realize the pre-etching opening of the first passivation layer to expose the mesa, so that the effective area of the transparent conductive layer can be accurately controlled, and the light emitting area of each LED unit of the high-voltage micro light emitting device is consistent. In addition, the first passivation layer can also serve as a current blocking layer to realize uniform current distribution and prevent current aggregation of the LED unit. At the same time, the glass insulation layer is formed in the channel to reduce the height difference of the bridge electrode extending to the two LED units, and the glass system has good mechanical structure and chemical stability, which can well improve the problem of bridge metal disconnection.

[0034] Secondly, the glass insulation layer is formed by reducing the environmental temperature to solidify the photoresist layer, which is low in cost and easy to realize while ensuring the above technical effects. Further, the photoresist can be gradually solidified by adjusting the environmental temperature multiple times, which can better ensure the mechanical structure and chemical stability of the glass insulation layer.

[0035] Then, the first passivation layer includes an insulating material layer with high thermal conductivity, which can improve the heat dissipation of the bridge electrode and prevent breakdown failure at the bridge.

[0036] In addition, the insulating mirror and the second passivation layer are etched by the same ICP etching process to keep the recess and the transparent conductive layer exposed, and then the deposition points of the first electrode and the second electrode are realized. Specifically, CH x F y As the etching gas, O2 / Ar as the auxiliary gas, the proportion of the etching gas and the auxiliary gas and the values of x and y can be adjusted to realize the multi-channel ICP etching process, so as to achieve the effect of gentle etching angle and improve the adhesion of the first electrode and the second electrode.

[0037] Finally, the first electrode and the second electrode can be extended by being stacked on the second passivation layer, and the second passivation layer includes one or more of AlN layer, BN layer and Al2O3 layer with high thermal conductivity, so as to improve the adhesion of the electrode and dissipate heat from the electrode through the second passivation layer. BRIEF DESCRIPTION OF DRAWINGS

[0038] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0039] Figure 1 This is a schematic diagram of the high-voltage micro light-emitting device provided in Embodiment 1 of the present invention;

[0040] Figures 2.1 to 2.9 This is a schematic diagram of the structure corresponding to the steps of the fabrication method of the high-voltage micro light-emitting device provided in Embodiment 1 of the present invention;

[0041] Figure 3 This is a schematic diagram of the high-voltage micro light-emitting device provided in Embodiment 2 of the present invention;

[0042] Explanation of symbols in the diagram:

[0043] 1. Substrate; 2. Type I semiconductor layer; 3. Active region; 4. Type II semiconductor layer; 5. Channel; 6. First passivation layer; 7. Transparent conductive layer; 8. Glass-transformed insulating layer; 9. Bridging electrode; 10. Insulating mirror; 11. Second passivation layer; 12. Second electrode; 13. First electrode; 14. Metal electrode layer; 15. Groove; 16. Mesa. Detailed Implementation

[0044] To make the content of this invention clearer, the following description, in conjunction with the accompanying drawings, further illustrates the invention. This invention is not limited to this specific embodiment. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.

[0045] Example 1

[0046] A method for fabricating a high-voltage micro-light-emitting device is disclosed, which enables the connection of several LED units isolated from each other by channels on the surface of a substrate. A schematic diagram of the high-voltage micro-light-emitting device can be found in the following reference. Figure 1 The preparation method includes the following steps:

[0047] S01, such as Figure 2.1 As shown, an epitaxial structure is provided, the epitaxial structure including a substrate 1 and an epitaxial stack disposed on the surface of the substrate 1, the epitaxial stack including at least a first type semiconductor layer 2, an active region 3 and a second type semiconductor layer 4 sequentially stacked on the surface of the substrate 1;

[0048] It should be noted that the type of substrate 1 is not limited in the micro light emitting element of the present embodiment, for example, the substrate 1 can be but is not limited to a sapphire substrate 1, a silicon substrate 1, etc.

[0049] It is worth mentioning that in the above embodiment, the type of the first type semiconductor layer 2, the active region 3 and the second type semiconductor layer 4 of the epitaxial stack can also be not limited in the micro light emitting element of the present embodiment, for example, the first type semiconductor layer 2 can be but is not limited to a gallium nitride layer, and accordingly, the second type semiconductor layer 4 can be but is not limited to a gallium nitride layer.

[0050] S02, as shown in the figure, by etching the epitaxial stack, part of the first type semiconductor layer 2 is exposed, thereby forming a plurality of grooves 15 and mesas 16, the grooves 15 and the mesas 16 are arranged opposite to each other; Figure 2.2

[0051] S03, as shown in the figure, by deep etching the epitaxial stack to expose the surface of the substrate 1, a plurality of LED units are formed which are arranged at intervals by the channels 5; Figure 2.3

[0052] It should be emphasized that in the present embodiment, in order to highlight the technical points of the present application, only three LED units in the micro light emitting device are shown in the figure, and in actual use, the surface of the substrate 1 can contain thousands of LED units, which is determined according to the situation, and the present application does not limit it.

[0053] S04, as shown in the figure, a first passivation layer 6 is made, the first passivation layer 6 covers each of the LED units, and at least part of the surface of each of the grooves 15 and the mesas 16 corresponding to each of the LED units is exposed; Figure 2.4

[0054] On the basis of the above embodiment, in one embodiment of the present application, the first passivation layer 6 includes an insulating material layer with high thermal conductivity.

[0055] Preferably, the first passivation layer 6 includes one or more of an AlN layer, a BN layer, and an Al2O3 layer.

[0056] S05, as shown in the figure, a transparent conductive layer 7 is deposited on the exposed part of each of the mesas 16; Figure 2.5

[0057] It should be noted that in the present embodiment, the material of the transparent conductive layer 7 can be ITO, ZnO, IWO, AZO, etc. which is determined according to the situation, and the present application does not limit it.

[0058] ​​​​Based on the above embodiments, in one embodiment of this application, the transparent conductive layer 7 extends to the surface of the first passivation layer, so that it acts as a current blocking layer to achieve uniform current distribution and prevent current accumulation in the LED unit.

[0059] S06, such as Figure 2.6 As shown, a glassy insulating layer 8 is formed within the channel 5;

[0060] Based on the above embodiments, in one embodiment of this application, the glass-transformed insulating layer 8 is formed by lowering the ambient temperature to cure the photoresist.

[0061] The fabrication of the glass-transformed insulating layer 8 specifically includes:

[0062] First, an adhesive is spin-coated onto the surface of each LED unit and then subjected to a soft-bake treatment.

[0063] Next, photoresist is spin-coated, and only the photoresist located in the channel 5 is retained through exposure and development processes;

[0064] Finally, the photoresist is cured.

[0065] Based on the above embodiments, in one embodiment of this application, the photoresist layer includes BCB photoresist.

[0066] Based on the above embodiments, in one embodiment of this application, the photoresist is progressively cured by adjusting the ambient temperature multiple times. Specifically, if the number of curing times is n, then the curing temperature is T. n Then T n -T n-1 ≥50℃.

[0067] Based on the above embodiments, in one embodiment of this application, n=3, and the ambient temperature T1 corresponding to the first curing is preferably 150-200℃, and the curing time is 5-15 min ns.

[0068] The ambient temperature T2 corresponding to the second curing is preferably 180-230℃, and the curing time is 5-15 mins.

[0069] The ambient temperature T3 corresponding to the third curing is preferably 210-250℃, and the curing time is 5-15 mins.

[0070] It should be noted that this embodiment does not limit the specific range of the number of curing times n; similarly, the curing temperature corresponding to the third curing, fourth curing...nth curing is determined according to T. n -T n-1 The process can be performed at ≥50℃; this embodiment does not impose any limitations on this.

[0071] S07, such asFigure 2.7 As shown, a bridging electrode 9 is fabricated. The bridging electrode 9 extends to both ends of the exposed portion of the groove 15 of the LED unit and the transparent conductive layer 7 of the adjacent LED unit by being stacked on the glass insulating layer 8, so as to connect two adjacent LED units.

[0072] Based on the above embodiments, in one embodiment of this application, the bridging electrode 9 includes, but is not limited to, one or more combinations of metals such as Cr, Ni, Al, Ti, Pt, and Au.

[0073] Based on the above embodiments, in one embodiment of this application, a metal electrode layer 14 is further provided on the surface of the transparent conductive layer 7, so that the subsequently fabricated second electrode 12 forms contact with the corresponding metal electrode layer 14. Specifically, the metal electrode layer 14 can be deposited and photolithographically formed simultaneously with the bridging electrode 9. Specifically, the metal electrode layer 14 includes, but is not limited to, one or more combinations of metals such as Cr, Ni, Al, Ti, Pt, and Au.

[0074] S09, such as Figure 2.8 As shown, an insulating reflector 10 and a second passivation layer 11 are fabricated respectively.

[0075] Based on the above embodiments, in one embodiment of this application, the LED unit is a flip-chip LED unit, which further includes the insulating reflector 10, which covers each LED unit and the bridging electrode 9, and retains the first electrode 13, and another LED unit has a second electrode 12 for external contact. Specifically, the insulating reflector 10 includes, but is not limited to, a DBR reflector.

[0076] Based on the above embodiments, in one embodiment of this application, a second passivation layer 11 is further provided on the surface of the LED unit. The second passivation layer 11 is disposed on the side surface of the insulating reflector 10 opposite to the LED unit, so that subsequent electrodes can be extended by being stacked on the second passivation layer 11.

[0077] Based on the above embodiments, in one embodiment of this application, the insulating reflector 10 and the second passivation layer 11 are etched using the same ICP etching process to maintain the exposed portion of the groove 15 and the transparent conductive layer 7, thereby realizing the deposition sites of the first electrode 13 and the second electrode 12.

[0078] Based on the above embodiments, in one embodiment of this application, the ICP etching process is achieved by adjusting the gas source during the ICP etching process.

[0079] Based on the above embodiments, in one embodiment of this application, the ICP etching is performed using CHx F y The etching gas is used as the etching gas, and O2 / Ar is used as the auxiliary gas, wherein X+Y≤4; and the ICP etching process is achieved by adjusting the proportion of the etching gas and the auxiliary gas, as well as the x and y values.

[0080] Specifically, firstly, CHF3 is used as the etching process gas, and O2 is used as the auxiliary gas, and the proportions of CHF3 and O2 are adjusted to decrease in stages from high to low.

[0081] Next, the proportions of CHF3 and O2 were adjusted and gradually increased from low to high.

[0082] In one embodiment of this application, CHF3, O 2的 The gas ratio gradually decreases from 1:6 to 1:4 and then to 1:2; then it gradually increases from 1:2 to 1:4 and then to 1:6. This gradual change in the gas ratio is beneficial for a gentler etching angle for the insulating mirror 10 and the second passivation layer 11.

[0083] S10, such as Figure 2.9 As shown, a first electrode 13 and a second electrode 12 are deposited. The first electrode 13 is disposed at one end of the micro-light-emitting device by being stacked on the exposed portion of the groove 15, and the second electrode 12 is disposed at the other end of the micro-light-emitting device by being stacked on the surface of the transparent conductive layer 7.

[0084] Based on the above embodiments, in one embodiment of this application, the first electrode 13 and the second electrode 12 include, but are not limited to, one or more combinations of metals such as Cr, Ni, Al, Ti, Pt, Au, Sn, Ag, and Cu.

[0085] The preparation method of the high-voltage micro light emitting device provided by the application can realize the pre-etching opening of the first passivation layer 6 to expose the mesa 16, so that the effective area of the transparent conductive layer 7 can be precisely controlled, and the light emitting area of each LED unit of the high-voltage micro light emitting device is ensured to be consistent. In addition, the first passivation layer 6 can simultaneously serve as a current blocking layer to realize uniform current distribution and prevent current aggregation of the LED unit. At the same time, the glass insulation layer 8 is formed in the channel 5 to reduce the height difference of the bridge electrode 9 extending to the two LED units, and since the glass system has good mechanical structure and chemical stability, the problem of bridge metal disconnection can be well improved.

[0086] Secondly, the glass insulation layer 8 is formed by reducing the environmental temperature to solidify the photoresist layer, which has low cost and is easy to realize while ensuring the above technical effects. Further, the photoresist layer is gradually solidified by adjusting the environmental temperature multiple times, which can better ensure the mechanical structure and chemical stability of the glass insulation layer 8.

[0087] Then, the first passivation layer 6 includes an insulating material layer with high thermal conductivity, which can improve the heat dissipation of the bridge electrode 9 and prevent breakdown failure at the bridge.

[0088] In addition, the insulating mirror 10 and the second passivation layer 11 are etched by the same ICP etching process to keep the recess 15 and the exposed part of the transparent conductive layer 7, and further realize the deposition points of the first electrode 13 and the second electrode 12. Specifically, CH x F y As the etching gas, O2 / Ar as the auxiliary gas, the proportion of the etching gas and the auxiliary gas and the values of x and y can be adjusted to realize the multi-channel ICP etching process, so as to achieve the effect of gentle etching angle and improve the adhesion of the first electrode 13 and the second electrode 12.

[0089] Finally, the first electrode 13 and the second electrode 12 can be extended by being laminated on the second passivation layer 11, and the second passivation layer 11 includes one or more of an AlN layer, a BN layer, and an Al2O3 layer having a high thermal conductivity, so that the adhesion of the electrodes is improved, and the electrodes can be cooled by the second passivation layer 11.

[0090] Embodiment 2

[0091] The difference between this embodiment and Embodiment 1 is that the high-voltage micro light emitting device provided in this embodiment is a positive structure, so in this embodiment, the high-voltage micro light emitting device does not need to be provided with an insulating reflector on the surface of each LED unit, and the specific structure is as shown in Figure 3 The preparation method can refer to the preparation method shown in Embodiment 1 and omit the related steps of the insulating reflector.

[0092] Each of the embodiments in the specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.

[0093] It should also be noted that, in this document, the relationship terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the article or device including the above element.

[0094] The above description of the disclosed embodiments enables a person skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for fabricating a high-voltage micro-light-emitting device, used to connect several LED units isolated from each other by channels on a substrate surface, characterized in that, The preparation method comprises the following steps: S01, providing an epitaxial structure, the epitaxial structure comprising a substrate and an epitaxial stack arranged on the surface of the substrate, the epitaxial stack comprising at least a first type semiconductor layer, an active region and a second type semiconductor layer stacked in sequence on the surface of the substrate; S02, forming a plurality of grooves and mesas by etching the epitaxial stack to expose part of the first type semiconductor layer; S03, forming a plurality of LED units arranged at intervals by etching the epitaxial stack to expose the surface of the substrate; S04, forming a first passivation layer, the first passivation layer covering each of the LED units and exposing at least part of the surface of the groove and the mesa corresponding to each of the LED units; S05, depositing a transparent conductive layer on the exposed part of each of the mesas; S06, forming a vitrification insulation layer in the channel; S07, forming a bridge electrode, the bridge electrode extending to the groove exposed part of the LED unit and the transparent conductive layer of the adjacent LED unit by being stacked on the vitrification insulation layer to connect the two adjacent LED units; S08, depositing a first electrode and a second electrode, the first electrode being arranged at one end of the micro light emitting device by being stacked on the groove exposed part, and the second electrode being arranged at the other end of the micro light emitting device by being stacked on the surface of the transparent conductive layer; wherein the LED unit comprises a flip-chip structure LED unit, further comprising an insulating mirror covering each of the LED units and the bridge electrode, and retaining the first electrode, and another LED unit having a second electrode for external contact; a second passivation layer is further arranged on the surface of the LED unit, the second passivation layer being arranged on the side surface of the insulating mirror away from the LED unit, and the first electrode and the second electrode extending by being stacked on the second passivation layer.

2. The method of claim 1, wherein the micro-LED is a high voltage micro-LED. The vitrification insulation layer is formed by curing the photoresist by reducing the ambient temperature.

3. The method of claim 2, wherein the micro-LED is formed by a process comprising: forming a first micro-LED on the first substrate; forming a second micro-LED on the second substrate; and transferring the first micro-LED to the second substrate. The vitrification insulation layer is formed by curing the photoresist by reducing the ambient temperature. The vitrification insulation layer is formed by curing the photoresist by reducing the ambient temperature. The vitrification insulation layer is formed by curing the photoresist by reducing the ambient temperature. The photoresist comprises a BCB photoresist.

4. The method of claim 3, wherein the micro-LED is formed by a process comprising: forming a first micro-LED on the first substrate; forming a second micro-LED on the second substrate; and transferring the first micro-LED to the second substrate. The insulating mirror and the second passivation layer are etched by the same ICP etching process to retain the groove and the transparent conductive layer exposed part, thereby realizing the deposition point of the first electrode and the second electrode.

5. The method of claim 2, wherein the micro-LED is formed by a process comprising: forming a first micro-LED on the first substrate; forming a second micro-LED on the second substrate; and transferring the first micro-LED to the second substrate. The ICP etching process is realized by adjusting the gas source in the ICP etching process.

6. The method of claim 1, wherein the micro-LED is a high voltage micro-LED. A metal electrode layer is further arranged on the surface of the transparent conductive layer, and the second electrode is in contact with the metal electrode layer.

7. The method of claim 6, wherein the micro-LED is formed by a process comprising: forming a first micro-LED on the first substrate; forming a second micro-LED on the second substrate; and transferring the first micro-LED to the second substrate. The first passivation layer and the second passivation layer comprise an insulating material layer with high thermal conductivity.

8. The method of claim 7, wherein the micro-LED is formed by a process comprising: forming a first micro-LED on a first substrate; forming a second micro-LED on a second substrate; and bonding the first micro-LED and the second micro-LED to each other. The ICP etching uses CH x F y as the etching gas, and O2 / Ar as the auxiliary gas, wherein X+Y≤4; and the proportion of the etching gas and the auxiliary gas is adjusted to realize the ICP etching process.

9. The method of claim 1, wherein the micro-LED is a high voltage micro-LED. The first passivation layer and the second passivation layer comprise one or more of an AlN layer, a BN layer and an Al2O3 layer.

10. The method of claim 1, wherein the micro-LED is a high voltage micro-LED. ​ 11. The method of claim 10, wherein the micro-LED is formed by a process comprising: forming a first micro-LED on a first substrate; forming a second micro-LED on a second substrate; and bonding the first micro-LED and the second micro-LED to each other. ​

Images