Communication matching method, master communication device, slave communication device and communication matching system
By adjusting the clock parameters of the master-slave communication devices, the problem of inconsistent communication rates between FPGAs was solved, and high compatibility of the devices and multi-device communication capabilities were achieved.
Patent Information
- Application Number
- CN202310147293.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-10
- Publication Date
- 2025-09-19
- Estimated Expiration
- 2043-02-10
AI Technical Summary
In the prior art, the inconsistent communication rates between FPGAs reduce the usability and compatibility of communication equipment, making normal communication impossible.
The clock parameters between the master communication device and the slave communication device are adjusted, including the adjustment of the clock phase and the clock frequency, until a predetermined code value is received to match the communication rate.
The matching of the master communication device with slave communication devices of different communication rates is achieved, which improves the applicability and compatibility of the device and allows multiple slave communication devices to communicate simultaneously.
Smart Images

Figure CN116208294B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of communication technology, and in particular to a communication matching method, a master communication device, a slave communication device, and a communication matching system. Background Art
[0002] With the rapid development of digital circuit technology and the ATE (Automatic Test Equipment) industry, serial communication technology is becoming increasingly widespread. However, various communication devices operate at varying speeds. When field programmable gate arrays (FPGAs) need to communicate with each other, a master FPGA and a slave FPGA are connected via a connector. For a slave FPGA to access any connector, it must operate at the same speed as the master FPGA for communication to work properly. If the speeds of the master and slave FPGAs are inconsistent, communication is impossible. This single-speed communication method significantly reduces the usability and compatibility of communication equipment. Summary of the Invention
[0003] Based on this, it is necessary to provide a communication matching method, a master communication device, a slave communication device and a communication matching system that can improve the compatibility of communication devices in order to address the above technical problems.
[0004] In a first aspect, the present application provides a communication matching method, which is applied to a master communication device, wherein the master communication device is connected to at least one slave communication device. The method comprises:
[0005] receiving a first code value sent from the communication device at a first communication rate;
[0006] When the first code value is not received, adjusting a clock parameter of the master communication device until the first code value is received, wherein the clock parameter includes at least one of a clock phase and a clock frequency;
[0007] A second code value is sent to the slave communication device, wherein, in response to the second code value, the slave communication device adjusts a clock parameter of the slave communication device when the second code value is not received until the slave communication device receives the second code value.
[0008] In one embodiment, receiving the first code value sent from the communication device at the first communication rate includes:
[0009] The first code value sent by the slave communication device is received at a highest communication rate supported by the master communication device.
[0010] In one embodiment, the clock parameter includes a clock phase, and adjusting the clock parameter of the master communication device includes:
[0011] When the first code value is not received, performing a clock parameter adjustment operation; the clock parameter adjustment operation includes:
[0012] adjusting a clock phase of the master communication device to determine whether the first code value is received;
[0013] If the first code value is received, the clock parameter adjustment operation is terminated.
[0014] In one embodiment, the clock parameter includes a clock frequency; and adjusting the clock parameter of the master communication device includes:
[0015] When the first code value is not received, performing a clock parameter adjustment operation; the clock parameter adjustment operation includes:
[0016] adjusting the clock frequency of the master communication device and determining whether the first code value is received;
[0017] If the first code value is received, the clock parameter adjustment operation is terminated.
[0018] In one embodiment, the clock parameters include a clock phase and a clock frequency; and adjusting the clock parameters of the master communication device includes:
[0019] When the first code value is not received, performing a clock parameter adjustment operation; the clock parameter adjustment operation includes:
[0020] adjusting a clock phase of the master communication device to determine whether the first code value is received;
[0021] If the first code value is received, then the clock parameter adjustment operation is terminated;
[0022] If the first code value is not received, adjusting the clock frequency of the master communication device to determine whether the first code value is received;
[0023] If the first code value is received, then the clock parameter adjustment operation is terminated;
[0024] If the first code value is not received, the process returns to executing the clock parameter adjustment operation.
[0025] In one embodiment, adjusting the clock phase of the master communication device includes:
[0026] Adjust the clock phase of the main communication device by 180 degrees;
[0027] and / or,
[0028] The adjusting the clock frequency of the master communication device comprises:
[0029] The clock frequency of the master communication device is adjusted to a lower clock frequency to adjust the first communication rate.
[0030] In a second aspect, the present application further provides a communication matching method, which is applied to a slave communication device connected to a master communication device. The method comprises:
[0031] receiving a second code value sent by the master communication device at a second communication rate;
[0032] When the second code value is not received, adjusting a clock parameter of the slave communication device until the second code value is received, wherein the clock parameter includes at least one of a clock phase and a clock frequency;
[0033] A first code value is sent to the master communication device, wherein, in response to the first code value, the master communication device adjusts a clock parameter of the master communication device when the master communication device does not receive the first code value until the master communication device receives the first code value.
[0034] In one embodiment, receiving the second code value sent by the master communication device at the second communication rate includes:
[0035] The second code value sent by the master communication device is received at a highest communication rate supported by the slave communication device.
[0036] In one embodiment, the clock parameter includes a clock phase, and adjusting the clock parameter of the slave communication device includes:
[0037] When the second code value is not received, performing a clock parameter adjustment operation; the clock parameter adjustment operation includes:
[0038] adjusting a clock phase of the slave communication device to determine whether the second code value is received;
[0039] If the second code value is received, the clock parameter adjustment operation is terminated.
[0040] In one embodiment, the clock parameter includes a clock frequency; and adjusting the clock parameter of the slave communication device includes:
[0041] When the second code value is not received, performing a clock parameter adjustment operation; the clock parameter adjustment operation includes:
[0042] adjusting the clock frequency of the slave communication device and determining whether the second code value is received;
[0043] If the second code value is received, the clock parameter adjustment operation is terminated.
[0044] In one embodiment, the clock parameters include a clock phase and a clock frequency; and adjusting the clock parameters of the slave communication device includes:
[0045] When the second code value is not received, performing a clock parameter adjustment operation; the clock parameter adjustment operation includes:
[0046] adjusting a clock phase of the slave communication device to determine whether the second code value is received;
[0047] If the second code value is received, then the clock parameter adjustment operation is terminated;
[0048] If the second code value is not received, adjusting the clock frequency of the slave communication device to determine whether the second code value is received;
[0049] If the second code value is received, then the clock parameter adjustment operation is terminated;
[0050] If the second code value is not received, the process returns to executing the clock parameter adjustment operation.
[0051] In one embodiment, adjusting the clock phase of the slave communication device includes:
[0052] Adjusting the clock phase of the slave communication device by 180 degrees;
[0053] and / or,
[0054] The adjusting the clock frequency of the slave communication device comprises:
[0055] The clock frequency of the slave communication device is adjusted to a next-level clock frequency to adjust the second communication rate.
[0056] In a third aspect, the present application further provides a primary communication device. The primary communication device includes:
[0057] a code value determination module, configured to determine whether a first code value is received at a first communication rate;
[0058] A clock frequency division module, configured to adjust a clock parameter of the master communication device, wherein the clock parameter includes at least one of a clock phase and a clock frequency;
[0059] The control module is configured to control the clock frequency division module to adjust the clock parameters of the main communication device until the first code value is received when the code value determination module determines that the first code value is not received.
[0060] In a fourth aspect, the present application further provides a slave communication device. The slave communication device includes:
[0061] a code value determination module, configured to determine whether a second code value is received at a second communication rate;
[0062] a clock frequency division module, configured to adjust a clock parameter of the slave communication device, wherein the clock parameter includes at least one of a clock phase and a clock frequency;
[0063] The control module is configured to control the clock frequency dividing module to adjust the clock parameters of the slave communication device until the second code value is received when the code value determination module determines that the second code value is not received.
[0064] In a fifth aspect, the present application also provides a communication matching system, which includes the above-mentioned master communication device and the above-mentioned slave communication device.
[0065] In a sixth aspect, the present application also provides a communication device, comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, it implements the steps of the communication matching method applied to the master communication device and / or the steps of the communication matching method applied to the slave communication device.
[0066] In a seventh aspect, a computer-readable storage medium stores a computer program thereon, which, when executed by a processor, implements the steps of the communication matching method applied to a master communication device and / or the steps of the communication matching method applied to a slave communication device.
[0067] In an eighth aspect, a computer program product includes a computer program, which, when executed by a processor, implements the steps of the communication matching method applied to a master communication device and / or the steps of the communication matching method applied to a slave communication device.
[0068] The above-mentioned communication matching method, master communication device, slave communication device, communication matching system, communication device, storage medium and computer program product, the master communication device receives a first code value sent by the slave communication device at a first communication rate, and if not received, changes the clock parameters of the master communication device to change the communication rate of the master communication device until the master communication device receives the first code value and then requests to establish a one-way communication. At the same time, the master communication device sends a second code value to the slave communication device, and the slave communication device changes its clock parameters until the second code value is received. When the master communication device receives the first code value and the slave communication device receives the second code value, communication is established, and the master communication device can communicate normally with the slave communication device. The master communication device is connected to at least one slave communication device, and the master communication device can change its own clock parameters according to the second code value of each slave communication device to establish communication with each slave communication device. By changing the clock parameters of the master communication device or the slave communication device, the communication rate of the master communication device and the at least one slave communication device is matched, thereby avoiding the situation where the communication rate of the master communication device and each slave communication device is inconsistent and communication cannot occur. That is, when a master communication device is connected to a slave communication device, the communication matching method of this embodiment enables the master communication device to be matched with slave communication devices of different communication rates, thereby facilitating the replacement of the slave communication device; when a master communication device is connected to multiple slave communication devices, the communication matching method of this embodiment enables the master communication device to communicate with multiple slave communication devices of different communication rates at the same time, thereby greatly improving the applicability and compatibility of the master communication device and the slave communication devices. BRIEF DESCRIPTION OF THE DRAWINGS
[0069] Figure 1 A diagram showing an application environment of a communication matching method in one embodiment;
[0070] Figure 2 1 is a flow chart of a communication matching method applied to a master communication device in one embodiment;
[0071] Figure 3 A schematic diagram of a flow chart of a clock parameter adjustment operation of a master communication device in one embodiment;
[0072] Figure 4 is a timing diagram of clock phase adjustment in one embodiment;
[0073] Figure 5 A schematic flow chart of a clock parameter adjustment operation of a master communication device in another embodiment;
[0074] Figure 6 is a timing diagram of clock frequency adjustment in one embodiment;
[0075] Figure 7 FIG1 is a flow chart of a clock parameter adjustment operation of a master communication device in another embodiment;
[0076] Figure 8 A timing diagram of clock parameter adjustment in one embodiment;
[0077] Figure 9 1 is a flow chart of a communication matching method applied to a slave communication device in one embodiment;
[0078] Figure 10 A schematic flow chart of a clock parameter adjustment operation of a slave communication device in one embodiment;
[0079] Figure 11 A schematic flow chart of a clock parameter adjustment operation of a slave communication device according to another embodiment;
[0080] Figure 12 A schematic flow chart of a clock parameter adjustment operation of a slave communication device in another embodiment;
[0081] Figure 13 is a structural block diagram of a main communication device in one embodiment;
[0082] Figure 14 FIG. 4 is a structural block diagram of a slave communication device in one embodiment. DETAILED DESCRIPTION
[0083] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.
[0084] The communication matching method applied to the master communication device and the communication matching method applied to the slave communication device provided in the embodiments of the present application can be applied to Figure 1 In the application environment shown, the communication matching system includes a master communication device and at least one slave communication device. The master communication device can be an FPGA and is denoted as the master FPGA; the slave communication device can also be an FPGA and is denoted as the slave FPGA. The master FPGA includes multiple connectors, and multiple slave FPGAs are connected to the master FPGA one by one through each connector for communication. The master FPGA also includes multiple communication modules, each correspondingly connected to a connector, and the communication modules can store communication matching data for the master communication device; the slave FPGA includes a communication module, and the communication module can store communication matching data for the slave communication device. It is understood that the communication device can also be other programmable devices, and this embodiment is not limited to this.
[0085] In one embodiment, Figure 2 As shown, a communication matching method is provided, which is applied to Figure 1 The main communication device in the example is used to illustrate the process, including the following steps:
[0086] Step S110: Receive a first code value sent from a communication device at a first communication rate.
[0087] The master communication device can be an FPGA, the slave communication device can be an FPGA, the first communication rate is the communication rate supported by the master communication device, and the first code value can be an idle (IDLE, Integrated Development and Learning Environment) code value. Whether the master communication device can receive and parse the correct IDLE code value is determined to determine whether the communication rate of the master communication device is consistent with the rate of the slave communication device, thereby establishing communication.
[0088] Optionally, the first code value sent by the slave communication device can be received at the highest communication rate supported by the master communication device. Receiving the first code value starting from the highest communication rate can avoid missing rate points, and the master communication device can obtain the highest communication rate when communicating with the slave communication device.
[0089] Step S120: When the first code value is not received, adjust the clock parameters of the master communication device until the first code value is received.
[0090] Among them, the clock parameters include at least one of a clock phase and a clock frequency. If the main communication device fails to receive the first code value, there may be an error in the phase relationship between the clock and the data, or an error in the clock frequency. Therefore, the clock parameters of the main communication device itself can be adjusted so that the main communication device can receive the first code value.
[0091] Step S130: Sending the second code value to the slave communication device, so that the slave communication device adjusts the clock parameters of the slave communication device when the slave communication device does not receive the second code value until the slave communication device receives the second code value.
[0092] In this embodiment, the first and second code values are pre-agreed communication code values between the master and slave devices. The first and second code values can be the same or different, and the second code value can be an IDLE code value. The master and slave devices need to establish bidirectional communication. That is, the master device receives the first code value sent by the slave device, and the slave device also receives the second code value from the master device. Therefore, the master device must send the second code value to the slave device to establish communication.
[0093] In the above-mentioned communication matching method, the master communication device receives the first code value sent by the slave communication device at a first communication rate. If the master communication device does not receive the first code value, the master communication device changes the clock parameters of the master communication device to change the communication rate of the master communication device until the master communication device receives the first code value and then a one-way communication request is established. At the same time, the master communication device sends a second code value to the slave communication device, and the slave communication device changes the clock parameters until the second code value is received. When the master communication device receives the first code value and the slave communication device receives the second code value, communication is established, and the master communication device can communicate normally with the slave communication device. The master communication device is connected to at least one slave communication device, and the master communication device can change its own clock parameters according to the second code value of each slave communication device to establish communication with each slave communication device respectively. By changing the clock parameters of the master communication device or the slave communication device, the communication rate of the master communication device is matched with that of at least one slave communication device, so as to avoid the situation where the communication rates of the master communication device and each slave communication device are inconsistent and communication fails. That is, when a master communication device is connected to a slave communication device, the communication matching method of this embodiment enables the master communication device to be matched with slave communication devices of different communication rates, thereby facilitating the replacement of the slave communication device; when a master communication device is connected to multiple slave communication devices, the communication matching method of this embodiment enables the master communication device to communicate with multiple slave communication devices of different communication rates at the same time, thereby greatly improving the applicability and compatibility of the master communication device and the slave communication devices.
[0094] In one embodiment, Figure 3 As shown, step S120, when the first code value is not received, adjust the clock parameters of the main communication device until the first code value is received, and further includes step S121.
[0095] Step S121: When the first code value is not received, a clock parameter adjustment operation is performed, where the clock parameter adjustment operation includes steps S1211 to S1212.
[0096] Step S1211: Adjust the clock phase of the master communication device and determine whether the first code value is received.
[0097] If the main communication device does not receive the first code value, it is possible that the clock phase of the main communication device does not correspond to the data phase of the received data, resulting in the problem that the valid data area is not collected. Therefore, the clock phase of the main communication device is adjusted to make the clock phase and the data phase correspond. The adjustment range of the clock phase is 0 to 180 degrees.
[0098] Optionally, the clock phase of the main communication device can be adjusted by 180 degrees. Figure 4As shown in the figure, assuming the original clock phase is 0 degrees, which is not in the valid data acquisition area, the clock phase is adjusted 180 degrees, which is halfway through the full 360-degree cycle. If the clock period and data period are consistent, the valid data area can be acquired. Furthermore, assuming the original clock phase is 30 degrees, which is not in the valid data acquisition area, the clock phase is adjusted 180 degrees, resulting in a phase of 210 degrees, which means the data is acquired in the valid area.
[0099] Step S1212: If the first code value is received, the clock parameter adjustment operation ends.
[0100] In the above-mentioned communication matching method, the master communication device receives the first code value sent by the slave communication device at a first communication rate. If the master communication device does not receive the first code value, the master communication device changes the clock phase of the master communication device so that the clock acquisition falls into the data valid area, so that the master communication device receives the first code value to establish a one-way communication request. At the same time, the master communication device sends the second code value to the slave communication device, and the slave communication device changes the clock parameters until the second code value is received. When the master communication device receives the first code value and the slave communication device receives the second code value, communication is established, and the master communication device can communicate normally with the slave communication device. The master communication device is connected to at least one slave communication device. The master communication device can change its own clock parameters according to the second code value of each slave communication device to establish communication with each slave communication device respectively. By changing the clock parameters of the master communication device or the slave communication device, the communication rate of the master communication device and the at least one slave communication device is matched to avoid the situation where the communication rates of the master communication device and each slave communication device are inconsistent and communication is impossible.
[0101] In one embodiment, Figure 5 As shown, step S120, when the first code value is not received, adjusts the clock parameters of the main communication device until the first code value is received, and further includes step S122.
[0102] Step S122: When the first code value is not received, a clock parameter adjustment operation is performed, where the clock parameter adjustment operation includes steps S1221 to S1222.
[0103] Step S1221: Adjust the clock frequency of the main communication device and determine whether the first code value is received.
[0104] If the master communication device does not receive the first code value, it is possible that the clock frequency of the master communication device is inconsistent with the clock frequency of the slave communication device, resulting in failure to collect the valid data area. Figure 6 By adjusting the clock frequency of the master communication device so that the clock frequencies of the master communication device and the slave communication device are the same, the first code value is received and communication is established.
[0105] Optionally, the second communication rate is adjusted by adjusting the clock frequency of the slave communication device to a lower-level clock frequency. By adjusting the clock frequency of the master communication device to a lower-level clock frequency, the first communication rate is changed so that the clock captures data within the valid data range. The communication rate corresponding to the lower-level clock frequency is lower than the communication rate corresponding to the upper-level clock frequency. The clock frequencies of each level can be pre-set.
[0106] Step S1222: If the first code value is received, the clock parameter adjustment operation ends.
[0107] In the above-mentioned communication matching method, the master communication device receives the first code value sent by the slave communication device at a first communication rate. If the master communication device does not receive the first code value, the master communication device changes its clock frequency in sequence so that the clock acquisition falls into the data valid area, so that the master communication device receives the first code value to establish a one-way communication request. At the same time, the master communication device sends the second code value to the slave communication device, and the slave communication device changes its clock parameters until the second code value is received. When the master communication device receives the first code value and the slave communication device receives the second code value, communication is established, and the master communication device can communicate normally with the slave communication device. The master communication device is connected to at least one slave communication device. The master communication device can change its own clock parameters according to the second code value of each slave communication device to establish communication with each slave communication device respectively. By changing the clock parameters of the master communication device or the slave communication device, the communication rate of the master communication device is matched with that of the at least one slave communication device, so as to avoid the situation where the communication rate of the master communication device and each slave communication device is inconsistent and communication fails.
[0108] In one embodiment, Figure 7 As shown, step S120, when the first code value is not received, adjusting the clock parameters of the main communication device until the first code value is received also includes the following steps: when the first code value is not received, performing a clock parameter adjustment operation; the clock parameter adjustment operation includes: adjusting the clock phase of the main communication device to determine whether the first code value is received; if the first code value is received, ending the clock parameter adjustment operation; if the first code value is not received, adjusting the clock frequency of the main communication device to determine whether the first code value is received; if the first code value is received, ending the clock parameter adjustment operation; if the first code value is not received, returning to executing the clock parameter adjustment operation.
[0109] like Figure 8First, in stage one, the master communication device receives the first code value sent by the slave communication device at the initial first communication rate. If it is not received, the master communication device's clock phase is changed in stage two. If the first code value is still not received after adjusting the clock phase from 0 to 180 degrees, the master communication device's clock frequency is adjusted to the next level clock frequency in stage three, thereby changing the first communication rate so that the clock captures the data valid area. The communication rate corresponding to the next level clock frequency is lower than the communication rate corresponding to the previous level clock frequency. The clock frequencies of each level can be pre-set. If the first code value is still not received, the clock parameter adjustment operation is returned to, that is, the clock phase and clock frequency of the master communication device are cyclically changed until the first code value is received. For example, if the first communication rate is the highest communication rate, the master communication device's communication clock is divided into n rate frequencies with the same accuracy as the slave communication device, with the highest communication rate corresponding to the nth rate frequency. The master communication device's clock frequency is changed so that the master communication device's communication rate is at the n-1th rate frequency, where the communication rate of the n-1th rate frequency is lower than the communication rate of the nth rate frequency. After adjusting the clock frequency, if the first code value cannot be received, the clock phase at the n-1th rate frequency of the main communication device is changed. If the first code value is still not received, the clock frequency is adjusted to the n-2th rate frequency, and so on, until the main communication device receives the first code value.
[0110] In the above-mentioned communication matching method, the master communication device receives the first code value sent by the slave communication device at a first communication rate. If the master communication device does not receive the first code value, the master communication device sequentially changes the clock phase and clock frequency of the master communication device so that the clock acquisition falls into the data valid area, so that the master communication device receives the first code value to establish a one-way communication request. At the same time, the master communication device sends the second code value to the slave communication device, and the slave communication device changes the clock parameters until the second code value is received. When the master communication device receives the first code value and the slave communication device receives the second code value, communication is established, and the master communication device can communicate normally with the slave communication device. The master communication device is connected to at least one slave communication device. The master communication device can change its own clock parameters according to the second code value of each slave communication device to establish communication with each slave communication device respectively. By changing the clock parameters of the master communication device or the slave communication device, the communication rate of the master communication device and the at least one slave communication device is matched to avoid the situation where the communication rates of the master communication device and each slave communication device are inconsistent and communication is impossible. That is, when a master communication device is connected to a slave communication device, the communication matching method of this embodiment enables the master communication device to be matched with slave communication devices of different communication rates, thereby facilitating the replacement of the slave communication device; when a master communication device is connected to multiple slave communication devices, the communication matching method of this embodiment enables the master communication device to communicate with multiple slave communication devices of different communication rates at the same time, thereby greatly improving the applicability and compatibility of the master communication device and the slave communication devices.
[0111] In one embodiment, Figure 9 As shown, a communication matching method is provided, which is applied to Figure 1 The slave communication device in the example is used to illustrate the process, including the following steps:
[0112] Step S210: Receive a second code value sent by the master communication device at a second communication rate.
[0113] The master communication device can be an FPGA, the slave communication device can be an FPGA, the second communication rate is a communication rate supported by the slave communication device, and the second code value can be an IDLE code value. Whether the slave communication device's communication rate is consistent with that of the master communication device is determined by whether the slave communication device can receive and parse the correct IDLE code value, thereby establishing communication. The second communication rate can be the same as or different from the first communication rate. When the second communication rate is the same as the first communication rate, both the master communication device and the slave communication device directly establish communication without adjusting clock parameters. When the second communication rate is different from the first communication rate, at least one of the master communication device and the slave communication device adjusts clock parameters until the code value is received.
[0114] Optionally, the second code value sent by the master communication device can be received at the highest communication rate supported by the communication device. Receiving the second code value starting from the highest communication rate can avoid missing rate points, and the master communication device can obtain the highest communication rate when communicating with the slave communication device.
[0115] Step S220: When the second code value is not received, adjust the clock parameters of the slave communication device until the second code value is received.
[0116] Among them, the clock parameters include at least one of a clock phase and a clock frequency. If the slave communication device fails to receive the first code value, there may be an error in the phase relationship between the clock and the data, or an error in the clock frequency. Therefore, the clock parameters of the slave communication device itself can be adjusted so that the slave communication device can receive the second code value.
[0117] Step S230: Sending the first code value to the master communication device, so that when the master communication device does not receive the first code value, the master communication device adjusts the clock parameters of the master communication device until the master communication device receives the first code value.
[0118] In this embodiment, the first and second code values are pre-agreed communication code values between the master and slave devices. The first and second code values can be the same or different, and the first code value can be an IDLE code value. The master and slave devices need to establish bidirectional communication. That is, the slave device receives the second code value from the master device, and the master device also receives the first code value from the slave device. Therefore, the slave device must send the first code value to the master device to establish communication.
[0119] In the above-described communication matching method, a slave communication device receives a second code value sent by a master communication device at a second communication rate. If the slave communication device does not receive the second code value, the slave communication device's clock parameters are changed to change the slave communication device's communication rate until the slave communication device receives the second code value, thereby establishing a one-way communication request. Simultaneously, the slave communication device sends a first code value to the master communication device, and the master communication device changes its clock parameters until it receives the first code value. When the slave communication device receives the second code value and the master communication device receives the first code value, communication is established, and the slave communication device can communicate normally with the master communication device. By respectively changing the clock parameters of the slave communication device and the master communication device, the communication rates of the master and slave communication devices are matched, thereby avoiding the situation where communication failure occurs due to inconsistent communication rates between the slave and master communication devices. That is, when the slave communication device is connected to the master communication device, the communication matching method of this embodiment allows the slave communication device to match master communication devices with different communication rates, greatly improving the applicability and compatibility of the master and slave communication devices.
[0120] In one embodiment, Figure 10 In step S220, when the second code value is not received, the clock parameters of the slave communication device are adjusted until the second code value is received, and the process further includes step S221.
[0121] Step S221: When the second code value is not received, a clock parameter adjustment operation is performed, where the clock parameter adjustment operation includes steps S2211 to S2212.
[0122] Step S2211: Adjust the clock phase of the slave communication device and determine whether the second code value is received.
[0123] If the second code value is not received from the communication device, it is possible that the clock phase of the communication device does not correspond to the data phase of the received data, resulting in the problem that the valid data area is not collected. Therefore, the clock phase of the communication device is adjusted to make the clock phase and the data phase correspond. The adjustment range of the clock phase is 0 to 180 degrees.
[0124] Optionally, the clock phase of the slave communication device can be adjusted by 180 degrees. Figure 4As shown, assuming that the original clock phase is 0 degrees, it is not in the valid area for collecting data. Then the clock phase is adjusted 180 degrees to be half of the complete cycle 360 degrees. If the clock cycle and data cycle are consistent, the valid area for data can be collected for sure.
[0125] Step S2212: If the second code value is received, the clock parameter adjustment operation ends.
[0126] In the above-mentioned communication matching method, the slave communication device receives the second code value sent by the master communication device at the second communication rate. If it is not received, the clock phase of the slave communication device is changed so that the slave communication device collects the data valid area. Until the slave communication device receives the second code value, a one-way communication request is established. At the same time, the slave communication device sends the first code value to the master communication device, and the master communication device changes the clock parameters until the first code value is received. When the slave communication device receives the second code value and the master communication device receives the first code value, communication is established, and the slave communication device can communicate normally with the master communication device. By changing the clock parameters of the slave communication device and the master communication device respectively, the communication rates of the master communication device and the slave communication device are matched to avoid the situation where the communication rates of the slave communication device and the master communication device are inconsistent and communication fails.
[0127] In one embodiment, Figure 11 As shown, step S220, when the second code value is not received, adjusts the clock parameters of the slave communication device until the second code value is received, and further includes step S222.
[0128] Step S222: When the second code value is not received, a clock parameter adjustment operation is performed, where the clock parameter adjustment operation includes steps S2221 to S2222.
[0129] Step S2221: Adjust the clock frequency of the slave communication device and determine whether the second code value is received.
[0130] If the slave communication device does not receive the second code value, it is possible that the clock frequency of the slave communication device is inconsistent with the clock frequency of the master communication device, resulting in failure to collect the valid data area. Figure 6 By adjusting the clock frequency of the slave communication device so that the clock frequencies of the slave communication device and the master communication device are the same, the master receives the second code value and communication is established.
[0131] Optionally, the clock frequency of the master communication device is adjusted to the next-level clock frequency to adjust the second communication rate. By adjusting the clock frequency of the slave communication device to the next-level clock frequency, the master changes the second communication rate so that the clock captures the data valid area. The communication rate corresponding to the next-level clock frequency is lower than the communication rate corresponding to the previous-level clock frequency. The clock frequencies of each level can be pre-set.
[0132] Step S2222: If the second code value is received, the clock parameter adjustment operation ends.
[0133] In the above-mentioned communication matching method, the slave communication device receives the second code value sent by the master communication device at the second communication rate. If it is not received, the clock frequency of the slave communication device is changed in sequence so that the clock acquisition falls into the data valid area, so that the slave communication device receives the second code value to establish a one-way communication request, and at the same time, the slave communication device sends the first code value to the master communication device. The master communication device changes the clock parameters until it receives the first code value. When the slave communication device receives the second code value and the master communication device receives the first code value, communication is established, and the slave communication device can communicate normally with the master communication device to avoid the situation where the communication rate of the slave communication device and each master communication device is inconsistent, resulting in a communication failure.
[0134] In one embodiment, Figure 12 As shown, step S220, when the second code value is not received, adjusting the clock parameters of the slave communication device until the second code value is received also includes the following steps: when the second code value is not received, performing a clock parameter adjustment operation; the clock parameter adjustment operation includes: adjusting the clock phase of the slave communication device to determine whether the second code value is received; if the second code value is received, ending the clock parameter adjustment operation; if the second code value is not received, adjusting the clock frequency of the slave communication device to determine whether the second code value is received; if the second code value is received, ending the clock parameter adjustment operation; if the second code value is not received, returning to executing the clock parameter adjustment operation.
[0135] like Figure 8First, in stage one, the slave device receives the second code value sent by the master device at the initial second communication rate. If the second code value is not received, the slave device's clock phase is changed in stage two. If the second code value is still not received after adjusting the clock phase from 0 to 180 degrees, it indicates that the slave device's clock frequency is inconsistent with the data frequency. In stage three, the slave device's clock frequency is adjusted to the next-level clock frequency, thereby changing the second communication rate so that the clock captures the valid data area. The communication rate corresponding to the next-level clock frequency is lower than the communication rate corresponding to the previous-level clock frequency. Each level of clock frequency can be pre-set. If the second code value is still not received, the clock parameter adjustment operation is returned, that is, the slave device's clock phase and clock frequency are repeatedly changed until the second code value is received. For example, if the second communication rate is the highest communication rate, the slave device's communication clock is divided into n rate frequencies with the same accuracy as the master device, with the highest communication rate corresponding to the nth rate frequency. The slave device's clock frequency is changed so that the slave device's communication rate is at the n-1th rate frequency, where the communication rate of the n-1th rate frequency is lower than the communication rate of the nth rate frequency. After adjusting the clock frequency, if the second code value cannot be received, the clock phase at the n-1th rate frequency point of the slave communication device is changed. If the second code value is still not received, the clock frequency is adjusted to the n-2th rate frequency point, and so on, until the second code value is received from the slave communication device.
[0136] In the above-mentioned communication matching method, the slave communication device receives the second code value sent by the master communication device at the highest communication rate. If it is not received, the clock phase and clock frequency of the slave communication device are changed in sequence so that the clock acquisition falls into the data valid area, so that the slave communication device receives the second code value to establish a one-way communication request. At the same time, the slave communication device sends the first code value to the master communication device, and the master communication device changes the clock parameters until the first code value is received. When the slave communication device receives the second code value and the master communication device receives the first code value, communication is established, and the slave communication device can communicate normally with the master communication device. By changing the clock parameters of the slave communication device and the master communication device respectively, the communication rates of the master communication device and the slave communication device are matched to avoid the situation where the communication rates of the slave communication device and the master communication device are inconsistent and communication fails.
[0137] It should be understood that, although the various steps in the flowcharts involved in the various embodiments described above are displayed in sequence according to the instructions of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the flowcharts involved in the various embodiments described above can include multiple steps or multiple stages, and these steps or stages are not necessarily executed and completed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of steps or stages in other steps.
[0138] Based on the same inventive concept, embodiments of the present application also provide a master communication device for implementing the aforementioned communication matching method. The solution provided by this device is similar to the solution described in the aforementioned method. Therefore, the specific limitations of one or more master communication device embodiments provided below can be found in the aforementioned limitations of the communication matching method and will not be further elaborated here.
[0139] In one embodiment, Figure 13 As shown, a main communication device is provided, including a code value judgment module 131, a clock frequency division module 132 and a control module 133, wherein:
[0140] The code value judgment module 131 is used to judge whether the first code value is received at the first communication rate. The main communication device can be an FPGA, the first code value can be an IDLE code, and the code value judgment module 131 can judge in real time whether the correct IDLE code can be parsed.
[0141] The clock frequency division module 132 is used to adjust the clock parameters of the main communication device, wherein the clock parameters include at least one of a clock phase and a clock frequency.
[0142] Control module 133 is configured to control clock divider module 132 to adjust the clock parameters of the master communication device until the first code value is received, if code value determination module 131 determines that the first code value has not been received. Control module 133 adjusts the output clock frequency and clock phase of clock divider module 132 via the FPGA's IP control port.
[0143] In one embodiment, the code value determination module 131 is further configured to receive the first code value sent by the slave communication device at the highest communication rate supported by the master communication device.
[0144] In one embodiment, the control module 133 is further used to control the clock dividing module 132 to perform a clock parameter adjustment operation when the code value judgment module 131 determines that the first code value has not been received; control the clock dividing module 132 to adjust the clock phase of the main communication device, determine whether the first code value has been received, and end the clock parameter adjustment operation when the first code value is received.
[0145] In one embodiment, the control module 133 is further used to control the clock dividing module 132 to perform a clock parameter adjustment operation when the code value judgment module 131 determines that the first code value has not been received; control the clock dividing module 132 to adjust the clock frequency of the main communication device, determine whether the first code value has been received, and end the clock parameter adjustment operation when the first code value is received.
[0146] In one embodiment, the control module 133 is further used to control the clock dividing module 132 to perform a clock parameter adjustment operation when the code value judgment module 131 determines that the first code value is not received; control the clock dividing module 132 to adjust the clock phase of the main communication device, and determine whether the first code value is received. If the first code value is received, the clock parameter adjustment operation is terminated; if the first code value is not received, control the clock dividing module 132 to adjust the clock frequency of the main communication device, and determine whether the first code value is received. If the first code value is received, the clock parameter adjustment operation is terminated; if the first code value is not received, return to execute the clock parameter adjustment operation.
[0147] In one embodiment, the clock frequency dividing module 132 is further configured to adjust the clock phase of the master communication device by 180 degrees.
[0148] In one embodiment, the clock frequency dividing module 132 is further configured to adjust the clock frequency of the master communication device to a lower clock frequency to adjust the first communication rate.
[0149] Each module in the aforementioned master communication device may be implemented in whole or in part through software, hardware, or a combination thereof. Each module may be embedded in or independent of a processor in the communication device in hardware form, or may be stored in a memory in the communication device in software form, so that the processor can call and execute the corresponding operations of each module.
[0150] Based on the same inventive concept, embodiments of the present application also provide a slave communication device for implementing the aforementioned communication matching method. The implementation solution provided by this device is similar to the implementation solution described in the aforementioned method. Therefore, the specific limitations of one or more slave communication device embodiments provided below can be found in the limitations of the communication matching method above and will not be repeated here.
[0151] In one embodiment, Figure 14As shown, a slave communication device is provided, including a code value judgment module 141, a clock frequency division module 142 and a control module 143, wherein:
[0152] The code value determination module 141 is configured to determine whether the second code value is received at the second communication rate. The slave communication device may be an FPGA, and the second code value may be an IDLE code. The code value determination module 141 may determine in real time whether the correct IDLE code can be parsed.
[0153] Clock divider module 142, for adjusting the clock parameters of the slave communication device, wherein the clock parameters include at least one of a clock phase and a clock frequency.
[0154] Control module 143 is configured to control clock divider module 142 to adjust the clock parameters of the slave communication device until the second code value is received, if code value determination module 141 determines that the second code value has not been received. Control module 143 adjusts the output clock frequency and clock phase of clock divider module 142 via the FPGA's IP control port.
[0155] In one embodiment, the code value determination module 141 is further configured to receive the second code value sent by the master communication device at the highest communication rate supported by the slave communication device.
[0156] In one embodiment, the control module 143 is further used to control the clock dividing module 142 to perform a clock parameter adjustment operation when the code value judgment module 141 determines that the second code value has not been received; control the clock dividing module 142 to adjust the clock phase of the slave communication device, determine whether the second code value has been received, and end the clock parameter adjustment operation when the second code value is received.
[0157] In one embodiment, the control module 143 is further used to control the clock dividing module 142 to perform a clock parameter adjustment operation when the code value judgment module 141 determines that the second code value has not been received; control the clock dividing module 142 to adjust the clock frequency of the slave communication device, determine whether the second code value has been received, and end the clock parameter adjustment operation when the second code value is received.
[0158] In one embodiment, the control module 143 is also used to control the clock dividing module 142 to perform a clock parameter adjustment operation when the code value judgment module 141 determines that the second code value is not received; control the clock dividing module 142 to adjust the clock phase of the slave communication device, and determine whether the second code value is received. If the second code value is received, end the clock parameter adjustment operation; if the second code value is not received, control the clock dividing module 142 to adjust the clock frequency of the slave communication device, and determine whether the second code value is received. If the second code value is received, end the clock parameter adjustment operation; if the second code value is not received, return to execute the clock parameter adjustment operation.
[0159] In one embodiment, the clock frequency dividing module 142 is further configured to adjust the clock phase of the slave communication device by 180 degrees.
[0160] In one embodiment, the clock frequency dividing module 142 is further configured to adjust the clock frequency of the slave communication device to a next-level clock frequency to adjust the second communication rate.
[0161] Each module in the above-mentioned slave communication device can be implemented in whole or in part through software, hardware, or a combination thereof. Each module can be embedded in or independent of the processor in the communication device in hardware form, or can be stored in the memory of the communication device in software form, so that the processor can call and execute the corresponding operations of each module.
[0162] In one embodiment, a communication device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the steps of the communication matching method applied to the master communication device and / or the steps of the communication matching method applied to the slave communication device are implemented.
[0163] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the communication matching method applied to the master communication device and / or the steps of the communication matching method applied to the slave communication device are implemented.
[0164] In one embodiment, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the steps of the communication matching method applied to a master communication device and / or the steps of the communication matching method applied to a slave communication device.
[0165] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, database or other media used in the embodiments provided in this application may include at least one of non-volatile and volatile memory. Non-volatile memory may include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory may include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in the various embodiments provided herein may include at least one of a relational database and a non-relational database. Non-relational databases may include, but are not limited to, distributed databases based on blockchains. The processor involved in the various embodiments provided herein may be, but are not limited to, a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, and the like.
[0166] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0167] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.
Claims
1. A communication matching method, characterized in that: The method is applied to a master communication device, the master communication device being connected to at least one slave communication device; the master communication device being a master FPGA, the slave communication device being a slave FPGA, the master FPGA comprising a plurality of connectors and a plurality of communication modules, the plurality of slave FPGAs being connected one-to-one with the plurality of communication modules of the master FPGA via the respective connectors, so that the master FPGA can communicate simultaneously with the plurality of slave FPGAs having different communication rates; the method comprising: receiving a first code value sent from the communication device at a first communication rate; When the first code value is not received, adjusting the clock parameters of the master communication device until the first code value is received; wherein the clock parameters include a clock phase and a clock frequency; specifically, when the first code value is not received, changing the clock phase of the master communication device; if the first code value is still not received after adjusting the clock phase from 0 to 180 degrees, adjusting the clock frequency of the master communication device; if the first code value is still not received after changing the clock frequency, returning to executing the operation of changing the clock phase of the master communication device until the first code value is received; A second code value is sent to the slave communication device, so that the slave communication device adjusts a clock parameter of the slave communication device when the slave communication device does not receive the second code value until the slave communication device receives the second code value.
2. The communication matching method according to claim 1, characterized in that: Receiving the first code value sent from the communication device at the first communication rate includes: The first code value sent by the slave communication device is received at a highest communication rate supported by the master communication device.
3. The communication matching method according to claim 1, characterized in that: The adjusting the clock frequency of the master communication device comprises: The clock frequency of the master communication device is adjusted to a lower clock frequency to adjust the first communication rate.
4. The communication matching method according to claim 3, characterized in that: The communication rate corresponding to the lower-level clock frequency is lower than the communication rate corresponding to the upper-level clock frequency.
5. The communication matching method according to claim 1, characterized in that: The method further comprises: When the first code value is received, the operation of adjusting the clock parameters of the master communication device is terminated.
6. A communication matching method, characterized in that: Applied to a slave communication device, the slave communication device is connected to a master communication device; the master communication device is a master FPGA, the slave communication device is a slave FPGA, and the slave FPGA is connected to the communication module of the master FPGA via a connector; the method includes: receiving a second code value sent by the master communication device at a second communication rate; When the second code value is not received, adjusting the clock parameters of the slave communication device until the second code value is received; wherein the clock parameters include a clock phase and a clock frequency; specifically, when the second code value is not received, changing the clock phase of the slave communication device; if the second code value is still not received after adjusting the clock phase from 0 to 180 degrees, adjusting the clock frequency of the slave communication device; if the second code value is still not received after changing the clock frequency, returning to the operation of changing the clock phase of the slave communication device until the second code value is received; A first code value is sent to the master communication device, so that when the master communication device does not receive the first code value, the master communication device adjusts a clock parameter of the master communication device until the master communication device receives the first code value.
7. The communication matching method according to claim 6, characterized in that: Receiving the second code value sent by the main communication device at the second communication rate includes: The second code value sent by the master communication device is received at a highest communication rate supported by the slave communication device.
8. The communication matching method according to claim 6, characterized in that: The adjusting the clock frequency of the slave communication device comprises: The clock frequency of the slave communication device is adjusted to a next-level clock frequency to adjust the second communication rate.
9. The communication matching method according to claim 6, characterized in that: The method further comprises: When the second code value is received, the operation of adjusting the clock parameters of the slave communication device is terminated.
10. A main communication device, characterized in that: The master FPGA includes multiple connectors and multiple communication modules. The multiple communication modules of the master FPGA are connected one by one to the multiple slave FPGAs through the connectors, so that the master FPGA can communicate with the multiple slave FPGAs with different communication rates at the same time, including: a code value determination module, configured to determine whether a first code value is received at a first communication rate; a clock frequency division module, configured to adjust the clock parameters of the master communication device, and when the first code value is not received, change the clock phase of the master communication device; if the first code value is still not received after adjusting the clock phase from 0 to 180 degrees, change the clock frequency of the master communication device; if the first code value is still not received after changing the clock frequency, return to executing the operation of changing the clock phase of the master communication device until the first code value is received; wherein the clock parameters include clock phase and clock frequency; The control module is configured to control the clock frequency division module to adjust the clock parameters of the main communication device until the first code value is received when the code value determination module determines that the first code value is not received.
11. A slave communication device, characterized in that: It is a slave FPGA connected to the master FPGA through a connector, including: a code value determination module, configured to determine whether a second code value is received at a second communication rate; a clock frequency division module, configured to adjust the clock parameters of the slave communication device; when the second code value is not received, change the clock phase of the slave communication device; if the second code value is still not received after adjusting the clock phase from 0 to 180 degrees, change the clock frequency of the slave communication device; if the second code value is still not received after changing the clock frequency, return to executing the operation of changing the clock phase of the slave communication device until the second code value is received; wherein the clock parameters include clock phase and clock frequency; The control module is configured to control the clock frequency dividing module to adjust the clock parameters of the slave communication device until the second code value is received when the code value determination module determines that the second code value is not received.
12. A communication matching system, characterized in that: The system comprises the master communication device according to claim 10 and the slave communication device according to claim 11 .
13. A communication device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 5 and / or the steps of the method according to any one of claims 6 to 9 are implemented.
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