Method for improving real-time performance of virtual machine by caching shading

Abstract

The application discloses a method for improving real-time performance of a virtual machine by cache coloring, comprising the following steps: S1, calculating the number of current system cache colors according to the implementation of a last level cache (LLC) and a cache coloring technology; S2, configuring different cache colors for different virtual machines; S3, when a virtual machine starts, establishing a page table for the physical memory mapped to the cache color according to the configured cache color; S4, when the virtual machine runs, allocating the physical memory to the corresponding cache color according to the established page table; and S5, using different LLCs for different virtual machines. The application isolates the LLC to different virtual machines by the cache coloring technology, so that the operating systems running on the virtual machines use different LLCs, the cache data do not interfere with each other, the delay of the system running on a virtual machine is not affected by the activities of the systems running on other virtual machines, and the real-time performance of the virtual machine is improved.

Description

Technical Field

[0001] This invention relates to the field of computer memory management technology, specifically a method for improving the real-time performance of a virtual machine through cache coloring. Background Technology

[0002] In the hierarchical storage architecture of modern computers, the cache is a layer of cache located between main memory and CPU registers. The cache is typically composed of small-capacity, high-speed SRAM. By caching frequently accessed data needed by the CPU, it reduces CPU access to main memory, improves memory access efficiency, and bridges the gap between CPU computation speed and main memory access speed, thus enhancing the real-time performance of the computer system. Because the cache capacity is often much smaller than main memory, not all data in main memory can be cached simultaneously. When the cache is fully used, accessing new data requires replacing older data in the cache, a phenomenon known as cache conflict. However, if there are many cache conflicts, increasing main memory access and extending CPU processing time, the system's real-time performance will degrade.

[0003] Modern multi-core CPUs typically have a dedicated Level 1 cache for each core, while the Last Level Cache (LLC) is shared by all cores. Currently, partitioned virtualization can isolate CPU, memory, and other hardware to different virtual machines. These virtual machines run different systems based on business needs; some run high-performance real-time operating systems (RTOS), while others run general-purpose Linux systems with more complex processing. However, they all share the Last Level Cache (LLC). Therefore, data cached in the LLC of an RTOS system may be replaced by data cached by a general-purpose Linux system, leading to increased cache conflicts in the RTOS system and reducing its real-time performance. This means that the latency of a system running on one virtual machine depends on the activity of systems running on other virtual machines. Summary of the Invention

[0004] The purpose of this invention is to provide a method for improving the real-time performance of virtual machines through cache coloring. By using cache coloring, the last-level cache LLC can be isolated to different virtual machines, allowing the operating systems running on them to use different LLCs, so that cached data does not affect each other, thereby improving the real-time performance of the systems running on them.

[0005] This invention discloses a method for improving the real-time performance of virtual machines through cache coloring. Based on an ARM hardware platform, the LLC is a 256KB, 4-way set-associative cache. Partition virtualization is implemented through Jailhouse, isolating the CPU and memory for two virtual machines. The method is characterized by the following steps:

[0006] S1. Based on the implementation of the last-level cache LLC and the cache coloring technique, calculate the number of cache colors in the current system; where the number of cache colors = LLC path size / page size, the LLC path size is the size of a single-path cache, and the page size is the size of the memory pages used by the operating system running on the virtual machine;

[0007] S2. Configure different cache colors for different virtual machines;

[0008] S3. When the virtual machine starts, it establishes page tables for the physical memory mapped to the configured cache color, based on the configured cache color.

[0009] S4. When the virtual machine is running, the allocated physical memory will be mapped to the corresponding cache color according to the established page table.

[0010] S5. Different virtual machines use different last-level cache LLCs.

[0011] In step S1, the page size is 4KB and the number of cached colors is 16.

[0012] In step S2, the effective cache color range is 0 to 15. Cache colors with an effective cache color range of 0 to 7 are assigned to one of the virtual machines, which is the first virtual machine; and cache colors with an effective cache color range of 8 to 15 are assigned to another virtual machine, which is the second virtual machine.

[0013] The specific steps of step S3 are as follows:

[0014] When the first virtual machine starts, it creates page tables only for memory pages with physical memory addresses 0 to 15 in the range of 0x0000 to 0x7fff, based on the configured effective cache color range of 0 to 7.

[0015] When the second virtual machine starts, it creates page tables only for memory pages with physical memory addresses 0-15 in the range of 0x8000 to 0xffff, based on the configured effective cache color range of 8 to 15.

[0016] This invention uses cache coloring technology to isolate the last-level cache LLC to different virtual machines, so that the operating systems running on them use different LLCs and the cached data does not interfere with each other. This ensures that the latency of the system running on one virtual machine is not affected by the activities of the system running on other virtual machines, thereby improving the real-time performance of the virtual machine. Attached Figure Description

[0017] Figure 1 This is a flowchart of the method of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] like Figure 1 As shown, this invention discloses a method for improving the real-time performance of virtual machines through cache coloring. Based on an ARM hardware platform, the LLC is a 256KB, 4-way set-associative cache. Partition virtualization is implemented through Jailhouse, isolating the CPU and memory for two virtual machines. The method specifically includes the following steps:

[0020] S1. Based on the implementation of the last-level cache LLC and cache coloring technology, calculate the number of cache colors in the current system. Here, a cache color is a set of cache colors that, given a contiguous block of physical memory in a high-end CPU based on set-associative cache, will fall into a contiguous cache set according to a certain mapping algorithm.

[0021] Number of cached colors = LLC path size / page size

[0022] Where: LLC path size is the single-path cache size, which is equal to LLC size / number of paths. Since the LLC is 256 and the number of paths is 4 in this embodiment, the LLC path size is 256KB / 4 = 64KB; Page size is the memory page size used by the operating system running on the virtual machine. Usually, the memory page size used by the operating system running on the virtual machine is 4KB. In this embodiment, the memory page size is 4KB.

[0023] Therefore, the number of cached colors is 64KB / 4KB=16.

[0024] S2. Configure different cache colors for different virtual machines.

[0025] The number of cache colors calculated in step 1 is 16, so the effective cache color range is 0 to 15. In order to ensure that different cache colors are configured for different virtual machines, and in order to improve processing performance and maintain the continuity of cache colors as much as possible, cache colors with an effective cache color range of 0 to 7 are assigned to one virtual machine, which is the first virtual machine; and cache colors with an effective cache color range of 8 to 15 are assigned to another virtual machine, which is the second virtual machine. In this way, the cache colors assigned to the first virtual machine are different from those assigned to the second virtual machine, and the continuity of cache colors is maintained.

[0026] In this embodiment, the advantages of configuring different cache colors for different virtual machines are:

[0027] Assigning different colors to different virtual machines, with no overlap, isolates the caching for subsequent steps across different virtual machines, thus preventing cache conflicts between them. However, for higher performance, it's best to maintain the continuity of cache colors as much as possible.

[0028] In this embodiment, cache color is a concept, as defined in step S1. A cache color is a contiguous set of cache segments, that is, the cache is divided into different segments, and which physical memory segments are mapped to which cache segments is fixed. Step S2 simply configures the corresponding cache colors for the virtual machines, that is, which virtual machine uses which cache segments. Subsequent steps, based on the configuration, only establish page tables for the physical memory mapped to these cache segments. In this way, all allocated physical memory will be mapped to these cache segments, thereby achieving the effect of cache isolation.

[0029] S3. When the virtual machine starts, it establishes a page table for the physical memory mapped to the configured cache color. In this embodiment, physical memory address bits 0-11 are used to index the offset within the page (page size is 4k), the cache color data size is 16, and physical memory address bits 12-15 are needed to determine which cache color the physical memory page is mapped to.

[0030] Specifically:

[0031] 1. Because the cache is relatively small and the physical memory is relatively large, a certain algorithm is needed to map the physical memory to the cache. This technology is existing in this field.

[0032] 2. A physical memory page (4KB) is mapped to 128 consecutive cache sets (cache line size is 32 bytes). For example, the 0th physical page is mapped to cache sets 0 to 127. The 1st physical page is mapped to cache sets 128 to 255. When all cache sets are full, the mapping starts again from the beginning. That is, the i-th physical page and the k+i-th physical page will be mapped to the same cache set, where k equals the single-path cache size / page size (64KB / 4KB = 16), which is also the number of cache colors. For example, the 0th physical page and the 16th physical page are both mapped to cache sets 0 to 127.

[0033] 3. Bits 0-11 of the physical address represent the lower 12 bits of the physical address. Bits 12-15 represent bits 12 to 15 of the physical address. Bits 0-11 of the physical address are used to index the offset within the page, while bits 12-15 determine which physical page is mapped to which cache set, or which cache color.

[0034] The specific steps of step S3 are as follows:

[0035] When the first virtual machine starts, it creates page tables only for memory pages with physical memory addresses 0 to 15 in the range of 0x0000 to 0x7fff, based on the configured effective cache color range of 0 to 7.

[0036] When the second virtual machine starts, it creates page tables only for memory pages with physical memory addresses 0-15 in the range of 0x8000 to 0xffff, based on the configured effective cache color range of 8 to 15.

[0037] In this embodiment, bits 12-15 of the physical address determine which cache color the physical address maps to. The cache color range configured for the first virtual machine is 0-7, i.e., 0x0000 to 0x7000, while the page size is 4KB, and the address range is 0x0000 to 0x0ffff. Combined, this means that bits 0-15 of the physical address range are 0x0000 to 0x7fff. Similarly, the cache color range configured for the second virtual machine is 8-15, i.e., 0x8000 to 0xf000, while the page size is 4KB, and the address range is 0x0000 to 0x0ffff. Combined, this means that bits 0-15 of the physical address range are 0x8000 to 0xffff.

[0038] S4. When the virtual machine is running, the allocated physical memory is mapped to the corresponding cache color according to the established page table. In this embodiment, when the first virtual machine is running, the allocated physical memory is mapped to caches with cache colors of 0-7 according to the established page table; when the second virtual machine is running, the allocated physical memory is mapped to caches with cache colors of 8-15 according to the established page table.

[0039] S5. Different virtual machines use different last-level cache LLCs. That is, the first virtual machine and the second virtual machine use different LLC caches, isolating the last-level cache LLC to different virtual machines, reducing cache conflicts, and ensuring that cached data does not interfere with each other. This achieves the effect of LLC cache isolation and improves the real-time performance of virtual machines.

[0040] This invention, based on the implementation of the last-level cache LLC and cache coloring technology, calculates the number of cache colors in the current system and assigns different cache colors to different virtual machines. When a virtual machine starts, page tables are only created for the physical memory mapped to the cache color assigned to that virtual machine. Thereafter, all physical memory used by that virtual machine is mapped to the cache of its assigned cache color. Thus, it achieves the same isolation of LLC as hardware such as the CPU for different virtual machines. This invention, through cache coloring technology, isolates the last-level cache LLC for different virtual machines, allowing the operating systems running on them to use different LLCs, with cached data not interfering with each other, achieving the effect of isolating hardware such as the CPU for different virtual machines. This means that the latency of an operating system running on one virtual machine is not affected by the activities of operating systems running on other virtual machines, improving the real-time performance of virtual machines.

[0041] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A method for improving the real-time performance of virtual machines through cache coloring, based on an ARM hardware platform, with an LLC of 256KB, 4-way set-associative cache, and using Jailhouse to implement partitioned virtualization, isolating the CPU and memory for two virtual machines, characterized in that... Specifically, the following steps are included: S1. Based on the implementation of the last-level cache LLC and the cache coloring technique, calculate the current number of cache colors in the system; where the number of cache colors = LLC path size / page size, the LLC path size is the size of a single-path cache, and the page size is the size of the memory page used by the operating system running on the virtual machine; the page size is 4KB, and the number of cache colors is 16. S2. Configure different cache colors for different virtual machines; the effective cache color range is 0 to 15. Assign a cache color with an effective cache color range of 0 to 7 to one of the virtual machines, which is the first virtual machine; assign a cache color with an effective cache color range of 8 to 15 to another virtual machine, which is the second virtual machine. S3. When the virtual machine starts, it establishes a page table for the physical memory mapped to the configured cache color according to the configured cache color. Bits 0-11 of the physical memory address are used to index the offset within the memory page, and bits 12-15 of the physical memory address are used to determine the cache color mapped to the memory page. S4. When the virtual machine is running, the allocated physical memory will be mapped to the corresponding cache color according to the established page table. S5. Different virtual machines use different last-level cache LLCs.

2. The method for improving virtual machine real-time performance through cache coloring according to claim 1, characterized in that: The specific steps of step S3 are as follows: When the first virtual machine starts, it creates page tables only for memory pages with physical memory addresses 0 to 15 in the range of 0x0000 to 0x7fff, based on the configured effective cache color range of 0 to 7. When the second virtual machine starts, it creates page tables only for memory pages with physical memory addresses 0-15 in the range of 0x8000 to 0xffff, based on the configured effective cache color range of 8 to 15.

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