A NVMe verification platform and method supporting virtualized simulation equipment

Abstract

The present invention relates to an NVMe verification platform and method supporting virtualized simulation devices. The verification platform includes: a PCIe EP device includes a PCIe physical function and a plurality of PCIe virtual functions; a plurality of NVMe controllers are statically bound to the PCIe physical function and the plurality of PCIe virtual functions in one-to-one correspondence; a host device is used to construct a TLP format command data packet that complies with the NVMe protocol, and send it to the PCIe EP device through a PCIe RC device; a protocol transfer station is used to convert the TLP format command data packet into an AMBA format command data packet to drive the NVMe controller, and convert the AMBA format completion data packet returned by the NVMe controller into a TLP format completion data packet and return it to the PCIe EP device. The solution of the present invention realizes flexible configuration of the number and functions of NVMe controllers, reduces CPU resource loss, and improves resource utilization.

Description

Technical Field

[0001] The present invention relates to the field of NVMe verification, and in particular to an NVMe verification platform, method, device and medium supporting virtualized simulation devices. Background Art

[0002] NVMe (Non-Volatile Memory Host Controller Interface Specification) is a new storage access and transmission protocol for flash memory and SSD (solid-state drive) that can provide higher throughput and faster response time for all types of workloads. On the one hand, the protocol enables tasks to be executed in parallel and multi-threaded through multiple queues, and on the other hand, it uses a streamlined command set to efficiently process and parse data. Therefore, the low latency and high IOPS (read and write times per second) provided by the NVMe protocol have made it a mainstream storage solution for server chips. At the same time, the efficient command management method of the NVMe protocol is inseparable from the NVMe controller. As the carrier of the NVMe protocol, the NVMe controller can accelerate the NVMe instruction management process, greatly improve the read and write transmission rate of data, and effectively reduce transmission delays. Therefore, many companies have developed NVMe controllers, and in order to achieve more universal and convenient ports during hardware design, the top-level ports of NVMe controllers are generally AMBA interfaces.

[0003] At present, the traditional NVMe controller emulation platform for AMBA interface is as follows Figure 1 As shown in the figure, the host constructs an NVMe data packet, and the NVMe protocol conversion module directly converts the NVMe command into an AMBA interface command and sends it to the NVMe controller, so that the verification task of the NVMe controller can be completed. However, in a large SOC system with PCIe (a high-speed serial computer expansion bus standard) devices, there are usually multiple NVMe controllers that are statically bound to the PF (PCIe physical function) and VF (PCIe virtual function) in PCIe SR-IOV (single root virtualization) to achieve the maximum resource utilization of the system. At this time, multiple NVMe controllers need to be verified. The existing verification platform not only cannot realize the verification of multiple NVMe controllers, but also has a very low effective utilization of hardware resources, and therefore urgently needs to be improved. Summary of the invention

[0004] In view of this, it is necessary to provide an NVMe verification platform, method, device and medium that supports virtualization simulation devices to address the above technical problems.

[0005] According to a first aspect of the present invention, there is provided an NVMe verification platform supporting a virtualized simulation device, the verification platform comprising a host device, a PCIe RC device, a PCIe EP device, a plurality of NVMe controllers and a protocol transfer station;

[0006] The PCIe EP device includes a PCIe physical function and several PCIe virtual functions, wherein the PCIe physical function has the ability to fully configure or control PCIe device resources, the PCIe physical function is associated with the several PCIe virtual functions, and the PCIe virtual function shares one or more physical resources with the PCIe physical function and other PCIe virtual functions associated with the same PCIe physical function;

[0007] Multiple NVMe controllers are statically bound to PCIe physical functions and several PCIe virtual functions in a one-to-one correspondence;

[0008] The PCIe RC device and the PCIe EP device are connected via a PCIe interface, and the host device is used to construct a TLP format command data packet that complies with the NVMe protocol and send it to the PCIe EP device via the PCIe RC device;

[0009] The protocol transfer station is used to convert the TLP format command data packet into an AMBA format command data packet to drive the NVMe controller, and convert the AMBA format completion data packet returned by the NVMe controller into a TLP format completion data packet and return it to the PCIe EP device.

[0010] In some embodiments, the verification platform further comprises: a queue from the application layer to the transport layer and a queue from the transport layer to the application layer;

[0011] The PCIe EP device includes an al2tl_callback function and a tl2al_callback function;

[0012] The al2tl_callback function is used to capture the TLP format command data packets sent by the host device and place them in different queues from the application layer to the transport layer according to different types;

[0013] The tl2al_callback function is used to obtain the TLP format completion data packet returned by the protocol transfer station from the queue from the transport layer to the application layer.

[0014] In some embodiments, the queues from the application layer to the transport layer include: a completion TLP queue, a configuration TLP queue, and a memory TLP queue;

[0015] The TLP format command data packet distribution mechanism is as follows:

[0016] According to the analysis of the TLP format command data packet type field in the PCIe protocol, the judgment condition for completing the TLP queue is whether the type field is 5'b01010, the judgment condition for configuring the TLP queue is whether its type field is 5'b00100 or 5'b00101, and the judgment condition for the Memory TLP queue is whether its type field is 5'b00000.

[0017] In some embodiments, the protocol transfer station includes a TLP-AMBA conversion device and an AMBA protocol driver module;

[0018] The TLP-AMBA conversion device is used to perform TLP to AXI protocol conversion and AXI to TLP protocol conversion;

[0019] The AMBA protocol driver module is used to drive the NVMe controller according to the TLP format command data packet obtained by the TLP-AMBA conversion device, and return the AMBA format completion data packet of the NVMe controller to the TLP-AMBA conversion device.

[0020] In some embodiments, the process of converting the TLP to AXI protocol is as follows:

[0021] Poll the completion TLP queue, the configuration TLP queue and the memory TLP queue, and when they are not empty, pop out the data first stored in the queue, and perform the following operations in sequence: conversion of AXI read and write modes, conversion of AXI addresses, conversion of AXI lengths, conversion of AXI write data, conversion of AXI write strobe signals, and conversion of AXI ID information.

[0022] In some embodiments, the process of AXI to TLP protocol conversion is as follows:

[0023] Perform corresponding conversion according to the status of the corresponding AXI channel, fill the data according to the read data and burstsize on the AXI read data channel, convert the RID and BID content on the AXI bus into the TAG field of TLP to obtain a TLP format complete data packet.

[0024] In some embodiments, the TLP-AMBA conversion device is also used to put the TLP format completion data packet of the AXI to TLP protocol conversion into a queue from the transport layer to the application layer.

[0025] According to a second aspect of the present invention, there is provided an NVMe verification method supporting a virtualized simulation device, using the verification platform described above, the verification method comprising the following steps:

[0026] The PCIe EP device is configured to include a PCIe physical function and a plurality of PCIe virtual functions, wherein the PCIe physical function has the ability to fully configure or control PCIe device resources, the PCIe physical function is associated with the plurality of PCIe virtual functions, and the PCIe virtual function shares one or more physical resources with the PCIe physical function and other PCIe virtual functions associated with the same PCIe physical function;

[0027] Static binding of multiple NVMe controllers to PCIe physical functions and several PCIe virtual functions in a one-to-one correspondence;

[0028] The PCIe RC device and the PCIe EP device are connected via a PCIe interface, a TLP format command data packet conforming to the NVMe protocol is constructed by a host device, and the command data packet is sent to the PCIe EP device via the PCIe RC device;

[0029] The protocol transfer station is used to convert the TLP format command data packet into an AMBA format command data packet to drive the NVMe controller, and the AMBA format completion data packet returned by the NVMe controller is converted into a TLP format completion data packet and returned to the PCIe EP device.

[0030] According to a third aspect of the present invention, there is further provided a computer device, the computer device comprising:

[0031] at least one processor; and

[0032] The memory stores a computer program that can be run on the processor, and the processor executes the aforementioned NVMe verification method that supports virtualization simulation devices when executing the program.

[0033] According to a fourth aspect of the present invention, a computer-readable storage medium is also provided, which stores a computer program. When the computer program is executed by a processor, the aforementioned NVMe verification method supporting a virtualized simulation device is executed.

[0034] The above-mentioned NVMe verification platform supporting virtualized simulation devices, compared with the traditional verification method, adds PCIe devices and supports the verification of multiple NVMe controllers. First, the NVMe host is configured to send different types of command data packets to the PCIe RC device, and then sent to the PCIe EP device. Through the callback function of the PCIe EP device, a TLP data packet is obtained, and the data packet format is parsed by a TLP-AMBA conversion device. The NVMe controller is driven by an AMBA protocol driver module, so that the entire NVMe verification path can maximize the restoration of the real SOC system scenario. The proposed TLP-AMBA protocol conversion device also solves the problem that TLP data packets and AMBA data packets cannot communicate. At the same time, virtualization capabilities can be provided through PCIe SR-IOV, and flexible configuration of the number and functions of NVMe controllers can be achieved, thereby reducing CPU resource loss and improving resource utilization.

[0035] In addition, the present invention also provides an NVMe verification method supporting a virtualized simulation device, a computer device, and a computer-readable storage medium, which can also achieve the above-mentioned technical effects and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other embodiments can be obtained based on these drawings without paying creative work.

[0037] Figure 1 This is a schematic diagram of the traditional NVMe controller simulation platform;

[0038] Figure 2 A schematic diagram of the structure of an NVMe verification platform supporting virtualized simulation devices provided by one embodiment of the present invention;

[0039] Figure 3 A schematic diagram of the internal structure of an NVMe verification platform supporting virtualized simulation devices provided by another embodiment of the present invention;

[0040] Figure 4 Collection and distribution of TLP data packets provided by another embodiment of the present invention;

[0041] Figure 5A A schematic diagram of a conversion process of configuring TLP to AMBA protocol provided by an embodiment of the present invention;

[0042] Figure 5BA schematic diagram of the conversion process from Memory TLP to AMBA protocol provided by one embodiment of the present invention;

[0043] Figure 5C A schematic diagram of a conversion process from TLP to AMBA protocol provided by an embodiment of the present invention;

[0044] Figure 6 A flowchart of an NVMe verification method supporting a virtualized simulation device provided by another embodiment of the present invention;

[0045] Figure 7 FIG. 4 is a diagram showing the internal structure of a computer device in another embodiment of the present invention. DETAILED DESCRIPTION

[0046] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the embodiments of the present invention are further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0047] It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are for distinguishing two non-identical entities with the same name or non-identical parameters. It can be seen that "first" and "second" are only for the convenience of expression and should not be understood as limitations on the embodiments of the present invention. The subsequent embodiments will not explain this one by one.

[0048] In one embodiment, please refer to Figure 2 and Figure 3 As shown, the present invention provides an NVMe verification platform 100 supporting virtualized simulation devices, specifically, the verification platform includes a host device 110, a PCIe RC device 120, a PCIe EP device 130, a plurality of NVMe controllers 140 and a protocol transfer station; wherein RC refers to a PCIe root complex; EP refers to a PCIe endpoint device;

[0049] The PCIe EP device 130 includes a PCIe physical function and a plurality of PCIe virtual functions, wherein the PCIe physical function has the ability to fully configure or control PCIe device resources, the PCIe physical function is associated with a plurality of PCIe virtual functions, and the PCIe virtual function shares one or more physical resources with the PCIe physical function and other PCIe virtual functions associated with the same PCIe physical function;

[0050] Multiple NVMe controllers 140 are statically bound to PCIe physical functions and several PCIe virtual functions in a one-to-one correspondence;

[0051] The PCIe RC device 120 and the PCIe EP device 130 are connected via a PCIe interface, and the host device 110 is used to construct a TLP format command data packet that complies with the NVMe protocol and send it to the PCIe EP device 130 via the PCIe RC device 120;

[0052] The protocol transfer station 150 is used to convert the TLP format command data packet into an AMBA format command data packet to drive the NVMe controller 140, and convert the AMBA format completion data packet returned by the NVMe controller 140 into a TLP format completion data packet and return it to the PCIe EP device 130.

[0053] The above-mentioned NVMe verification platform supporting virtualized simulation devices, compared with the traditional verification method, adds PCIe devices and supports the verification of multiple NVMe controllers. First, the NVMe host is configured to send different types of command data packets to the PCIe RC device, and then sent to the PCIe EP device. Through the callback function of the PCIe EP device, a TLP data packet is obtained, and the data packet format is parsed by a TLP-AMBA conversion device. The NVMe controller is driven by an AMBA protocol driver module, so that the entire NVMe verification path can maximize the restoration of the real SOC system scenario. The proposed TLP-AMBA protocol conversion device also solves the problem that TLP data packets and AMBA data packets cannot communicate. At the same time, virtualization capabilities can be provided through PCIe SR-IOV, and flexible configuration of the number and functions of NVMe controllers can be achieved, thereby reducing CPU resource loss and improving resource utilization.

[0054] In some embodiments, please refer to Figure 4 As shown, the verification platform also includes: a queue from the application layer to the transport layer and a queue from the transport layer to the application layer;

[0055] The PCIe EP device 130 includes an al2tl_callback function 131 and a tl2al_callback function 132;

[0056] The al2tl_callback function 131 is used to capture the TLP format command data packets sent by the host device 110 and place them in different queues from the application layer to the transport layer according to different types;

[0057] The tl2al_callback function 132 is used to obtain the TLP format completion data packet returned by the protocol transfer station 150 from the queue from the transport layer to the application layer.

[0058] In some embodiments, please refer to Figure 4 As shown, the queues from the application layer to the transport layer include: completion TLP queue, configuration TLP queue and memory TLP queue;

[0059] The TLP format command data packet distribution mechanism is as follows:

[0060] According to the analysis of the TLP format command data packet type field in the PCIe protocol, the judgment condition for completing the TLP queue is whether the type field is 5'b01010, the judgment condition for configuring the TLP queue is whether its type field is 5'b00100 or 5'b00101, and the judgment condition for the Memory TLP queue is whether its type field is 5'b00000.

[0061] In some embodiments, the protocol transfer station 150 includes a TLP-AMBA conversion device 151 and an AMBA protocol driver module 152;

[0062] The TLP-AMBA conversion device 151 is used to perform TLP to AXI protocol conversion and AXI to TLP protocol conversion;

[0063] The AMBA protocol driver module 152 is used to drive the NVMe controller 140 according to the TLP format command data packet obtained by the TLP-AMBA conversion device 151, and return the AMBA format completion data packet of the NVMe controller 140 to the TLP-AMBA conversion device 151.

[0064] In some embodiments, the process of converting the TLP to AXI protocol is as follows:

[0065] Poll the completion TLP queue, the configuration TLP queue and the memory TLP queue, and when they are not empty, pop out the data first stored in the queue, and perform the following operations in sequence: conversion of AXI read and write modes, conversion of AXI addresses, conversion of AXI lengths, conversion of AXI write data, conversion of AXI write strobe signals, and conversion of AXI ID information.

[0066] In some embodiments, the process of AXI to TLP protocol conversion is as follows:

[0067] Perform corresponding conversion according to the status of the corresponding AXI channel, fill the data according to the read data and burstsize on the AXI read data channel, convert the RID and BID content on the AXI bus into the TAG field of TLP to obtain a TLP format complete data packet.

[0068] In some embodiments, the TLP-AMBA conversion device 151 is also used to put the TLP format completion data packet of the AXI to TLP protocol conversion into the queue from the transport layer to the application layer.

[0069] In another embodiment, in order to facilitate understanding of the solution of the present invention, the method of the present invention is described in detail below by taking an application scenario including n NVMe controllers and using the CPU as the host end to construct a data packet that complies with the NVMe protocol as an example. This embodiment provides an NVMe verification platform based on a PCIe system that supports a virtualized simulation device. The specific implementation scheme is as follows:

[0070] The implementation principle is: using the PCIe protocol as a "transfer station" for protocol conversion. Compared with traditional verification platforms, it is not only suitable for the verification of multiple NVMe controllers, but also can configure the number and specific functions of NVMe controllers through PCIe SR-IOV. And the proposed conversion device for TLP data packets and AMBA data packets can solve the problem of incompatibility between protocols; the PF and VF of the verification platform can be configured through the PCIe SR-IOV function. As shown in the figure, NVMe controller 0 has the PF function, and the remaining NVMe controllers are VF functions. The creation and configuration of VF are all performed on the basis of PF driver; the specific data packet communication process of the verification platform is: configure the NVMe Host device to send different types of command data packets to the PCIe RC device, the PCIe RC device is connected to the PCIe EP device through the PCIe interface, and then a TLP data packet is obtained from the PCIe EP device. The data packet is an NVMe command based on the PCIe protocol, which shows the PCIe data packet format, and then the data packet is parsed into a format related to the AMBA protocol through the TLP-AMBA conversion device, and then drives the DUT (design under test) through the AMBA protocol driver module. The specific operation of the TLP-AMBA conversion device is as follows: on the PCIe EP device side, a TLP data packet is obtained through the al2tl_callback function of the PCIe EP device, the TLP data packet is converted into an AMBA format data packet through the TLP-AMBA conversion device and sent to the AMBA protocol driver module, and the AMBA data packet is converted into a TLP format data packet through the tl2al_callback function and sent to the PCIe EP device to complete the communication response.

[0071] The following is a detailed description of the working process of the verification platform:

[0072] The first step is to use the callback function of the PCIe EP device to complete the collection and distribution of TLP data packets. Figure 4As shown in the figure, the callback function can capture TLP from the application layer to the transport layer, and place it in different queues according to different types, which will be used as the driver of the AMBA protocol driver module in the future; at the same time, the TLP data packet converted by the AMBA protocol will be placed in the queue from the transport layer to the application layer, as shown in the figure. Figure 4 The distribution mechanism of TLP packets is based on the analysis of the type field in the PCIe protocol. The judgment condition for the completed TLP is whether its type field is 5'b01010, the judgment condition for the configured TLP is whether its type field is 5'b00100 (type0) or 5'b00101 (type1), and the judgment condition for the Memory TLP is whether its type field is 5'b00000.

[0073] The second step is to convert PCIe configuration TLP to AMBA protocol. The specific steps are as follows Figure 5A shown.

[0074] First, the TLP to AMBA protocol conversion device will poll the configuration TLP queue distributed in the first step. When it is not empty, the configuration TLP first stored in the queue will be popped out and enter the TLP to AMBA protocol conversion device to perform its function. The specific execution process takes the conversion from TLP to AXI protocol as an example:

[0075] (1) The conversion of AXI read and write modes will be distinguished according to the format field in the TLP. If the format field in the TLP is 3'b010, it means a configuration write TLP, and it will be converted to an AXI write operation. If its field is 3'b000, it means a configuration read TLP, and it will be converted to an AXI read operation.

[0076] (2) AXI address conversion: The bus number, device number, function number, and configuration register number are extracted from the configuration TLP, and the address information is converted according to the configuration of the DUT address conversion module. The conversion formula is as follows:

[0077] AXI_ADDR = {4'b0, bus number, device number, function number, configuration register number, 2'b0} + address conversion module for the source address information of the configuration TLP

[0078] (3) AXI length conversion. Due to the limitation of the configuration TLP length field in the PCIe protocol, the length is limited to 1 double word. According to the burst size of the DUT, the AXI length conversion is completed. If the burst size is greater than or equal to 32 bits, the length is 1. If the burst size is 8 bits, the length is 4. If the burst size is 16 bits, the length is 2.

[0079] (4) AXI write data conversion: a double word of data is obtained from the configuration TLP, and the AXI write data conversion is completed according to the Burstsize of the DUT.

[0080] (5) Conversion of AXI write strobe signal. Due to the restrictions on configuring TLP first byte enable and last byte enable in the PCIe protocol, the first byte enable must be 4'hf and the last byte enable must be 4'h0, so each bit of the AXI write strobe signal is also 1.

[0081] (6) Conversion of AXI ID information: extract the TAG field in the configuration TLP as the AXI ID field.

[0082] After completing the conversion of PCIe configuration TLP to AXI protocol, the verification platform will drive the DUT in the form of AXI protocol, wait for the AXI transmission to end, and then complete the conversion of AXI response channel and read data channel to PCIe completion TLP, which will mainly include the following aspects:

[0083] (1) Perform TLP status conversion, and complete the corresponding conversion according to the status of the corresponding AXI channel. If the response status on the AXI bus is OKAY, the status of the completed data packet is converted to Success; if the response status on the AXI bus is SLVERR or DECERR, the status of the completed data packet can be directed to ABORT or UR according to the user's selection;

[0084] (2) Configure the conversion of the read completion TLP data information and complete the filling of the PCIe read completion TLP data according to the read data and burstsize on the AXI read data channel;

[0085] (3) Configure and complete the conversion of TLP TAG information, and convert the RID and BID content on the AXI bus into the TAG field of the completed TLP.

[0086] The third step is to convert PCIe Memory TLP to AMBA protocol. The specific steps are as follows: Figure 5B shown.

[0087] First, the TLP to AMBA protocol conversion device will poll the corresponding Memory TLP queue distributed in the first step. When it is not empty, the Memory TLP first stored in the queue will be popped out and enter the TLP to AMBA protocol conversion device to perform its function. The specific execution process takes the conversion of TLP to AXI protocol as an example.

[0088] (1) The conversion of AXI read and write modes will be distinguished according to the format field in the TLP. If the format field in the TLP is 3'b010, it means a configuration write TLP, and it will be converted to an AXI write operation. If its field is 3'b000, it means a configuration read TLP, and it will be converted to an AXI read operation.

[0089] (2) AXI address conversion: extract the address information from the Memory TLP, calculate its offset from the corresponding BAR and address, and add the calculated result to the source address information of the Memory TLP from the address conversion module to finally obtain the converted AXI address information;

[0090] (3) AXI length conversion: The AXI length is calculated based on the length information extracted from the Memory TLP and the AXI address;

[0091] (4) Conversion of AXI write strobe signals. Due to address misalignment and randomness of length, the conversion of AXI write strobe signals is mainly concentrated on the first strobe and last strobe signals. Each bit of the strobe signals of other write channels is also 1. Therefore, the calculation of the first and last strobe signals can be combined with the Burst size corresponding to the DUT, AXI_addr, and PCIe_length to calculate the length information in the Memory TLP.

[0092] (5) AXI write data conversion: several double-word data obtained from the Memory TLP are converted according to the Burstsize of the DUT and the strobe signal obtained in 4).

[0093] (6) Conversion of AXI ID information: extract the TAG field in the configuration TLP as the AXI ID field.

[0094] After completing the conversion from PCIe Memory TLP to AXI protocol, the verification platform will drive the DUT in the form of AXI protocol. After waiting for the end of this AXI transmission, it will then complete the conversion of the AXI response channel and the read data channel to PCIe to complete TLP. This conversion process is consistent with the conversion of AXI to TLP protocol for TLP configuration.

[0095] The fourth step is to complete the conversion of PCIe TLP to AMBA protocol. The specific steps are as follows: Figure 5C shown.

[0096] It should be noted that the process of completing the conversion from TLP to AMBA protocol is the same as the principle and process of configuring TLP and Memory TLP, so I will not go into details again. After the above steps, the TLP-AMBA conversion device can not only successfully drive the DUT but also reply to the PCIe EP device to complete the TLP data packet, realizing the generation of more realistic verification stimuli and the construction of system scenarios.

[0097] In yet another embodiment, please refer to Figure 6 As shown, the present invention also provides an NVMe verification method 200 that supports virtualized simulation devices, using the verification platform described above, the verification method includes the following steps:

[0098] Step 201, configuring a PCIe EP device to include a PCIe physical function and a plurality of PCIe virtual functions, wherein the PCIe physical function has the ability to fully configure or control PCIe device resources, the PCIe physical function is associated with the plurality of PCIe virtual functions, and the PCIe virtual function shares one or more physical resources with the PCIe physical function and other PCIe virtual functions associated with the same PCIe physical function;

[0099] Step 202, statically binding multiple NVMe controllers to PCIe physical functions and several PCIe virtual functions in a one-to-one correspondence;

[0100] Step 203, connecting the PCIe RC device and the PCIe EP device via a PCIe interface, constructing a TLP format command data packet that complies with the NVMe protocol using a host device, and sending the command data packet to the PCIe EP device via the PCIe RC device;

[0101] Step 204, using a protocol transfer station to convert the TLP format command data packet into an AMBA format command data packet to drive the NVMe controller, and convert the AMBA format completion data packet returned by the NVMe controller into a TLP format completion data packet and return it to the PCIe EP device.

[0102] The above-mentioned NVMe verification method supporting virtualized simulation devices adds PCIe devices and supports verification of multiple NVMe controllers. First, the NVMe host is configured to send different types of command data packets to the PCIe RC device, and then sent to the PCIe EP device. Through the callback function of the PCIe EP device, a TLP data packet is obtained, and the data packet format is parsed by a TLP-AMBA conversion device. The NVMe controller is driven by an AMBA protocol driver module, so that the entire NVMe verification path can maximize the restoration of the real SOC system scenario. The proposed TLP-AMBA protocol conversion device also solves the problem that TLP data packets and AMBA data packets cannot communicate. At the same time, virtualization capabilities can be provided through PCIe SR-IOV, and flexible configuration of the number and functions of NVMe controllers can be achieved, thereby reducing CPU resource loss and improving resource utilization.

[0103] It should be noted that the specific limitations on the NVMe verification method that supports virtualized simulation devices can be found in the above limitations on the NVMe verification platform that supports virtualized simulation devices, which will not be repeated here.

[0104] According to another aspect of the present invention, a computer device is provided. The computer device may be a server. Figure 7 As shown. The computer device includes a processor, a memory, a network interface and a database connected via a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The database of the computer device is used to store data. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the NVMe verification method supporting virtualization simulation devices described above is implemented. Specifically, the verification method includes the following steps:

[0105] The PCIe EP device is configured to include a PCIe physical function and a plurality of PCIe virtual functions, wherein the PCIe physical function has the ability to fully configure or control PCIe device resources, the PCIe physical function is associated with the plurality of PCIe virtual functions, and the PCIe virtual function shares one or more physical resources with the PCIe physical function and other PCIe virtual functions associated with the same PCIe physical function;

[0106] Static binding of multiple NVMe controllers to PCIe physical functions and several PCIe virtual functions in a one-to-one correspondence;

[0107] The PCIe RC device and the PCIe EP device are connected via a PCIe interface, a TLP format command data packet conforming to the NVMe protocol is constructed by a host device, and the command data packet is sent to the PCIe EP device via the PCIe RC device;

[0108] The protocol transfer station is used to convert the TLP format command data packet into an AMBA format command data packet to drive the NVMe controller, and the AMBA format completion data packet returned by the NVMe controller is converted into a TLP format completion data packet and returned to the PCIe EP device.

[0109] According to another aspect of the present invention, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the NVMe verification method supporting a virtualized simulation device described above is implemented. Specifically, the verification method includes the following steps:

[0110] The PCIe EP device is configured to include a PCIe physical function and a plurality of PCIe virtual functions, wherein the PCIe physical function has the ability to fully configure or control PCIe device resources, the PCIe physical function is associated with the plurality of PCIe virtual functions, and the PCIe virtual function shares one or more physical resources with the PCIe physical function and other PCIe virtual functions associated with the same PCIe physical function;

[0111] Static binding of multiple NVMe controllers to PCIe physical functions and several PCIe virtual functions in a one-to-one correspondence;

[0112] The PCIe RC device and the PCIe EP device are connected via a PCIe interface, a TLP format command data packet conforming to the NVMe protocol is constructed by a host device, and the command data packet is sent to the PCIe EP device via the PCIe RC device;

[0113] The protocol transfer station is used to convert the TLP format command data packet into an AMBA format command data packet to drive the NVMe controller, and the AMBA format completion data packet returned by the NVMe controller is converted into a TLP format completion data packet and returned to the PCIe EP device.

[0114] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0115] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0116] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. An NVMe verification platform supporting virtualized simulation devices, characterized in that: The verification platform includes a host device, a PCIe RC device, a PCIe EP device, multiple NVMe controllers and a protocol transfer station; The PCIe EP device includes a PCIe physical function and several PCIe virtual functions, wherein the PCIe physical function has the ability to fully configure or control PCIe device resources, the PCIe physical function is associated with the several PCIe virtual functions, and the PCIe virtual function shares one or more physical resources with the PCIe physical function and other PCIe virtual functions associated with the same PCIe physical function; Multiple NVMe controllers are statically bound to PCIe physical functions and several PCIe virtual functions in a one-to-one correspondence; The PCIe RC device and the PCIe EP device are connected via a PCIe interface, and the host device is used to construct a TLP format command data packet that complies with the NVMe protocol and send it to the PCIe EP device via the PCIe RC device; The protocol transfer station is used to convert the TLP format command data packet into an AMBA format command data packet to drive the NVMe controller, and convert the AMBA format completion data packet returned by the NVMe controller into a TLP format completion data packet and return it to the PCIe EP device.

2. The NVMe verification platform supporting virtualized simulation devices according to claim 1, characterized in that: The verification platform also includes: a queue from the application layer to the transport layer and a queue from the transport layer to the application layer; The PCIe EP device includes an al2tl_callback function and a tl2al_callback function; The al2tl_callback function is used to capture the TLP format command data packets sent by the host device and place them in different queues from the application layer to the transport layer according to different types; The tl2al_callback function is used to obtain the TLP format completion data packet returned by the protocol transfer station from the queue from the transport layer to the application layer.

3. The NVMe verification platform supporting virtualized simulation devices according to claim 2, characterized in that: The queues from the application layer to the transport layer include: completion TLP queue, configuration TLP queue, and memory TLP queue; The TLP format command data packet distribution mechanism is as follows: According to the analysis of the TLP format command data packet type field in the PCIe protocol, the judgment condition for completing the TLP queue is whether the type field is 5'b01010, the judgment condition for configuring the TLP queue is whether its type field is 5'b00100 or 5'b00101, and the judgment condition for the Memory TLP queue is whether its type field is 5'b00000.

4. The NVMe verification platform supporting virtualized simulation devices according to claim 3, characterized in that: The protocol transfer station includes a TLP-AMBA conversion device and an AMBA protocol driver module; The TLP-AMBA conversion device is used to perform TLP to AXI protocol conversion and AXI to TLP protocol conversion; The AMBA protocol driver module is used to drive the NVMe controller according to the TLP format command data packet obtained by the TLP-AMBA conversion device, and return the AMBA format completion data packet of the NVMe controller to the TLP-AMBA conversion device.

5. The NVMe verification platform supporting virtualized simulation devices according to claim 4, characterized in that: The process of TLP to AXI protocol conversion is as follows: Poll the completion TLP queue, the configuration TLP queue and the memory TLP queue, and when they are not empty, pop out the data first stored in the queue, and perform the following operations in sequence: conversion of AXI read and write modes, conversion of AXI addresses, conversion of AXI lengths, conversion of AXI write data, conversion of AXI write strobe signals, and conversion of AXI ID information.

6. The NVMe verification platform supporting virtualized simulation devices according to claim 4, characterized in that: The process of AXI to TLP protocol conversion is as follows: Perform corresponding conversion according to the status of the corresponding AXI channel, fill the data according to the read data and burst size on the AXI read data channel, convert the RID and BID content on the AXI bus into the TAG field of TLP to obtain a TLP format complete data packet.

7. The NVMe verification platform supporting virtualized simulation devices according to claim 6, characterized in that: The TLP-AMBA conversion device is also used to put the TLP format completed data packet converted from AXI to TLP protocol into the queue from the transport layer to the application layer.

8. An NVMe verification method supporting virtualized simulation devices, characterized in that: Using the verification platform described in any one of claims 1 to 7, the verification method comprises the following steps: The PCIe EP device is configured to include a PCIe physical function and a plurality of PCIe virtual functions, wherein the PCIe physical function has the ability to fully configure or control PCIe device resources, the PCIe physical function is associated with the plurality of PCIe virtual functions, and the PCIe virtual function shares one or more physical resources with the PCIe physical function and other PCIe virtual functions associated with the same PCIe physical function; Static binding of multiple NVMe controllers to PCIe physical functions and several PCIe virtual functions in a one-to-one correspondence; The PCIe RC device and the PCIe EP device are connected via a PCIe interface, a TLP format command data packet conforming to the NVMe protocol is constructed by a host device, and the command data packet is sent to the PCIe EP device via the PCIe RC device; The protocol transfer station is used to convert the TLP format command data packet into an AMBA format command data packet to drive the NVMe controller, and the AMBA format completion data packet returned by the NVMe controller is converted into a TLP format completion data packet and returned to the PCIe EP device.

9. A computer device, characterized in that: include: at least one processor; as well as A memory storing a computer program executable in the processor, wherein the processor executes the verification method according to claim 8 when executing the program.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the verification method according to claim 8 is performed.

Images