Large-scale visual cortical neural network simulation method based on virtual synapse concept

Abstract

A large-scale visual cortex neural network simulation method based on the concept of virtual synapses involves brain-like computing, neural network modeling and simulation. The synaptic conductance calculation strategy of "virtual synapses" is used to reduce the independence of the calculation process of each state variable, and the neuron parameter update is synchronized by multiple threads with the help of the CUDA computing platform. The synaptic conductance calculation strategy of "virtual synapses" is used. "Virtual synapses" are the integration of synaptic inputs received by postsynaptic neurons. Each postsynaptic neuron has n "virtual synapses". When simulating large-scale neural networks, the present invention reduces the huge synaptic current calculation process and reduces the independence of the calculation process of each state variable to save memory usage and reduce time consumption.

Description

Technical Field

[0001] The present invention relates to brain-like computing, neural network modeling and simulation, and in particular to a large-scale visual cortex neural network simulation method based on virtual synapses. Background Art

[0002] The brain is the control center of the organism and contains 10 11 Order of magnitude of neurons and 10 14 The vast number of neurons and synapses in the retina constitutes an extremely complex biological neural network. Vision is one of the most important ways to perceive and acquire information about the external world. Light is received by the retina and converted into electrical signals, which are then transmitted layer by layer to various brain regions in the visual cortex for further processing, ultimately forming the image perceived by humans, represented by neural activity. The response characteristics of neurons in the primary visual cortex (V1) are well understood. These neurons exhibit stimulus selectivity for a range of different parameters, such as the position, size, shape, and color of objects.

[0003] There are two main approaches to neuroscience research: using a variety of experimental techniques to conduct experiments ranging from microscopic molecules to macroscopic behaviors, from animal brains to human brain functions; and using mathematical analysis, numerical calculations, and computer simulations to simulate and study biological neural systems at different levels, thereby revealing the mysteries of the brain's nervous system by studying and exploring the brain's information processing mechanisms from a computational perspective. On the one hand, an important goal of visual neurophysiology is to develop models of these neurons to describe how this stimulus selectivity arises, ultimately integrating all these models into a single theory to predict the responses of neurons and populations to arbitrary stimuli. On the other hand, in order to answer the question of how neural activity in the brain causes visual cognition and visual cognition-related behaviors, integrating knowledge based on the relationship between the structure and function of the neural matrix is also a major goal of neuroinformatics and data-driven computational modeling.

[0004] However, biological neural network systems are complex nonlinear dynamic systems. Their complex neuronal and synaptic dynamics, intricate network connection topology, and the interconnected computation of massive amounts of network state data present significant challenges in their modeling and computation, particularly in terms of the timeliness and parallel implementation of large-scale biological neural network simulation algorithms. For example, in large-scale biological neural network simulations, the computational resource consumption of synaptic currents is a significant component of the overall computational resource consumption. Effectively reducing this resource consumption is a significant challenge; another crucial issue is effectively reducing the independence of the computational process of various state variables in biological neural networks to improve simulation efficiency. Summary of the Invention

[0005] The purpose of the present invention is to provide a large-scale visual cortical neural network simulation method based on the concept of virtual synapses. When simulating large-scale neural networks, the huge synaptic current calculation process is reduced and the independence of the calculation process of each state variable is reduced to save memory usage and reduce time consumption.

[0006] To achieve this goal, the present invention provides a large-scale visual cortical network simulation algorithm based on virtual synapses. To reduce the voluminous synaptic current calculation process, the present invention utilizes a "virtual synapse" synaptic conductance calculation strategy. To reduce the independence of the calculation process for each state variable, the present invention utilizes a CUDA computing platform to synchronize multi-threaded neuron parameter updates.

[0007] To reduce the cumbersome synaptic current calculation process, this paper uses a "virtual synapse" synaptic conductance calculation strategy. A "virtual synapse" is the integration of synaptic inputs received by a postsynaptic neuron. Each postsynaptic neuron has n "virtual synapses" (n depends on the number of synapse types used in the network). The calculation of the total input synaptic current of a neuron consists of three stages, and this strategy optimizes these three stages:

[0008] In the first stage, at the postsynaptic neuron, the single synaptic ion channel gate opening is calculated for the current clock step based on the presynaptic neuron state information (discharge sequence, synaptic ion channel gate opening sequence). For this stage, considering that the synaptic weight is related to the presynaptic neuron discharge sequence but not the current state, this strategy discretizes the time course of the synaptic weight and updates the synaptic conductance of the postsynaptic neuron "virtual synapse" only at the presynaptic neuron discharge moment, based on the specific synaptic delay, thus avoiding conductance updates at every moment.

[0009] In the second stage, the conductance of each synapse is calculated based on the obtained synaptic parameters (delay, maximum conductance). For this stage, synapses of the same type have the same time evolution process, so the "virtual synapse" integrates the synaptic inputs of the same type and performs synchronous time evolution, avoiding the need to calculate each synapse one by one.

[0010] In the third stage, the synaptic current is calculated based on the synaptic conductance, and all input synaptic currents are accumulated to obtain the total input synaptic current of the neuron. Since the synaptic current calculation is only relevant to the postsynaptic neuron, only the virtual synaptic weights of the postsynaptic neuron need to be traversed and accumulated, avoiding the repeated calculation of the synaptic conductance coefficient at the postsynaptic neuron end and simplifying the calculation process.

[0011] At the same time, the calculation of synaptic conductance is separated from the calculation of the current of the postsynaptic neuron, which reduces the coupling degree of the states of the pre- and post-synaptic neurons during the synaptic current calculation and enhances the parallel performance of the traditional clock-driven algorithm. Therefore, the introduction of the "virtual synapse" conceptual model reduces the computing resource consumption of the traditional clock-driven algorithm and improves its parallel performance.

[0012] Preferably, in software implementation, the virtual synapse is designed as a circular array structure, with the array length determined by the maximum synaptic delay and a "flag" pointing to the current position in the array. The array member pointed to by the "flag" is the virtual synaptic conductance at the current moment. At each time step, the neuron calculates the input current based on this value and updates the conductance at the next moment based on the current state and the time evolution of the synaptic conductance. The position is then reset to zero, and the "flag" is shifted back one position. When the presynaptic neuron generates an action potential, it corrects the synaptic conductance. This correction is recorded in the array position shifted back by the number of bits corresponding to the synaptic delay.

[0013] In order to reduce the independence of the calculation process of each state variable, the present invention uses the CUDA computing platform to perform multi-threaded synchronous operation on the neuron parameter update. The algorithm structure and concept are as follows:

[0014] 1) The class "Neuron" represents the neuron node in the neural network. Its member variables record the neuron membrane potential and various parameters required for membrane potential update, the synaptic connection structure of the neuron's incoming and outgoing signals, and the structure of data recorded during the simulation process.

[0015] 2) The class "Synapse" represents the synapses of neurons in a neural network. Its member variables record the basic conductance, delay, and postsynaptic neuron of the synapse.

[0016] 3) The class "VirtualSyn" represents the virtual synapse that receives neurons in the neural network. Its member variables record the synaptic conductance cycle array and parameters related to the conductance time process.

[0017] Because the calculation of input current and the update of membrane potential under virtual synaptic conditions are relevant only to the neuron itself, the membrane potential of each neuron is performed synchronously within a single GPU thread. If a neuron generates an action potential, the correction value at a specific position in the circular array of the postsynaptic neuron's virtual synaptic weight is updated. To ensure memory write safety, atomic operations are used here. Finally, the synchronization thread ensures that all neuron states are updated and synaptic calculations are completed before entering the next time step.

[0018] By using virtual synapses and CUDA synchronous operations, the present invention simplifies the two most time-consuming processes in neural network simulation: traversing synapses to calculate synaptic weights and traversing neurons to update membrane potentials, thereby shortening the simulation time and providing new ideas for the simulation of large-scale neural networks with more complex synaptic connection topologies. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a schematic diagram of the virtual synaptic structure of the postsynaptic neuron j.

[0020] Figure 2 Schematic diagram of the algorithm for synchronous decay and local correction of exponentially different synaptic conductance.

[0021] Figure 3 This is a diagram of the data structure implemented by C++ / CUDA software.

[0022] Figure 4 It is a schematic diagram of the operation flow of C++ / CUDA software implementation. DETAILED DESCRIPTION

[0023] Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiments are only used to illustrate the present invention and are not used in limiting the scope of the present invention.In addition, should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall equally within the scope limited by the appended claims of the application.

[0024] This paper provides a large-scale visual cortex neural network simulation method based on virtual synapses. This method accelerates neural network simulation by simplifying the calculation of single synaptic weights and single neuron current input, while synchronizing neuron membrane potential updates. A specific visual cortex neural network is constructed for simulation.

[0025] Neuron membrane potential V and its rate of change The expIF model is used, as shown in Equation 1, which has high computational efficiency and a more realistic membrane potential time course than the simple IAF model:

[0026]

[0027] where g exc and g inh are the synaptic conductances of excitatory and inhibitory inputs, R m is the membrane resistance, τ m is the membrane time constant, g exc and g inh are the excitatory and inhibitory synaptic conductances, E exc and E inh are excitatory and inhibitory reversal potentials, ΔT is the threshold slope factor. When the membrane potential is greater than the threshold V T When the neuron generates an action potential, the membrane potential is set to the resting value E L , and enters the refractory period, the refractory period duration is t ref , during which the membrane potential remains constant at its resting value. The simulation time step dt is set to 0.01ms.

[0028] The synaptic structures considered in the model can be divided into three types based on the speed and type of action: fast excitatory, slow excitatory, and inhibitory. These correspond to the synaptic structures in the body that use three different chemical substances, AMPA (α-amino-3-hydroxy-5-methyl-4-isoxazole-propionic acid), NMDA (N-methyl-D-aspartic acid), and GABA (γ-aminobutyric acid), as neurotransmitters. The evolution of the weights of these synaptic structures over time t is modeled as an exponential difference model:

[0029]

[0030] where σ is the total number of possible presynaptic neuron types, g σ is the basic weight when the presynaptic neuron is of type σ; Pre is the set of presynaptic neurons of type σ, k is the number of action potentials generated by the presynaptic neuron m, t j,m is the time when the jth action potential of presynaptic neuron m is generated; G Type s describes the time course of the synaptic conductance when the presynaptic neuron m generates an action potential at s = 0. The change in the synaptic weight Gt at time t after the action potential occurs is modeled by the exponential difference function, τ r is the rise time constant, τ d is the decay time constant of GABA. These two parameters are different for different types of synaptic inputs.

[0031] In order to reduce the huge synaptic current calculation process, the present invention uses a synaptic conductance calculation strategy of "virtual synapse". "Virtual synapse" is the integration of synaptic input received by the postsynaptic neuron. Each postsynaptic neuron has n "virtual synapses" (n depends on the number of synapse types used in the network). Figure 1 The structure of virtual synapse is briefly described.

[0032] The calculation of the total input synaptic current of a neuron consists of three stages, and this strategy optimizes these three stages:

[0033] In the first stage, at the postsynaptic neuron, the single synaptic ion channel gate opening is calculated for the current clock step based on the presynaptic neuron state information (discharge sequence, synaptic ion channel gate opening sequence). For this stage, considering that the synaptic weight is related to the presynaptic neuron discharge sequence but not the current state, this strategy discretizes the time course of the synaptic weight and updates the synaptic conductance of the postsynaptic neuron "virtual synapse" only at the presynaptic neuron discharge moment, based on the specific synaptic delay, thus avoiding conductance updates at every moment.

[0034] In the second stage, the conductance of each synapse is calculated based on the obtained synaptic parameters (delay, maximum conductance). For this stage, synapses of the same type have the same time evolution process, so the "virtual synapse" integrates the synaptic inputs of the same type and performs synchronous time evolution, avoiding the need to calculate each synapse one by one.

[0035] In the third stage, the synaptic current is calculated based on the synaptic conductance, and all input synaptic currents are accumulated to obtain the total input synaptic current of the neuron. Since the synaptic current calculation is only relevant to the postsynaptic neuron, only the virtual synaptic weights of the postsynaptic neuron need to be traversed and accumulated, avoiding the repeated calculation of the synaptic conductance coefficient at the postsynaptic neuron end and simplifying the calculation process.

[0036] To apply virtual synapses in the exponential difference synaptic model, the time course and calculation of synaptic conductance are processed as follows:

[0037] 1) According to formula (2), for a single synapse, let but Where k is the number of action potentials generated by the presynaptic neuron, t k is the action potential moment. Note that the two exponential functions are independent of each other. Here we use g d ,g r Respectively, let The instantaneous rate of change of the two They are Visible g r and g d When the presynaptic neuron generates an action potential and transmits it to the postsynaptic neuron at the current moment, g r and g d Add the correction amount s respectively. So the conductance of a single synapse gt = g d tg r t.

[0038] 2) According to the result of 1), when multiple τ r and τ d When equal synapses are integrated together, the sum of the two exponential functions of the corresponding synapses is recorded as ∑gd and ∑g r , which can be synchronously decayed at every moment At the same time, according to the action potential received by each synapse that affects itself, ∑g d and ∑g r Local correction of: Where m represents the presynaptic neuron that generates action potentials, s m Represents the correction amount of the mth neuron, and the required correction amount is summed during local correction And superimposed on ∑g d and ∑g r At this time, the total conductance of this type of synapse gt=∑g d -∑g r .

[0039] 3) Based on the results of 2), design synapse-related data structures such as Figure 2 As shown. The presynaptic neuron records the sequence number, synaptic delay and basic weight of all postsynaptic neurons; the postsynaptic neuron records the ∑g of all synaptic types. d and ∑g r At the same time, there is an array used to record the local correction amount of synaptic weight at each moment. The length of the array is equal to the maximum synaptic delay of this type of synapse. The position of the conductance correction amount at the current moment in the array is indicated by a pointer. The pointer moves back one position at each simulation step and eventually points to the first position again. That is, the correction amount array can be regarded as a ring structure. Figure 2 Take for example all the GABA type synapses that the postsynaptic neuron receives.

[0040] 3-1) After neuron i generates an action potential, it traverses its synaptic structure list and updates the correction amount for the specific type of synapse of each postsynaptic neuron.

[0041] 3-2) For the ij connection, the synaptic structure list of i records the basic weight and synaptic delay of this synapse, and points to the GABA type synaptic structure of j. After the action potential is generated, the correction array of j is based on the current position and synaptic delay t ji Find the location that needs to be updated and add the basic weight g ji .

[0042] 3-3) When updating the membrane potential of j, firstly, ∑g of each synaptic structure is updated. d and ∑g r Perform synchronous decay, add the current position correction value (as shown in the figure, the correction value of GABA type is n3), and calculate the synaptic weight of this type gt = ∑g d -∑g rAnd further calculate the synaptic current. Then clear the current position correction value and move the position pointer back one position. ji After time, the effect of the action potential of neuron i on neuron j is reflected due to local correction.

[0043] The present invention separates the calculation of synaptic conductance from the calculation of the current of the postsynaptic neuron, thereby reducing the coupling degree between the states of the pre- and post-synaptic neurons during the synaptic current calculation process and enhancing the parallel performance of the traditional clock-driven algorithm. Therefore, the introduction of the "virtual synapse" conceptual model reduces the computing resource consumption of the traditional clock-driven algorithm and improves its parallel performance.

[0044] The virtual synapse is designed as a circular array structure, whose length is determined by the maximum synaptic delay. A "flag" points to the current position in the array. The array member pointed to by the "flag" is the virtual synaptic conductance at the current moment. At each time step, the neuron calculates the input current based on this value and updates the conductance for the next moment based on the current state and the time evolution of the synaptic conductance. The position is then reset to zero, and the "flag" is shifted back one position. When the presynaptic neuron generates an action potential, it corrects the synaptic conductance. This correction is recorded in the array position that is shifted back by the number of bits corresponding to the synaptic delay.

[0045] In order to reduce the independence of the calculation process of each state variable, the present invention uses the CUDA computing platform to perform multi-threaded synchronous operation on the neuron parameter update. The algorithm structure and concept are as follows:

[0046] 1) The class "Neuron" represents the neuron node in the neural network. Its member variables record the neuron membrane potential and various parameters required for membrane potential update, the synaptic connection structure of the neuron's incoming and outgoing signals, and the structure of data recorded during the simulation process.

[0047] 2) The class "Synapse" represents the synapses of neurons in a neural network. Its member variables record the basic conductance, delay, and postsynaptic neuron of the synapse.

[0048] 3) The class "VirtualSyn" represents the virtual synapse that receives neurons in the neural network. Its member variables record the synaptic conductance cycle array and parameters related to the conductance time process.

[0049] Because the calculation of input current and the update of membrane potential under virtual synaptic conditions are relevant only to the neuron itself, the membrane potential of each neuron is performed synchronously within a single GPU thread. If a neuron generates an action potential, the correction value at a specific position in the circular array of the postsynaptic neuron's virtual synaptic weight is updated. To ensure memory write safety, atomic operations are used here. Finally, the synchronization thread ensures that all neuron states are updated and synaptic calculations are completed before entering the next time step.

[0050] C++ / CUDA software implements data structures such as Figure 3 As shown in the figure, use the Neuron class to record neurons, the Synapse class to record the synaptic connections made by the presynaptic neuron, and the VirtualSyn class to record the synaptic types received by the postsynaptic neuron.

[0051] 1) The Neuron class applies to all neuron types in the model. Its member variables store the parameters required by the expIF neuron model, allowing for variable neuron parameters. The class contains an array of Synapse objects, whose length is equal to the total number of synapses when the neuron is acting as a presynaptic neuron. The class also contains an array of VirtualSyn objects, whose length is determined by the synapse classification strategy, such as AMPA, NMDA, or GABA, or LGN inputs, intralaminar excitatory inputs, interlaminar excitatory inputs, and intralaminar inhibitory inputs. The class also contains data storage structures that record the membrane potential, the conductances of different synaptic types, and the firing times during the simulation. Class methods include initialization, data storage, memory cleanup, and membrane potential updates.

[0052] 2) The Synapse class's member variables contain the synapse's delay and base weight, and point to a specific type of object in the corresponding VirtualSyn array of postsynaptic neuron objects. Class methods include initialization, memory cleanup, and updating the correction value of the VirtualSyn object pointed to.

[0053] 3) The member variables of the VirtualSyn class include the rise and decay components of the total synaptic conductance of this type ∑g d and ∑g r and corresponding time constants. Note that multiple sets of rise and decay components are allowed to simulate the superposition of multiple time processes. In this case, the respective proportions must be specified when calculating the total conductance (e.g., excitatory input within the cortex is defined as 0.7AMPA + 0.3NMDA). This class includes an array of conductance corrections, the length of which is determined by the maximum synaptic delay of this synapse. The array records the impact of the presynaptic neuron's discharge on the conductance at each moment. It also includes a marker pointing to the current position in the correction array. At each simulation step, the conductance component is appended with the correction at the current position, and the marker is then shifted back one position. Class methods include initialization and memory cleanup; synchronous decay and local correction of synaptic conductance, which are called each time Neuron updates the membrane potential; calculation of synaptic conductance, which is called each time Neuron updates the membrane potential; and updating of local corrections, which are called by Synapse when the presynaptic neuron discharges.

[0054] C++ / CUDA software implementation process is as follows Figure 4 shown.

[0055] 1) Read the neuron structure of the network from the mat file, allocate space for the Neuron object array and initialize it;

[0056] 2) Initialize the VirtualSyn object array according to the neuron type and the correction value array according to the maximum delay time step;

[0057] 3) Allocate space for the Synapse object array according to the number of synapses emitted by the neuron, read the synapse structure from the mat file and initialize it;

[0058] 4) Specify other parameters required for simulation, such as duration, simulation step size, number of threads per thread block, etc.

[0059] 5) Read the LGN neuron input current from the mat file and run the simulation;

[0060] 6) Store data into mat file and clear memory.

[0061] During the simulation, the Euler method is used to update the neuron membrane potential. The process for each time step is as follows:

[0062] 5-1) VirtualSyn synchronizes the decay and local correction of synaptic conductance components, sets the correction amount to 0 at the current moment, and moves the position marker back one position;

[0063] 5-2) VirtualSyn calculates the conductance of this type of synapse;

[0064] 5-3) LGN neurons obtain the current input current based on the mat file data, and cortical neurons obtain the input current based on the membrane potential and synaptic conductance;

[0065] 5-4) Confirm the refractory period flag. If it is not in the refractory period, update the membrane potential. If the membrane potential exceeds the threshold, reset it, set the refractory period flag, record the action potential event, and traverse the Synapse object array to update the postsynaptic neuron VirtualSyn correction value.

[0066] 5-5) Record membrane potential and various synaptic conductances.

[0067] The present invention reduces the time consumption of large-scale cortical network simulation. The present invention simulates a primary visual cortex model containing a two-layer structure with a total of 15,000 neurons and more than 10 million synaptic structures. The simulation experiment lasts 2000ms, the time step is 0.01ms, and the total running time of the C++ / CUDA program is within 20 minutes, of which the reading of the network structure takes about 8 minutes, and the simulation process using multi-threaded computing takes less than 12 minutes. This shows that the invention has high simulation efficiency. At the same time, the present invention simulates phenomena that are consistent with physiological experiments. This shows that the present invention is reliable in simulating neural networks.

[0068] The complex dynamics, intricate network topologies, and interconnectedness and exchange of massive amounts of state data in biological neural networks present significant challenges in large-scale biological neural network simulation. This paper provides an algorithm for generating and storing visual cortical networks, a realistic strategy for converting visual stimuli into neural electrical signals, and a multi-threaded, synchronously executed large-scale neural network simulation algorithm. In simulating specific neural networks, this algorithm demonstrates high computational efficiency and produces results consistent with biological reality, providing a valuable approach for achieving realistic large-scale biological neural network simulation.

Claims

1. A large-scale visual cortical neural network simulation method based on virtual synapse theory, characterized by: Use a "virtual synapse" synaptic conductance calculation strategy; reduce the independence of the calculation process of each state variable, and use the CUDA computing platform to perform multi-threaded synchronous operation of neuron parameter updates; The synaptic conductance calculation strategy of the above-mentioned "virtual synapse" is the integration of synaptic inputs received by the postsynaptic neuron. Each postsynaptic neuron has n "virtual synapses"; The calculation of the total input synaptic current of the above neuron consists of three stages, specifically: In the first stage, at the postsynaptic neuron, the ion gate opening of a single synapse at the current clock step is calculated based on the state information of the presynaptic neuron. The time course of the synaptic weight is discretized, and the synaptic conductance of the postsynaptic neuron's "virtual synapse" is updated only at the moment of the presynaptic neuron's discharge, based on the delay of the specific synapse, avoiding the conductance update at every moment. In the second stage, the conductance of each synapse is calculated based on the acquired synaptic parameters. The synaptic inputs of the same type are integrated and synchronized with time evolution, avoiding the need to calculate all synapses one by one. In the third stage, the synaptic current is calculated based on the synaptic conductance, and all input synaptic currents are accumulated to obtain the total input synaptic current of the neuron; Traverse and accumulate its own virtual synaptic weights to avoid repeated calculation of synaptic conductance coefficients at the postsynaptic neuron end, simplifying the calculation process; The virtual synapse is designed as a circular array structure. The array length is determined by the maximum synaptic delay, and there is a "flag" pointing to the current position in the array. The array member pointed by the "flag" is the virtual synaptic conductance at the current moment. At each time step, the neuron calculates the input current based on this and updates the conductance at the next moment based on the current state and the time evolution of the synaptic conductance. Then, the position is reset to zero and the "flag" is shifted back one position. When the presynaptic neuron generates an action potential, it will have a correction effect on the synaptic conductance. This correction amount is recorded in the position of the array flag bit shifted back by the corresponding number of bits of the synaptic delay.

2. The large-scale visual cortex neural network simulation method according to claim 1, characterized in that: The CUDA computing platform is used to synchronize the updates of neuron parameters through multiple threads. Specifically: 1) The class "Neuron" represents the neuron node in the neural network. Its member variables record the neuron membrane potential and various parameters required for membrane potential update, the synaptic connection structure of the neuron receiving and sending, and the structure of data recording during the simulation process; 2) The class "Synapse" represents the synapses of neurons in the neural network. Its member variables record the basic conductance, delay, and postsynaptic neuron of the synapse. 3) The class "VirtualSyn" represents a neuron in a neural network receiving a virtual synapse. Its member variables record the synaptic conductance loop array and parameters related to the conductance time course. Under virtual synaptic conditions, the calculation of input current and the update of membrane potential are only related to the neuron itself. Therefore, the membrane potential of each neuron is synchronized in a single GPU thread. If a neuron generates an action potential, the correction value at a specific position in the virtual synaptic weight loop array of the postsynaptic neuron is updated. Finally, the synchronization thread ensures that all neuron states are updated and the synaptic calculation is completed before entering the next time step.

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