Option Pricing Calculation Accelerator, Accelerator Card and Device Based on Heston Model

Abstract

The present invention discloses an option pricing calculation accelerator, accelerator card, and device based on the Heston model. The accelerator includes a first circuit for simulating volatility Vt at M time points for each simulation path, including a multiplexer, a first intermediate result calculation circuit, an adder, and a delay device. The adder is used to sum the volatility predicted by the previous iteration output by the delay device and the first intermediate result output by the first intermediate result calculation circuit to obtain the volatility Vt predicted by the current iteration, and output it after a delay of delayF. The present invention can perform full-pipeline calculations for simulating volatility at M time points for each simulation path in the option pricing calculation based on the Heston model. The hardware acceleration implementation process does not pause. The full pipeline of the entire calculation process can effectively improve the efficiency of the accelerated calculation, and has better energy efficiency and performance than CPU and GPU implementations using the same process.

Description

Technical Field

[0001] The present invention relates to FPGA-based computing acceleration technology, and in particular to an option pricing computing accelerator, an acceleration card, and a device based on the Heston model. Background Art

[0002] The calculation of option pricing is a basic computational requirement in the options trading industry. Figure 1 For option pricing calculations, the existing Monte Carlo solution process based on the Heston model and the symbolic interpretation involved are provided. The solution process includes:

[0003] S1, the value of the total payoff value of the option is initialized to 0, the price S(0) at the initial time point is the initial price S0 of the asset on the signing date, and the volatility V(0) at the initial time point is the initial volatility V0 of the asset on the signing date;

[0004] S2, traverses N simulated paths, and processes the current path j obtained by the traversal, including: simulating M time points t for the current path j, and obtaining the price St and volatility Vt at each time point t; then, for the price S(M) corresponding to the Mth time point t, if the price S(M) is greater than the preset option strike price strike_price, the difference between the price S(M) and the preset option strike price strike_price is added to the value of the total option payoff value sum_payoff;

[0005] S3, after traversing N simulation paths, first calculate the average payoff value ave_payoff of the option according to ave_payoff=sum_payoff / N; then calculate the average discounted payoff payoff according to payoff=exp(-r×T)×ave_payoff and output it (printf), where r is the risk-free rate and T is the contract expiration time.

[0006] The steps of simulating M time points t for the current path j and obtaining the price St and volatility Vt at each time point t include:

[0007] S2.1, generate two Gaussian random numbers Zv and Ztemp;

[0008] S2.2, calculate the intermediate variable Zs according to Zs=rho×Zv+sqrt(1-(rho×rho))×Ztemp, where rho is the correlation coefficient of Brownian motion and sqrt is the square root function;

[0009] S2.3, calculate the time interval dt according to dt=T / M, where T is the contract expiration time and M is the number of time intervals simulated for each path; calculate the intermediate variable Vreal according to Vreal=max(V(t-1),0), where max is the maximum value function and V(t-1) is the volatility at time point t-1;

[0010] S2.4, calculate the price St and volatility Vt at time point t according to the following formula:

[0011] Vt= V(t-1)+kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt(dt);

[0012] St= S(t-1)(1+r×dt + sqrt(Vreal)×Zs×sqrt (dt));

[0013] In the above formula, kappa is the mean reversion speed, theta is the long-term variance, beta is the volatility variance, sqrt is the square root function, r is the risk-free rate, dt is the time interval, Vreal and Zs are intermediate variables, Zv is a Gaussian random number, and S(t-1) is the price at time point t-1. Figure 1 In this example, Vt is represented by V[t], V(t-1) is represented by V[t-1], St is represented by S[t], and S(t-1) is represented by S[t-1]. Figure 1 It can be seen that the Monte Carlo solution process of the existing Heston model consists of two loops: the inner loop is used to simulate a random prediction path of the option price St and volatility Vt, Figure 1 The outer loop calculates the returns and accumulates them from all paths, i.e., lines 4 to 16. After the two-layer loop is completed, the sum of the returns is averaged and discounted to obtain the estimated option price. From the calculation formula of the price St and volatility Vt at each time point t (step S2.4), it can be seen that the calculation of each iteration in the inner loop depends on the calculation result of the previous iteration prediction. If the calculation order of the paths is not changed, the calculation of different paths can only be performed serially, which requires D path ×M clock cycles to complete the Monte Carlo simulation of a path, which results in a large delay. path =max(D vt ,D st ), D st and D vtare the number of clock cycles required to complete the calculation of the option price St and volatility Vt (step S2.4), respectively. Therefore, when implementing the existing Monte Carlo solution based on the Heston model using FPGAs, optimizing this process to reduce computational latency remains a key technical issue that needs to be addressed. Summary of the Invention

[0014] Technical problem to be solved by the present invention: In response to the above-mentioned problems in the prior art, an option pricing calculation accelerator, an acceleration card and a device based on the Heston model are provided. The present invention can simulate the volatility Vt of M time points for each simulation path in the option pricing calculation based on the Heston model and perform full-pipeline calculation. The hardware acceleration implementation process does not pause. The full pipeline of the entire calculation process can effectively improve the efficiency of the accelerated calculation, and has better energy efficiency and performance than CPU and GPU implementations under the same process.

[0015] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0016] An option pricing calculation accelerator based on the Heston model includes a first circuit for simulating volatility Vt at M time points for each simulation path, the first circuit comprising:

[0017] The multiplexer MUXA is used to select the initial volatility V0 or the volatility predicted in the previous iteration as the volatility predicted in the previous iteration V(t-1);

[0018] A first intermediate result calculation circuit is configured to calculate a first intermediate result kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt(dt) based on the volatility V(t-1) predicted in the previous iteration output by the multiplexer MUXA, where kappa is the mean reversion speed, dt is the time interval, theta is the long-term variance, Vreal is the real-time volatility, beta is the volatility variance, sqrt is the square root function, and Zv is a Gaussian random number;

[0019] The delayer delayA is used to delay the volatility V(t-1) predicted by the previous iteration output by the multiplexer MUXA;

[0020] Adder a4 is used to sum the volatility V(t-1) predicted in the previous iteration output by the delay device delayA and the first intermediate result kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt(dt) output by the first intermediate result calculation circuit to obtain the volatility Vt predicted in this iteration;

[0021] The delay device delayF is used to delay the volatility Vt predicted in this iteration and use it as the output of the multiplexer MUXA.

[0022] Optionally, the first intermediate result calculation circuit includes:

[0023] The comparator comp0 is used to compare the constant 0 with the volatility V(t-1) predicted by the previous iteration output by the multiplexer MUXA to generate a control signal;

[0024] a multiplexer MUXC configured to select, under the control of a control signal generated by the comparator comp0, the larger of the volatility V(t-1) predicted in the previous iteration output by the multiplexer MUXA and the constant 0 as the obtained real-time volatility Vreal;

[0025] The delay device delayB is used to delay the real-time volatility Vreal output by the multiplexer MUXC;

[0026] Subtractor a2 is used to subtract the real-time volatility Vreal output by delayB from the set long-term variance theta to obtain the result (theta-Vreal);

[0027] Multiplier m7 is configured to multiply the result (theta - Vreal) output by subtractor a2 by kap_dt to obtain a result kappa × dt × (theta - Vreal), where kap_dt is obtained by multiplying a set mean reversion rate kappa by a time interval dt via a multiplier, and time interval dt is obtained by multiplying the contract expiration time T by the number of time intervals M simulated for each path via a multiplier;

[0028] The square root operator sqrt is used to perform a square root operation on the real-time volatility Vreal output by the multiplexer MUXC to obtain a result sqrt(Vreal);

[0029] The delay device delayC is used to delay the external input Gaussian random number Zv;

[0030] The multiplier m5 is used to multiply the result sqrt(Vreal) output by the square root operator sqrt and the Gaussian random number Zv delayed by the delay device delayC to obtain the result sqrt(Vreal)×Zv;

[0031] a multiplier m6 for multiplying the result sqrt(Vreal)×Zv output by the multiplier m5 by the result beta_sqrt_dt to obtain a result beta×sqrt(Vreal)×Zv×sqrt(dt), wherein the result beta_sqrt_dt is obtained by multiplying the volatility variance beta by the result sqrt_dt via a multiplier, and the result sqrt_dt is obtained by performing a square root operation on the time interval dt via a square root operator;

[0032] The delayer delayA is used to delay the volatility V(t-1) predicted by the previous iteration output by the multiplexer MUXA;

[0033] Adder a3 is used to add the result kappa×dt×(theta-Vreal) output by the multiplier m7 and the result beta×sqrt(Vreal)×Zv×sqrt (dt) output by the multiplier m6 to obtain a first intermediate result kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt (dt).

[0034] Optionally, the option pricing calculation accelerator further includes a second circuit for simulating prices St at M time points for each simulation path, the second circuit including:

[0035] The multiplexer MUXB is used to select the initial price S0 or the price predicted in the previous iteration as the price predicted in the previous iteration S(t-1);

[0036] The delay device delayD is used to delay the output of the price S(t-1) predicted by the previous iteration output by the multiplexer MUXB;

[0037] The second intermediate result calculation circuit is used to calculate the result (1+r×dt+sqrt(Vreal)×Zs×sqrt(dt)), where r is the risk-free rate, dt is the time interval, sqrt is the square root function, Zs is the intermediate variable, and Zs=rho×Zv+sqrt(1-(rho×rho))×Ztemp, where rho is the correlation coefficient of Brownian motion, and Zv and Ztemp are Gaussian random numbers;

[0038] Multiplier m4 is used to multiply the result (1+r×dt + sqrt(Vreal)×Zs×sqrt(dt)) calculated by the second intermediate result calculation circuit and the price S(t-1) predicted in the previous iteration output by the delay device delayD to obtain the price St predicted in this iteration;

[0039] The delay device delayG is used to delay the price St output by the multiplier m4 and output it to the multiplexer MUXB;

[0040] The available signal generator stv_gen is used to generate the available signal St_valid when it is necessary to output the price St predicted in this iteration.

[0041] Optionally, the second intermediate result calculation circuit includes:

[0042] Multiplier m0 is used to multiply the Gaussian random number Zv and the correlation coefficient rho of the Brownian motion to obtain the result rho×Zv;

[0043] A multiplier m1 is configured to multiply the Gaussian random number Ztemp by the result gaus_cor_coef to obtain a result sqrt(1-(rho×rho))×Ztemp; wherein the circuit for generating the result gaus_cor_coef includes: a multiplier configured to multiply the correlation coefficient rho of the Brownian motion by the correlation coefficient rho of the Brownian motion to obtain rho×rho; a subtractor configured to subtract rho×rho from a constant 1; and a square root operator configured to square the result of subtracting rho×rho from the constant 1 output by the subtractor to obtain the result gaus_cor_coef;

[0044] Adder a0 is used to add the result rho×Zv and the result sqrt(1-(rho×rho))×Ztemp to obtain the intermediate variable Zs;

[0045] The delay device delayE is used to delay the intermediate variable Zs obtained by the adder a0 and output it;

[0046] The multiplier m2 is used to multiply the intermediate variable Zs output by the intermediate variable generation circuit and the result sqrt(Vreal) output by the square root operator sqrt to obtain a result sqrt(Vreal)×Zs;

[0047] Multiplier m3 is used to multiply the result sqrt(Vreal)×Zs output by multiplier m2 and the result sqrt_dt to obtain a result sqrt(Vreal)×Zs×sqrt(dt), where the result sqrt_dt is obtained by performing a square root operation on the time interval dt through a square root operator;

[0048] Adder a1 is used to add the result sqrt(Vreal)×Zs×sqrt(dt) output by multiplier m3 and the result rdt_plus_1 to obtain a result (1+r×dt + sqrt(Vreal)×Zs×sqrt(dt)), where the result rdt_plus_1 is the result obtained by multiplying the time interval dt and the risk-free rate r through a multiplier and then adding the result to the constant 1 through an adder (1+r×dt).

[0049] Optionally, the delay value D of the delay device delayA A Satisfied: D A = D s + D m5 + D m6 + D a3 , where D s is the delay value of the square root operator sqrt, D m5 is the delay value of multiplier m5, D m6 is the delay value of multiplier m6, D a3 is the delay value of adder a3; the delay value D of the delay device delayB A Satisfied: D B + D a2 + D m7 = D s + D m5 +D m6 , where D a2 is the delay value of adder a2, D m7 is the delay value of the multiplier m7; the delay value D of the delay device delayC C Satisfied: D C = D s ; The delay value D of the delay device delayD D Satisfied: D D = D s + D m2 +D m3 + D a1 , where D m2 is the delay value of multiplier m2, D m3 is the delay value of multiplier m3, D a1 is the delay value of adder a1; the delay value D of the delay device delayE E Satisfied: D E + D a0 + D m0 =D S , where D a0 is the delay value of adder a0, D m0is the delay value of the multiplier m0; the delay value D of the delay device delayF F and the delay value D of the delay device delayG G Satisfy D S + D m5 + D m6 + D a3 + D a4 + D F = D S + D m2 + D m3 + D a1 + D m4 + D G , where D a4 is the delay value of adder a4, D m4 is the delay value of multiplier m4.

[0050] Optionally, the multiplexer MUXA selects the initial volatility V0 or the volatility predicted in the last iteration as the volatility predicted in the last iteration V(t-1) including: first, after the system is started, R Select the initial volatility V0 in the clock cycle and calculate D path1 = D s + D m5 + D m6 + D a3 + D a4 + D F , then repeat (N / D path1 ) selection cycles, in each selection cycle, first continue D path1 The initial volatility V0 is selected as the volatility V(t-1) predicted in the previous iteration for D clock cycles. path1 ×(M - 1) clock cycles select the volatility predicted by the previous iteration as the volatility predicted by the previous iteration V(t-1), where D R The number of clock cycles required to generate the same-beat output Gaussian random numbers Zv and Ztemp after the system is started; the multiplexer MUXB selects the initial price S0 or the price predicted by the last iteration as the price predicted by the last iteration S(t-1) including: first, after the system is started, D R Select the initial price S0 in the clock cycle and calculate D path2 =D s + D m2 + D m3 + D a1 + D m4 + D G , then repeat (N / D path2) selection cycles, in each selection cycle, first continue D path2 The initial price S0 is selected as the price S(t-1) predicted by the previous iteration for D clock cycles, and then path2 ×(M - 1) clock cycles to select the price predicted by the previous iteration as the price predicted by the previous iteration S(t-1); the available signal generator stv_gen is D R The value of the available signal St_valid is generated to be 0 in the clock cycles, and then the execution is repeated (N / D path2 ) selection cycles, in each selection cycle, first continue D path2 ×(M - 1) clock cycles to generate the value of the available signal St_valid to be 0, and then continue D path2 The value of the available signal St_valid is 1 in the clock cycle, and the repeated execution (N / D path2 ) selection cycles later, the value of the available signal St_valid is 0.

[0051] Optionally, the output end of the path simulation circuit unit is connected to a profit calculation and accumulation circuit unit for accumulating the price St calculated by the path simulation circuit unit to obtain a cumulative profit value sum_payoff, and the profit calculation and accumulation circuit unit includes:

[0052] Subtraction unit s0 is used to subtract the price St predicted by this iteration from the strike price of the option;

[0053] Comparator comp1, used to compare 0 and the output of subtraction unit s0 and output a control signal;

[0054] The multiplexer MUXD is used to select 0 or the output of the subtraction unit s0 as its own output according to the output of the comparator comp1, and the selection condition is that if the output of the subtraction unit s0 is greater than or equal to 0, the comparator comp1 outputs 1, and the multiplexer MUXD selects the output of the subtraction unit s0 for output; otherwise, the multiplexer MUXD selects 0 for output;

[0055] The delayer delayH is used to generate an enable signal en according to the available signal St_valid of the path analog circuit unit;

[0056] The accumulator is used to accumulate the output of the multiplexer MUXD under the control of the enable signal en to obtain the accumulated profit value sum_payoff.

[0057] Optionally, the output end of the profit calculation accumulation circuit unit is connected to a discount profit calculation circuit unit for performing discount profit calculation based on the input cumulative profit value sum_payoff to obtain a final discount profit payoff, and the discount profit calculation circuit unit includes: a shift unit for shifting the input cumulative profit value sum_payoff to realize division; a multiplier m8 for multiplying the output result of the shift unit and the discount rate ert to obtain the final discount profit payoff, wherein the calculation function expression of the discount rate ert is ert=exp(-r×T), r is the preset risk-free interest rate, and T is the preset option validity period.

[0058] In addition, the present invention also provides a hardware acceleration card, including an acceleration card body and an accelerator chip arranged on the acceleration card body, and the accelerator chip is the option pricing calculation accelerator based on the Heston model.

[0059] In addition, the present invention also provides a computer device, including a mainboard on which a microprocessor and a memory are installed that are interconnected, and also including the option pricing calculation accelerator based on the Heston model, wherein the microprocessor and the option pricing calculation accelerator based on the Heston model are interconnected via a bus.

[0060] Compared with the prior art, the present invention has the following major advantages: the accelerator of the present invention includes a first circuit for simulating volatility Vt at M time points for each simulation path, including a multiplexer, a first intermediate result calculation circuit, an adder, and a delay device. The adder is used to sum the volatility predicted by the previous iteration output by the delay device and the first intermediate result output by the first intermediate result calculation circuit to obtain the volatility Vt predicted by the current iteration, and output it after a delay of delayF. The present invention can perform full-pipeline calculations for simulating volatility at M time points for each simulation path in the option pricing calculation based on the Heston model. The hardware acceleration implementation process does not pause. The full pipeline of the entire calculation process can effectively improve the efficiency of the accelerated calculation, and has better energy efficiency and performance than CPU and GPU implementations using the same process. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 This article provides pseudocode and symbolic explanation for the Monte Carlo solution of the existing option pricing calculation based on the Heston model.

[0062] Figure 2 This is the pseudo code for the Monte Carlo solution of the option pricing calculation based on the Heston model in this embodiment.

[0063] Figure 3 Schematic diagram of the circuit principle of the first circuit in an embodiment of the present invention.

[0064] Figure 4 2 is a schematic diagram of the circuit principle of the second circuit in an embodiment of the present invention.

[0065] Figure 5 Schematic diagram of the integrated circuit principle of the first circuit and the second circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0066] In order to fully streamline the Monte Carlo solution process for option pricing calculations based on the Heston model, we changed the calculation order of the paths and divided the outer loop into N / D path paragraphs, and D in each paragraph path The calculation of each path is inserted into the inner loop. Since the simulation of each path for the same time slice is independent of each other, in the hardware implementation process, as long as the innermost loop ( Figure 2 8 to 15 in the ) to achieve D for each time slice path The calculation of each path is fully streamlined. The pseudo code of the improved Monte Carlo solution for option pricing calculation based on the Heston model is as follows: Figure 2 As shown, Figure 2 and Figure 1 Similarly, Vt is expressed as V[t], V(t-1) is expressed as V[t-1], St is expressed as S[t], and S(t-1) is expressed as S[t-1]. Figure 2 Based on the parallel algorithm implemented by the pseudo code shown in FIG, we propose a fully pipelined hardware structure. The option pricing calculation accelerator based on the Heston model in this embodiment includes a first circuit for simulating the volatility Vt of M time points for each simulation path, such as Figure 3 As shown, the first circuit includes:

[0067] The multiplexer MUXA is used to select the initial volatility V0 or the volatility predicted in the previous iteration as the volatility predicted in the previous iteration V(t-1);

[0068] A first intermediate result calculation circuit is configured to calculate a first intermediate result kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt(dt) based on the volatility V(t-1) predicted in the previous iteration output by the multiplexer MUXA, where kappa is the mean reversion speed, dt is the time interval, theta is the long-term variance, Vreal is the real-time volatility, beta is the volatility variance, sqrt is the square root function, and Zv is a Gaussian random number;

[0069] The delayer delayA is used to delay the volatility V(t-1) predicted by the previous iteration output by the multiplexer MUXA;

[0070] Adder a4 is used to sum the volatility V(t-1) predicted in the previous iteration output by the delay device delayA and the first intermediate result kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt(dt) output by the first intermediate result calculation circuit to obtain the volatility Vt predicted in this iteration;

[0071] The delay device delayF is used to output the volatility Vt predicted in this iteration after a delay.

[0072] See also Figure 3 In this embodiment, the first intermediate result calculation circuit includes:

[0073] The comparator comp0 is used to compare the constant 0 with the volatility V(t-1) predicted by the previous iteration output by the multiplexer MUXA to generate a control signal;

[0074] a multiplexer MUXC configured to select, under the control of a control signal generated by the comparator comp0, the larger of the volatility V(t-1) predicted in the previous iteration output by the multiplexer MUXA and the constant 0 as the obtained real-time volatility Vreal;

[0075] The delay device delayB is used to delay the real-time volatility Vreal output by the multiplexer MUXC;

[0076] Subtractor a2 is used to subtract the real-time volatility Vreal output by delayB from the set long-term variance theta to obtain the result (theta-Vreal);

[0077] Multiplier m7 is configured to multiply the result (theta - Vreal) output by subtractor a2 by kap_dt to obtain a result kappa × dt × (theta - Vreal), where kap_dt is obtained by multiplying a set mean reversion rate kappa by a time interval dt via a multiplier, and time interval dt is obtained by multiplying the contract expiration time T by the number of time intervals M simulated for each path via a multiplier;

[0078] The square root operator sqrt is used to perform a square root operation on the real-time volatility Vreal output by the multiplexer MUXC to obtain a result sqrt(Vreal);

[0079] The delay device delayC is used to delay the external input Gaussian random number Zv;

[0080] The multiplier m5 is used to multiply the result sqrt(Vreal) output by the square root operator sqrt and the Gaussian random number Zv delayed by the delay device delayC to obtain the result sqrt(Vreal)×Zv;

[0081] a multiplier m6 for multiplying the result sqrt(Vreal)×Zv output by the multiplier m5 by the result beta_sqrt_dt to obtain a result beta×sqrt(Vreal)×Zv×sqrt(dt), wherein the result beta_sqrt_dt is obtained by multiplying the volatility variance beta by the result sqrt_dt via a multiplier, and the result sqrt_dt is obtained by performing a square root operation on the time interval dt via a square root operator;

[0082] The delayer delayA is used to delay the volatility V(t-1) predicted by the previous iteration output by the multiplexer MUXA;

[0083] Adder a3 is used to add the result kappa×dt×(theta-Vreal) output by the multiplier m7 and the result beta×sqrt(Vreal)×Zv×sqrt (dt) output by the multiplier m6 to obtain a first intermediate result kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt (dt).

[0084] As an optional implementation, the option pricing calculation accelerator in this embodiment further includes a second circuit for simulating the price St at M time points for each simulation path, see Figure 4 , in this embodiment, the second circuit includes:

[0085] The multiplexer MUXB is used to select the initial price S0 or the price predicted in the previous iteration as the price predicted in the previous iteration S(t-1);

[0086] The delay device delayD is used to delay the output of the price S(t-1) predicted by the previous iteration output by the multiplexer MUXB;

[0087] The second intermediate result calculation circuit is used to calculate the result (1+r×dt+sqrt(Vreal)×Zs×sqrt(dt)), where r is the risk-free rate, dt is the time interval, sqrt is the square root function, Zs is the intermediate variable, and Zs=rho×Zv+sqrt(1-(rho×rho))×Ztemp, where rho is the correlation coefficient of Brownian motion, and Zv and Ztemp are Gaussian random numbers;

[0088] Multiplier m4 is used to multiply the result (1+r×dt + sqrt(Vreal)×Zs×sqrt(dt)) calculated by the second intermediate result calculation circuit and the price S(t-1) predicted in the previous iteration output by the delay device delayD to obtain the price St predicted in this iteration;

[0089] The delay device delayG is used to delay the price St output by the multiplier m4 and output it to the multiplexer MUXB;

[0090] The available signal generator stv_gen is used to generate the available signal St_valid when it is necessary to output the price St predicted in this iteration.

[0091] See also Figure 4 In this embodiment, the second intermediate result calculation circuit includes:

[0092] Multiplier m0 is used to multiply the Gaussian random number Zv and the correlation coefficient rho of the Brownian motion to obtain the result rho×Zv;

[0093] A multiplier m1 is configured to multiply the Gaussian random number Ztemp by the result gaus_cor_coef to obtain a result sqrt(1-(rho×rho))×Ztemp; wherein the circuit for generating the result gaus_cor_coef includes: a multiplier configured to multiply the correlation coefficient rho of the Brownian motion by the correlation coefficient rho of the Brownian motion to obtain rho×rho; a subtractor configured to subtract rho×rho from a constant 1; and a square root operator configured to square the result of subtracting rho×rho from the constant 1 output by the subtractor to obtain the result gaus_cor_coef;

[0094] Adder a0 is used to add the result rho×Zv and the result sqrt(1-(rho×rho))×Ztemp to obtain the intermediate variable Zs;

[0095] The delay device delayE is used to delay the intermediate variable Zs obtained by the adder a0 and output it;

[0096] The multiplier m2 is used to multiply the intermediate variable Zs output by the intermediate variable generation circuit and the result sqrt(Vreal) output by the square root operator sqrt to obtain a result sqrt(Vreal)×Zs;

[0097] Multiplier m3 is used to multiply the result sqrt(Vreal)×Zs output by multiplier m2 and the result sqrt_dt to obtain a result sqrt(Vreal)×Zs×sqrt(dt), where the result sqrt_dt is obtained by performing a square root operation on the time interval dt through a square root operator;

[0098] Adder a1 is used to add the result sqrt(Vreal)×Zs×sqrt(dt) output by multiplier m3 and the result rdt_plus_1 to obtain a result (1+r×dt + sqrt(Vreal)×Zs×sqrt(dt)), where the result rdt_plus_1 is the result obtained by multiplying the time interval dt and the risk-free rate r through a multiplier and then adding the result to the constant 1 through an adder (1+r×dt).

[0099] See also Figure 5 As an optional implementation, in this embodiment, the square root operator sqrt of the first circuit performs a square root operation on the real-time volatility Vreal output by the multiplexer MUXC to obtain the result sqrt(Vreal), which is simultaneously used as the input of the multiplier m2 in the second circuit to achieve multiplexing of the result sqrt(Vreal) and reduce the chip size of the accelerator. In this embodiment, the circuits composed of the first circuit and the second circuit are collectively referred to as a path simulation circuit unit, which is used to simultaneously simulate the volatility Vt and price St at M time points for each simulation path. The path simulation circuit unit is used to realize D in the inner loop. path Pipeline calculation of the paths. Figure 2 Lines 7 to 16). We first convert the volatility and price calculation formula ( Figure 2 Lines 13 and 14) are decomposed into basic operations such as multiplication, addition and subtraction, and sqrt functions. These operations are mapped to eight multipliers, five adders / subtractors, and a square root (sqrt) module. The underlined parameter next to each module is the delay for performing the operation. The values of various constant coefficient parameters and their operation combinations input to the algorithm are pre-calculated in advance and then written to the corresponding registers. In order to ensure that the data arrives at the two input ports of each computing component at the same time, we inserted 5 delay modules delay{AE} to achieve synchronization of related input data. In addition, the price and volatility The delay required for a time slice simulation should also be completely consistent, which is achieved by inserting delay modules delayF and delayG.

[0100] The delay numbers generated by the various delay devices in this embodiment and their mutual relationships will be further described in detail below.

[0101] In this embodiment, the delay value D of the delay device delayA is A Satisfied: D A = D s + D m5 + D m6 + D a3 , where D sis the delay value of the square root operator sqrt, D m5 is the delay value of multiplier m5, D m6 is the delay value of multiplier m6, D a3 is the delay value of adder a3. The purpose of the delay value constraint is to ensure data synchronization of adder a4.

[0102] Delay value D of delay device delayB B Satisfied: D B + D a2 + D m7 = D s + D m5 +D m6 , where D a2 is the delay value of adder a2, D m7 is the delay value of the multiplier m7. The purpose of the delay value constraint is to ensure the data synchronization of the adder a3.

[0103] In this embodiment, the delay value D of the delay device delayC is C Satisfied: D C = D s The purpose of the delay value constraint is to ensure data synchronization of multiplier m5.

[0104] In this embodiment, the delay value D of the delay device delayD D Satisfied: D D = D s + D m2 +D m3 + D a1 , where D m2 is the delay value of multiplier m2, D m3 is the delay value of multiplier m3, D a1 is the delay value of adder a1. The purpose of the delay value constraint is to ensure the data synchronization of multiplier m4.

[0105] In this embodiment, the delay value D of the delay device delayE E Satisfied: D E + D a0 + D m0 = D S , where D a0 is the delay value of adder a0, D m0 is the delay value of the multiplier m0. The purpose of the delay value constraint is to ensure the data synchronization of the multiplier m2.

[0106] In this embodiment, the delay value D of the delay device delayF F and the delay value D of the delay device delayG G Satisfy D S+ D m5 +D m6 + D a3 + D a4 + D F = D S + D m2 + D m3 + D a1 + D m4 + D G , where D a4 is the delay value of adder a4, D m4 is the delay value of the multiplier m4. The purpose of the delay value constraint is to ensure the consistency of the delay in completing the price St and volatility Vt simulation for one time slice.

[0107] Multiplexer MUXA controls the volatility In this embodiment, the multiplexer MUXA selects the initial volatility V0 or the volatility predicted in the last iteration as the volatility predicted in the last iteration V(t-1), which includes: first, after the system is started, the D R Select the initial volatility V0 in the clock cycle and calculate D path1 = D s + D m5 + D m6 + D a3 + D a4 +D F , then repeat (N / D path1 ) selection cycles, in each selection cycle, first continue D path1 The initial volatility V0 is selected as the volatility V(t-1) predicted in the previous iteration for D clock cycles. path1 ×(M - 1) clock cycles select the volatility predicted by the previous iteration as the volatility predicted by the previous iteration V(t-1), where D R The number of clock cycles required to generate the same-beat output Gaussian random numbers Zv and Ztemp after the system is started. Counting starts from system reset. The multiplexer MUXA is in the front D R Select V0 in the next clock cycle to wait for the random number generation component to generate the first valid Gaussian random number Zv. path1 = D S + D m5 + D m6 + D a3 + D a4 + D F In the clock cycle, the multiplexer MUXA still selects V0, and executes the inner loop in sequence in a pipelined manner. path1Then, the multiplexer MUXA selects the output signal Vt of delayF and continues for D path ×(M - 1) clock cycles. Complete D in a pipelined manner path1 The simulation of the remaining (M - 1) time slices of the paths. Next, the multiplexer MUXA repeats (N / D path1 ) times the above selection process until all paths in the outer loop are simulated. By inserting the delay modules DelayF and DelayG, ensure that D path 、D path1 and D path2 The relationship between the three is: D path =D path1 =D path2 .

[0108] Multiplexer MUXB control price In this embodiment, the multiplexer MUXB selects the initial price S0 or the price predicted in the previous iteration as the price predicted in the previous iteration S(t-1), which includes: first, after the system is started, the D R Select the initial price S0 in the clock cycle and calculate D path2 =D s + D m2 + D m3 + D a1 + D m4 + D G , then repeat (N / D path2 ) selection cycles, in each selection cycle, first continue D path2 The initial price S0 is selected as the price S(t-1) predicted by the previous iteration for D clock cycles, and then path2 ×(M - 1) clock cycles, the price predicted by the previous iteration is selected as the price predicted by the previous iteration S(t-1); similarly, in the first D after the system is started R The first clock cycle selects S0 to wait for the first valid Gaussian random number Ztemp to arrive at the path simulation component. Then, the multiplexer MUXB selects S0 in the next D path2 = D S + D m2 + D m3 + D a1 + D m4 + D G In the clock cycle, S0 is still selected, and D in the inner loop is started in sequence. path2 Simulation of the first time slice of St in the path. path2×(M - 1) clock cycles, the multiplexer MUXB selects the output signal St of delayG. To complete D path2 The simulation of the remaining (M - 1) time slices of the paths. Next, the multiplexer MUXB repeats (N / D path2 ) Repeat the above selection process until all path simulations are completed.

[0109] The entire calculation process of the path simulation circuit unit is fully pipelined. When the pipeline is full, each clock cycle completes the calculation of a time slice of a simulation path. path2 ×(M - 1) clock cycles, the D in this round of calculation will be continuously output path2 The simulation result St of the option price corresponding to the path, in this embodiment, the signal generator stv_gen can be used before the system starts D R The value of the available signal St_valid is generated to be 0 in the clock cycles, and then the execution is repeated (N / D path2 ) selection cycles, in each selection cycle, first continue D path2 ×(M - 1) clock cycles to generate the value of the available signal St_valid to be 0, and then continue D path2 The value of the available signal St_valid is 1 in the clock cycle, and the repeated execution (N / D path2 ) selection cycles later, the value of the available signal St_valid is 0.

[0110] As an optional implementation, in this embodiment, the second circuit is further connected to a random number generation circuit unit for generating Gaussian random numbers Zv and Ztemp. The random number generation circuit unit uses a Gaussian random number generator (GRNG) to generate Gaussian random numbers (GRNs) to simulate the Wiener process ( Figure 1 Line 6 in the algorithm, Figure 2 Line 9 in the algorithm), see Figure 5 In this embodiment, the random number generation circuit unit includes:

[0111] A uniform random number generation circuit unit, used for generating uniform random numbers URNs using the WELL19937 algorithm;

[0112] The Gaussian random number conversion circuit unit is used to convert the uniform random number URNs output by the uniform random number generation circuit unit into a Gaussian random number using the Box-Muller algorithm (BM algorithm), and generate two Gaussian random numbers Zv and Ztemp per beat.

[0113] The WELL19937 algorithm is currently proven to have the best uniform distribution characteristics of random number generation algorithm, and can generate extremely long periods of 219937 Uniformly distributed random number URNs ensure the quality of the converted Gaussian random numbers (GRNs) and the correctness of the entire Monte Carlo calculation system. Furthermore, the BM algorithm was chosen because it generates two Gaussian random numbers per tick, meeting the requirements of the Heston model. Furthermore, the Gaussian random number sequences generated by the BM algorithm have been proven to have excellent random distribution properties and are currently widely used in various scientific calculations.

[0114] As an optional implementation, Figure 5 As shown, in this embodiment, the output end of the path simulation circuit unit is connected to a profit calculation and accumulation circuit unit for accumulating the price St calculated by the path simulation circuit unit to obtain a cumulative profit value sum_payoff. The profit calculation and accumulation circuit unit includes:

[0115] Subtraction unit s0 is used to subtract the price St predicted by this iteration from the strike price of the option;

[0116] Comparator comp1, used to compare 0 and the output of subtraction unit s0 and output a control signal;

[0117] The multiplexer MUXD is used to select 0 or the output of the subtraction unit s0 as its own output according to the output of the comparator comp1, and the selection condition is that if the output of the subtraction unit s0 is greater than or equal to 0, the comparator comp1 outputs 1, and the multiplexer MUXD selects the output of the subtraction unit s0 for output; otherwise, the multiplexer MUXD selects 0 for output;

[0118] The delayer delayH is used to generate an enable signal en according to the available signal St_valid of the path analog circuit unit;

[0119] The accumulator is used to accumulate the output of the multiplexer MUXD under the control of the enable signal en to obtain the accumulated profit value sum_payoff.

[0120] The profit calculation and accumulation circuit unit performs the calculation and accumulation of each path's profit in the algorithm's outer loop (lines 17 to 21). The option price St calculated by the path simulation module first passes through subtractor s0, which subtracts the strike price strike_price from it to obtain the option profit payoff obtained for this path simulation. If the profit is greater than 0, the profit value is selected by MUXD and input into the accumulator for accumulation. Comparator comp1 generates the select control signal for multiplexer MUXD. The availability signal St_valid is connected to the accumulator's enable pin. A delay device delayH is added to ensure that the availability signal St_valid and payoff arrive at the accumulator simultaneously.

[0121] As an optional implementation, Figure 5 As shown, in this embodiment, the output of the profit calculation and accumulation circuit unit is connected to a discounted profit calculation circuit unit for calculating the discounted profit based on the input cumulative profit value sum_payoff to obtain the final discounted profit payoff. The discounted profit calculation circuit unit includes a shift unit for shifting the input cumulative profit value sum_payoff to achieve division; and a multiplier m8 for multiplying the output of the shift unit with the discount rate ert to obtain the final discounted profit payoff. The calculation function expression of the discount rate ert is ert = exp(-r × T), where r is the preset risk-free interest rate and T is the preset option expiration date. The discounted profit calculation circuit unit is used to generate the final estimated option price. It includes a divider and a multiplier to calculate the discounted value of the averaged profit, which is the estimated price of the option. To reduce complexity, the number of iterations N is set to a power of 2, so that a simple shift unit can be used to implement the division operation.

[0122] In summary, this embodiment can simulate volatility at M time points for each simulation path in the Heston model-based option pricing calculation, performing a fully pipelined calculation. This hardware acceleration process is implemented without pauses. This fully pipelined calculation process effectively improves the efficiency of accelerated computing, resulting in better energy efficiency and performance compared to CPU and GPU implementations using equivalent processes. Furthermore, to improve performance, this embodiment converts 64-bit floating-point operations into fixed-point operations, and uses a word length optimization model based on Monte Carlo simulation to determine the word length of operands, effectively improving the efficiency of accelerated computing.

[0123] In addition, this embodiment further provides a hardware acceleration card, including an acceleration card body and an accelerator chip provided on the acceleration card body, wherein the accelerator chip is the aforementioned option pricing calculation accelerator based on the Heston model.

[0124] In addition, this embodiment also provides a computer device, including a mainboard on which a microprocessor and a memory are installed that are interconnected. The computer device also includes the aforementioned option pricing calculation accelerator based on the Heston model, and the microprocessor and the option pricing calculation accelerator based on the Heston model are interconnected via a bus.

[0125] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application may take the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of processes and / or boxes in the flowchart and / or block diagram, may be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the functions described in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific way, so that the instructions stored in the computer-readable memory produce a product including the instruction device, which implements the function specified in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0126] The above description is merely a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiment. All technical solutions based on the concept of the present invention are within the scope of protection of the present invention. It should be noted that for those skilled in the art, various improvements and modifications that do not depart from the principles of the present invention should also be considered within the scope of protection of the present invention.

Claims

1. An option pricing calculation accelerator based on the Heston model, characterized by: The method includes a first circuit for simulating a volatility Vt at M time points for each simulation path, the first circuit including: The multiplexer MUXA is used to select the initial volatility V0 or the volatility predicted in the previous iteration as the volatility predicted in the previous iteration V(t-1); A first intermediate result calculation circuit is configured to calculate a first intermediate result kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt(dt) based on the volatility V(t-1) predicted in the previous iteration output by the multiplexer MUXA, where kappa is the mean reversion speed, dt is the time interval, theta is the long-term variance, Vreal is the real-time volatility, beta is the volatility variance, sqrt is the square root function, and Zv is a Gaussian random number; The delayer delayA is used to delay the volatility V(t-1) predicted by the previous iteration output by the multiplexer MUXA; Adder a4 is used to sum the volatility V(t-1) predicted in the previous iteration output by the delay device delayA and the first intermediate result kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt(dt) output by the first intermediate result calculation circuit to obtain the volatility Vt predicted in this iteration; The delay device delayF is used to output the volatility Vt predicted in this iteration after a delay; The first intermediate result calculation circuit includes: The comparator comp0 is used to compare the constant 0 with the volatility V(t-1) predicted by the previous iteration output by the multiplexer MUXA to generate a control signal; a multiplexer MUXC configured to select, under the control of a control signal generated by the comparator comp0, the larger of the volatility V(t-1) predicted in the previous iteration output by the multiplexer MUXA and the constant 0 as the obtained real-time volatility Vreal; The delay device delayB is used to delay the real-time volatility Vreal output by the multiplexer MUXC; Subtractor a2 is used to subtract the real-time volatility Vreal output by delayB from the set long-term variance theta to obtain the result (theta-Vreal); Multiplier m7 is configured to multiply the result (theta - Vreal) output by subtractor a2 by kap_dt to obtain a result kappa × dt × (theta - Vreal), where kap_dt is obtained by multiplying a set mean reversion rate kappa by a time interval dt via a multiplier, and time interval dt is obtained by multiplying the contract expiration time T by the number of time intervals M simulated for each path via a multiplier; The square root operator sqrt is used to perform a square root operation on the real-time volatility Vreal output by the multiplexer MUXC to obtain a result sqrt(Vreal); The delay device delayC is used to delay the external input Gaussian random number Zv; The multiplier m5 is used to multiply the result sqrt(Vreal) output by the square root operator sqrt and the Gaussian random number Zv delayed by the delay device delayC to obtain the result sqrt(Vreal)×Zv; a multiplier m6 for multiplying the result sqrt(Vreal)×Zv output by the multiplier m5 by the result beta_sqrt_dt to obtain a result beta×sqrt(Vreal)×Zv×sqrt(dt), wherein the result beta_sqrt_dt is obtained by multiplying the volatility variance beta by the result sqrt_dt via a multiplier, and the result sqrt_dt is obtained by performing a square root operation on the time interval dt via a square root operator; The delayer delayA is used to delay the volatility V(t-1) predicted by the previous iteration output by the multiplexer MUXA; Adder a3 is used to add the result kappa×dt×(theta-Vreal) output by the multiplier m7 and the result beta×sqrt(Vreal)×Zv×sqrt (dt) output by the multiplier m6 to obtain a first intermediate result kappa×dt×(theta-Vreal)+beta×sqrt(Vreal)×Zv×sqrt (dt).

2. The option pricing calculation accelerator based on the Heston model according to claim 1, characterized in that: The option pricing calculation accelerator further includes a second circuit for simulating the price St of M time points for each simulation path, the second circuit including: The multiplexer MUXB is used to select the initial price S0 or the price predicted in the previous iteration as the price predicted in the previous iteration S(t-1); The delay device delayD is used to delay the output of the price S(t-1) predicted by the previous iteration output by the multiplexer MUXB; The second intermediate result calculation circuit is used to calculate the result (1+r×dt+sqrt(Vreal)×Zs×sqrt(dt)), where r is the risk-free rate, dt is the time interval, sqrt is the square root function, Zs is the intermediate variable, and Zs=rho×Zv+sqrt(1-(rho×rho))×Ztemp, where rho is the correlation coefficient of Brownian motion, and Zv and Ztemp are Gaussian random numbers; Multiplier m4 is used to multiply the result (1+r×dt + sqrt(Vreal)×Zs×sqrt(dt)) calculated by the second intermediate result calculation circuit and the price S(t-1) predicted in the previous iteration output by the delay device delayD to obtain the price St predicted in this iteration; The delay device delayG is used to delay the price St output by the multiplier m4 and output it to the multiplexer MUXB; The available signal generator stv_gen is used to generate the available signal St_valid when it is necessary to output the price St predicted in this iteration.

3. The Heston model-based option pricing calculation accelerator according to claim 2, characterized in that: The second intermediate result calculation circuit includes: Multiplier m0 is used to multiply the Gaussian random number Zv and the correlation coefficient rho of the Brownian motion to obtain the result rho×Zv; A multiplier m1 is configured to multiply the Gaussian random number Ztemp by the result gaus_cor_coef to obtain a result sqrt(1-(rho×rho))×Ztemp; wherein the circuit for generating the result gaus_cor_coef includes: a multiplier configured to multiply the correlation coefficient rho of the Brownian motion by the correlation coefficient rho of the Brownian motion to obtain rho×rho; a subtractor configured to subtract rho×rho from a constant 1; and a square root operator configured to square the result of subtracting rho×rho from the constant 1 output by the subtractor to obtain the result gaus_cor_coef; Adder a0 is used to add the result rho×Zv and the result sqrt(1-(rho×rho))×Ztemp to obtain the intermediate variable Zs; The delay device delayE is used to delay the intermediate variable Zs obtained by the adder a0 and output it; The multiplier m2 is used to multiply the intermediate variable Zs output by the intermediate variable generation circuit and the result sqrt(Vreal) output by the square root operator sqrt to obtain a result sqrt(Vreal)×Zs; Multiplier m3 is used to multiply the result sqrt(Vreal)×Zs output by multiplier m2 and the result sqrt_dt to obtain a result sqrt(Vreal)×Zs×sqrt(dt), where the result sqrt_dt is obtained by performing a square root operation on the time interval dt through a square root operator; Adder a1 is used to add the result sqrt(Vreal)×Zs×sqrt(dt) output by multiplier m3 and the result rdt_plus_1 to obtain a result (1+r×dt + sqrt(Vreal)×Zs×sqrt(dt)), where the result rdt_plus_1 is the result obtained by multiplying the time interval dt and the risk-free rate r through a multiplier and then adding the result to the constant 1 through an adder (1+r×dt).

4. The Heston model-based option pricing calculation accelerator according to claim 3, characterized in that: The delay value D of the delay device delayA A Satisfied: D A = D s + D m5 + D m6 + D a3 , where D s is the delay value of the square root operator sqrt, D m5 is the delay value of multiplier m5, D m6 is the delay value of multiplier m6, D a3 is the delay value of adder a3; the delay value D of the delay device delayB B Satisfied: D B + D a2 + D m7 = D s + D m5 +D m6 , where D a2 is the delay value of adder a2, D m7 is the delay value of the multiplier m7; the delay value D of the delay device delayC C Satisfied: D C = D s ; The delay value D of the delay device delayD D Satisfied: D D = D s + D m2 +D m3 + D a1 , where D m2 is the delay value of multiplier m2, D m3 is the delay value of multiplier m3, D a1 is the delay value of adder a1; the delay value D of the delay device delayE E Satisfied: D E + D a0 + D m0 = D S , where D a0 is the delay value of adder a0, D m0 is the delay value of the multiplier m0; the delay value D of the delay device delayF F and the delay value D of the delay device delayG G Satisfy D S + D m5 + D m6 + D a3 + D a4 + D F = D S + D m2 + D m3 + D a1 + D m4 + D G , where D a4 is the delay value of adder a4, D m4 is the delay value of multiplier m4.

5. The Heston model-based option pricing calculation accelerator according to claim 4, characterized in that: The multiplexer MUXA selects the initial volatility V0 or the volatility predicted in the last iteration as the volatility predicted in the last iteration V(t-1) including: first, after the system is started, the front D R Select the initial volatility V0 in the clock cycle and calculate D path1 =D s + D m5 + D m6 + D a3 + D a4 + D F , then repeat (N / D path1 ) selection cycles, in each selection cycle, first continue D path1 The initial volatility V0 is selected as the volatility V(t-1) predicted in the previous iteration for D clock cycles. path1 ×(M - 1) clock cycles select the volatility predicted by the previous iteration as the volatility predicted by the previous iteration V(t-1), where D R The number of clock cycles required to generate the same-beat output Gaussian random numbers Zv and Ztemp after the system is started; the multiplexer MUXB selects the initial price S0 or the price predicted by the last iteration as the price predicted by the last iteration S(t-1) including: first, after the system is started, D R Select the initial price S0 in the clock cycle and calculate D path2 =D s +D m2 + D m3 + D a1 + D m4 + D G , then repeat (N / D path2 ) selection cycles, in each selection cycle, first continue D path2 The initial price S0 is selected as the price S(t-1) predicted by the previous iteration for D clock cycles, and then path2 ×(M-1) clock cycles to select the price predicted by the previous iteration as the price predicted by the previous iteration S(t-1); the available signal generator stv_gen is D R The value of the available signal St_valid is generated in the clock cycles to be 0, and then it is repeated (N / D path2 ) selection cycles, in each selection cycle, first continue D path2 ×(M - 1) clock cycles to generate the value of the available signal St_valid to be 0, and then continue D path2 The value of the available signal St_valid is 1 in the clock cycle, and the repeated execution (N / D path2 ) selection cycles later, the value of the available signal St_valid is 0.

6. The option pricing calculation hardware accelerator according to claim 5, characterized in that: The output end of the path simulation circuit unit is connected to a profit calculation and accumulation circuit unit for accumulating the price St calculated by the path simulation circuit unit to obtain a cumulative profit value sum_payoff. The profit calculation and accumulation circuit unit includes: Subtraction unit s0 is used to subtract the price St predicted by this iteration from the strike price of the option; Comparator comp1, used to compare 0 and the output of subtraction unit s0 and output a control signal; The multiplexer MUXD is used to select 0 or the output of the subtraction unit s0 as its own output according to the output of the comparator comp1, and the selection condition is that if the output of the subtraction unit s0 is greater than or equal to 0, the comparator comp1 outputs 1, and the multiplexer MUXD selects the output of the subtraction unit s0 for output; otherwise, the multiplexer MUXD selects 0 for output; The delayer delayH is used to generate an enable signal en according to the available signal St_valid of the path analog circuit unit; The accumulator is used to accumulate the output of the multiplexer MUXD under the control of the enable signal en to obtain the accumulated profit value sum_payoff.

7. The option pricing calculation hardware accelerator according to claim 6, characterized in that: The output end of the profit calculation accumulation circuit unit is connected to a discount profit calculation circuit unit for performing discount profit calculation based on the input cumulative profit value sum_payoff to obtain the final discount profit payoff. The discount profit calculation circuit unit includes: a shift unit for shifting the input cumulative profit value sum_payoff to realize division; a multiplier m8 for multiplying the output result of the shift unit and the discount rate ert to obtain the final discount profit payoff, wherein the calculation function expression of the discount rate ert is ert=exp(-r×T), r is the preset risk-free interest rate, and T is the preset option validity period.

8. A hardware acceleration card, comprising an acceleration card body and an accelerator chip disposed on the acceleration card body, characterized in that: The accelerator chip is the option pricing calculation accelerator based on the Heston model as described in any one of claims 1 to 7.

9. A computer device comprising a motherboard on which a microprocessor and a memory are mounted and connected to each other, characterized in that: It also includes the Heston model-based option pricing calculation accelerator as described in any one of claims 1 to 7, and the microprocessor and the Heston model-based option pricing calculation accelerator are interconnected via a bus.

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