Electronic package and method of making the same

CN116230656BActive Publication Date: 2026-09-04SILICONWARE PRECISION IND CO LTD
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Patent Information

Application Number
CN202111549978.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2021-12-03
Filing Date
2021-12-17
Publication Date
2026-09-04
Estimated Expiration
2041-12-17

AI Technical Summary

Technical Problem

[0004]然而,现有半导体封装件1,因该第一与第二半导体芯片11,12运转时所产生的热,需先通过第一与第二封装胶体15,18,才能将热传导至电路板上或传导至外部,因而散热效果不佳

Benefits of technology

[0012] In the aforementioned electronic package and its manufacturing method, a metal layer is disposed between the at least one electronic component and the wiring structure. For example, the metal layer contacts the wiring structure. Alternatively, the wiring structure has a ground line to connect to the metal layer.

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Abstract

The present invention relates to an electronic package and a method of manufacturing the same, comprising stacking a package module including a wiring structure on a carrier structure via a plurality of conductive elements, covering a portion of a surface of the wiring structure with a heat sink, and placing an electronic module on another portion of the surface of the wiring structure, so that the wiring structure is formed with at least one heat dissipation pad combined with the heat sink, and the electronic module and the package module can dissipate heat via the heat dissipation pad and the heat sink.
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Description

Technical Field

[0001] This invention relates to a semiconductor device, and more particularly to an electronic package and its manufacturing method. Background Technology

[0002] With the evolution of semiconductor packaging technology, different packaging forms have been developed for semiconductor devices. In order to improve electrical functions and save packaging space, different three-dimensional packaging technologies have been developed to integrate integrated circuits with different functions into a single package structure. For example, electronic components with different functions (such as memory, central processing unit, graphics processor, image application processor, etc.) are integrated into a system through stacking design for application in thin and light electronic products.

[0003] Figure 1 This is a cross-sectional schematic diagram of an existing semiconductor package 1. The semiconductor package 1 includes: a first encapsulant 15, a first semiconductor chip 11 embedded in the first encapsulant 15, a circuit structure 10 and a wiring structure 14 disposed on opposite sides of the first encapsulant 15, a plurality of conductive pillars 13 embedded in the first encapsulant 15 to electrically connect the circuit structure 10 and the wiring structure 14, a plurality of second semiconductor chips 12 disposed on the circuit structure 10, and a second encapsulant 18 covering the second semiconductor chips 12. The wiring structure 14 is electrically connected to the first semiconductor chip 11, and the circuit structure 10 is electrically connected to the second semiconductor chip 12. A plurality of solder balls 19 are formed on the underside of the wiring structure 14 for bonding a circuit board (not shown).

[0004] However, in the existing semiconductor package 1, the heat generated by the first and second semiconductor chips 11, 12 during operation must first pass through the first and second encapsulating colloids 15, 18 before it can be conducted to the circuit board or to the outside, resulting in poor heat dissipation.

[0005] Therefore, overcoming the problems of the existing technology has become an urgent issue that needs to be addressed. Summary of the Invention

[0006] In view of the various shortcomings of the prior art, the present invention provides an electronic package and its manufacturing method, which enables the electronic module and the package module to dissipate heat through the heat dissipation pad and the heat dissipation component.

[0007] The electronic package of the present invention includes: a carrier structure; a package module which is stacked on the carrier structure via a plurality of conductive elements and includes a cover layer, at least one electronic element and a plurality of conductive pillars embedded in the cover layer, and a wiring structure formed on the cover layer, such that the plurality of conductive elements and the wiring structure are respectively disposed on opposite sides of the cover layer, and the at least one electronic element and the plurality of conductive pillars are electrically connected to the carrier structure via the plurality of conductive elements, and the wiring structure is electrically connected to the plurality of conductive pillars, wherein the wiring structure has at least one heat dissipation pad; a heat dissipation element disposed on the at least one heat dissipation pad and combined with the carrier structure, such that the heat dissipation element covers a portion of the surface of the wiring structure; and at least one electronic module which is disposed on another portion of the surface of the wiring structure and electrically connected to the wiring structure.

[0008] The present invention also provides a method for manufacturing an electronic package, comprising: providing a package module including a cover layer, at least one electronic component and a plurality of conductive pillars embedded in the cover layer, and a wiring structure formed on the cover layer, wherein the wiring structure is electrically connected to the plurality of conductive pillars, and wherein the wiring structure has at least one heat dissipation pad; stacking the package module on a carrier structure via a plurality of conductive elements, such that the plurality of conductive elements and the wiring structure are respectively disposed on opposite sides of the cover layer, and the at least one electronic component and the plurality of conductive pillars are electrically connected to the carrier structure via the plurality of conductive elements; disposing a heat sink on the at least one heat dissipation pad and combined with the carrier structure, such that the heat sink covers a portion of the surface of the wiring structure; and attaching at least one electronic module to another portion of the surface of the wiring structure, such that the at least one electronic module is electrically connected to the wiring structure.

[0009] In the aforementioned electronic package and its manufacturing method, the at least one heat dissipation pad is a dummy pad with no electrical function.

[0010] In the aforementioned electronic package and manufacturing method thereof, the wiring structure has a grounding line, so that the at least one heat dissipation pad serves as a grounding pad connected to the grounding line.

[0011] In the aforementioned electronic package and its manufacturing method, the wiring structure has multiple heat dissipation pads arranged in a ring shape, and the heat sink has a ring body that connects the multiple heat dissipation pads. This ring body has an opening, allowing another portion of the wiring structure's surface to be exposed through the opening. At least one electronic module is disposed on the wiring structure within the opening and electrically connected to the wiring structure. For example, a heat dissipation material is disposed between the ring body and the multiple heat dissipation pads. Furthermore, the multiple heat dissipation pads surround the opening as a barrier to prevent the heat dissipation material from overflowing into the opening area. The multiple heat dissipation pads are arranged in multiple rings, with inner and outer rings defined according to their distance from the opening. The ring closest to the opening is the inner ring, and the ring furthest from the opening is the outer ring, thus limiting the distribution range of the heat dissipation material between the inner and outer rings.

[0012] In the aforementioned electronic package and its manufacturing method, a metal layer is disposed between the at least one electronic component and the wiring structure. For example, the metal layer contacts the wiring structure. Alternatively, the wiring structure has a ground line to connect to the metal layer.

[0013] The aforementioned electronic package and its manufacturing method also include a heat dissipation structure disposed on the at least one electronic module.

[0014] As can be seen from the above, in the electronic package and manufacturing method of the present invention, the wiring structure has a heat dissipation pad design, which allows the electronic module and the package module to dissipate heat along the heat dissipation component via the heat dissipation pad, thereby facilitating heat dissipation of the electronic module and the package module. Therefore, compared with the prior art, the heat energy of the electronic module and the package module can be easily dissipated to the external environment. Not only is the heat dissipation path fast, but the heat dissipation effect can also be improved through the heat dissipation pad and the heat dissipation component. Attached Figure Description

[0015] Figure 1 This is a cross-sectional schematic diagram of an existing semiconductor package.

[0016] Figures 2A to 2H This is a cross-sectional schematic diagram of a first embodiment of the manufacturing method of the electronic package of the present invention.

[0017] Figure 2I for Figure 2F A partial top view diagram.

[0018] Figure 2J and Figure 2K for Figure 2I Partial top view schematic diagrams of different embodiments.

[0019] Figures 3A to 3B This is a cross-sectional schematic diagram of a second embodiment of the manufacturing method of the electronic package of the present invention.

[0020] Figures 4A to 4CThis is a cross-sectional schematic diagram of a third embodiment of the manufacturing method of the electronic package of the present invention.

[0021] Figures 4D to 4E For the corresponding Figures 4A to 4C A cross-sectional schematic diagram of another embodiment.

[0022] Figure 4F For the corresponding Figures 4D to 4E A cross-sectional schematic diagram of another embodiment.

[0023] Figures 5A to 5C This is a cross-sectional schematic diagram of a fourth embodiment of the method for manufacturing the electronic package of the present invention.

[0024] Figure 5D For the corresponding Figures 5B to 5C A cross-sectional schematic diagram of another embodiment.

[0025] Explanation of reference numerals in the attached figures

[0026] 1: Semiconductor package

[0027] 10,20: Line Structure

[0028] 11,31: First Semiconductor Chip

[0029] 12,32: Second semiconductor chip

[0030] 13,23,33a: Conductive pillars

[0031] 14,24: Wiring Structure

[0032] 15: First encapsulating colloid

[0033] 18: Second encapsulating colloid

[0034] 19: Welding ball

[0035] 2,3,4,5: Electronic packages

[0036] 2a: Encapsulation Module

[0037] 200,91: Insulation layer

[0038] 201,301: Line Relocation Layer

[0039] 202: Electrical contact pad

[0040] 21: Electronic Components

[0041] 21a: Surface of Action

[0042] 21b: Non-acting surface

[0043] 210: Electrode pad

[0044] 211: Protective film

[0045] 212: Conductor

[0046] 212a, 23a, 23b: End faces

[0047] 22,52: Bonding layer

[0048] 240: Dielectric layer

[0049] 241: Wiring Layer

[0050] 242: Functional Pad

[0051] 243, 244, 343: Thermal pads

[0052] 243a: Inner Ring

[0053] 243b: Outer ring

[0054] 243c: Central

[0055] 25: Covering layer

[0056] 25a: First surface

[0057] 25b: Second surface

[0058] 26: Load-bearing structure

[0059] 26a: Line layer

[0060] 260: Base Rubber

[0061] 27, 29, 37: Conductive elements

[0062] 28: Heat sink

[0063] 28a: Ring

[0064] 28b: Support foot

[0065] 280: Opening

[0066] 281: Heat dissipation material

[0067] 282: Adhesive layer

[0068] 3a: Electronic module

[0069] 30: First Line Department

[0070] 33: Conductive structure

[0071] 34: Second Line Department

[0072] 341, 441: Grounding lines

[0073] 35: First encapsulation layer

[0074] 36: Bonding material

[0075] 38: Second encapsulation layer

[0076] 39: Heat dissipation structure

[0077] 42: Metal layer

[0078] 50: Heat sink

[0079] 8: Support plate

[0080] 80: Adhesive layer

[0081] 9: Support plate

[0082] 9a: Seed layer

[0083] 90: Release layer

[0084] A: Cavity

[0085] S: Cutting path. Detailed Implementation

[0086] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

[0087] It should be understood that the structures, proportions, sizes, etc., illustrated in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the conditions under which the invention can be implemented. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to the size, without affecting the effects and objectives achieved by the invention, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," and "one" used in this specification are merely for clarity of description and are not intended to limit the scope of the invention. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of the invention's implementation.

[0088] Figures 2A to 2G This is a cross-sectional schematic diagram of a first embodiment of the manufacturing method of the electronic package 2 of the present invention.

[0089] like Figure 2A As shown, a plurality of conductive pillars 23 are formed on a carrier plate 9, and at least one electronic component 21 is disposed on the carrier plate 9 (two electronic components are shown in this figure), wherein a plurality of conductors 212 are combined and electrically connected to the electronic component 21.

[0090] In this embodiment, the carrier plate 9 is, for example, a plate of semiconductor material (such as silicon or glass), on which a release layer 90, a seed layer 9a such as titanium / copper, and an insulating layer 91 such as dielectric material or solder resist are sequentially formed by coating, for example, so that the conductive post 23 can be formed on the seed layer 9a (insulating layer 91) by electroplating through the seed layer 9a.

[0091] Furthermore, the material forming the conductive pillar 23 is a metal such as copper or solder, and the conductor 212 is a spherical shape such as a conductive line or solder ball, or a columnar shape such as a copper pillar or solder bump, or a stud conductive part made by a wire bonding machine, but is not limited to these.

[0092] Furthermore, the electronic component 21 can be an active component, a passive component, or a combination of both. The active component is, for example, a semiconductor chip, while the passive component is, for example, a resistor, a capacitor, or an inductor. In this embodiment, the electronic component 21 is a semiconductor chip with opposing active surfaces 21a and non-active surfaces 21b. The electronic component 21 is bonded to the insulating layer 91 via a bonding layer 22, such as a die-attached film (DAF), with its non-active surface 21b. The active surface 21a has multiple electrode pads 210 and a protective film 211, such as a passivation material, and the conductor 212 is disposed in the protective film 211.

[0093] like Figure 2B As shown, a covering layer 25 is formed on the insulating layer 91 of the carrier plate 9 so that the covering layer 25 covers the electronic components 21, the conductors 212 and the conductive pillars 23. The covering layer 25 has a first surface 25a and a second surface 25b opposite to each other, and the protective film 211, the end face 212a of the conductor 212 and the end face 23a of the conductive pillar 23 are exposed on the first surface 25a of the covering layer 25, and the covering layer 25 is bonded to the insulating layer 91 of the carrier plate 9 with its second surface 25b.

[0094] In this embodiment, the covering layer 25 is an insulating material, such as polyimide (PI), dry film, or an encapsulating compound such as epoxy resin. For example, the covering layer 25 can be formed on the insulating layer 91 by means of liquid compounding, injection, lamination, or compression molding.

[0095] Furthermore, a leveling process can be used to make the first surface 25a of the coating layer 25 flush with the protective film 211, the end face 23a of the conductive pillar 23, and the end face 212a of the conductor 212, so that the end face 23a of the conductive pillar 23 and the end face 212a of the conductor 212 are exposed on the first surface 25a of the coating layer 25. For example, the leveling process can be performed by grinding to remove part of the material of the protective film 211, part of the material of the conductive pillar 23, part of the material of the conductor 212, and part of the material of the coating layer 25.

[0096] like Figure 2C As shown, a circuit structure 20 is formed on the first surface 25a of the covering layer 25, and the circuit structure 20 is electrically connected to the plurality of conductive pillars 23 and the plurality of conductors 212.

[0097] In this embodiment, the circuit structure 20 includes multiple insulating layers 200 and multiple redistribution layers (RDLs) 201 disposed on the insulating layers 200. The outermost insulating layer 200 can serve as a solder resist layer, and the outermost redistribution layer 201 is exposed above the solder resist layer to serve as an electrical contact pad 202. Multiple conductive elements 27, such as solder bumps, copper bumps, or others, are formed on the electrical contact pad 202, and these conductive elements 27 are electrically connected to the electrical contact pad 202. Alternatively, the circuit structure 20 may also include only a single insulating layer 200 and a single redistribution layer 201.

[0098] Furthermore, the material forming the circuit redistribution layer 201 is copper, and the material forming the insulation layer 200 is a dielectric material such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), or a solder resist such as green paint or ink.

[0099] Additionally, an Under Bump Metallurgy (UBM) layer (not shown) can be formed on the electrical contact pad 202 to facilitate the bonding of the conductive element 27.

[0100] like Figure 2D As shown, the conductive elements 27 are placed on a support plate 8, and then the carrier plate 9 and its release layer 90 and seed layer 9a are removed, exposing the insulating layer 91 and the other end face 23b of the conductive pillars 23. Next, a wiring structure 24 electrically connecting the plurality of conductive pillars 23 is formed on the insulating layer 91.

[0101] In this embodiment, the support plate 8 has an adhesive layer 80 to allow the circuit structure 20 to adhere to the adhesive layer 80, so that the conductive elements 27 are embedded in the adhesive layer 80. When the release layer 90 is peeled off, the seed layer 9a serves as a barrier to avoid damaging the insulating layer 91. After the carrier plate 9 and the release layer 90 on it are removed, the seed layer 9a is removed by etching. At this time, the other end face 23b of the conductive post 23 is flush with the insulating layer 91 and exposed to the insulating layer 91.

[0102] Furthermore, the wiring structure 24 includes the insulating layer 91, at least one dielectric layer 240, and a wiring layer 241 bonded to the dielectric layer 240. For example, the dielectric layer 240 may be formed from materials such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), or other dielectric materials, and the wiring layer 241 and the dielectric layer 240 may be formed using a redistribution layer (RDL) process.

[0103] In addition, a plurality of functional pads 242 electrically connected to the wiring layer 241 and at least one non-functional heat dissipation pad 243 are disposed on the outermost dielectric layer 240. For example, these heat dissipation pads 243 are arranged in a ring, such as... Figure 2I As shown, to surround these functional pads 242

[0104] In addition, these heat dissipation pads 243 are dummy pads in a floating state, which electrically insulate the wiring layer 241.

[0105] like Figure 2E As shown, remove the support plate 8, and then follow the path as shown. Figure 2D The cutting path S shown is used for a single-piece cutting process to obtain multiple package modules 2a. Then, the package module 2a is attached to a support structure 26 via its conductive element 27.

[0106] In this embodiment, the carrier structure 26 is, for example, a package substrate with a core layer or a coreless package substrate, having an insulating substrate and a circuit layer 26a bonded to the insulating substrate. The circuit layer 26a is, for example, a fan-out redistributed layer (RDL). For example, the material forming the circuit layer 26a is copper, and the material forming the insulating substrate is, for example, a dielectric material such as polybenzoxazole (PBO), polyimide (PI), or prepreg (PP). It should be understood that the carrier structure can also be other carrier units that can carry electronic components, such as lead frames or silicon interposers, and is not limited to the above.

[0107] Furthermore, the conductive element 27 is bonded to the circuit layer 26a to electrically connect the circuit layer 26a. For example, an adhesive 260 may be formed between the packaging module 2a and the carrier structure 26 to cover the conductive elements 27.

[0108] like Figure 2F As shown, a heat sink 28 is disposed on the heat sink 243 of the encapsulation module 2a, and the heat sink 28 is also combined with the support structure 26.

[0109] In this embodiment, the heat sink 28 has a ring 28a and a plurality of support feet 28b extending downward from the edge of the ring 28a. The ring 28a is in the form of a heat sink plate, and its lower side is connected to the heat dissipation pad 243 by a heat dissipation material 281. For example, the heat dissipation material 281 is a thermal interface material (TIM), solder, metal, or other thermally conductive material, and the ring 28a has an opening 280 corresponding to the position of the functional pads 242, so that the functional pads 242 are exposed through the opening 280. It should be understood that the heat dissipation material 281 can be applied to the heat sink 28 and / or the heat dissipation pad 243 as needed.

[0110] Furthermore, the support foot 28b is attached to the support structure 26 via an adhesive layer 282. For example, the support foot 28b does not contact the packaging module 2a, thus forming a cavity A between the support foot 28b and the packaging module 2a.

[0111] Additionally, the shape of these heat dissipation pads 243 can be elongated (e.g., ...). Figure 2I or Figure 2J As shown), circular (as shown) Figure 2K The heat dissipation pad shown is 244), L-shaped (as shown). Figure 2KThe heat dissipation pad 244 shown, or other geometric shapes, can be arranged in a single ring (figure omitted) or multiple rings (e.g., as shown) according to heat dissipation requirements. Figure 2I The double-ring type shown or as Figure 2J (As shown in the three-ring type). For example, these heat dissipation pads 243 are arranged in a multi-ring pattern, with the inner ring 243a and outer ring 243b defined according to their distance from the opening 280, such as... Figure 2I or Figure 2J As shown, the ring closest to the opening 280 is designated as the inner ring 243a, and the ring furthest from the opening 280 is designated as the outer ring 243b. This design limits the placement of the heat dissipation material 281 between the inner ring 243a and the outer ring 243b, preventing heat dissipation material 281, such as adhesive or TIM, from overflowing to other areas. It should be understood that the arrangement of the heat dissipation pad 243 between the inner ring 243a and the outer ring 243b can be designed as needed and is not limited to a ring shape (e.g., Figure 2J The middle ring 243c shown can be randomly arranged (e.g., Figure 2K The heat dissipation pads 243 and 244 shown can be arranged according to the heat distribution. Therefore, if there is no need to limit the layout of the heat dissipation material 281, the arrangement of these heat dissipation pads 243 and 244 can be designed according to requirements and is not limited to a ring shape.

[0112] In addition, the inner ring 243a surrounds the opening 280, thus acting as a barrier to prevent the heat dissipation material 281 from overflowing into the area of ​​the opening 280 and affecting the heat dissipation effect.

[0113] like Figure 2G As shown, at least one electronic module 3a is disposed on the functional pad 242 in the opening 280, so that the electronic module 3a is electrically connected to the functional pad 242. Next, a ball-mounting process is performed on the circuit layer 26a on the lower side of the carrier structure 26 to form a plurality of conductive elements 29 such as solder balls, which are provided for subsequent processes. The carrier structure 26 is disposed on a circuit board (not shown) with the conductive elements 29 on its lower side to obtain the electronic package 2 of the present invention.

[0114] In this embodiment, the electronic module 3a is electrically connected to the functional pad 242 via a plurality of conductive elements 37, such as solder bumps, copper bumps, or others. For example, the conductive elements 37 can be covered by a bonding material 36, such as a primer or non-conductive paste (NCP). Therefore, the inner ring 243a formed by the heat dissipation pads 243 can also prevent the primer or non-conductive paste (NCP) bonding material 36 from overflowing to the underside of the heat sink 28, so as to avoid affecting the heat dissipation effect.

[0115] Furthermore, if a non-conductive adhesive (NCP) bonding material 36 is used, the NCP is first bonded to the conductive elements 37 and their surroundings, and then the functional pads 242 are bonded. Alternatively, if a base adhesive bonding material 36 is used, the conductive elements 37 are first bonded to the functional pads 242, and then the adhesive is applied to form the bonding material 36.

[0116] In addition, the electronic module 3a includes a first encapsulation layer 35, at least one first semiconductor chip 31 embedded in the first encapsulation layer 35, a plurality of conductive structures 33 embedded in the first encapsulation layer 35, a first line portion 30 disposed on the upper side of the first encapsulation layer 35, at least one second semiconductor chip 32 disposed on the first line portion 30, a second encapsulation layer 38 covering the second semiconductor chip 32, and a second line portion 34 disposed on the lower side of the first encapsulation layer 35 to combine the conductive elements 37.

[0117] Furthermore, the first semiconductor chip 31 and the second semiconductor chip 32 are electrically connected to the first circuit portion 30, and the conductive structures 33 are electrically connected to the first and second circuit portions 30 and 34. The first encapsulation layer 35 and the second encapsulation layer 38 are insulating materials, such as polyimide (PI), dry film, or encapsulating colloids or molding compounds such as epoxy resin. For example, the material forming the first encapsulation layer 35 may be the same as or different from the material of the second encapsulation layer 38.

[0118] It should be understood that there are many embodiments of the electronic module 3a, and the required electronic module can be configured according to the needs of the electronic package 2, and is not limited to the above.

[0119] Therefore, the manufacturing method of the present invention mainly involves configuring at least one heat dissipation pad 243 for connecting the heat sink 28 through the wiring structure 24 between the electronic module 3a and the packaging module 2a, so as to facilitate heat dissipation of the electronic module 3a and the packaging module 2a. Thus, the heat energy of the electronic module 3a and the packaging module 2a concentrated in the central area (i.e., the opening 280) can be dissipated to the external environment through the heat sink 28 contacting the heat dissipation pad 243.

[0120] Furthermore, the heat sink 28 is directly disposed above the conductive post 23 and the wiring structure 24, which not only provides a fast heat dissipation path, but also enhances the heat dissipation effect through the heat dissipation pad 243 made of metal material and the heat sink 28.

[0121] Additionally, a heat dissipation structure 39 can be attached above the electronic module 3a (on the top surface of the second encapsulation layer 38 or the top surface of the second semiconductor chip 32), such as... Figure 2HThe finned heat sink shown is used to conduct heat dissipation mechanisms at the system end of electronic products made using this electronic package 2.

[0122] Figures 3A to 3B This is a cross-sectional schematic diagram of a second embodiment of the manufacturing method of the electronic package 3 of the present invention. The difference between this embodiment and the first embodiment lies in the configuration of the heat dissipation pad 343, so the similarities will not be described again below.

[0123] like Figure 3A As shown, at Figure 2D In the process shown, the wiring structure 24 also includes a ground line 341 that is integrated with the dielectric layer 240. This ground line 341 can be fabricated together with the wiring layer 241 using a redistribution layer (RDL) process, so that the heat sink 343 can be connected to the ground line 341.

[0124] In this embodiment, the heat dissipation pad 343 serves as a grounding pad, and at least one of the conductive posts 33a among the plurality of conductive posts 23, 33a is connected to the grounding line 341 and connected to a portion of the line redistribution layer 301 of the line structure 20 as a heat dissipation path.

[0125] like Figure 3B As shown, proceed as follows Figures 2E to 2G The process shown is used to obtain electronic package 3.

[0126] Therefore, compared to the first embodiment where the heat dissipation pad 243 provides an upward heat dissipation path through the ring 28a, this embodiment mainly connects the grounding wiring layer 241 (i.e., the grounding line 341) of the wiring structure 24 via the heat dissipation pad 343 (grounding pad) so that the wiring structure 24 and the conductive post 33a conduct heat to the supporting structure 26, thereby providing another downward heat dissipation path for the heat dissipation pad 343 (grounding pad).

[0127] Figures 4A to 4C This is a cross-sectional schematic diagram of a third embodiment of the manufacturing method of the electronic package 4 of the present invention. The difference between this embodiment and the first embodiment is the addition of a heat dissipation mechanism, so the similarities will not be described again below.

[0128] like Figure 4A As shown, at Figure 2A In the process shown, the non-functional surface 21b of the electronic component 21 is bonded to the insulating layer 91 via a composite material (such as a bonding layer 22 and a metal layer 42).

[0129] In this embodiment, the material of the metal layer 42 can be a metal material with good heat dissipation capacity, such as copper. For example, a metal layer 42 can be sputtered onto the non-functional surface 21b of the electronic component 21, and then a bonding layer 22 can be adhered to the metal layer 42, so that the electronic component 21 is bonded to the insulating layer 91 through the bonding layer 22.

[0130] like Figure 4B As shown, proceed as follows Figures 2B to 2D The process shown in the diagram includes a bonding layer 22 and a metal layer 42 disposed between the wiring structure 24 and the electronic component 21.

[0131] like Figure 4C As shown, proceed as follows Figures 2E to 2G The process shown is used to obtain an electronic package 4, wherein the heat generated by the electronic component 21 can be transferred to the wiring structure 24 via the metal layer 42, and then dissipated via the heat sink 28 on the wiring structure 24.

[0132] In this embodiment, the composite material can also be first sputtered onto the insulating layer 91, and then the bonding layer 22 can be formed on the non-functional surface 21b of the electronic component 21, so that the electronic component 21 is bonded to the metal layer 42 via the bonding layer 22, as shown below. Figure 4D As shown. For example, the metal layer 42 can be fabricated simultaneously with the conductive pillar. Therefore, in subsequent processes, the wiring structure 24 can contact the metal layer 42, such as... Figure 4E As shown, the heat dissipation path of the electronic component 21 can be via the non-functional surface 21b, the bonding layer 22, the metal layer 42, the insulating layer 91, the wiring structure 24 (dielectric layer 240 or wiring layer 241), the heat dissipation pads 243 and 343, the heat sink 28 (or conductive pillar 33a), the circuit structure 20, and the support structure 26.

[0133] Furthermore, the wiring structure 24 can also be configured with a grounding line 441 to directly connect to the metal layer 42, such as... Figure 4F As shown. For example, the grounding line 441 can be fabricated together with the wiring layer 241 using a redistribution layer (RDL) process. Therefore, the heat dissipation path of the electronic component 21 can be via the non-functional surface 21b, the bonding layer 22, the metal layer 42, the wiring structure 24 (grounding line 441), the heat dissipation pads 243 and 343, the heat sink 28 (or conductive post 33a), the wiring structure 20, and the support structure 26, thereby improving the heat dissipation effect.

[0134] Therefore, the manufacturing method of this embodiment enhances the heat dissipation effect of the electronic component 21 (crystal back) by adding the metal layer 42 on the non-functional surface 21b of the electronic component 21. Furthermore, the metal layer 42 can be connected to the ground line 441 of the wiring structure 24, so that the heat dissipation through the metal layer 42 to the heat dissipation pad 243, 343 adopts a high heat dissipation metal path, thus achieving better results.

[0135] Figures 5A to 5CThis is a cross-sectional schematic diagram of a fourth embodiment of the manufacturing method of the electronic package 5 of the present invention. The difference between this embodiment and the third embodiment lies in the composition of the composite material, so the similarities will not be repeated below.

[0136] like Figures 5A to 5B As shown, at Figure 2A In the process shown, the non-functional surface 21b of the electronic component 21 is bonded to the insulating layer 91 via a composite material (such as a bonding layer 52, multiple heat sinks 50 and a metal layer 42).

[0137] In this embodiment, the bonding layer 52 is a non-conductive film (NCF), and the heat sinks 50 are embedded in the bonding layer 52 so that the heat sinks 50 contact the metal layer 42 on the non-functional surface 21b. For example, a metal layer 42 is first sputtered onto the non-functional surface 21b of the electronic component 21, then a bonding layer 52 is adhered to the metal layer 42, and multiple heat sinks 50 are formed on the insulating layer 91 (e.g., Figure 5A As shown), the electronic component 21 is pressed onto the heat sinks 50 via the bonding layer 52, so that the bonding layer 52 covers the heat sinks 50 (as shown). Figure 5B (As shown).

[0138] like Figure 5C As shown, in subsequent processes, the wiring structure 24 passes through the insulating layer 91 (or as... Figure 5D The grounding line 441 shown contacts the heat sink 50, so that the heat dissipation path of the electronic component 21 can be through the non-functional surface 21b, the metal layer 42, the heat sink 50, the insulating layer 91 (or grounding line 441), the heat dissipation pads 243, 343, the heat sink 28 (or conductive post 33a), the circuit structure 20 and the supporting structure 26.

[0139] Therefore, the manufacturing method of this embodiment enhances the heat dissipation effect of the electronic component 21 (crystal back) by adding the heat sink 50 on the non-functional surface 21b of the electronic component 21. Furthermore, the heat sink 50 can be connected to the ground line 441 of the wiring structure 24, so that the heat dissipation to the heat sink 243,343 through the metal layer 42 and the heat sink 50 adopts a high heat dissipation metal path, thus achieving better results.

[0140] The present invention also provides an electronic package 2, 3, 4, 5, comprising: a carrier structure 26, a package module 2a, a heat sink 28, and an electronic module 3a.

[0141] The encapsulation module 2a is stacked on the support structure 26 via multiple conductive elements 27 and includes a cover layer 25, at least one electronic component 21 and multiple conductive pillars 23, 33a embedded in the cover layer 25, and a wiring structure 24 formed on the cover layer 25, such that the multiple conductive elements 27 and the wiring structure 24 are respectively located on opposite sides of the cover layer 25, and the electronic component 21 and the multiple conductive pillars 23, 33a are electrically connected to the support structure 26 via the multiple conductive elements 27, and the wiring structure 24 is electrically connected to the multiple conductive pillars 23, 33a, wherein the wiring structure 24 has at least one heat dissipation pad 243, 343.

[0142] The heat sink 28 is disposed on the heat sink 243, 343 and combined with the support structure 26 so that the heat sink 28 covers a portion of the surface of the wiring structure 24.

[0143] The electronic module 3a is attached to another part of the surface of the wiring structure 24 and is electrically connected to the wiring structure 24.

[0144] In one embodiment, the heat dissipation pad 243 is a dummy pad with no electrical function.

[0145] In one embodiment, the wiring structure 24 has a grounding line 341, so that the heat dissipation pad 343 serves as a grounding pad connected to the grounding line 341.

[0146] In one embodiment, the wiring structure 24 has a plurality of heat dissipation pads 243, 343 arranged in a ring shape, and the heat sink 28 has a ring body 28a that incorporates the plurality of heat dissipation pads 243, 343, with an opening 280, allowing another portion of the surface of the wiring structure 24 to be exposed through the opening 280, so that the electronic module 3a is disposed on the wiring structure 24 within the opening 280 and electrically connected to the wiring structure 24. For example, a heat dissipation material 281 is disposed between the ring body 28a and the heat dissipation pads 243, 343. Further, the plurality of heat dissipation pads 243, 343 of the wiring structure 24 surround the opening 280 as a barrier, and the plurality of heat dissipation pads 243, 343 of the wiring structure 24 are arranged in multiple rings to define an inner ring 243a and an outer ring 243b, thereby limiting the placement range of the heat dissipation material 281.

[0147] In one embodiment, a metal layer 42 is disposed between the electronic component 21 and the wiring structure 24. For example, the metal layer 42 contacts the wiring structure 24. Alternatively, the wiring structure 24 has a ground line 441 to connect to the metal layer 42.

[0148] In one embodiment, the electronic package 2 further includes at least one heat dissipation structure 39 disposed on the electronic module 3a.

[0149] In summary, the electronic package and its manufacturing method of the present invention have at least one heat dissipation pad for contacting the heat sink through the wiring structure between the electronic module and the package module, so as to facilitate heat dissipation of the electronic module and the package module. Therefore, the heat energy of the electronic module and the package module can be dissipated to the external environment through the heat sink contacting the heat sink.

[0150] Furthermore, the heat sink is directly located above the conductive post and the wiring structure, which not only provides a fast heat dissipation path but also enhances the heat dissipation effect through the heat dissipation pad made of metal material.

[0151] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify the above embodiments without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the claims.

Claims

1. An electronic package, characterized in that, include: Load-bearing structure; The encapsulation module comprises a cover layer, at least one electronic component and a plurality of conductive pillars embedded in the cover layer, and a wiring structure formed on the cover layer, wherein the plurality of conductive components and the wiring structure are respectively disposed on opposite sides of the cover layer, and the at least one electronic component and the plurality of conductive pillars are electrically connected to the carrier structure through the plurality of conductive components, and the wiring structure is electrically connected to the plurality of conductive pillars, wherein the wiring structure has at least one heat dissipation pad; A heat sink, disposed on the at least one heat dissipation pad and integrated with the support structure, such that the heat sink covers a portion of the surface of the wiring structure; and At least one electronic module is disposed on another part of the surface of the wiring structure and is electrically connected to the wiring structure.

2. The electronic package as described in claim 1, characterized in that, At least one of the heat dissipation pads is a non-functional pad with no electrical function.

3. The electronic package as described in claim 1, characterized in that, The wiring structure has a grounding line so that the at least one heat dissipation pad serves as a grounding pad connected to the grounding line.

4. The electronic package as described in claim 1, characterized in that, The wiring structure has multiple heat dissipation pads arranged in a ring, and the heat dissipation component has a ring body that combines the multiple heat dissipation pads. The ring body has an opening so that another part of the surface of the wiring structure is exposed to the opening, so that at least one electronic module is disposed on the wiring structure in the opening and electrically connected to the wiring structure.

5. The electronic package as described in claim 4, characterized in that, A heat dissipation material is disposed between the ring and the plurality of heat dissipation pads.

6. The electronic package as described in claim 5, characterized in that, Multiple heat dissipation pads surround the opening to act as a barrier, preventing the heat dissipation material from overflowing into the opening area.

7. The electronic package as described in claim 6, characterized in that, The multiple heat dissipation pads are arranged in a multi-ring shape, and the inner ring and outer ring are defined according to their distance from the opening. The ring closest to the opening is the inner ring, and the ring furthest from the opening is the outer ring, so as to limit the layout of the heat dissipation material between the inner ring and the outer ring.

8. The electronic package as claimed in claim 1, characterized in that, A metal layer is disposed between the at least one electronic component and the wiring structure.

9. The electronic package as claimed in claim 8, characterized in that, The metal layer contacts the wiring structure.

10. The electronic package as claimed in claim 8, characterized in that, The wiring structure has a grounding line to connect to the metal layer.

11. The electronic package as claimed in claim 1, characterized in that, The electronic package also includes a heat dissipation structure disposed on the at least one electronic module.

12. A method for manufacturing an electronic package, characterized in that, include: A packaging module is provided, comprising a cover layer, at least one electronic component and a plurality of conductive pillars embedded in the cover layer, and a wiring structure formed on the cover layer, wherein the wiring structure is electrically connected to the plurality of conductive pillars, and wherein the wiring structure has at least one heat dissipation pad. The encapsulation module is stacked on a carrier structure via multiple conductive elements, such that the multiple conductive elements and the wiring structure are located on opposite sides of the encapsulation layer, and the at least one electronic component and the multiple conductive pillars are electrically connected to the carrier structure via the multiple conductive elements. The heat sink is placed on the at least one heat sink and combined with the support structure so that the heat sink covers a portion of the surface of the wiring structure; and At least one electronic module is attached to another part of the surface of the wiring structure so that the at least one electronic module is electrically connected to the wiring structure.

13. The method for manufacturing an electronic package as described in claim 12, characterized in that, At least one of the heat dissipation pads is a non-functional pad with no electrical function.

14. The method for manufacturing an electronic package as described in claim 12, characterized in that, The wiring structure has a grounding line so that the at least one heat dissipation pad serves as a grounding pad connected to the grounding line.

15. The method for manufacturing an electronic package as described in claim 12, characterized in that, The wiring structure has multiple heat dissipation pads arranged in a ring, and the heat dissipation component has a ring body that combines the multiple heat dissipation pads. The ring body has an opening so that another part of the surface of the wiring structure is exposed to the opening, so that at least one electronic module is disposed on the wiring structure in the opening and electrically connected to the wiring structure.

16. The method for manufacturing an electronic package as described in claim 15, characterized in that, A heat dissipation material is disposed between the ring and the plurality of heat dissipation pads.

17. The method for manufacturing an electronic package as described in claim 16, characterized in that, Multiple heat dissipation pads surround the opening to act as a barrier, preventing the heat dissipation material from overflowing into the opening area.

18. The method for manufacturing an electronic package as described in claim 17, characterized in that, The multiple heat dissipation pads are arranged in a multi-ring shape, and the inner ring and outer ring are defined according to their distance from the opening. The ring closest to the opening is the inner ring, and the ring furthest from the opening is the outer ring, so as to limit the layout of the heat dissipation material between the inner ring and the outer ring.

19. The method for manufacturing an electronic package as described in claim 12, characterized in that, A metal layer is disposed between the at least one electronic component and the wiring structure.

20. The method for manufacturing an electronic package as described in claim 19, characterized in that, The metal layer contacts the wiring structure.

21. The method for manufacturing an electronic package as described in claim 19, characterized in that, The wiring structure has a grounding line to connect to the metal layer.

22. The method for manufacturing an electronic package as described in claim 12, characterized in that, The manufacturing method also includes configuring a heat dissipation structure on the at least one electronic module.

Citation Information

Patent Citations

  • Chip stacking package structure and manufacture method thereof

    CN101937907A

  • Module, module manufacturing method, and package

    US20180233459A1