Detection method, detection circuit and synchronous rectification chip

Abstract

This application discloses a detection method, a detection circuit, and a synchronous rectifier chip. The detection method is applied to a synchronous rectifier chip. The detection method includes: detecting whether the light-load function of the synchronous rectifier chip is enabled, obtaining a first detection result; detecting whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip decreasing from a first threshold to a second threshold meets a preset condition, obtaining a second detection result; determining whether the drive pulse signal is abnormal based on the first and second detection results; if the drive pulse signal is abnormal within a preset time after the light-load function is disabled, controlling the switch controlled by the synchronous rectifier chip to turn off; if the drive pulse signal is normal within a preset time after the light-load function is disabled, controlling the switch controlled by the synchronous rectifier chip to turn on. This application can accurately determine whether the drive pulse signal is abnormal after the light-load function of the synchronous rectifier chip is disabled, avoiding the accidental turning on of the switch controlled by the synchronous rectifier chip.

Description

Technical Field

[0001] This application relates to the field of synchronous rectification chip technology, and in particular to a detection method, a detection circuit, and a synchronous rectification chip. Background Technology

[0002] The power supply system internally includes a main control chip and a synchronous rectification chip. For example... Figure 1 As shown, the main control chip A is electrically connected to the synchronous rectifier chip B. The main control chip A is used to control the power of the power supply system, and the synchronous rectifier chip B is used to rectify and control the current of the power supply system and output power.

[0003] When a synchronous rectifier chip is used in a power supply system, the synchronization relationship between the switching transistor controlled by the synchronous rectifier chip and the switching transistor controlled by the main control chip needs to be considered. Specifically, when the switching transistor on the main control chip side is turned on, the switching transistor on the synchronous rectifier chip side is turned off; conversely, when the switching transistor on the main control chip side is turned off, the switching transistor on the synchronous rectifier chip side is turned on. In other words, under normal circumstances, when the switching transistor on the main control chip side is turned on, the switching transistor on the synchronous rectifier chip side is turned off, and vice versa. At this time, the synchronous rectifier chip operates in normal working condition, and the current flowing into the synchronous rectifier switching transistor is normal current.

[0004] In order to achieve synchronization between the switching transistor controlled by the synchronous rectifier chip and the switching transistor controlled by the main control chip, the synchronous rectifier chip needs to detect a valid and normal drive pulse signal to drive the switching transistor controlled by the synchronous rectifier chip to turn on.

[0005] Currently, when the synchronous rectifier chip is under light load, its detection of normal drive pulse signals and abnormal ringing signals is not accurate enough after the light load function is turned off. This may lead to the synchronous rectifier chip controlling the switch being turned on erroneously. This increases the probability that the switch on the main control chip side and the switch on the synchronous rectifier chip side are turned on at the same time, resulting in an increase in the current flowing through the switch on the synchronous rectifier chip side, which may damage the switch on the synchronous rectifier chip side. Summary of the Invention

[0006] In view of this, the present invention aims to at least partially solve one of the problems in the related art. Therefore, the object of this application is to provide a detection method, a detection circuit, and a synchronous rectification chip.

[0007] This application provides a detection method applied to a synchronous rectifier chip. The detection method includes: detecting whether the light-load function of the synchronous rectifier chip is enabled, obtaining a first detection result; detecting whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip decreasing from a first threshold to a second threshold meets a preset condition, obtaining a second detection result; determining whether the drive pulse signal is abnormal based on the first detection result and the second detection result; if the drive pulse signal is abnormal within a preset time after the light-load function is disabled, controlling the switch controlled by the synchronous rectifier chip to turn off; and if the drive pulse signal is normal within a preset time after the light-load function is disabled, controlling the switch controlled by the synchronous rectifier chip to turn on.

[0008] Thus, this application can accurately determine whether the drive pulse signal is abnormal based on the first and second detection results after the light load function of the synchronous rectifier chip is turned off, thereby avoiding the situation where the switching transistor controlled by the synchronous rectifier chip is turned on by mistake.

[0009] In some implementations, determining whether the drive pulse signal is abnormal based on the first detection result and the second detection result includes: when the first detection result is that the light load function is off, and the second detection result is that within a preset time after the light load function is off, the slope of the drive pulse signal decreasing from the first threshold to the second threshold satisfies a preset condition, the drive pulse signal is determined to be abnormal.

[0010] Thus, the detection method of this application can determine that the drive pulse signal is abnormal when the slope of the drive pulse signal dropping from the first threshold to the second threshold meets the preset condition within a preset time after the light load function is turned off, thereby avoiding the accidental turn-on of the switching transistor controlled by the synchronous rectifier chip, which would lead to damage to the switching transistor on the synchronous rectifier chip side.

[0011] In some implementations, determining whether the drive pulse signal is abnormal based on the first detection result and the second detection result includes: within a preset time after the light load function is turned off, if it is determined that the drive pulse signal is abnormal, controlling the switch controlled by the synchronous rectification chip to turn off, and the duration of the switch controlled by the synchronous rectification chip being turned off is a predetermined duration.

[0012] Thus, the detection method of this application, after determining that the drive pulse signal is an abnormal signal, controls the switching transistor controlled by the synchronous rectification chip to turn off, and the duration of the shutdown is a predetermined time. That is, after a predetermined time, the validity of the drive pulse signal is re-determined, and then the switching transistor controlled by the synchronous rectification chip is turned on again, which can effectively avoid the situation of the switching transistor being turned on by mistake.

[0013] In some implementations, determining whether the drive pulse signal is abnormal based on the first detection result and the second detection result includes: when the first detection result is that the light load function is off, and the second detection result is that within a preset time after the light load function is off, the slope of the drive pulse signal decreasing from the first threshold to the second threshold does not meet a preset condition, the drive pulse signal is determined to be normal.

[0014] Thus, the detection method of this application can accurately detect whether the drive pulse signal is normal after the light load function of the synchronous rectifier chip is turned off. Specifically, if the slope of the drive pulse signal from the first threshold to the second threshold does not meet the preset condition within a preset time after the light load function is turned off, it is determined that the drive pulse signal is normal, and then the switching transistor controlled by the synchronous rectifier chip is turned on, so as to avoid the situation where the switching transistor controlled by the synchronous rectifier chip is turned on by mistake.

[0015] In some implementations, determining whether the drive pulse signal is abnormal based on the first detection result and the second detection result includes: when the first detection result is that the light load function is off, and the second detection result is that the drive pulse signal does not drop from the first threshold to the second threshold within a preset time after the light load function is off, the drive pulse signal is determined to be normal.

[0016] Thus, the detection method of this application determines that the drive pulse signal is normal when the first detection result is that the light load function is off, and the second detection result is that the drive pulse signal does not drop from the first threshold to the second threshold within a preset time after the light load function is off. In this way, the switching transistor controlled by the synchronous rectifier chip is turned on, which can accurately determine that the drive pulse signal is a normal signal, so as to avoid the situation where the switching transistor controlled by the synchronous rectifier chip is turned on by mistake.

[0017] This application also provides a detection circuit applied to a synchronous rectification chip. The detection circuit includes: a light load detection module, a slope detection module, a logic processing module, a circuit control module, and a latch. The first input terminal of the logic processing module is connected to the output terminal of the light load detection module, and the second input terminal of the logic processing module is connected to the output terminal of the slope detection module. The first input terminal of the latch is connected to the output terminal of the logic processing module, the second input terminal of the latch is connected to the output terminal of the circuit control module, and the output terminal of the latch is connected to a driving unit in the synchronous rectification chip. The driving unit is connected to a switching transistor controlled by the synchronous rectification chip. The light load detection module is used to detect whether the light load function of the synchronous rectifier chip is enabled and outputs a first detection result; the slope detection module is used to detect whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip when it drops from a first threshold to a second threshold meets a preset condition and outputs a second detection result; the logic processing module is used to output the first detection result and the second detection result; the circuit control module is used to output a circuit control signal; the latch is used to determine whether the drive pulse signal is abnormal based on the first detection result and the second detection result, and within a preset time after the light load function is disabled, if the drive pulse signal is abnormal, control the switch controlled by the synchronous rectifier chip to turn off; within a preset time after the light load function is disabled, if the drive pulse signal is normal, control the switch controlled by the synchronous rectifier chip to turn on.

[0018] Thus, the detection circuit of this application determines whether the drive pulse signal is abnormal by detecting whether the light load function of the synchronous rectifier chip is enabled and whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip from the first threshold to the second threshold meets the preset conditions. It can accurately detect whether the drive pulse signal is abnormal when the light load function of the synchronous rectifier chip is enabled or disabled, thereby avoiding the accidental activation of the switching transistor controlled by the synchronous rectifier chip.

[0019] In some embodiments, the latch is used to determine, based on the first detection result and the second detection result, that when the drive pulse signal is abnormal within a preset time after the light load function is turned off, the latch controls the switching transistor controlled by the synchronous rectification chip to turn off according to the circuit control signal and the corresponding pulse modulation signal output by the drive pulse signal. Wherein, the first detection result is the light load function being turned off; the second detection result is that within the preset time after the light load function is turned off, the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectification chip as it decreases from the first threshold to the second threshold satisfies a preset condition.

[0020] Thus, the detection circuit of this application can, within a preset time after the light load function is turned off, when the drive pulse signal is abnormal, output the corresponding pulse modulation signal according to the turn-off signal of the circuit control signal to control the switching transistor controlled by the synchronous rectifier chip to turn off, thereby avoiding the switching transistor controlled by the synchronous rectifier chip from being turned on by mistake, which would damage the switching transistor on the synchronous rectifier chip side.

[0021] In some embodiments, the latch is used to determine that the drive pulse signal is normal within a preset time after the light load function is turned off based on the first detection result and the second detection result, and to control the switching transistor controlled by the synchronous rectification chip to turn on based on the circuit control signal and the drive pulse signal to output a corresponding pulse modulation signal; wherein, the first detection result is that the light load function is turned off; the second detection result is that the slope of the drive pulse signal decreasing from the first threshold to the second threshold does not meet the preset condition within the preset time after the light load function is turned off.

[0022] Thus, the detection circuit of this application can determine that the driving pulse signal is normal when the first detection result is that the light load function is off, and the second detection result is that the slope of the driving pulse signal from the first threshold to the second threshold does not meet the preset condition within a preset time after the light load function is off. Based on the circuit control signal and the driving pulse signal, the corresponding pulse modulation signal is output to control the switching transistor controlled by the synchronous rectification chip to turn on, so as to ensure the normal turn-on of the switching transistor of the synchronous rectification chip.

[0023] This application also provides a detection device applied to a synchronous rectifier chip. The detection device includes a first detection module, a second detection module, a judgment module, and a control module. The first detection module is used to detect whether the light-load function of the synchronous rectifier chip is enabled, and obtain a first detection result; the second detection module is used to detect whether the slope of the driving pulse signal emitted from the power supply terminal of the synchronous rectifier chip from a first threshold to a second threshold meets a preset condition, and obtain a second detection result; the judgment module is used to determine whether the driving pulse signal is abnormal based on the first detection result and the second detection result; the control module is used to control the switching transistor controlled by the synchronous rectifier chip to turn off when the driving pulse signal is abnormal within a preset time after the light-load function is turned off, and to control the switching transistor controlled by the synchronous rectifier chip to turn on when the driving pulse signal is normal within a preset time after the light-load function is turned off.

[0024] Thus, the detection device of this application can accurately determine whether the drive pulse signal is abnormal based on the first detection result and the second detection result after the light load function of the synchronous rectifier chip is turned off, thereby avoiding the situation where the switching transistor controlled by the synchronous rectifier chip is turned on by mistake.

[0025] This application also provides a synchronous rectification chip. The synchronous rectification chip includes the detection circuit described in any of the above embodiments. The synchronous rectification chip further includes a logic control unit and a driving unit. The logic control unit includes the detection circuit, which is connected to the driving unit. The driving unit drives the switching transistor controlled by the synchronous rectification chip to turn off and on according to the pulse modulation signal emitted by the detection circuit.

[0026] Thus, the synchronous rectifier chip of this application can detect whether the light-load function of the synchronous rectifier chip is enabled by setting a detection circuit in the logic control unit, and detect whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip from the first threshold to the second threshold meets the preset conditions to determine whether the drive pulse signal is abnormal. It can accurately detect whether the drive pulse signal is abnormal when the light-load function of the synchronous rectifier chip is disabled, thereby avoiding the situation where the switching transistor controlled by the synchronous rectifier chip is accidentally turned on.

[0027] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0028] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0029] Figure 1 This is a schematic diagram of the power supply system in related technologies;

[0030] Figure 2 This is a schematic diagram of the internal structure of a synchronous rectifier chip in related technologies;

[0031] Figure 3 This is a flowchart illustrating the detection method in some embodiments of this application;

[0032] Figure 4 This is a schematic diagram of the detection device in some embodiments of this application;

[0033] Figure 5 This is a schematic diagram showing the relationship between the VD signal and the VG pin being turned on and off in a synchronous rectification chip according to certain embodiments of this application;

[0034] Figure 6 This is a waveform diagram illustrating how the synchronous rectification chip in certain embodiments of this application distinguishes between the valid VD signal and the ringing signal;

[0035] Figure 7 This is a schematic diagram of the detection circuit according to some embodiments of this application;

[0036] Figure 8This is a schematic diagram of the structure of a synchronous rectification chip according to certain embodiments of this application. Detailed Implementation

[0037] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0038] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0039] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0040] The following disclosure provides many different implementations or examples for carrying out different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or reference letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various implementations and / or arrangements discussed.

[0041] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0042] Please see Figure 2 , Figure 2This is a basic block diagram of a current synchronous rectifier chip, which internally includes an over-power supply circuit (LDO), an under-voltage protection circuit (UVLO), a sense circuit for detecting the on-state, a control circuit, and a driver circuit. The under-voltage protection circuit detects whether the chip's power supply is at its rated value; the sense circuit detects the on-state of the external switch; the control circuit processes the output of the sense circuit after logic processing, and then controls the driver circuit; the driver circuit controls the switching state of the switch and the substrate switching, thus protecting the switch.

[0043] When the synchronous rectifier chip is in normal working condition, when the main control chip's switching transistor is turned on, the synchronous rectifier chip's switching transistor is turned off, and when the main control chip's switching transistor is turned off, the synchronous rectifier's switching transistor is turned on. At this time, the synchronous rectifier chip is working in normal working condition, and the current flowing into the synchronous rectifier switching transistor is normal current.

[0044] When the synchronous rectifier chip malfunctions, i.e., the ringing signal at the VD terminal of the synchronous rectifier chip meets the conditions for the switch controlled by the VG pin to turn on, the synchronous rectifier chip feeds back a pulse sequence signal to the VG pin after passing through the logic processing circuit. This periodically turns on the switch controlled by the VG pin, which increases the probability that the switch on the main control chip side and the switch controlled by the VG pin are turned on simultaneously. This increases the current flowing through the switch on the synchronous rectifier chip side, which may damage the switch on the synchronous rectifier chip side.

[0045] Understandably, once the ringing signal at the VD terminal meets the conditions for the switch controlled by the VG pin to turn on, the synchronous rectifier chip will ensure the switch is on for at least a minimum on-time (Ton_min). After the minimum on-time ends, the switch turns off, causing the subsequent ringing signal at the VD terminal to become abnormally large. Then, after a minimum off-time (Toff_min), the switch controlled by the synchronous rectifier chip again meets the on-time conditions, causing it to turn on abnormally. At this point, when the abnormal ringing signal causes the switch controlled by the VG pin on the synchronous rectifier chip side to turn on abnormally, it increases the probability that the switch on the main control chip side and the switch controlled by the VG pin on the synchronous rectifier chip side will turn on simultaneously. This increases the current flowing through the switch on the synchronous rectifier chip side, potentially damaging it.

[0046] In view of this, please refer to Figure 3 This application provides a detection method applied to synchronous rectification chips. The detection method includes:

[0047] 01: Check whether the light-load function of the synchronous rectification chip is enabled to obtain the first detection result;

[0048] 02: Detect whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip from the first threshold to the second threshold meets the preset condition, and obtain the second detection result;

[0049] 03: Determine whether the drive pulse signal is abnormal based on the first and second detection results;

[0050] 04: Within a preset time after the light load function is turned off, if the drive pulse signal is found to be abnormal, the switch controlled by the synchronous rectifier chip is turned off; within a preset time after the light load function is turned off, if the drive pulse signal is found to be normal, the switch controlled by the synchronous rectifier chip is turned on.

[0051] Please see Figure 4 This application also provides a detection device 10 applied to a synchronous rectifier chip. The detection device 10 includes a first detection module 11, a second detection module 12, a judgment module 13, and a control module 14. The first detection module 11 is used to detect whether the light-load function of the synchronous rectifier chip is enabled, and obtain a first detection result; the second detection module 12 is used to detect whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip from a first threshold to a second threshold meets a preset condition, and obtain a second detection result; the judgment module 13 is used to determine whether the drive pulse signal is abnormal based on the first detection result and the second detection result; the control module 14 is used to control the switch controlled by the synchronous rectifier chip to turn off when the drive pulse signal is abnormal within a preset time after the light-load function is turned off, and to control the switch controlled by the synchronous rectifier chip to turn on when the drive pulse signal is normal within a preset time after the light-load function is turned off.

[0052] First, the detection of whether the light-load function of the synchronous rectifier chip is enabled specifically involves detecting whether the synchronous rectifier chip is under a light load. When the synchronous rectifier chip is under a light load, the light-load function is enabled; when the synchronous rectifier chip is not under a light load, the light-load function is disabled. Correspondingly, the first detection result includes whether the light-load function of the synchronous rectifier chip is enabled or disabled.

[0053] Next, the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip from the first threshold to the second threshold is detected to meet the preset conditions, and the second detection result is obtained.

[0054] Understandably, please refer to Figure 2 and Figure 5 The power supply terminal of the synchronous rectifier chip is... Figure 2 At the VD terminal, the slope of the driving pulse signal emitted from the power supply terminal of the synchronous rectifier chip from the first threshold to the second threshold is detected to meet the preset condition, that is, the slope of the falling edge of the driving pulse signal emitted from the VD terminal is detected to meet the preset condition.

[0055] The first threshold can be Figure 5 The set value V1 in the [reference] can be, for example, 2V. The second threshold can be [reference]. Figure 5 The set value V2 in the settings can be, for example, -100mV.

[0056] The preset condition can be that the slope of the drive pulse signal falling from the first threshold to the second threshold is less than the value K1. The value K1 can be determined by the time T1 during which the drive pulse signal falls from the first threshold to the second threshold. When T1 is less than a set value Tslew, the set value Tslew can be, for example, 5ms, then the slope of the drive pulse signal falling from the first threshold to the second threshold is less than the value K1.

[0057] At this point, the slope of the drive pulse signal (or VD signal) emitted from the power supply terminal VD of the detection synchronous rectifier chip as it drops from the first threshold to the second threshold satisfies the preset condition. This can be determined by the following two conditions: the drive pulse signal drops from the set value V1 to the set value V2; and the time T1 during which the drive pulse signal drops from the set value V1 to the set value V2 is less than the set value Tslew. These two conditions are the necessary conditions for the VD signal to enable VG, and neither can be omitted.

[0058] That is, when the drive pulse signal drops from the set value V1 to the set value V2, and the time T1 during which the drive pulse signal drops from the set value V1 to the set value V2 is less than the set value Tslew, it is determined that the slope of the drive pulse signal dropping from the first threshold to the second threshold is less than the value K1, thereby determining that the slope of the drive pulse signal emitted by the power supply terminal of the synchronous rectifier chip dropping from the first threshold to the second threshold meets the preset condition.

[0059] Subsequently, based on the first and second detection results, it is determined whether the drive pulse signal is abnormal. Then, based on the abnormality determination result, the switching transistor controlled by the synchronous rectifier chip is controlled to turn on and off. That is, this application determines whether the drive pulse signal is a valid signal or a ringing signal based on the first and second detection results, and alternately turns on the VG signal of the VG pin to achieve the alternating on and off of the switching transistor of the synchronous rectifier chip.

[0060] That is, within a preset time after the light load function is turned off, if the drive pulse signal is found to be abnormal, the switch controlled by the synchronous rectifier chip is turned off; within a preset time after the light load function is turned off, if the drive pulse signal is found to be normal, the switch controlled by the synchronous rectifier chip is turned on.

[0061] The preset time can be... Figure 6 The T3 time in the example. Figure 6As shown, the detection method of this application can start timing when the falling edge of the lightload function signal lightload1 after time T2 is detected, and the timing time is a preset time T3. The preset time T3 is less than the set value Trill, which can be 5 times the sum of the minimum on time Ton_min and the minimum off time Toff_min. When the VD signal reaches the VG on condition within the preset time T3, it is determined that the signal is an abnormal ringing signal, and the lightload function signal lightload2 is turned on and lasts for time T4, where T4 can be 0.5 times the effective VD signal period. During T4, the VG pin is turned off, so that the VG pin is continuously at a low level. If the VD signal does not reach the VG on condition within time T3, the lightload2 signal is not turned on, and the VG pin is turned on normally.

[0062] Understandably, Figure 6 The lightload1 function signal is a pulse signal emitted by the first detection module 11 when the light load function of the synchronous rectifier chip is enabled, and the lightload2 function signal is a pulse signal emitted by the first detection module 11 when the light load function of the synchronous rectifier chip is disabled. Figure 6 The light-load function is active for a duration of T2, after which it is deactivated. Within a preset time T3 after the light-load function is deactivated, it can detect whether the drive pulse signal drops from a first threshold to a second threshold, and whether the slope of the drive pulse signal dropping from the first threshold to the second threshold meets a preset condition to determine if the drive pulse signal is abnormal. If the signal is determined to be an abnormal ringing signal, the first detection module 11 is controlled to issue a warning. Figure 6 The lightload2 function signal is activated and remains active for a duration of T4. During T4, the VG pin is turned off to prevent the switching transistor controlled by the synchronous rectifier chip from being turned on erroneously. If, within a preset time T3 after the light load function is turned off, the falling edge of the drive pulse signal does not fall from the first threshold to the second threshold, or the slope of the drive pulse signal falling from the first threshold to the second threshold is not less than the slope K1, then the signal is considered normal, and the lightload2 signal is not activated, while the VG pin is turned on normally.

[0063] Thus, this application determines whether the drive pulse signal is abnormal by detecting whether the light-load function of the synchronous rectifier chip is enabled and whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip from the first threshold to the second threshold meets the preset conditions. This allows for accurate detection of abnormal drive pulse signals when the light-load function of the synchronous rectifier chip is disabled, thereby preventing the switch controlled by the synchronous rectifier chip from being turned on erroneously.

[0064] The following details how to determine whether the drive pulse signal is abnormal based on the first and second detection results when the light load function is turned off.

[0065] When the light load function is off, step 03 includes: when the first detection result is that the light load function is off, and the second detection result is that the slope of the drive pulse signal dropping from the first threshold to the second threshold within a preset time after the light load function is off meets the preset condition, the drive pulse signal is judged to be abnormal.

[0066] Please combine Figure 4 The judgment module 13 is used to determine whether the drive pulse signal is abnormal based on the first detection result and the second detection result when the light load function is turned off. This includes: when the first detection result is that the light load function is turned off, and the second detection result is that the slope of the drive pulse signal from the first threshold to the second threshold meets the preset condition within a preset time after the light load function is turned off, the drive pulse signal is judged to be abnormal.

[0067] Understandably, in related technologies, the detection of normal drive pulse signals and abnormal ringing signals is not accurate enough when the light-load function is off, making it impossible to determine whether the VD signal indicates that VG is on or off. When the light-load function is off, the amplitude of the ringing signal VD increases, and there is a high probability that it will meet the VG signal's on-condition, i.e., the slope of the VD signal dropping from the first threshold to the second threshold meets a preset condition, thus causing the VG pin to be erroneously turned on. This erroneous turn-on of the VG pin may cause the output startup voltage Vo to cause a power-off restart, thereby damaging the switching transistor controlled by the synchronous rectification chip.

[0068] Please combine Figure 6 The duration of the pulse signal when the light-load function is activated is assumed to be T2, which can be, for example, 200ms. The preset time after the light-load function is deactivated is assumed to be T3, which is less than the set value Triing. Through practical research, the set value Triing can be, for example, 5 times the sum of the values ​​Ton_min and Toff_min. For instance, when Ton_min is 10ms and Toff_min is 12ms, Triing is 110ms, and in this case, T3 is less than 110ms.

[0069] Within a preset time T3 after the light load function is turned off, if the slope of the drive pulse signal decreasing from the first threshold to the second threshold meets a preset condition, the drive pulse signal is determined to be abnormal. Specifically, within time T3, the slope of the drive pulse signal decreasing from the first threshold to the second threshold meeting the preset condition means that within time T3, the slope of the drive pulse signal decreasing from the first threshold to the second threshold is less than K1.

[0070] In detail, this application detects the falling edge of the drive pulse signal after the light-load function is turned off and starts timing, such as... Figure 6As shown, when the slope of the drive pulse signal falling from the first threshold to the second threshold within the T3 time is less than the set value, it is determined that the drive pulse signal is a ringing signal, and the VG pin is not turned on at this time.

[0071] Thus, the detection method of this application can determine that the drive pulse signal is abnormal when the slope of the drive pulse signal dropping from the first threshold to the second threshold meets the preset condition within a preset time after the light load function is turned off, thereby avoiding the accidental turn-on of the switching transistor controlled by the synchronous rectifier chip, which would lead to damage to the switching transistor on the synchronous rectifier chip side.

[0072] At this time, the detection method of this application, within a preset time after the light load function is turned off, determines that the drive pulse signal is abnormal and controls the switch controlled by the synchronous rectifier chip to turn off. That is, within the preset time T3 after the light load function is turned off, when the drive pulse signal is determined to be abnormal, the switch controlled by the synchronous rectifier chip is controlled to turn off, thereby avoiding the abnormal turn-on of the switch controlled by the VG pin on the synchronous rectifier chip side when the VD signal is a ringing signal.

[0073] Thus, the detection method of this application can determine when the drive pulse signal is abnormal within a preset time after the light load function is turned off, and control the switching transistor controlled by the synchronous rectifier chip to turn off, so as to avoid the switching transistor controlled by the synchronous rectifier chip being turned on by mistake, which would damage the switching transistor on the synchronous rectifier chip side.

[0074] Furthermore, step 03 also includes: within a preset time after the light load function is turned off, if it is determined that the drive pulse signal is abnormal, the switch controlled by the synchronous rectifier chip is turned off, and the duration of the switch controlled by the synchronous rectifier chip being turned off is a predetermined duration.

[0075] Please combine Figure 4 The judgment module 13 is used to determine when the drive pulse signal is abnormal within a preset time after the light load function is turned off, and to control the switch controlled by the synchronous rectifier chip to turn off, and the duration of the switch controlled by the synchronous rectifier chip being turned off is a predetermined duration.

[0076] Specifically, such as Figure 6 As shown, after determining that the drive pulse signal is a ringing signal, the switch controlled by the synchronous rectifier chip is turned off, and the duration of the VG signal being turned off can be a predetermined time T4. That is to say, after determining that the drive pulse signal is a ringing signal, at least another T4 time is elapsed before the VD signal is re-determined to be valid, and then the VG pin is turned back on.

[0077] T4 can be 0.5 times the effective VD signal period T5. The effective VD signal period T5 is as follows: Figure 6As shown, the effective VD signal period T5 is the duration of a single, continuous effective VD signal. It can be understood that T4 is 0.5 times the effective VD signal period T5, ensuring that the VG pin is off during the T4 time period after the VD signal is determined to be a ringing signal and before the effective VD signal is activated. This effectively prevents the switching transistor controlled by the VG pin on the synchronous rectifier chip side from abnormally turning on when the VD signal is a ringing signal.

[0078] Thus, the detection method of this application, after determining that the drive pulse signal is an abnormal signal, controls the switching transistor controlled by the synchronous rectification chip to turn off, and the duration of the shutdown is a predetermined time. That is, after a predetermined time, the validity of the drive pulse signal is re-determined, and then the switching transistor controlled by the synchronous rectification chip is turned on again, which can effectively avoid the situation of the switching transistor being turned on by mistake.

[0079] When the light load function is off, step 03 includes: when the first detection result is that the light load function is off, and the second detection result is that the slope of the drive pulse signal dropping from the first threshold to the second threshold does not meet the preset condition within a preset time after the light load function is off, the drive pulse signal is judged to be normal.

[0080] Please combine Figure 4 The judgment module 13 is used to determine that the driving pulse signal is normal when the first detection result is that the light load function is off, and the second detection result is that the slope of the driving pulse signal from the first threshold to the second threshold does not meet the preset condition within a preset time after the light load function is off.

[0081] In other words, if the slope of the drive pulse signal dropping from the first threshold to the second threshold does not meet the preset condition (i.e., the slope is greater than the K1 value) within a preset time after the light load function is turned off, it can be determined that the drive pulse signal is normal at this time, and then the switching transistor controlled by the synchronous rectification chip is turned on normally.

[0082] Thus, the detection method of this application can accurately detect whether the drive pulse signal is normal after the light load function of the synchronous rectifier chip is turned off. Specifically, if the slope of the drive pulse signal from the first threshold to the second threshold does not meet the preset condition within a preset time after the light load function is turned off, it is determined that the drive pulse signal is normal, and then the switching transistor controlled by the synchronous rectifier chip is turned on, so as to avoid the situation where the switching transistor controlled by the synchronous rectifier chip is turned on by mistake.

[0083] In some implementations, step 03 further includes: when the first detection result is that the light load function is off, and the second detection result is that the drive pulse signal does not drop from the first threshold to the second threshold within a preset time after the light load function is off, the drive pulse signal is determined to be normal.

[0084] Please combine Figure 4The judgment module 13 is used to: determine that the drive pulse signal is normal when the first detection result is that the light load function is off, and the second detection result is that the drive pulse signal does not drop from the first threshold to the second threshold within a preset time after the light load function is off.

[0085] In other words, if the drive pulse signal is detected not to drop from the first threshold to the second threshold within a preset time after the light load function is turned off, it can be determined that the drive pulse signal is normal at this time, and then the switching transistor controlled by the synchronous rectification chip is turned on normally.

[0086] Thus, the detection method of this application determines that the drive pulse signal is normal when the first detection result is that the light load function is off, and the second detection result is that the drive pulse signal does not drop from the first threshold to the second threshold within a preset time after the light load function is off. In this way, the switching transistor controlled by the synchronous rectifier chip is turned on, which can accurately determine that the drive pulse signal is a normal signal, so as to avoid the situation where the switching transistor controlled by the synchronous rectifier chip is turned on by mistake.

[0087] Please see Figure 7 This application also provides a detection circuit 100 applied to a synchronous rectification chip. The detection circuit 100 includes a light load detection module 110, a slope detection module 120, a logic processing module 130, a circuit control module 140, and a latch 150. The first input terminal 131 of the logic processing module 130 is connected to the output terminal 111 of the light load detection module 110, and the second input terminal 132 of the logic processing module 130 is connected to the output terminal 121 of the slope detection module 120. The first input terminal 151 of the latch 150 is connected to the output terminal 133 of the logic processing module 130, the second input terminal 152 of the latch 150 is connected to the output terminal 141 of the circuit control module 140, and the output terminal 153 of the latch 150 is connected to a drive unit in the synchronous rectification chip. The drive unit is connected to a switching transistor controlled by the synchronous rectification chip. Please refer to... Figure 2 As shown, the driving unit in the synchronous rectifier chip is... Figure 2 The driver circuit in the circuit.

[0088] The light-load detection module 110 is used to detect whether the light-load function of the synchronous rectification chip is enabled and outputs the first detection result. Please refer to... Figure 2The slope detection module 120 is used to detect whether the slope of the drive pulse signal emitted from the power supply terminal VD of the synchronous rectifier chip when it drops from the first threshold to the second threshold meets the preset conditions, and outputs the second detection result. The logic processing module 130 is used to output the first detection result and the second detection result. The circuit control module 140 is used to output the circuit control signal. The latch 150 is used to determine whether the drive pulse signal is abnormal based on the first detection result and the second detection result, and within a preset time after the light load function is turned off, if the drive pulse signal is abnormal, control the switch controlled by the synchronous rectifier chip to turn off; if the drive pulse signal is normal within a preset time after the light load function is turned off, control the switch controlled by the synchronous rectifier chip to turn on.

[0089] Specifically, the first and second detection results, and how to determine whether the drive pulse signal is abnormal based on the first and second detection results, are as described above and will not be repeated here.

[0090] Thus, the detection circuit 100 of this application determines whether the drive pulse signal is abnormal by detecting whether the light load function of the synchronous rectifier chip is turned on and whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip from the first threshold to the second threshold meets the preset conditions. It can accurately detect whether the drive pulse signal is abnormal when the light load function of the synchronous rectifier chip is turned off, thereby avoiding the accidental turn-on of the switching transistor controlled by the synchronous rectifier chip.

[0091] In one embodiment, latch 150 is used to determine, based on a first detection result and a second detection result, that when the drive pulse signal is abnormal within a preset time after the light load function is turned off, it controls the switching transistor controlled by the synchronous rectifier chip to turn off according to the circuit control signal and the corresponding pulse modulation signal output by the drive pulse signal. The first detection result is that the light load function is turned off; the second detection result is that within the preset time after the light load function is turned off, the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip when it drops from a first threshold to a second threshold meets a preset condition.

[0092] Specifically, at this time, the circuit control signal is a shutdown signal. Based on the circuit control signal and the abnormal drive pulse signal, the corresponding pulse modulation signal (PWM) can be output to control the switching transistor controlled by the synchronous rectifier chip to turn off.

[0093] Furthermore, the preset time after the light load function is turned off, the preset conditions for the slope of the drive pulse signal when it drops from the first threshold to the second threshold, and how to determine whether the drive pulse signal is abnormal are as described above, and will not be repeated here.

[0094] Thus, the detection circuit 100 of this application can, within a preset time after the light load function is turned off, output a corresponding pulse modulation signal according to the turn-off signal of the circuit control signal to control the switching transistor controlled by the synchronous rectifier chip to turn off when the drive pulse signal is abnormal, thereby avoiding the switching transistor controlled by the synchronous rectifier chip being turned on by mistake, which would damage the switching transistor on the synchronous rectifier chip side.

[0095] In another embodiment, latch 150 is used to determine that the drive pulse signal is normal within a preset time after the light load function is turned off based on the first detection result and the second detection result, and to control the switching transistor controlled by the synchronous rectifier chip to turn on according to the circuit control signal and the corresponding pulse modulation signal output by the drive pulse signal. The first detection result is that the light load function is turned off; the second detection result is that the slope of the drive pulse signal decreasing from the first threshold to the second threshold does not meet a preset condition within the preset time after the light load function is turned off.

[0096] Specifically, at this time, the circuit control signal is the turn-on signal. Based on the circuit control signal and the abnormal drive pulse signal, the corresponding pulse modulation signal (PWM) can be output to control the switching transistor controlled by the synchronous rectifier chip to turn on normally.

[0097] In addition, the preset conditions for the first threshold, the second threshold, and the slope of the preset time drive pulse signal after the light load function is turned off are as described above, and will not be repeated here.

[0098] Thus, the detection circuit 100 of this application can detect that the first detection result is that the light load function is off, and the second detection result is that the slope of the drive pulse signal dropping from the first threshold to the second threshold does not meet the preset condition within a preset time after the light load function is off. In this case, it can determine that the drive pulse signal is normal, and control the switching transistor controlled by the synchronous rectification chip to turn on according to the circuit control signal and the corresponding pulse modulation signal output by the drive pulse signal, so as to ensure the normal turn-on of the switching transistor of the synchronous rectification chip.

[0099] In addition, latch 150 is also used to determine that the drive pulse signal is normal within a preset time after the light load function is turned off based on the first detection result and the second detection result, and to control the switching transistor controlled by the synchronous rectifier chip to turn on according to the circuit control signal and the corresponding pulse modulation signal output by the drive pulse signal. Among them, the first detection result is that the light load function is turned off; the second detection result is that the drive pulse signal has not dropped from the first threshold to the second threshold within the preset time after the light load function is turned off.

[0100] Specifically, at this time, the circuit control signal is the turn-on signal. Based on the circuit control signal and the abnormal drive pulse signal, the corresponding pulse modulation signal (PWM) can be output to control the switching transistor controlled by the synchronous rectifier chip to turn on normally.

[0101] In addition, the preset conditions for the first threshold, the second threshold, and the slope of the preset time drive pulse signal after the light load function is turned off are as described above, and will not be repeated here.

[0102] Thus, the detection circuit 100 of this application can detect that the first detection result is that the light load function is off, and the second detection result is that the drive pulse signal does not drop from the first threshold to the second threshold within a preset time after the light load function is off. It then determines that the drive pulse signal is normal and controls the switching transistor controlled by the synchronous rectifier chip to turn on according to the circuit control signal and the corresponding pulse modulation signal output by the drive pulse signal, so as to ensure the normal turn-on of the switching transistor of the synchronous rectifier chip.

[0103] In addition, please see Figure 8 This application also provides a synchronous rectification chip 1000. The synchronous rectification chip 1000 includes the detection circuit 100 described in any of the above embodiments. The synchronous rectification chip 1000 also includes a logic control unit 200 and a drive unit 300. The logic control unit 200 includes the detection circuit 100, which is connected to the drive unit 300. The drive unit 300 drives the switching transistor M1 controlled by the synchronous rectification chip to turn off and on according to the pulse modulation signal PWM issued by the detection circuit 100.

[0104] Specifically, the structure of the detection circuit 100 is as described above and will not be repeated here.

[0105] It should be noted that the detection circuit 100 of this application is located in the logic control unit 200 to output a pulse modulation signal (PWM) to the drive unit 300, thereby driving the switching transistor M1 controlled by the synchronous rectifier chip 1000 to turn on and off. Figure 8 The synchronous rectifier chip 1000 also includes a power supply unit 400, an undervoltage protection unit 500, and an on / off detection unit 600.

[0106] The logic control unit 200 is used to control the drive unit 300 after detecting the output of the on state unit 600 through the undervoltage protection unit 500 and performing logic processing.

[0107] The drive circuit 300 is used to control the switching state of the switching transistor M1 and switch the substrate, thereby protecting the switching transistor M1.

[0108] The undervoltage protection unit 500 is used to detect whether the chip power supply is at the rated value.

[0109] The on-state detection unit 600 is used to detect the on-state of the external switch transistor.

[0110] Thus, the synchronous rectifier chip 1000 of this application detects whether the light-load function of the synchronous rectifier chip 1000 is enabled and detects the drive output from the power supply terminal of the synchronous rectifier chip by setting a detection circuit 1005 in the logic control unit 200.

[0111] Whether the slope of the pulse signal falling from the first threshold to the second threshold meets the preset conditions determines whether the drive pulse signal is abnormal. This can accurately detect whether the drive pulse signal is abnormal when the light load function of the synchronous rectifier chip 1000 is turned off, thereby avoiding the situation where the switching transistor M1 controlled by the synchronous rectifier chip 1000 is accidentally turned on.

[0112] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are quite specific and detailed, but they should not be construed as limiting the scope of this application's patent. It should be noted that for those skilled in the art,

[0113] While remaining true to the concept of this application, various modifications and improvements can be made, all of which fall within the scope of protection of this application. Therefore, the scope of protection of this patent application shall be determined by the appended claims.

Claims

1. A detection method applied to a synchronous rectifier chip, characterized in that, include: The light-load function of the synchronous rectification chip is detected to obtain the first detection result; The second detection result is obtained by detecting whether the slope of the driving pulse signal emitted from the power supply terminal of the synchronous rectifier chip from the first threshold to the second threshold meets the preset condition. Based on the first detection result and the second detection result, determine whether the driving pulse signal is abnormal; If the drive pulse signal is found to be abnormal within a preset time after the light load function is turned off, the switching transistor controlled by the synchronous rectification chip is turned off. Within a preset time after the light load function is turned off, if it is determined that the drive pulse signal is normal, the switching transistor controlled by the synchronous rectification chip is turned on. The step of determining whether the driving pulse signal is abnormal based on the first detection result and the second detection result includes: When the first detection result is that the light load function is turned off, and the second detection result is that within a preset time after the light load function is turned off, the slope of the drive pulse signal decreasing from the first threshold to the second threshold meets a preset condition, the drive pulse signal is determined to be abnormal.

2. The detection method according to claim 1, characterized in that, The step of determining whether the driving pulse signal is abnormal based on the first detection result and the second detection result includes: If, within a preset time after the light load function is turned off, the drive pulse signal is determined to be abnormal, the switch controlled by the synchronous rectification chip is turned off, and the duration of the switch being turned off is a predetermined duration.

3. The detection method according to claim 1, characterized in that, The step of determining whether the driving pulse signal is abnormal based on the first detection result and the second detection result includes: When the first detection result is that the light load function is off, and the second detection result is that within a preset time after the light load function is off, the slope of the drive pulse signal dropping from the first threshold to the second threshold does not meet the preset condition, the drive pulse signal is judged to be normal.

4. The detection method according to claim 1, characterized in that, The step of determining whether the driving pulse signal is abnormal based on the first detection result and the second detection result includes: When the first detection result is that the light load function is off, and the second detection result is that the drive pulse signal does not drop from the first threshold to the second threshold within a preset time after the light load function is off, the drive pulse signal is determined to be normal.

5. A detection circuit applied to a synchronous rectifier chip, characterized in that, The detection circuit includes: a light load detection module, a slope detection module, a logic processing module, a circuit control module, and a latch; the first input terminal of the logic processing module is connected to the output terminal of the light load detection module, and the second input terminal of the logic processing module is connected to the output terminal of the slope detection module; the first input terminal of the latch is connected to the output terminal of the logic processing module, the second input terminal of the latch is connected to the output terminal of the circuit control module, the output terminal of the latch is connected to the driving unit in the synchronous rectification chip, and the driving unit is connected to the switching transistor controlled by the synchronous rectification chip; The light load detection module is used to detect whether the light load function of the synchronous rectification chip is enabled, and outputs the first detection result; The slope detection module is used to detect whether the slope of the drive pulse signal emitted from the power supply terminal of the synchronous rectifier chip when it drops from the first threshold to the second threshold meets the preset condition, and outputs the second detection result. The logic processing module is used to output the first detection result and the second detection result; The circuit control module is used to output circuit control signals; The latch is used to determine whether the drive pulse signal is abnormal based on the first detection result and the second detection result, and to control the switch controlled by the synchronous rectification chip to turn off when the drive pulse signal is abnormal within a preset time after the light load function is turned off; and to control the switch controlled by the synchronous rectification chip to turn on when the drive pulse signal is normal within a preset time after the light load function is turned off.

6. The detection circuit according to claim 5, characterized in that, The latch is used to determine, based on the first detection result and the second detection result, that when the drive pulse signal is abnormal within a preset time after the light load function is turned off, the latch outputs a corresponding pulse modulation signal according to the circuit control signal and the drive pulse signal to control the switching transistor controlled by the synchronous rectification chip to turn off. Wherein, the first detection result is that the light load function is turned off; the second detection result is that within a preset time after the light load function is turned off, the slope of the drive pulse signal emitted by the power supply terminal of the synchronous rectifier chip when it drops from the first threshold to the second threshold meets a preset condition.

7. The detection circuit according to claim 5, characterized in that, The latch is used to determine that the drive pulse signal is normal within a preset time after the light load function is turned off based on the first detection result and the second detection result, and to output a corresponding pulse modulation signal based on the circuit control signal and the drive pulse signal to control the switching transistor controlled by the synchronous rectification chip to turn on. The first detection result is that the light load function is turned off; the second detection result is that within a preset time after the light load function is turned off, the slope of the driving pulse signal decreasing from the first threshold to the second threshold does not meet the preset condition.

8. A detection device applied to a synchronous rectification chip, characterized in that, include: The first detection module is used to detect whether the light-load function of the synchronous rectification chip is enabled, and to obtain the first detection result; The second detection module is used to detect whether the slope of the driving pulse signal emitted from the power supply terminal of the synchronous rectifier chip from the first threshold to the second threshold meets the preset condition, and to obtain the second detection result. The judgment module is used to determine whether the driving pulse signal is abnormal based on the first detection result and the second detection result; The control module is configured to, within a preset time after the light load function is turned off, control the switching transistor controlled by the synchronous rectification chip to turn off when the drive pulse signal is abnormal, and control the switching transistor controlled by the synchronous rectification chip to turn on when the drive pulse signal is normal within a preset time after the light load function is turned off.

9. A synchronous rectification chip, characterized in that, The synchronous rectification chip includes the detection circuit according to any one of claims 5 to 7, and further includes a logic control unit and a driving unit. The logic control unit includes the detection circuit, and the detection circuit is connected to the driving unit. The driving unit drives the switching transistor controlled by the synchronous rectification chip to turn off and on according to the pulse modulation signal emitted by the detection circuit.

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