Resistor string digital-to-analog converter and design method thereof

Abstract

This disclosure provides a resistor string digital-to-analog converter (DAC) and its design method. The DAC includes segmented resistor strings, each comprising a high-order resistor string and a low-order resistor string. The connection method between the segmented resistor strings is controlled by segmented data. The connection method includes series and parallel connections. The segmented data is obtained by segmenting the input data, which includes high-order input data and low-order input data. The high-order input data corresponds to the high-order resistor string, and the low-order input data corresponds to the low-order resistor string. The first end of the high-order resistor string is coupled to the input reference voltage terminal, and the second end is grounded. The low-order resistor string is connected in parallel to the two ends of the resistors in the high-order resistor string via a high-order parallel switch group. The output level of the DAC is obtained from the node levels in the low-order resistor string via the low-order switch group. This disclosure solves the problem of low accuracy in resistor string DACs in related technologies.

Description

Technical Field

[0001] This disclosure relates to the field of integrated circuit technology, specifically to a resistor-series digital-to-analog converter and its design method. Background Technology

[0002] In integrated circuit design, digital-to-analog converters (DACs) require high precision and high speed. While traditional resistor-string DACs are fast, the number of resistors and switches increases exponentially with the number of bits in the input data. Because traditional resistor-string DACs require a large number of resistors and switches to achieve high precision, resulting in excessive area overhead, network-type DACs are often used. Examples include R-2R resistor network DACs, or DACs combining R-2R resistor networks and thermometer code networks.

[0003] However, the accuracy of this type of network-structured DAC is currently low, reaching only 12 bits, making it difficult to further improve the accuracy. Summary of the Invention

[0004] The main objective of this disclosure is to provide a resistor string digital-to-analog converter and its design method to solve the problem of low accuracy in resistor string DACs in related technologies.

[0005] To achieve the above objectives, a first aspect of this disclosure provides a resistor string digital-to-analog converter, including segmented resistor strings, the segmented resistor strings including high-order resistor strings and low-order resistor strings, and the connection method between each segmented resistor string is controlled by segmented data.

[0006] The connection methods include series and parallel. The segmented data is obtained by segmenting the input data. The segmented data includes high-order input data and low-order input data. The high-order input data corresponds to the high-order resistor string, and the low-order input data corresponds to the low-order resistor string.

[0007] The first end of the high-voltage resistor string is coupled to the input reference voltage terminal, and the second end of the high-voltage resistor string is grounded.

[0008] The low-order resistor string is connected in parallel to the two ends of the resistor in the high-order resistor string via the high-order parallel switch group. The output level of the resistor string digital-to-analog converter is obtained from the node level in the low-order resistor string via the low-order switch group.

[0009] Optionally, the input data is segmented into two segments, including high-order input data and low-order input data, wherein the number of bits in the high-order input data is M and the number of bits in the low-order input data is N.

[0010] The high-order resistor string consists of 2 resistors connected in series. M A resistor with a resistance of R and a resistor with a resistance of R / 2 NThe resistors, the low-order resistor string consists of 2 resistors connected in series. N -1 resistor with a resistance value of R.

[0011] Furthermore, the decimal value corresponding to the high-order input data is m, and the decimal value corresponding to the low-order input data is n. The (m+1)th resistor with a resistance value of R from bottom to top in the high-order resistor string is connected in parallel with the low-order resistor string via the high-order parallel switch group.

[0012] The output level of the resistor string digital-to-analog converter is obtained from the level of the (n+1)th node from bottom to top in the low-order resistor string via the low-order switch group.

[0013] Optionally, the segmented data may also include one or more median input data, and the segmented resistor strings may also include one or more median resistor strings, with a one-to-one correspondence between the median input data and the median resistor strings.

[0014] Furthermore, when the number of middle input data and the number of middle resistor strings are both one, the input data is divided into three segments, including high-order input data, middle-order input data and low-order input data, wherein the number of bits of the high-order input data is M, the number of bits of the middle-order input data is N, and the number of bits of the low-order input data is X.

[0015] The high-order resistor string includes 2 in series. M A resistor with a resistance of R and a resistor with a resistance of R / 2 N The resistor, the middle resistor string consists of 2 resistors connected in series. N -1 resistor with a resistance of R and a resistor with a resistance of R / 2 X The resistors, the low-order resistor string consists of 2 resistors connected in series. X -1 resistor with a resistance value of R.

[0016] Furthermore, the decimal value corresponding to the high-order input data is m, the decimal value corresponding to the middle-order input data is n, and the decimal value corresponding to the low-order input data is x.

[0017] The (m+1)th resistor with a resistance value of R from bottom to top in the high-level resistor series is connected in parallel with the middle-level resistor series via the high-level parallel switch group;

[0018] When n = 0, the first resistor with a resistance of R from bottom to top in the middle resistor string is connected in parallel with the low resistor string via the middle parallel switch group, and the resistance of the high resistor string is R / 2. N The resistors are connected in series to the top via a high-position series switch; when n≠0, the nth resistor with a resistance of R from bottom to top in the middle-position resistor string is connected in parallel with the low-position resistor string via a middle-position parallel switch group, and the resistance of the high-position resistor string is R / 2. N The resistor is connected in series to the bottom via a high-level series switch;

[0019] The output level of the resistor string digital-to-analog converter is obtained from the level of the (x+1)th node from bottom to top in the low-order resistor string via the low-order switch group.

[0020] Furthermore, when there are two middle input data and two middle resistor strings, the input data is divided into four segments, including high-order input data, first middle input data, second middle input data and low-order input data. The number of bits in the high-order input data is M, the number of bits in the first middle input data is N, the number of bits in the second middle input data is X, and the number of bits in the low-order input data is Y.

[0021] The high-order resistor string includes 2 in series. M A resistor with a resistance of R and a resistor with a resistance of R / 2 N The resistors, the first median resistor string includes 2 resistors connected in series. N -1 resistor with a resistance of R and a resistor with a resistance of R / 2 X The resistors, the second middle resistor string includes 2 resistors connected in series. X -1 resistor with a resistance of R and a resistor with a resistance of R / 2 Y The resistors, the low-order resistor string consists of 2 resistors connected in series. Y -1 resistor with a resistance value of R.

[0022] Furthermore, the decimal value corresponding to the high-order input data is m, the decimal value corresponding to the first middle-order input data is n, the decimal value corresponding to the second middle-order input data is x, and the decimal value corresponding to the low-order input data is y.

[0023] The (m+1)th resistor with a resistance value of R from bottom to top in the high-level resistor series is connected in parallel with the first middle-level resistor series via the high-level parallel switch group;

[0024] When n = 0, the first resistor with a resistance of R from bottom to top in the first median resistor string is connected in parallel with the second median resistor string via the first median parallel switch group, and the resistance of the higher-order resistor string is R / 2. N The resistors are connected in series to the top via a high-position series switch; when n≠0, the nth resistor with a resistance of R from bottom to top in the first middle-position resistor string is connected in parallel with the second middle-position resistor string via the first middle-position parallel switch group, and the resistance of the high-position resistor string is R / 2. N The resistor is connected in series to the bottom via a high-level series switch;

[0025] When x = 0, the first resistor with a resistance of R from bottom to top in the second middle resistor string is connected in parallel with the low-position resistor string via the second middle parallel switch group, and the resistance of the first middle resistor string is R / 2. XThe resistors are connected in series to the top via the first mid-position series switch; when x≠0, the x-th resistor with a resistance of R from bottom to top in the second mid-position resistor string is connected in parallel with the lower-position resistor string via the second mid-position parallel switch group, and the resistance of the first mid-position resistor string is R / 2. X The resistor is connected in series to the bottom via the first mid-position series switch;

[0026] The output level of the resistor string digital-to-analog converter is obtained from the level of the (y+1)th node from bottom to top in the low-order resistor string via the low-order switch group.

[0027] Optionally, the resistor-series digital-to-analog converter also includes a buffer amplifier coupled to the output level terminal, which is used to improve drive capability.

[0028] The second aspect of this disclosure provides a design method for a resistor-series digital-to-analog converter (DAC), which is used to design any resistor-series DAC of the first aspect. The design method includes:

[0029] The input data is segmented to obtain multiple segments of data;

[0030] Based on the segmented data in the multi-segmented data, design the segmented resistor string corresponding to the segmented data.

[0031] The connection method between segmented resistor strings is controlled by segmented data, including series and parallel connections; and

[0032] By connecting the segmented resistor strings according to the connection method between them, a resistor string digital-to-analog converter is obtained.

[0033] The resistor string digital-to-analog converter provided in this embodiment includes segmented resistor strings, which include high-order resistor strings and low-order resistor strings. The connection method between each segmented resistor string is controlled by segmented data. The connection method includes series and parallel connection. The segmented data is obtained by segmenting the input data. The segmented data includes high-order input data and low-order input data. The high-order input data corresponds to the high-order resistor string, and the low-order input data corresponds to the low-order resistor string. By segmenting the input data to obtain the high-order and low-order input data, and designing the corresponding high-order and low-order resistor strings, the number of resistors and switches used in the high-order and low-order resistor strings is reduced, the required area is smaller, and the accuracy of the resistor string digital-to-analog converter is improved, solving the problem of low accuracy of resistor string DACs in related technologies. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the specific embodiments of this disclosure or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 An exemplary circuit diagram of a resistor-series digital-to-analog converter provided in the first embodiment of this disclosure;

[0036] Figure 2 An exemplary circuit diagram of a resistor-series digital-to-analog converter provided in the second embodiment of this disclosure;

[0037] Figure 3 An exemplary circuit diagram of a resistor-series digital-to-analog converter provided in the third embodiment of this disclosure;

[0038] Figure 4 An exemplary circuit diagram of a resistor-to-digital converter provided in the fourth embodiment of this disclosure. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.

[0040] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the specification and in the relevant art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, the statement of “connecting” or “coupling” two or more parts together shall mean that these parts are directly joined together or joined through one or more intermediate components.

[0041] In integrated circuit design, digital-to-analog converters (DACs) require high precision and high speed. While traditional resistor-string DACs are fast, the number of resistors and switches increases exponentially with the number of input data bits. Because traditional resistor-string DACs require a large number of resistors and switches to achieve high precision, resulting in excessive area overhead, network-type DACs are often used, such as R-2R resistor network DACs, or DACs combining R-2R resistor networks and thermometer code networks. However, current network-type DACs have relatively low precision, only reaching 12 bits, making further precision improvements difficult.

[0042] To address the aforementioned issues, this disclosure provides a resistor string digital-to-analog converter (DAC). During design, the input data is segmented, with each segment corresponding to a segmented resistor string. By controlling the series-parallel connection of each segmented resistor string using the segmented data, a high-precision DAC output level is ultimately obtained.

[0043] An exemplary circuit diagram of the resistor-series digital-to-analog converter provided in this disclosure is shown below. Figure 1 As shown, it includes segmented resistor strings, which include high-order resistor strings and low-order resistor strings. The connection method between each segmented resistor string is controlled by segmented data.

[0044] The connection methods include series and parallel. The segmented data is obtained by segmenting the input data. The segmented data includes high-order input data and low-order input data. The high-order input data corresponds to the high-order resistor string, and the low-order input data corresponds to the low-order resistor string. The segmented data controls the low-order resistor string to be connected in parallel with one resistor in the high-order resistor string and in series with other resistors in the high-order resistor string.

[0045] The first end of the high-voltage resistor string is coupled to the input reference voltage terminal, and the second end of the high-voltage resistor string is grounded.

[0046] The low-order resistor string is connected in parallel to the two ends of the resistors in the high-order resistor string via a high-order parallel switch group. The output level of the resistor string digital-to-analog converter is obtained from the node level in the low-order resistor string via the low-order switch group. The high-order parallel switch group is a parallel switch group and can be controlled using one-hot code or binary code.

[0047] In this embodiment of the disclosure, the number of segments can be freely selected according to the actual design precision; and the number of bits in each segment can also be freely allocated. Preferably, the number of bits in the high-order input data can be greater than or equal to the number of bits in the low-order input data.

[0048] This disclosure divides the input data into segments to obtain high-order and low-order input data, and designs corresponding high-order and low-order resistor strings. This reduces the number of resistors and switches used in the high-order and low-order resistor strings, requires less area, and improves the accuracy of the resistor string digital-to-analog converter, thus solving the problem of low accuracy of resistor string DACs in related technologies.

[0049] In one optional embodiment of this disclosure, the input data is segmented into two segments, including high-order input data and low-order input data, wherein the number of bits in the high-order input data is M and the number of bits in the low-order input data is N.

[0050] The high-order resistor string consists of 2 resistors connected in series. M A resistor with a resistance of R and a resistor with a resistance of R / 2 N The resistors, the low-order resistor string consists of 2 resistors connected in series. N -1 resistor with a resistance value of R.

[0051] In a preferred embodiment of this disclosure, the decimal value corresponding to the high-order input data is m, the decimal value corresponding to the low-order input data is n, and the (m+1)th resistor with a resistance value of R from bottom to top in the high-order resistor string is connected in parallel with the low-order resistor string via a high-order parallel switch group.

[0052] The output level of the resistor string digital-to-analog converter is obtained from the level of the (n+1)th node from bottom to top in the low-order resistor string via the low-order switch group.

[0053] Taking a 16-bit precision DAC as an example, the input data can be divided into several segments, such as two segments. The number of bits in the two segments, from the high-order bit to the low-order bit, are set to M and N respectively. The decimal values ​​corresponding to the high-order and low-order input data segments are set to m and n respectively. We can take M=8 and N=8 to obtain an exemplary circuit diagram of the resistor-series digital-to-analog converter as shown below. Figure 1 As shown.

[0054] Figure 1 In the diagram, the input reference voltage is Vref, and the output level is Vout. Based on these two data points, two resistor strings are designed accordingly. The resistor string corresponding to the higher-order bit consists of 2... M = 256 resistors with a resistance of R and one resistor with a resistance of R / 2 N =R / 256 resistors constitute the resistors, and the lower-order resistors are connected in series by (2 N It consists of 255 resistors with a resistance of R.

[0055] The first column of switches is controlled based on the magnitude m of the high-order input data, selecting the (m+1)th resistor with a resistance value of R from the bottom of the 256 series resistors R in the first column for parallel connection. The output Vout switch group is controlled based on the magnitude n of the low-order input data, selecting the (n+1)th node level output from the bottom.

[0056] Combination Figure 1 It can be seen that the switching logic of the two-resistor-series DAC is simple and easy to implement in terms of technology.

[0057] In one optional embodiment of this disclosure, the segmented data further includes one or more median input data, and the segmented resistor string further includes one or more median resistor strings, with the median input data and the median resistor string corresponding one-to-one.

[0058] In one optional embodiment of this disclosure, when the number of middle input data and the number of middle resistor strings are both one, the input data is segmented into three segments, including high-order input data, middle-order input data and low-order input data, wherein the number of bits of the high-order input data is M, the number of bits of the middle-order input data is N, and the number of bits of the low-order input data is X.

[0059] The high-order resistor string includes 2 in series. M A resistor with a resistance of R and a resistor with a resistance of R / 2 N The resistor, the middle resistor string consists of 2 resistors connected in series. N -1 resistor with a resistance of R and a resistor with a resistance of R / 2 X The resistors, the low-order resistor string consists of 2 resistors connected in series. X -1 resistor with a resistance value of R.

[0060] In a preferred embodiment of this disclosure, the decimal value corresponding to the high-order input data is m, the decimal value corresponding to the middle-order input data is n, and the decimal value corresponding to the low-order input data is x.

[0061] The (m+1)th resistor with a resistance value of R from bottom to top in the high-level resistor series is connected in parallel with the middle-level resistor series via the high-level parallel switch group;

[0062] When n = 0, the first resistor with a resistance of R from bottom to top in the middle resistor string is connected in parallel with the low resistor string via the middle parallel switch group, and the resistance of the high resistor string is R / 2. N The resistors are connected in series to the top via a high-position series switch; when n≠0, the nth resistor with a resistance of R from bottom to top in the middle-position resistor string is connected in parallel with the low-position resistor string via a middle-position parallel switch group, and the resistance of the high-position resistor string is R / 2. N The resistor is connected in series to the bottom via a high-level series switch;

[0063] The output level of the resistor string digital-to-analog converter is obtained from the level of the (x+1)th node from bottom to top in the low-order resistor string via the low-order switch group.

[0064] Taking a 16-bit precision DAC as an example, the input data can be divided into several segments, such as three segments. The number of bits in the three segments from the most significant bit to the least significant bit are set to M, N, and X, respectively, and the corresponding decimal values ​​of the three segments are set to m, n, and x, respectively. We can take M=6, N=6, and X=4 to obtain an exemplary circuit diagram of the resistor-series digital-to-analog converter as shown below. Figure 2 As shown.

[0065] Figure 2 In the diagram, the input reference voltage is Vref, and the output level is Vout. Based on the three data segments, three resistor strings are designed accordingly. The resistor string corresponding to the higher-order bits consists of 2... M = 64 resistors with a resistance of R and one resistor with a resistance of R / 2 N = R / 64 resistors constitute the resistor string, and the middle resistor string is composed of (2 N -1 = 63) resistors with a resistance of R and one resistor with a resistance of R / 2 X =R / 16 resistors constitute the resistors, and the corresponding resistor string at the lower level consists of (2 X It consists of 15 resistors with a resistance of R. The current flowing through the three resistor strings is Vref / (2... M R), Vref / (2 M+N R) and Vref / (2 M+N+X R).

[0066] The first column of switches is controlled based on the magnitude of the high-order input data *m*, selecting the (m+1)th resistor with a resistance of *R* from the bottom of the 64 series-connected resistors in the first column for parallel connection. The second column of switches is controlled based on the magnitude of the middle-order input data *n*, controlling the series connection of the resistors with a resistance of *R / 64* in the first column. If *n* = 0, the second column of switches selects the first resistor with a resistance of *R* from the bottom of the second column for parallel connection, while the resistor with a resistance of *R / 64* in the first column is connected at the top. If 1 ≤ *n* ≤ 63 (i.e., *n* ≠ 0), the nth resistor with a resistance of *R* from the bottom of the 63 series-connected resistors *R* in the second column is selected for parallel connection, while the resistor with a resistance of *R / 64* in the first column is connected at the bottom. The output Vout switch group is controlled based on the magnitude of the low-order input data *x*, selecting the (x+1)th node from the bottom for output level.

[0067] The final expression for the 16-bit precision output level Vout is as follows:

[0068] When n=0,

[0069]

[0070] When n≠0,

[0071]

[0072] Combination Figure 2 It can be seen that the three-segment resistor string DAC, taking into account the number of switches and resistors and the complexity of the switching logic, achieves the same 16-bit precision as... Figure 1 Compared to the two-segment resistor string DACs shown, the three-segment resistor string DAC requires fewer switches and resistors and has a smaller area.

[0073] Figure 3 An exemplary circuit diagram of a resistor-string digital-to-analog converter is shown, with... Figure 2 compared to, Figure 3 The three-segment resistor string DAC structure in the paper adds a small series resistor, which simplifies the series switch structure and logic.

[0074] For the design of parallel switch groups, a binary selection structure or other arbitrary structure can be used. The parallel switch groups in this embodiment include a high-position parallel switch group, a middle-position parallel switch group, a first middle-position parallel switch group, and a second middle-position parallel switch group. For the design of series switches, one can choose... Figure 2 or Figure 3 The structure shown.

[0075] In one optional embodiment of this disclosure, when the number of middle input data and the number of middle resistor strings are both two, the input data is segmented into four segments, including high-order input data, first middle-order input data, second middle-order input data and low-order input data, wherein the number of bits of the high-order input data is M, the number of bits of the first middle-order input data is N, the number of bits of the second middle-order input data is X, and the number of bits of the low-order input data is Y.

[0076] The high-order resistor string includes 2 in series. M A resistor with a resistance of R and a resistor with a resistance of R / 2 N The resistors, the first median resistor string includes 2 resistors connected in series. N -1 resistor with a resistance of R and a resistor with a resistance of R / 2 X The resistors, the second middle resistor string includes 2 resistors connected in series. X -1 resistor with a resistance of R and a resistor with a resistance of R / 2 Y The resistors, the low-order resistor string consists of 2 resistors connected in series. Y -1 resistor with a resistance value of R.

[0077] In a preferred embodiment of this disclosure, the decimal value corresponding to the high-order input data is m, the decimal value corresponding to the first middle-order input data is n, the decimal value corresponding to the second middle-order input data is x, and the decimal value corresponding to the low-order input data is y.

[0078] The (m+1)th resistor with a resistance value of R from bottom to top in the high-level resistor series is connected in parallel with the first middle-level resistor series via the high-level parallel switch group;

[0079] When n = 0, the first resistor with a resistance of R from bottom to top in the first median resistor string is connected in parallel with the second median resistor string via the first median parallel switch group, and the resistance of the higher-order resistor string is R / 2. N The resistors are connected in series to the top via a high-position series switch; when n≠0, the nth resistor with a resistance of R from bottom to top in the first middle-position resistor string is connected in parallel with the second middle-position resistor string via the first middle-position parallel switch group, and the resistance of the high-position resistor string is R / 2. N The resistor is connected in series to the bottom via a high-level series switch;

[0080] When x = 0, the first resistor with a resistance of R from bottom to top in the second middle resistor string is connected in parallel with the low-position resistor string via the second middle parallel switch group, and the resistance of the first middle resistor string is R / 2. X The resistors are connected in series to the top via the first mid-position series switch; when x≠0, the x-th resistor with a resistance of R from bottom to top in the second mid-position resistor string is connected in parallel with the lower-position resistor string via the second mid-position parallel switch group, and the resistance of the first mid-position resistor string is R / 2. X The resistor is connected in series to the bottom via the first mid-position series switch;

[0081] The output level of the resistor string digital-to-analog converter is obtained from the level of the (y+1)th node from bottom to top in the low-order resistor string via the low-order switch group.

[0082] Taking a 16-bit precision DAC as an example, the input data can be divided into four or more segments, expanding to a structure with more than three segments. It's important to note that in a resistor-string DAC structure with four or more segments, except for the resistor-string networks corresponding to the two lowest-order segments, the series connection of the smaller resistors in the other higher-order resistor-string networks needs to be changed.

[0083] For example, when the data is divided into four segments, the number of bits in the high-order, first-middle, second-middle, and low-order segments are set to M, N, X, and Y, respectively, and the corresponding decimal values ​​of the four segments are set to m, n, x, and y, respectively. We can take M=4, N=4, X=4, and Y=4 to obtain an exemplary circuit diagram of the resistor-series digital-to-analog converter, as shown below. Figure 4 As shown.

[0084] Figure 4In the diagram, the input reference voltage is Vref, and the output level is Vout. Based on the four data segments, four resistor strings are designed accordingly. The resistor string corresponding to the higher-order bits consists of 2... M = 16 resistors with a resistance of R and one resistor with a resistance of R / 2 N =R / 16 resistors constitute the first middle position, and the resistor string corresponding to the first middle position is composed of (2 N -1 = 15) resistors with a resistance of R and one resistor with a resistance of R / 2 X =R / 16 resistors constitute the second middle position, and the resistor string corresponding to the second middle position is composed of (2 X -1 = 15) resistors with a resistance of R and one resistor with a resistance of R / 2 Y =R / 16 resistors constitute the resistors, and the corresponding resistor string at the lower level consists of (2 Y It consists of 15 resistors with a resistance of R.

[0085] Combination Figures 1 to 4 As can be seen, this disclosure provides the structures of a two-segment resistor string DAC, a three-segment resistor string DAC, and a four-segment resistor string DAC, respectively. Therefore, the number of segments in the embodiments of this disclosure can be freely selected according to the actual design precision; and the number of bits in each segment can also be freely allocated.

[0086] When freely configuring the number of segments and the number of bits per segment, the input data can be segmented by comprehensively considering the number of resistors, switches, and the complexity of the switching logic. Generally, it can be divided into three segments. At the same precision of 16 bits, compared with a two-segment resistor string DAC, a three-segment resistor string DAC requires fewer resistors and switches and has a smaller area; compared with a four-segment resistor string DAC, the switching logic of a three-segment resistor string DAC is simpler and easier to implement in terms of technology.

[0087] In one optional embodiment of this disclosure, the resistor-string digital-to-analog converter further includes a buffer amplifier coupled to the output level terminal, the buffer amplifier being used to improve drive capability.

[0088] Since the output level Vout cannot carry current, a buffer amplifier can be added after the DAC in series with this resistor to improve the driving capability.

[0089] This disclosure also provides a design method for a resistor-series digital-to-analog converter, which is used to design the aforementioned resistor-series digital-to-analog converter. The design method includes:

[0090] The input data is segmented to obtain multiple segments of data;

[0091] Based on the segmented data in the multi-segmented data, design the segmented resistor string corresponding to the segmented data; determine the number and resistance value of the resistors contained in the segmented resistor string corresponding to the segmented data, and design the segmented resistor string.

[0092] The connection method between segmented resistor strings is controlled by segmented data, including series and parallel connections. The series and parallel connection method of each segmented resistor string is controlled by segmented data. For example, in the case of two segmented data, two segmented resistor strings are designed, including a high-order resistor string and a low-order resistor string. The segmented data controls the low-order resistor string to be connected in parallel with one resistor in the high-order resistor string and in series with other resistors in the high-order resistor string.

[0093] By connecting the segmented resistor strings according to the connection method between them, a resistor string digital-to-analog converter is obtained. Alternatively, by using a parallel switch group, the segmented resistor strings are connected according to the series-parallel connection method, resulting in a resistor string digital-to-analog converter.

[0094] In the design method of resistor string DAC, the input data is segmented, and each segment corresponds to a segment of resistor string. The series-parallel connection method of each resistor string is controlled by the segmented data to finally obtain a high-precision DAC output level, which can reach at least 16 bits.

[0095] The number of segments in this high-precision segmented DAC design method can be freely selected according to the actual design precision. In addition, the number of bits per segment can also be freely allocated.

[0096] As can be seen from the above description, this disclosure achieves the following technical effects:

[0097] This disclosure divides the input data into segments to obtain high-order and low-order input data, and designs corresponding high-order and low-order resistor strings. This reduces the number of resistors and switches used in the high-order and low-order resistor strings, requires less area, and improves the accuracy of the resistor string digital-to-analog converter, thus solving the problem of low accuracy of resistor string DACs in related technologies.

[0098] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatuses and methods according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0099] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” shall be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” shall be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, particularly when it follows a set of terms, the “example” is merely exemplary and illustrative and should not be considered exclusive or extensive.

[0100] Further aspects and scope will become apparent from the description provided herein. It should be understood that various aspects of this application may be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific embodiments herein are for illustrative purposes only and are not intended to limit the scope of this application.

[0101] Although embodiments of the present disclosure have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present disclosure, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A resistor-series digital-to-analog converter, characterized in that, It includes segmented resistor strings, which include high-order resistor strings and low-order resistor strings. The connection method between each segmented resistor string is controlled by segmented data. The connection method includes series and parallel connection. The segmented data is obtained by segmenting the input data. The segmented data includes high-order input data and low-order input data. The high-order input data corresponds to the high-order resistor string, and the low-order input data corresponds to the low-order resistor string. The number of bits in the high-order input data is greater than or equal to the number of bits in the low-order input data. The first end of the high-voltage resistor string is coupled to the input reference voltage terminal, and the second end of the high-voltage resistor string is grounded. The low-order resistor string is connected in parallel to the two ends of the resistor in the high-order resistor string via a high-order parallel switch group. The output level of the resistor string digital-to-analog converter is obtained from the node level in the low-order resistor string via the low-order switch group. The segmented data further includes one or more median input data, and the segmented resistor string further includes one or more median resistor strings. The median input data and the median resistor string correspond one-to-one. When both the median input data and the median resistor string have one number of bits, the number of bits in the high-order input data is M, the number of bits in the median input data is N, the decimal value corresponding to the median input data is n, and the high-order resistor string includes 2 series resistors. M A resistor with a resistance of R and a resistor with a resistance of R / 2 N The resistor, when At that time, the resistance value in the high-order resistor string is R / 2. N The resistor is connected in series to the top via a high-level series switch; when At that time, the resistance value in the high-order resistor string is R / 2. N The resistor is connected in series to the bottom via the high-level series switch; When both the median input data and the median resistor string have two bits, the number of bits in the high-order input data is M, the number of bits in the first median input data is N, the decimal value corresponding to the first median input data is n, and the high-order resistor string includes two resistors connected in series. M A resistor with a resistance of R and a resistor with a resistance of R / 2 N The resistor, when At that time, the resistance value in the high-order resistor string is R / 2. N The resistor is connected in series to the top via a high-level series switch; when At that time, the resistance value in the high-order resistor string is R / 2. N The resistor is connected in series to the bottom via the high-level series switch; When the number of median input data and the number of median resistor strings are both one, the input data is segmented into three segments, including high-order input data, median input data and low-order input data, wherein the number of bits in the low-order input data is X; said middle resistor string comprising 2 N -1 resistor of resistance R and one resistor of resistance R / 2 X said low resistor string comprising 2 X -1 resistor of resistance R; The decimal value corresponding to the high-order input data is m, and the decimal value corresponding to the low-order input data is x; The (m+1)th resistor with a resistance value of R from bottom to top in the high-level resistor string is connected in parallel with the middle-level resistor string via the high-level parallel switch group; when When the first resistor with a resistance value of R from bottom to top in the middle resistor string is connected in parallel with the low resistor string via the middle parallel switch group; when At that time, the nth resistor with a resistance value of R from bottom to top in the middle resistor string is connected in parallel with the low resistor string via the middle parallel switch group; the output level of the resistor string digital-to-analog converter is obtained from the level of the (x+1)th node from bottom to top in the low resistor string via the low switch group; When both the number of median input data and the number of median resistor strings are two, the input data is segmented into four segments, including high-order input data, first median input data, second median input data, and low-order input data, wherein the number of bits in the second median input data is X, and the number of bits in the low-order input data is Y. The first median resistor string includes 2 resistors connected in series. N -1 resistor with a resistance of R and a resistor with a resistance of R / 2 X The resistor, the second median resistor string comprises 2 resistors connected in series. X -1 resistor with a resistance of R and a resistor with a resistance of R / 2 Y The resistors, the low-order resistor string comprising 2 resistors connected in series. Y -1 resistor with a resistance of R; The decimal value corresponding to the high-order input data is m, the decimal value corresponding to the second middle-order input data is x, and the decimal value corresponding to the low-order input data is y. The (m+1)th resistor with a resistance value of R from bottom to top in the high-level resistor string is connected in parallel with the first middle-level resistor string via the high-level parallel switch group; when When, the first resistor with a resistance value of R from bottom to top in the first median resistor string is connected in parallel with the second median resistor string via the first median parallel switch group; when At that time, the nth resistor with a resistance value of R from bottom to top in the first median resistor string is connected in parallel with the second median resistor string via the first median parallel switch group; when At that time, the first resistor with a resistance value of R from bottom to top in the second median resistor string is connected in parallel with the low-position resistor string via the second median parallel switch group, and the resistance value in the first median resistor string is R / 2. X The resistor is connected in series to the top via the first mid-position series switch; when At that time, the x-th resistor with a resistance of R from bottom to top in the second median resistor string is connected in parallel with the low-position resistor string via the second median parallel switch group, and the resistance of the first median resistor string is R / 2. X The resistor is connected in series to the bottom via the first mid-position series switch; The output level of the resistor string digital-to-analog converter is obtained from the level of the (y+1)th node from bottom to top in the low-order resistor string via the low-order switch group.

2. The resistor-series digital-to-analog converter according to claim 1, characterized in that, The resistor-string digital-to-analog converter also includes a buffer amplifier coupled to the output level terminal, which is used to improve the driving capability.

3. A design method for a resistor-series digital-to-analog converter, characterized in that, The design method is used to design the resistor-series digital-to-analog converter according to any one of claims 1-2, and the design method includes: The input data is segmented to obtain multiple segments of data; Based on the segmented data in the multi-segmented data, design the segmented resistor string corresponding to the segmented data; The connection method between the segmented resistor strings is controlled by the segmented data, wherein the connection method includes series and parallel connections; and The resistor strings are connected according to the connection method between the segmented resistor strings to obtain the resistor string digital-to-analog converter.

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