Optical interconnect device and method of manufacturing the same, computing device

Abstract

This invention relates to the field of chip technology, providing an optical interconnect device, its manufacturing method, and a computing device. The optical interconnect device includes: multiple digital electrical chips, including a first digital electrical chip and a second digital electrical chip; multiple analog electrical chips, including a first analog electrical chip and a second analog electrical chip; an optical interconnect; the first digital electrical chip and the first analog electrical chip are communicatively connected, and the second digital electrical chip and the second analog electrical chip are communicatively connected, with the first analog electrical chip and the second analog electrical chip achieving communication connection via the optical interconnect; the information transmission path from the first digital electrical chip to the second digital electrical chip includes information sequentially passing through the first digital electrical chip, the first analog electrical chip, the optical waveguide of the optical interconnect, the second analog electrical chip, and the second digital electrical chip. This invention can optimize the interconnection between chips and allows for individual upgrades / replacements for different types of chips, optimizing packaging.

Description

Technical Field

[0001] This invention relates to the field of chip technology, and more specifically, to an optical interconnect device and its manufacturing method, and a computing device. Background Technology

[0002] Very large-scale integrated circuit (VLSI) technology has become a pillar supporting the development and evolution of the information society. Various chips widely used in information systems typically rely on upgrades in chip manufacturing processes to improve performance and optimize power consumption.

[0003] The development of digital chips pursues more advanced manufacturing processes, emphasizing the ratio of computing speed to cost. Analog chips, on the other hand, emphasize high signal-to-noise ratio, low distortion, low power consumption, high reliability, and stability. Shrinking the manufacturing process may actually lead to a decrease in the performance of analog circuits. Furthermore, the development cycle for analog chips is generally longer than that for digital chips. Simultaneously optimizing both digital and analog circuits within the same more advanced manufacturing process would limit product iteration cycles and waste R&D and production costs. Summary of the Invention

[0004] This invention provides an optical interconnect device that can not only optimize the performance of digital and analog electrical chips in different process technologies, but also solve the problem of slow product iteration cycle of analog electrical chips. By using optical interconnect to replace electrical interconnect, optical interconnect has large bandwidth, low latency, low power consumption, high integration density and strong anti-electromagnetic interference capability.

[0005] According to one aspect of the present invention, an optical interconnect device is provided, the optical interconnect device comprising: a plurality of digital electrical chips, including a first digital electrical chip and a second digital electrical chip; a plurality of analog electrical chips, including a first analog electrical chip and a second analog electrical chip; and an optical interconnect comprising a photonic integrated circuit, the photonic integrated circuit including a plurality of optical waveguides; wherein the first digital electrical chip is communicatively connected to the first analog electrical chip, the second digital electrical chip is communicatively connected to the second analog electrical chip, and the first analog electrical chip and the second analog electrical chip are communicatively connected through the optical interconnect; wherein the information transmission path from the first digital electrical chip to the second digital electrical chip includes information sequentially passing through the first digital electrical chip, the first analog electrical chip, the optical waveguide of the optical interconnect, the second analog electrical chip, and the second digital electrical chip.

[0006] In some embodiments, the optical interconnect device further includes a carrier substrate; the optical interconnect is disposed on the carrier substrate; the plurality of analog electrical chips are disposed on the optical interconnect, and the plurality of digital electrical chips are disposed around the optical interconnect.

[0007] In some embodiments, the plurality of digital electrical chips are closer to the carrier substrate than the plurality of analog electrical chips.

[0008] In some embodiments, the electrical connection path from the first digital electrical chip to the first analog electrical chip passes through the conductive wiring structure of the carrier substrate and the conductive wiring structure in the optical interconnect in sequence.

[0009] In some embodiments, the photonic integrated circuit of the optical interconnect further includes: a first electro-optical conversion unit electrically connected to the first analog electrical chip, for carrying information carried by the analog electrical signal of the first analog electrical chip into a first optical signal, the first optical signal being transmitted in the optical waveguide of the optical interconnect; and a first photoelectric conversion unit electrically connected to the second analog electrical chip, for converting the received first optical signal into an analog electrical signal transmitted to the second analog electrical chip.

[0010] In some embodiments, the photonic integrated circuit of the optical interconnect further includes: a second electro-optical conversion unit electrically connected to the second analog electrical chip, for carrying information carried by the analog electrical signal of the second analog electrical chip into a second optical signal, the second optical signal being transmitted in the optical waveguide of the optical interconnect; and a second photoelectric conversion unit electrically connected to the first analog electrical chip, for converting the received second optical signal into an analog electrical signal transmitted to the first analog electrical chip.

[0011] In some embodiments, the first electro-optical conversion unit and the second electro-optical conversion unit each include multiple modulators for modulating the information carried by the electrical signal onto optical signals of different wavelengths and transmitting them in a wavelength division multiplexing manner; the first photoelectric conversion unit and the second photoelectric conversion unit each include multiple photodetectors for performing wavelength division multiplexing on the received optical signal and converting it into an electrical signal.

[0012] In some embodiments, the modulator includes a microring modulator; and / or the detector includes a microring filter detector.

[0013] In some embodiments, the photonic integrated circuit of the optical interconnect further includes: a dielectric layer and a plurality of conductive wiring units; the dielectric layer covers the plurality of optical waveguides, the first electro-optical conversion unit, the first photoelectric conversion unit, the second electro-optical conversion unit, and the second photoelectric conversion unit; the plurality of conductive wiring units are configured to electrically connect the first electro-optical conversion unit, the first photoelectric conversion unit, the second electro-optical conversion unit, and the second photoelectric conversion unit to corresponding analog electrical chips; the plurality of conductive wiring units include a plurality of electrical connection structures, each of the plurality of electrical connection structures passing through at least a portion of the dielectric layer.

[0014] In some embodiments, one or more of the plurality of digital electrical chips and the plurality of analog electrical chips include chiplets.

[0015] In some embodiments, the first digital electronic chip and the second digital electronic chip further include ultra-short-range serial-to-parallel interfaces for communicating with the first analog electronic chip and the second analog electronic chip, respectively.

[0016] According to one aspect of the present invention, a computing device is provided, which includes an optical interconnect device.

[0017] According to one aspect of the present invention, a method for manufacturing an optical interconnect device is provided, comprising: providing a wafer; forming a plurality of photonic integrated circuits on the wafer; wherein each of the plurality of photonic integrated circuits includes a plurality of optical waveguides, an electro-optical conversion unit, and a photoelectric conversion unit; mounting at least one required analog electrical chip on each of the plurality of photonic integrated circuits; dividing the wafer to obtain a plurality of independent optical interconnects; mounting the optical interconnects on a carrier substrate; and mounting a digital electrical chip on the carrier substrate.

[0018] In embodiments of this invention, the use of chiplet technology can overcome the physical bottleneck of chip area, and is an important way to achieve higher performance chips. Because the area of ​​each die is reduced, the number of dies that can be placed on a single wafer increases, thereby improving yield and reducing costs.

[0019] In addition, the present invention allows for the flexible upgrading of only some modules when improving system performance, thus accelerating the iterative cycle of system upgrades.

[0020] According to an embodiment of the present invention, a series of analog electrical chips are integrated on an optical interconnect, and the analog electrical chips and a series of digital electrical chips surrounding the optical interconnect are connected via an ultra-short-range serial-to-parallel conversion interface. Information from different analog electrical chips is loaded onto an optical signal, which then travels at high speed through the optical interconnect to complete the information interconnection between the different analog electrical chips. The ultra-short-range serial-to-parallel conversion interface on the digital electrical chip then converts the high-speed analog electrical signal into a low-speed parallel signal for processing by the digital chip, enabling the digital electrical chips to form an organic whole through optoelectronic interconnection. Compared to electrical interconnects, optical interconnects offer larger bandwidth, lower latency, lower power consumption, higher integration density, and stronger resistance to electromagnetic interference. Furthermore, on-chip or inter-chip optical interconnects are not sensitive to distance in transmitting information, allowing more data to be transmitted over longer distances, thus providing greater flexibility in computer architecture design.

[0021] In some implementations, the modulator array employs a high-efficiency, small-area micro-ring modulator array, and the detector array employs a micro-ring filter detector with wave decomposition and multiplexing capabilities. By integrating the modulator and detector arrays in optical interconnects beneath different analog electronic chips, a large amount of information can be transmitted between analog electronic chips without being limited by power consumption and bandwidth density. By arranging the positions of the modulator array, detector array, and corresponding analog electronic chips, multiple independent data transmission channels can be realized. Each channel is exclusively used by two communicating digital electronic chips, eliminating contention and resulting in a large cross-sectional bandwidth, low signal delay, and ultimately improved information processing throughput.

[0022] By utilizing a series of analog and digital electrical chips, point-to-point full connectivity can be achieved on optical interconnects. This allows a series of digital electrical chips to process information in parallel simultaneously, with tight information interconnection between the chips, better meeting the computing power and bandwidth requirements of artificial intelligence algorithms. Compared to existing artificial intelligence products, this optical interconnect device can integrate more computing and storage units, and the optical interconnect ensures organic information interconnection between them, thereby providing a higher system energy efficiency ratio.

[0023] Various aspects, features, advantages, etc., of the embodiments of the present invention will be specifically described below in conjunction with the accompanying drawings. These aspects, features, advantages, etc., will become clearer from the following detailed description in conjunction with the accompanying drawings. Attached Figure Description

[0024] Figure 1 This is a top view schematic diagram of an optical interconnect device according to an exemplary embodiment of the present invention.

[0025] Figure 2 This is a schematic diagram of the arrangement of optical waveguides, electro-optic conversion units, and photoelectric conversion units of optical interconnects in an optical interconnect device according to an exemplary embodiment of the present invention;

[0026] Figure 3 This is a cross-sectional schematic diagram of an optical interconnect device;

[0027] Figure 4 This is a schematic diagram of the structure of an electro-optic conversion unit comprising multiple modulators in an embodiment of the present invention;

[0028] Figure 5 This is a schematic diagram of the structure of a photoelectric conversion unit including multiple detectors in an embodiment of the present invention.

[0029] Figure 6 This is a cross-sectional schematic diagram of the relevant structures during the fabrication of a photonic integrated circuit according to an embodiment of this application.

[0030] Figure 7This is a cross-sectional schematic diagram of the relevant structures during the fabrication of a photonic integrated circuit according to an embodiment of this application.

[0031] Figure 8 This is a cross-sectional schematic diagram of the relevant structures during the fabrication of a photonic integrated circuit according to an embodiment of this application. Detailed Implementation

[0032] To facilitate understanding of the various aspects, features, and advantages of the technical solution of this invention, the invention will be described in detail below with reference to the accompanying drawings. It should be understood that the various embodiments described below are for illustrative purposes only and are not intended to limit the scope of protection of this invention.

[0033] The term "including" as used herein is an open-ended term and should therefore be interpreted as "including but not limited to". "Approximately" means that, within an acceptable margin of error, those skilled in the art can solve the technical problem and substantially achieve the technical effect.

[0034] Furthermore, the term "connection" here includes any means of connection, whether direct or indirect. Therefore, if the text describes a first device connected to a second device, it means that the first device can be directly connected to the second device, or indirectly connected to the second device through other devices.

[0035] The terms "first," "second," etc., used herein are for distinguishing different devices, modules, structures, etc., and do not represent a chronological order, nor do they limit "first" and "second" to different types. Furthermore, some processes described in the specification, claims, and accompanying drawings of this application include multiple operations appearing in a specific order. These operations may be performed out of order or in parallel. Operation numbers such as 101, 102, etc., are merely for distinguishing different operations and do not themselves represent any execution order. Additionally, these processes may include more or fewer operations, and these operations may be performed sequentially or in parallel.

[0036] In some embodiments of the present invention, the optical interconnect device includes multiple digital electrical chips, multiple analog electrical chips, and an optical interconnect. The optical interconnect enables the conversion between electrical and optical signals, as well as the transmission of optical signal information. The multiple digital electrical chips include a first digital electrical chip and a second digital electrical chip. The multiple analog electrical chips that are communicatively connected to the first and second digital electrical chips are referred to as the first analog electrical chip and the second analog electrical chip, respectively. The terms "first" and "second" used herein are intended to distinguish different objects, not to order the objects or limit the number of objects. The optical interconnect has multiple optical waveguides, for example, it can be implemented using an optical interconnect. The first digital electrical chip is communicatively connected to the first analog electrical chip, the second digital electrical chip is communicatively connected to the second analog electrical chip, and the first analog electrical chip and the second analog electrical chip are communicatively connected through the optical interconnect. That is, the information transmission path from the first digital electrical chip to the second digital electrical chip includes the information sequentially passing through the first digital electrical chip, the first analog electrical chip, the optical waveguide of the optical interconnect, the second analog electrical chip, and the second digital electrical chip. Not limited to the above examples, as needed, any two of the plurality of digital electrical chips can achieve information exchange, i.e., communication connection, through analog electrical chips and optical interconnects.

[0037] In some embodiments, the optical interconnect device further includes a carrier substrate on which the optical interconnect is disposed. The plurality of analog electrical chips are disposed on the optical interconnect, and the plurality of digital electrical chips are disposed around the optical interconnect. The electrical connection path from the digital electrical chip to the analog electrical chip includes an electrical conduction path passing sequentially through the conductive wiring structure of the digital electrical chip, the conductive wiring structure of the carrier substrate, the conductive wiring structure in the optical interconnect (e.g., conductive structure in a via), and the conductive wiring structure of the analog electrical chip. In some embodiments, the ultra-short-pitch serial-parallel interface can be used for communication between the digital electrical chips and the analog electrical chips.

[0038] In some embodiments, the optical interconnect further includes a laser module that generates an optical signal. In some embodiments, the optical interconnect includes an optical coupling structure that couples an optical signal from an external light source (including an optical fiber) into the optical interconnect. The optical coupling structure includes, for example, a grating coupler or an end-face coupler. In some embodiments, the optical interconnect includes an electro-optical conversion unit coupled to the first analog electrical chip for carrying information from the analog electrical signal of the first analog electrical chip into the optical signal; the optical interconnect also includes a photoelectric conversion unit coupled to the second analog electrical chip for converting the received optical signal into an analog electrical signal to be transmitted to the second analog electrical chip. In some embodiments, to achieve bidirectional communication, both the electro-optical conversion unit and the photoelectric conversion unit are integrated in the region of the optical interconnect corresponding to the analog chip. In some embodiments, the electro-optical conversion unit and the photoelectric conversion unit are integrated below the corresponding analog electrical chip.

[0039] According to an embodiment of the present invention, when the first digital electronic chip sends information to the second digital electronic chip, the digital electrical signal carrying the information emitted by the first digital electronic chip can be converted into a high-speed serial electrical signal through an ultra-short-distance serial-to-parallel interface and transmitted to the first analog electronic chip. An electro-optical conversion unit then carries the information carried by the analog electrical signal of the analog electronic chip into an optical signal. The optical signal is transmitted through the optical waveguide of the optical interconnect to a photoelectric conversion unit below the second analog electronic chip, where it is converted back into an analog electrical signal, i.e., a high-speed serial electrical signal. The second analog electronic chip sends this high-speed serial electrical signal to an ultra-short-distance serial-to-parallel interface located on the second digital electronic chip. This ultra-short-distance serial-to-parallel interface converts the high-speed serial electrical signal into a low-speed parallel signal carrying the information, i.e., a digital electrical signal, and inputs it into the second digital electronic chip, thereby completing the information transmission between the first and second digital electronic chips. When the second digital electronic chip sends information to the first digital electronic chip, the transmission process is the same as the transmission process from the first digital electronic chip to the second digital electronic chip.

[0040] In some embodiments, the electro-optical conversion unit includes a modulator array that modulates the information carried by the analog electrical signal of the first analog electrical chip onto the optical signal of different wavelengths and transmits it in a wavelength division multiplexing manner; the photoelectric conversion unit includes a detector array that performs wavelength division multiplexing on the received optical signal and converts it into an analog electrical signal to be transmitted to the second analog electrical chip. In some embodiments, the modulator array includes multiple micro-ring modulators. In some embodiments, the detector array includes multiple micro-ring filter detectors.

[0041] It should be noted that the present invention does not impose a particular limitation on the number of chips used in the optical interconnect device, wherein the communication process between any two digital chips is the same as the communication process between the first digital chip and the second digital chip described above.

[0042] Figure 1 This is a schematic diagram of an optical interconnect device according to an exemplary embodiment of the present invention. In one exemplary embodiment of the present invention, the optical interconnect device includes a carrier substrate 100, an optical interconnect 200, digital electrical chips A to D, and analog electrical chips a to d. The optical interconnect 200 is disposed on the carrier substrate 100, the analog electrical chips a to d are disposed on the optical interconnect 200, and the digital electrical chips A to D are disposed on the carrier substrate 100 and distributed around the optical interconnect 200. Therefore, when the digital electrical chips are updated, they can be easily and independently replaced, while keeping the optical interconnects and analog electrical chips unchanged, and requiring virtually no modification to other electrical wiring structures.

[0043] For example, the optical interconnect includes a photonic integrated circuit, which comprises an optical waveguide unit, multiple electro-optic conversion units, and multiple photoelectric conversion units. The optical waveguide unit may include multiple optical waveguides. In some embodiments, the electro-optic conversion unit includes one or more optical modulators, and the multiple modulators may form a modulator array. The photoelectric conversion unit includes one or more photodetectors, and the multiple detectors may form a detector array. For example, the modulator can modulate initial light based on an electrical signal to generate an optical signal carrying information; that is, the information carried by the electrical signal is carried in the optical signal. The optical interconnect has the function of converting electrical signals to optical signals, thereby enabling optical interconnect communication to replace electrical signal communication.

[0044] Figure 2 This is a schematic diagram of the connection of an optical interconnect device according to an exemplary embodiment of the present invention. The diagram shows, in perspective, the electro-optical conversion unit and the photoelectric conversion unit formed in the region corresponding to the analog electrical chip in the optical interconnect. The following is in conjunction with... Figure 2 The connection and communication process between components in the optical interconnect device according to embodiments of the present invention is described.

[0045] The optical interconnect 200 includes a photonic integrated circuit, which comprises multiple optical waveguides, multiple electro-optical conversion units, and multiple photoelectric conversion units. In some embodiments, the electro-optical conversion unit includes one or more optical modulators, and the multiple modulators can form a modulator array. The photoelectric conversion unit includes one or more photodetectors, and the multiple detectors can form a detector array. For example, the modulator can modulate initial light based on an electrical signal to generate an optical signal carrying information; that is, the information carried by the electrical signal is carried in the optical signal. The optical interconnect has the function of converting electrical signals to optical signals, thereby enabling optical interconnect communication to replace electrical signal communication.

[0046] Figure 2 The setting areas a' to d' of the analog electronic chip correspond to the settings. Figure 1 Analog electrical chips a to d are used in the circuit, and any two of them communicate via an optical waveguide connected by an optical interconnect 200. Figure 2 In the optical interconnect 200, multiple electro-optical conversion units and multiple photoelectric conversion units are provided. Figure 2 As shown, in the portion of the optical interconnect corresponding to region a', there are 12 electro-optical conversion units and 12 photoelectric conversion units. Figure 2 The setting areas A' to D' of the digital electronic chip correspond to the settings. Figure 1 The digital chips A to D in the diagram are each equipped with an ultra-short-range serial-to-parallel conversion interface. Furthermore, digital chip A is communicatively connected to analog chip a, digital chip B is communicatively connected to analog chip b, digital chip C is communicatively connected to analog chip c, and digital chip D is communicatively connected to analog chip d. For example... Figure 3 As shown, the electrical connection path from digital chip A to analog chip a includes an electrical conduction path that successively passes through the conductive wiring structure (not shown) of digital chip A, the conductive wiring structure 301301 of the carrier substrate 100, the conductive wiring structure in the optical interconnect 200, and the conductive wiring structure (not shown) of analog chip a. For example, the conductive wiring structure in the optical interconnect 200 may include a conductive silicon via 201, which is disposed in and penetrates the silicon substrate of the optical interconnect. For example, the optical interconnect may also include other conductive structures within holes, which pass through at least a portion of the optical interconnect. The electrical connection paths between other digital chips and their corresponding analog chips are similar to the electrical connection path from digital chip A to analog chip a. In some embodiments, the electrical connection path from digital chip A to analog chip a may also employ other connection methods suitable in the art.

[0047] In an exemplary embodiment, utilizing the optical waveguide in the optical interconnect 200, any digital electronic chip can communicate with any other digital electronic chip, forming a point-to-point fully connected topology communication connection structure. The laser module 300 simultaneously outputs multiple wavelengths of laser light. Optical signals are coupled into the optical interconnect 200 through optical coupling structures in the optical interconnect, such as grating couplers or end-face couplers. A beam splitter in the optical interconnect 200 evenly distributes the light energy to the electro-optical conversion units corresponding to the different analog electronic chips within the optical interconnect 200. For example, a broadband beam splitter can be used. Taking digital chip A as an example, the information transmission process from digital chip A to other digital chips B to D includes: the digital electrical signal of digital chip A is converted into a high-speed serial signal via an ultra-short distance serial-to-parallel conversion interface on digital chip A. This high-speed serial signal is transmitted to analog chip a via conductive wiring structures (e.g., metal traces) on the carrier substrate 100 and conductive wiring structures (e.g., conductive through-silicon vias and / or other conductive lines) in the optical interconnect 200. After processing by analog chip a, the electrical signal output by analog chip a is transmitted to the optical interconnect 200 and input to the electro-optical conversion unit in the optical interconnect 200. For example, the electro-optical conversion unit includes multiple modulators, which can form a modulator array. This modulator array modulates the light based on the electrical signal, loading the information carried by the electrical signal output by analog chip a onto optical signals of different wavelengths and performing wavelength division multiplexing. The light is then transmitted to the photoelectric conversion unit via the optical waveguide of the optical interconnect 200. For example, the photoelectric conversion unit includes multiple photodetectors, which can form a detector array. The detector array performs wavelet decomposition and multiplexing on the modulated optical signal and performs photoelectric conversion to output an electrical signal. The optical interconnect 200 outputs an electrical signal carrying information to analog electrical chips b-d, which then process it. The electrical signals output by analog electrical chips b-d are transmitted to the corresponding digital electrical chips B-D. Communication between analog electrical chips b-d and the corresponding digital electrical chips B-D can be achieved through an ultra-short-range serial-to-parallel conversion interface.

[0048] In an exemplary embodiment, digital electrical chips A-D are closer to the carrier substrate than analog electrical chips a-d, shortening the connection distance between the digital electrical chips and the carrier substrate and simplifying the packaging method. The digital electrical chips are disposed around the optical interconnects instead of on the optical interconnects, thus not occupying the area of ​​the optical interconnects. Analog electrical chips, on the other hand, are directly disposed on the optical interconnects, optimizing their communication distance with the optical interconnects.

[0049] In some implementations, both digital electrical chips A-D and analog electrical chips a-d are chiplets. The four digital electrical chips are connected point-to-point via analog-to-digital, electro-optical, photoelectric, and analog-to-digital conversions through four analog electrical chips and optical interconnects. Each pair of digital electrical chips has an independent data transmission channel, eliminating competition and conflict between them, resulting in low signal delay and high information processing throughput. This structure reuses four analog and four digital electrical chips, improving system energy efficiency while reducing chip size, thereby lowering chip design and manufacturing costs and effectively increasing chip yield.

[0050] In some implementations, such as Figure 4 As shown, in this embodiment of the invention, an electro-optic conversion unit includes multiple modulators, which constitute a modulator array. It should be noted that the term "modulator array" only indicates an arrangement in a certain position; while meeting functional requirements, the term "array" does not specifically limit the arrangement form or pattern of the modulators, nor is it limited to a two-dimensional array. The modulator array consists of a series of micro-ring modulators 401. Based on the carrier depletion effect, the micro-ring modulators 401 can support high modulation rates. This type of waveguide structure involves doping different regions of the ridge waveguide to form a lateral or longitudinal PN junction structure 402. The PN junction operates in reverse bias mode. When a reverse bias voltage is applied, the depletion region within the PN junction increases, the built-in electric field is enhanced, and there are no free carriers in the depletion region. The refractive index of the corresponding ring waveguide 403 changes, causing a shift in its resonant wavelength. The intensity of a specific wavelength near the resonance peak changes significantly, thereby achieving intensity modulation. The micro-ring modulator is small in size, has low power consumption, and high modulation efficiency. When modulating electrical information data from the electronic chip, a specific wavelength carrier wave can be corresponding to the heating electrode 404 on the micro-ring modulator. Different modulated optical signals of different wavelengths propagate independently on the optical waveguide 407, achieving multi-channel wavelength division multiplexing (WDM) signal transmission. Multiple micro-rings can correspond to multiple different wavelengths. Because the micro-ring modulator is temperature-sensitive, during modulation, the bias point of the micro-ring modulator can be adjusted by monitoring the photocurrent generated by the light absorption of the lateral or longitudinal PN junction itself and by utilizing feedback control on the analog electronic chip, thus maximizing the optical modulation amplitude.

[0051] In some implementations, such as Figure 5As shown, a photoelectric conversion unit includes multiple detectors, which constitute a detector array. It should be noted that the term "detector array" only indicates an arrangement in a certain position; while meeting functional requirements, the term "array" does not specifically limit the arrangement form or pattern of the detectors, nor is it limited to a two-dimensional array. For example, the detector array consists of a series of micro-ring filter detectors 501, each including a heating electrode 502, a ring waveguide 503, and a signal photodetector 504. By adjusting the heating electrode 502 on the micro-ring filter detector 501, the ring waveguide 503 is adjusted, filtering out a specific wavelength of optical signal from the optical waveguide 507 and downloading it to the signal photodetector 504 coupled to the electrical chip, thus realizing the conversion of the optical signal to an analog electrical signal. Multiple micro-rings can correspond to multiple different wavelengths. Furthermore, the waveguide terminal 505, connected to the optical waveguide 507 and the signal photodetector 504, absorbs residual light energy at the waveguide end, preventing it from affecting the signal transmission of other optical waveguides.

[0052] By incorporating appropriate electro-optical conversion units, photoelectric conversion units, and optical waveguides within optical interconnects, analog circuitry enables high-volume information transmission between analog electronic chips without limitations in power consumption and bandwidth density. The positions of modulator arrays, detector arrays, and corresponding analog electronic chips within the optical interconnects can be arranged as needed, allowing for multiple independent data transmission channels. Each channel is exclusively used by two communicating digital chips, eliminating contention and resulting in a large cross-sectional bandwidth, low signal delay, and ultimately, increased information processing throughput.

[0053] In some embodiments of the present invention, the digital electronic chip may be one or more of a CPU, GPU, and memory chip.

[0054] An exemplary embodiment of the present invention provides a method for manufacturing an optical interconnect device, which can be used to manufacture the optical interconnect devices described in the foregoing embodiments. The method includes:

[0055] S601 provides wafers.

[0056] S602, Multiple photonic integrated circuits are formed on the wafer.

[0057] Each of the plurality of photonic integrated circuits may include multiple optical waveguides, as well as electro-optical conversion units and photoelectric conversion units. The multiple optical waveguides can be used to form an optical waveguide unit, that is, an optical waveguide unit includes multiple optical waveguides. Each of the plurality of photonic integrated circuits may also include multiple conductive wiring units, which can connect the electro-optical conversion units and / or photoelectric conversion units to a corresponding analog electrical chip to receive electrical signals to be communicated from the analog electrical chip and / or send electrical signals for communication to the analog electrical chip. Typically, the plurality of photonic integrated circuits are formed in multiple regions on a wafer. In subsequent steps, the wafer is diced to form independent individual photonic integrated circuits, which are used to form optical interconnects, that is, optical interconnects include the photonic integrated circuits.

[0058] S603. At least one analog electrical chip is installed on each of the plurality of photonic integrated circuits. The number of analog electrical chips can be one or more. For example, a first analog electrical chip and a second analog electrical chip are provided, such that the first analog electrical chip is electrically connected to the first conductive wiring unit, and the second analog electrical chip is electrically connected to the second conductive wiring unit. A first electro-optical conversion unit receives a first electrical signal from the first analog electrical chip through the first conductive wiring unit and encodes it to generate a first optical signal. The first photoelectric converter is used to convert the first optical signal into an electrical signal and transmit it to the second conductive wiring unit.

[0059] S604. The wafer is divided to obtain multiple independent optical interconnects.

[0060] S605. The optical interconnect is mounted on the carrier substrate.

[0061] S606. Install the digital electrical chip on the carrier substrate.

[0062] In some embodiments, a single optical interconnect device includes a single photonic integrated circuit and a first analog electrical chip and a second analog electrical chip mounted (decorated) on the photonic integrated circuit. The first analog electrical chip and the second analog electrical chip are capable of communicating via a first conductive wiring unit, a first electro-optical conversion unit, at least one of a plurality of optical waveguides, a first photoelectric conversion unit, and the second conductive wiring unit. A single, independent optical interconnect device specifically includes one of these photonic integrated circuits.

[0063] It should be noted that the step numbers do not represent the order of execution. For example, the optical interconnects may be installed before the digital electrical chip is installed, or for example, the optical interconnects may be installed after the digital electrical chip is installed; there is no particular limitation on this.

[0064] In S601 above, the wafer includes a semiconductor layer. In one example, the wafer may be a semiconductor-on-insulator (SOI) wafer, such as an SOI (Silicon-On-Insulator) wafer. Figure 6 As shown, a semiconductor-on-insulator wafer may include: an insulating layer 602, a semiconductor layer 603 formed on the insulating layer 602, and a backing substrate layer 601 located below the insulating layer 602.

[0065] In the above S602, a photonic integrated circuit can be formed by performing processes such as patterning, deposition, and doping on the semiconductor layer 603.

[0066] In one example of S603 described above, the first analog electrical chip can be electrically connected to the first conductive wiring unit by means of electrical connection such as bonding or soldering, and the second analog electrical chip can be electrically connected to the second conductive wiring unit.

[0067] In a specific example, step S602 above, "forming multiple photonic integrated circuits on the wafer," can be implemented using the following steps:

[0068] S21. An optical waveguide unit, a first electro-optical conversion unit, and a first photoelectric conversion unit are formed on the wafer.

[0069] S22. A dielectric layer is deposited on the wafer on which the optical waveguide unit, the first electro-optic conversion unit, and the first photoelectric conversion unit are formed, to cover the optical waveguide unit, the first electro-optic conversion unit, the first photoelectric conversion unit, and the wafer.

[0070] S23. A first opening and a second opening are formed in the dielectric layer.

[0071] S24. A first electrical connection structure is formed in the first opening and a second electrical connection structure is formed in the second opening.

[0072] The first conductive wiring unit includes the first electrical connection structure; the second conductive wiring unit includes the second electrical connection structure.

[0073] The above S21, such as Figure 6 and Figure 7As shown, the semiconductor layer 603 of the wafer can be patterned to obtain corresponding regions for the optical waveguide unit 103, the first electro-optic conversion unit 104, and the first photoelectric conversion unit 105. Specifically, photolithography and etching techniques are used to remove unwanted material for patterning. In some embodiments, the aforementioned insulating layer can serve as an etching stop layer. In some embodiments, the electro-optic conversion unit includes one or more modulators, and multiple modulators can form a modulator array. The photoelectric conversion unit includes one or more photodetectors, and multiple detectors can form a detector array. For simplification, Figure 7 Only one modulator and one detector are shown in the image.

[0074] In S22 above, such as Figure 8 As shown, a dielectric layer 106 is deposited on a wafer on which the optical waveguide unit 103, the first electro-optic conversion unit 104, and the first photoelectric conversion unit 105 are formed, to cover the optical waveguide unit 103, the first electro-optic conversion unit 104, the first photoelectric conversion unit 105, and the wafer. Specifically, the dielectric layer 106 is formed on the optical waveguide unit 103, the first electro-optic conversion unit 104, the first photoelectric conversion unit 105, and the insulating layer 602 by deposition. The material of the dielectric layer can be the same as the material of the insulating layer.

[0075] In S23 above, such as Figure 8 As shown, a first opening and a second opening are formed in the dielectric layer 106. The first and second openings can be formed using etching techniques, and the number of first and second openings can be one or more depending on the connection requirements.

[0076] In some embodiments, the dielectric layer 106 is a multilayer structure formed by multiple sub-dielectric layers. Multiple conductive layers may be formed within the dielectric layer, and the conductive layers are connected by conductive material in vias. For example, a first sub-dielectric layer is deposited first, followed by a first conductive layer, then a second sub-dielectric layer, then a second conductive layer, then a third sub-dielectric layer, then a third conductive layer, and finally a fourth sub-dielectric layer. In the first to third conductive layers, different conductive layers are interconnected through conductive material in vias, and each conductive layer can be a patterned metal material layer.

[0077] In S24 above, such as Figure 8 As shown, a first electrical connection structure 101a of a first conductive wiring unit 101 and a second electrical connection structure 102a of a second conductive wiring unit 102 can be formed in the first opening by depositing a conductive material. The first electrical connection structure passes through at least a portion of the dielectric layer 106.

[0078] After depositing conductive material, excess conductive material can be removed along the mounting surface of the dielectric layer by a planarization process such as chemical mechanical polishing or mechanical grinding, thereby making the first electrical connection structure and the second electrical connection structure flush with the mounting surface of the dielectric layer.

[0079] Subsequently, a first analog electrical chip and a second analog electrical chip are mounted on each photonic integrated circuit on the wafer. Specifically, the first analog electrical chip and the second analog electrical chip are mounted in the region corresponding to each photonic integrated circuit on the mounting surface of the dielectric layer 106 / photonic integrated circuit. That is, in the region corresponding to each photonic integrated circuit on the mounting surface of the dielectric layer 106 / photonic integrated circuit, the first analog electrical chip and the second analog electrical chip are electrically connected to the first electrical connection structure and the second electrical connection structure in that region.

[0080] Subsequently, a sealant can be formed on the dielectric layer 106 to bury or cover the first and second analog electrical chips. The sealant can then be cured and planarized.

[0081] In some implementations, a process of thinning the backing substrate 601 may be included.

[0082] In some embodiments, S604 can be executed after S603, that is, the first analog electrical chip and the second analog electrical chip are batch-assembled before the photonic integrated circuit wafer is diced. This method allows the first analog electrical chip and the second analog electrical chip to be batch-packaged in the wafer-level process. In this case, only the photonic integrated circuit wafer needs to be manufactured, and there is no need to form the photonic integrated circuit into a single chip.

[0083] In some embodiments, the fabrication of photonic integrated circuits may further include the fabrication of conductive wiring structures. These conductive wiring structures can be used to connect digital and analog electrical chips, enabling electrical signal communication between them. In this case, the optical interconnect includes the aforementioned conductive wiring structure. For example, the optical interconnect can serve as an interposer layer. For example, the aforementioned conductive wiring structure may include conductive through-silicon vias (TSVs) or other conductive lines.

[0084] Alternatively, a wafer dicing process can be performed first to form independent photonic integrated circuits / independent optical interconnects containing photonic integrated circuits, and then a first analog electrical chip and a second analog electrical chip can be mounted on the independent photonic integrated circuit.

[0085] Optionally, multiple independent photonic integrated circuits can be packaged to a certain extent to form multiple independent photonic integrated circuit chips (including bare chips). These photonic integrated circuit chips serve as optical interconnect chips; that is, the optical interconnects can be made using photonic integrated circuit chips. Specifically, the method includes:

[0086] S1001, provides wafers.

[0087] S1002, Multiple photonic integrated circuits are formed on the wafer.

[0088] Each of the plurality of photonic integrated circuits includes a first conductive wiring unit, a second conductive wiring unit, an optical waveguide unit, a first electro-optical conversion unit, and a first photoelectric conversion unit; the first electro-optical conversion unit and the first photoelectric conversion unit are respectively coupled to the optical waveguide unit; the first conductive wiring unit is electrically connected to the first electro-optical conversion unit; and the second conductive wiring unit is electrically connected to the first photoelectric conversion unit.

[0089] S1003. The wafer is divided to obtain multiple independent photonic integrated circuits.

[0090] In this process, multiple photonic integrated circuits are divided into independent photonic integrated circuits, so that each photonic integrated circuit chip includes an independent photonic integrated circuit.

[0091] S1004. Install a first analog electrical chip and a second analog electrical chip on each of the plurality of independent photonic integrated circuit chips, such that the first analog electrical chip is electrically connected to the first conductive wiring unit, and the second analog electrical chip is electrically connected to the second conductive wiring unit.

[0092] As an example, S1004 can be executed after step S1003, but is not limited to this.

[0093] The first analog electrical chip and the second analog electrical chip can communicate through the first conductive wiring unit, the first electro-optical conversion unit, the optical waveguide unit, the first photoelectric conversion unit, and the second conductive wiring unit.

[0094] The specific implementation of step S1002 can be found in the corresponding content of the above embodiments, and will not be repeated here.

[0095] Those skilled in the art should understand that the above-disclosed embodiments are merely implementations of the present invention and should not be construed as limiting the scope of the present invention. Equivalent variations made according to the embodiments of the present invention are still within the scope of the claims of the present invention.

Claims

1. An optical interconnect device, characterized in that, The optical interconnect device includes: Multiple digital electrical chips, including a first digital electrical chip and a second digital electrical chip; Multiple analog electrical chips, including a first analog electrical chip and a second analog electrical chip; and An optical interconnect comprising a photonic integrated circuit, the photonic integrated circuit including a plurality of optical waveguides; The first digital electrical chip is communicatively connected to the first analog electrical chip, the second digital electrical chip is communicatively connected to the second analog electrical chip, and the first analog electrical chip and the second analog electrical chip are communicatively connected through the optical interconnect. The information transmission path from the first digital electrical chip to the second digital electrical chip includes the information passing through the first digital electrical chip, the first analog electrical chip, the optical waveguide of the optical interconnect, the second analog electrical chip, and the second digital electrical chip in sequence.

2. The optical interconnect device as claimed in claim 1, characterized in that, The optical interconnect device also includes a carrier substrate; The optical interconnect is disposed on the carrier substrate; The plurality of analog electrical chips are disposed on the optical interconnect, and the plurality of digital electrical chips are disposed around the optical interconnect.

3. The optical interconnect device as described in claim 2, characterized in that, The plurality of digital electrical chips are closer to the carrier substrate than the plurality of analog electrical chips.

4. The optical interconnect device as claimed in claim 2, characterized in that, The electrical connection path from the first digital electrical chip to the first analog electrical chip passes through the conductive wiring structure of the carrier substrate and the conductive wiring structure in the optical interconnect in sequence.

5. The optical interconnect device according to any one of claims 1-4, characterized in that, The photonic integrated circuit of the optical interconnect further includes: The first electro-optic conversion unit is electrically connected to the first analog electrical chip and is used to carry the information carried by the analog electrical signal of the first analog electrical chip into a first optical signal, which is transmitted in the optical waveguide of the optical interconnect. The first photoelectric conversion unit is electrically connected to the second analog electrical chip and is used to convert the received first optical signal into an analog electrical signal that is transmitted to the second analog electrical chip.

6. The optical interconnect device as claimed in claim 5, characterized in that, The photonic integrated circuit of the optical interconnect further includes: a second electro-optic conversion unit, which is electrically connected to the second analog electrical chip, for carrying the information carried by the analog electrical signal of the second analog electrical chip into a second optical signal, and the second optical signal is transmitted in the optical waveguide of the optical interconnect; The second photoelectric conversion unit is electrically connected to the first analog electrical chip and is used to convert the received second optical signal into an analog electrical signal transmitted to the first analog electrical chip.

7. The optical interconnect device as claimed in claim 6, characterized in that, The first electro-optical conversion unit and the second electro-optical conversion unit each include multiple modulators for modulating the information carried by the electrical signal onto optical signals of different wavelengths and transmitting them in a wavelength division multiplexing manner; Both the first photoelectric conversion unit and the second photoelectric conversion unit include multiple photodetectors, which perform wave decomposition and multiplexing on the received optical signal and convert it into an electrical signal.

8. The optical interconnect device as claimed in claim 7, characterized in that, The modulator includes a micro-ring modulator; and / or The detector includes a micro-ring filter detector.

9. The optical interconnect device of claim 7, wherein the photonic integrated circuit of the optical interconnect further comprises: Dielectric layer, multiple conductive wiring units; The dielectric layer covers the plurality of optical waveguides, the first electro-optic conversion unit, the first photoelectric conversion unit, the second electro-optic conversion unit, and the second photoelectric conversion unit; The plurality of conductive wiring units are configured to electrically connect the first electro-optical conversion unit, the first photoelectric conversion unit, the second electro-optical conversion unit, and the second photoelectric conversion unit to the corresponding analog electrical chip; The plurality of conductive wiring units include a plurality of electrical connection structures, each of which passes through at least a portion of the dielectric layer.

10. The optical interconnect device as claimed in claim 8, characterized in that, One or more of the plurality of digital electrical chips and the plurality of analog electrical chips include chiplets.

11. The optical interconnect device as claimed in claim 9, characterized in that, The first digital electrical chip and the second digital electrical chip also include ultra-short-range serial-parallel interfaces for communicating with the first analog electrical chip and the second analog electrical chip, respectively.

12. A computing device comprising the optical interconnect device as described in any one of claims 1-10.

13. A method for manufacturing an optical interconnect device as described in any one of claims 1-10, characterized in that, include: Provide wafers; Multiple photonic integrated circuits are formed on the wafer; Each of the plurality of photonic integrated circuits includes a plurality of optical waveguides, as well as an electro-optical conversion unit and a photoelectric conversion unit; At least one analog electrical chip is installed on each of the plurality of photonic integrated circuits, the at least one analog electrical chip including a first analog electrical chip and a second analog electrical chip, and the first analog electrical chip and the second analog electrical chip are installed in batches before the wafer of the photonic integrated circuit is diced. The wafer is divided to obtain multiple independent optical interconnects; The optical interconnect is mounted on a carrier substrate; The digital electrical chip is mounted on the carrier substrate.

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