Recess etching method and manufacturing method of fin field effect transistor

By employing a three-step etching method during the silicon trench etching process of fin field-effect transistors, byproducts are removed and smooth surface trenches are formed, solving the problems of high surface roughness and defect state density of the trenches, thus enabling the smooth progress of selective epitaxy and improving device performance.

CN116313770BActive Publication Date: 2026-06-26BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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Patent Information

Application Number
CN202310211699.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-27
Publication Date
2026-06-26
Estimated Expiration
2043-02-27

AI Technical Summary

Technical Problem

In the existing technology, the large surface roughness of the grooves during the silicon trench etching process of fin field-effect transistors leads to a high interface defect state density, which cannot meet the requirements of selective epitaxy of SiP and SiGe.

Method used

A three-step etching method is adopted, including main etching, byproduct removal and over-etching steps. Byproducts on the inner wall of the initial groove are removed by plasma physical collision to form a smooth surface groove.

Benefits of technology

It effectively reduces the surface roughness and defect state density of the groove, ensuring the normal progress of subsequent selective epitaxial processes and improving device performance.

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Abstract

The application discloses a recess etching method in a fin field effect transistor, comprising the following steps: providing a substrate, the surface of the substrate is provided with a plurality of gates and fin structures between the gates; etching the fin structures between the adjacent gates to form an initial recess, the inner wall surface of the initial recess is attached with by-products generated in the etching process; removing the by-products on the inner wall surface of the initial recess; etching the initial recess again to form a recess with a smooth inner wall surface. The application can reduce the roughness and defect state density of the recess surface in the recess etching of the fin structure of the Fin-FET, and form a recess with a smooth surface.
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Citation Information

Patent Citations

  • Deep silicon etching method

    CN105185704A

  • Method for forming fin field effect transistor

    CN105448726A

  • Fin field-effect transistor device and method of forming same

    CN111261519A

  • FinFET Device and Method of Forming Same

    US20200135900A1

  • Method for forming residue free etched silicon layer

    US6194284B1