Method, module and device for improving the precision of the sampling interval of a relay protection device
By receiving the synchronization second pulse from the standard time source, calculating and compensating for the frequency and phase deviation between the local clock and the synchronization second pulse, the problem of inaccurate sampling interval of the digital substation relay protection device under different states is solved, and nanosecond-level sampling interval accuracy and uniformity are achieved.
Patent Information
- Application Number
- CN202111536965.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-13
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2041-12-13
AI Technical Summary
In existing technologies, the accuracy of sampling time and interval is insufficient in the relay protection devices of digital substations under synchronous, out-of-step, and synchronous-out-of-step switching states, which affects the accuracy of protection algorithms and the calculation precision of measurement devices.
By receiving the synchronization second pulse from the standard time source, the frequency and phase deviation between the local clock and the synchronization second pulse are calculated, the deviation is integrated and compensated to ensure the accuracy of the sampling interval.
In synchronous, out-of-synchronization, and synchronous-out-of-synchronization switching states, the accuracy of the sampling interval is improved, the time deviation between the resampling pulse and the time-second pulse is reduced, achieving nanosecond-level accuracy, and ensuring the uniformity and reliable timekeeping of the sampling interval.
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Figure CN116316396B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of digital substation relay protection products, and particularly relates to a method for improving sampling interval accuracy of a relay protection device, a sampling output module and a sampling device. BACKGROUND
[0002] For a digital substation, sampling values are discrete points, and the discrete values of original sampling data are directly related to the accuracy of a protection algorithm, which further affects the misoperation of a relay protection device and the accuracy of a measurement device calculation, so it is very important to ensure the accuracy of a sampling time and the uniformity of a sampling interval. Factors affecting the accuracy of a sampling time include the starting time of a second pulse and the deviation of a resampling pulse time, and important factors affecting the uniformity of a sampling interval include whether the sampling interval is uniform in a time-synchronized state and a time-unsynchronized state, and the uniformity of a sampling pulse in a synchronization and step-out switching process. Therefore, to improve the accuracy of a sampling interval, two aspects need to be considered. Firstly, the consistency of a sampling time and a time pulse needs to be ensured in the presence of a time source, and secondly, the uniformity of a sampling interval needs to be ensured regardless of whether the device is time-synchronized, and thirdly, the sampling interval cannot have a large jump in the synchronization and step-out switching state. SUMMARY
[0003] The present application aims to overcome the defects of the prior art and provide a method for improving the accuracy of a sampling interval of a relay protection device in a synchronization state, a step-out state and a synchronization and step-out switching state, and a sampling output module and a sampling device for executing the method.
[0004] To achieve the above-mentioned purpose, the present application adopts the following technical solutions:
[0005] A method for improving the accuracy of a sampling interval of a relay protection device, comprising the following steps:
[0006] Step S1: receiving a standard time source as a time source and parsing a time second pulse from the standard time source to obtain an accurate starting time;
[0007] Step S2: calculating a time-keeping second pulse according to the presence of a time source, the presence of a time source in an early stage and the absence of a time source in a later stage, and the complete absence of a time source;
[0008] Step S3: in the case of a completely normal time source, calculating the frequency deviation between a local clock second pulse and a time second pulse through second pulse interval cycle counting, latching and comparison;
[0009] Step S4: calculating the phase deviation between a resampling pulse and a time-keeping second pulse through cycle counting, latching and comparison in a sampling interval according to the time-keeping second pulse obtained in step S2;
[0010] Step S5; integrating the frequency deviation and the phase deviation to obtain an integrated deviation, and compensating the integrated deviation in the count points of the cycle count in the sampling interval to output the resampling pulse.
[0011] Preferably, in step S3, the period cycle count is performed by the second interval cycle counter, the count value is X in each period, the count value is cleared at the starting time of the current local clock second pulse, the second interval cycle counter count value ΔX is latched at the time of the arrival of the time second pulse, the frequency deviation Δx between the local clock second pulse and the time second pulse is calculated according to the relationship of the cycle count X, the count value ΔX and the local clock period T, and the second interval cycle counter is cleared again, and the deviation direction of the frequency is determined by comparing with the first threshold parameter.
[0012] Preferably, the first threshold parameter is set to X / 2, when ΔX≤(X / 2), it indicates that the frequency of the local clock second pulse is faster than that of the time second pulse, the frequency deviation Δx is a positive deviation, and the frequency deviation Δx is the product of the count value ΔX and the local clock period T; when Δx>(X / 2), it indicates that the frequency of the local clock second pulse is slower than that of the time second pulse, the frequency deviation Δx is a negative deviation, and the frequency deviation Δx is the product of the count value (X-Δx) and the local clock period T.
[0013] Preferably, in step S4, the period cycle count is performed by the sampling interval cycle counter, the count value is Y in each period, the count value is cleared at the starting time of the current resampling pulse, the count value ΔY of the sampling interval cycle counter is latched at the time of the arrival of the next time second pulse, the phase deviation Δy between the resampling pulse and the time second pulse is calculated according to the relationship of the cycle count Y, the count value ΔY and the local clock period T, and the deviation direction of the phase is determined by comparing with the second threshold parameter.
[0014] Preferably, the second threshold parameter is set to Y / 2, when ΔY≤(Y / 2), it indicates that the resampling pulse is earlier than the time second pulse, the phase deviation Δy is a positive deviation, and the phase deviation Δy is the product of the count value ΔY and the local clock period T; when ΔY>(Y / 2), it indicates that the resampling pulse is later than the time second pulse, the phase deviation Δy is a negative deviation, and the phase deviation Δy is the product of the count value Y-ΔY and the local clock period T.
[0015] Preferably, in step S5, the deviation value Δz is obtained by integrating the size and direction of the frequency deviation and the phase deviation, and it is determined whether the deviation value Δz is a positive deviation or a negative deviation, and the deviation value Δz is compensated to any ΔZ count points of the cycle count in the sampling interval as the integrated deviation, and the count point ΔZ is the ratio of the deviation value Δz and the local clock period.
[0016] Preferably, when the frequency deviation and the phase deviation are in the same direction, the deviation value Δz is the sum of the frequency deviation and the phase deviation, and the deviation value Δz is positive deviation or negative deviation;
[0017] When the frequency deviation and the phase deviation are in opposite directions, and the frequency deviation is greater than the phase deviation, the deviation value Δz is the difference between the frequency deviation and the phase deviation, and the deviation value Δz and the frequency deviation are both positive deviation or negative deviation;
[0018] When the frequency deviation and the phase deviation are in opposite directions and have the same magnitude, the deviation value Δz is zero;
[0019] When the frequency deviation and the phase deviation are in opposite directions, and the phase deviation is greater than the frequency deviation, the deviation value Δz is the difference between the phase deviation and the frequency deviation, and the deviation value Δz and the phase deviation are both positive deviation or negative deviation.
[0020] Preferably, before compensation, the resampling pulses are output at intervals of P, and the sampling is performed at N1 points per second, and the first ΔZ sampling points are selected for phase compensation.
[0021] If the deviation value Δz is positive deviation, the sampling pulses of the first ΔZ sampling points are output at intervals of P+1, and the remaining sampling points are output at intervals of P;
[0022] If the deviation value Δz is negative deviation, the sampling pulses of the first ΔZ sampling points are output at intervals of P-1, and the remaining sampling points are output at intervals of P.
[0023] Preferably, in step S2, when the time source exists completely, the time source second pulses replace the time-keeping second pulses.
[0024] When the time source exists in the early stage and does not exist in the later stage, when the time source is normal, the intervals of N3 time source second pulses are counted S, the average count value M in the time source condition and the remainder ΔM are obtained by dividing the total count S by N3, when the time source is abnormal, the time-keeping second pulses are output at intervals of the count M, every N3 second pulses are a period, and the second pulses are output at intervals of M+1 by selecting ΔM counts in a period to achieve remainder compensation.
[0025] When the time source does not exist completely, the local clock is counted, and the time-keeping second pulses are output when the count time reaches 1 second.
[0026] A sampling output module includes a counter, a comparator, a latch, and a deviation integration unit, which cooperate with each other to perform the method for improving the sampling interval accuracy of a relay protection device as described above.
[0027] Further, the method further comprises calculating a second pulse average interval unit and latching the second pulse average interval unit, the second pulse average interval unit receives the time second pulse, and the latching second pulse average interval unit cooperates to generate a time-keeping second pulse.
[0028] Further, the counter comprises a second interval cycle counter, the comparator comprises a second threshold comparator, and the latch comprises a second deviation latch, the second interval cycle counter receives the time second pulse, the second interval cycle counter, the second threshold comparator, and the first deviation latch cooperate to calculate a frequency deviation between the local clock second pulse and the time second pulse, the sampling interval cycle counter receives the time-keeping second pulse, the sampling interval cycle counter, the second threshold comparator, and the second deviation latch cooperate to calculate a phase deviation between the resample pulse and the time-keeping second pulse, the deviation integrating unit integrates the frequency deviation and the phase deviation and inputs the sampling interval cycle counter for compensation, and the sampling interval cycle counter outputs the resample pulse.
[0029] The application also provides a sampling device comprising a memory and a processor, the processor executes a program in the memory to implement the method for improving the sampling interval precision of a relay protection device.
[0030] The application calculates the frequency deviation between the local clock second pulse and the time second pulse and the phase deviation between the resample pulse and the time-keeping second pulse, integrates the frequency deviation and the phase deviation, and then compensates, thereby reducing the time deviation between the resample pulse and the time second pulse, making the deviation between them reach the nanosecond level, improving the precision of the resample pulse interval, and making the discrete value of the sampling interval be within 1us. In addition, reliable time keeping can be achieved in the case of no time source, with a time source, and with a time source in the early stage and no time source in the later stage, and the resample interval is ensured not to have a large jump. BRIEF DESCRIPTION OF DRAWINGS
[0031] Fig. 1 is a schematic diagram of a method for improving the sampling interval precision of a relay protection device according to the application;
[0032] Fig. 2 is a schematic diagram of the case where the frequency of the local clock second pulse is greater than the frequency of the time source in the application;
[0033] Fig. 3 is a schematic diagram of the case where the frequency of the local clock second pulse is less than the frequency of the time source in the application. DETAILED DESCRIPTION
[0034] The following will be described in detail with reference to the accompanying drawings. Figs. 1 to 3The embodiments are further used to illustrate the specific implementation of the method for improving the sampling interval precision of a relay protection device and the sampling output module.
[0035] A method for improving the sampling interval precision of a relay protection device includes the following steps:
[0036] Step S1: A standard time source is used as a time source, the standard time source is received, and a time second pulse is parsed to obtain an accurate starting time;
[0037] Step S2: According to the cases of completely existing a time source, existing a time source in an early stage and then losing the time source, and completely losing the time source, a time-keeping second pulse is calculated and obtained;
[0038] Step S3: In the case of completely normal time source, a frequency deviation between a local clock second pulse and the time second pulse is calculated by cyclic counting, latching and comparing the second pulse interval;
[0039] Step S4: According to the time-keeping second pulse obtained in step S2, a phase deviation between a resampling pulse and the time-keeping second pulse is calculated by cyclic counting, latching and comparing in the sampling interval;
[0040] Step S5: The frequency deviation and the phase deviation are integrated to obtain an integrated deviation, and the resampling pulse is output at a counting point of the cyclic counting in the sampling interval.
[0041] The frequency deviation between the local clock second pulse and the time second pulse and the phase deviation between the resampling pulse and the time-keeping second pulse are obtained, the frequency deviation and the phase deviation are integrated and then compensated, the time deviation between the resampling pulse and the time second pulse is reduced, the deviation degree between the resampling pulse and the time second pulse reaches the nanosecond level, the precision of the resampling pulse interval is improved, the discrete value of the sampling interval can be within 1us, and reliable time keeping can be achieved in the cases of completely no time source, completely having a time source, and having a time source in an early stage and then losing the time source, and the resampling interval is prevented from having a large jump.
[0042] In combination with Figs. 1-3 A specific embodiment of the method for improving the sampling interval precision of a relay protection device is provided, which is suitable for a relay protection device such as a digital substation relay, and includes the following steps:
[0043] Step S1: A standard time source is used as a time source, the standard time source is received, and a time second pulse is parsed to obtain an accurate starting time;
[0044] Step S2: According to the cases of completely existing the time source, existing the time source in early stage and missing the time source in late stage, and completely missing the time source, the time keeping second pulses in three time keeping cases are calculated. In the case of completely existing the time source, deviation compensation can be performed in steps S3 to S5. Due to the signal, the following three cases exist, including completely existing the time source: that is, the case of always being able to receive the signal of the parsed standard time source; existing the time source in early stage and missing the time source in late stage: that is, the case of partially receiving the signal of the parsed standard time source in some time periods and being unable to receive the signal of the parsed standard time source in some time periods; and completely missing the time source: that is, the case of always being unable to receive the signal of the parsed standard time source, or even if the signal of the standard time source is received, the quality parameter of the standard time source is abnormal.
[0045] Step S3: In the case of completely existing the time source, the frequency deviation between the local clock second pulse and the time keeping second pulse is calculated by second interval cycle counting, latching and comparison. Specifically, the cycle counting is performed by the second interval cycle counter. The counting value is X in each cycle. The cycle counting is performed n times per second, for example, n = 10, 100 or 1000, so as to reduce the FPGA resources occupied by the second interval cycle counter. The counting is performed N times per second. The counting value of the second interval cycle counter is cleared at the starting moment of the current local clock second pulse. The counting value ΔX is latched at the moment when the time keeping second pulse arrives. The latched counting value ΔX is the cycle interval counting value between the time keeping second pulse of the current second and the last second of the local clock. The second interval cycle counter is cleared again. The deviation direction of the frequency is determined by comparing the first threshold parameter of the first threshold comparator. The frequency deviation Δx between the local clock second pulse and the time keeping second pulse is calculated according to the relationship among the counting value X, the counting value ΔX and the period T of the local clock. Preferably, the first threshold parameter of the first threshold comparator is set to X / 2. The counting value ΔX is compared with the first threshold parameter of the first threshold comparator. When ΔX≤(X / 2), the counting value of the local clock second pulse is faster than that of the time keeping second pulse. That is, the counting value should be X, but ΔX counting values are counted additionally. At this time, the frequency deviation is positive deviation. The frequency deviation value Δx is the product of the counting value ΔX and the period T of the local clock. When ΔX>(X / 2), the counting value of the local clock second pulse is slower than that of the time keeping second pulse. That is, X-ΔX counting values should be counted, but they are not counted. At this time, the frequency deviation is reverse deviation. The frequency deviation value Δx is the product of the counting value X-ΔX and the period T of the local clock. Fig. 2 、 Fig. 3 It can be known that ΔX has two results, that is, ΔX≤(X / 2) or ΔX>(X / 2). When the frequency deviation between the local clock and the standard time source is not out of the way, when ΔX≤(X / 2), it indicates that the frequency of the local clock second pulse is faster than that of the time keeping second pulse. That is, the counting value should be X, but ΔX counting values are counted additionally (see Fig. 2 ). At this time, the frequency deviation is positive deviation. The frequency deviation value Δx is the product of the counting value ΔX and the period T of the local clock. When ΔX>(X / 2), it indicates that the frequency of the local clock second pulse is slower than that of the time keeping second pulse. That is, X-ΔX counting values should be counted, but they are not counted (see Fig. 3 ). At this time, the frequency deviation is reverse deviation. The frequency deviation value Δx is the product of the counting value X-ΔX and the period T of the local clock.
[0046] Step S4: According to the time-keeping second pulse obtained in step S2 and by means of cycle counting, latching and comparison calculation of the phase deviation of the resampling pulse and the time-keeping second pulse in the sampling interval, the cycle counting of the sampling interval is performed by means of a sampling interval cycle counter, the counting value of each cycle is Y, N1 samples are taken per second, for example, 4000 sampling points are set per second, 80 sampling points are set per cycle, and the sampling interval is 250us, wherein Y*T=sampling interval, the smaller T is, the larger Y is, and the more accurate Y is, if the resampling pulse is completely synchronized with the time-keeping second pulse, the time interval between the two second pulses is an integer multiple of Y, the sampling interval cycle counter is cleared at the starting moment of the current resampling pulse, the counting value ΔY of the sampling interval cycle counter is latched when the next time-keeping second pulse arrives, the deviation direction of the phase is judged by comparison with the second threshold parameter of the second threshold comparator, the phase deviation Δy between the resampling pulse and the time-keeping second pulse is calculated according to the relationship among the counting value Y, the counting value ΔY and the local clock period T, Δy can also be called deviation time or deviation time value, and the second threshold parameter of the second threshold comparator is preferably set to Y / 2, ΔY has two results, namely ΔY≤(Y / 2) and ΔY>(Y / 2), wherein when ΔY≤(Y / 2), it indicates that the resampling pulse is earlier than the generation moment of the time-keeping second pulse, the phase deviation is positive deviation, and the phase deviation value Δy is the product of the counting value ΔY and the local clock period T; when ΔY>(Y / 2), it indicates that the resampling pulse is later than the generation moment of the time-keeping second pulse, the phase deviation is negative deviation, and the phase deviation value Δy is the product of the counting value Y-ΔY and the local clock period T.
[0047] In step S3 of the embodiment, it is assumed that 4000 sampling points are set per second, that is, N=4000, the counting value X of each sampling point is 25000, X / 2=12500, the local clock is 100MHz, one counting value unit is 10ns, and the local clock period T=10ns, for example, if the counting value ΔX=100, ΔXX / 2, which indicates positive deviation, and the deviation value Δx=100*10=1000ns, if the counting value ΔX=13500, ΔX>X / 2, which indicates negative deviation, and the deviation value Δx=(25000-13500)*10ns, similarly, the counting value Y, the counting value ΔY and the local clock period T are used to calculate the phase deviation Δy in step S4.
[0048] Step S5: combine the frequency deviation and the size and direction of the phase deviation to obtain the deviation value Δz and determine whether the deviation value Δz is a positive deviation or a negative deviation, and compensate any ΔZ counting points in the cycle counting of the sampling interval with Δz as the integrated deviation, wherein the counting point ΔZ is the ratio of the deviation value Δz to the local clock period T, and the selection of the arbitrary ΔZ counting points can be continuous counting points or dispersed counting points, for example, from 4000 sampling points, 20 counting points are selected for compensation, the first 20 counting points can be selected for compensation, or 20 counting points can be randomly selected for compensation, of course, 20 counting points can also be selected for compensation at an interval of 4000 / 20=200, for example, compensation is performed once every 200 counting points at 0, 200, 400, …, 3800.
[0049] Specifically, when the frequency deviation and the phase deviation are in the same direction, the deviation value Δz is the sum of the frequency deviation and the phase deviation, and the deviation value Δz is a positive deviation or a negative deviation, that is, Δz=Δx+Δy.
[0050] When the frequency deviation and the phase deviation are in opposite directions, the size and direction of the deviation value Δz are determined by comparing the size and direction of the frequency deviation and the phase deviation, if the frequency deviation is greater than the phase deviation, the deviation value Δz is the difference between the frequency deviation and the phase deviation, that is, Δz=Δx-Δy, and the deviation value Δz and the frequency deviation are both positive deviations or negative deviations; if the phase deviation is greater than the frequency deviation, the deviation value Δz is the difference between the phase deviation and the frequency deviation, that is, Δz=Δy-Δx, and the deviation value Δz and the phase deviation are both positive deviations or negative deviations; when the size of the frequency deviation and the phase deviation is equal, no compensation is needed, that is, Δz=Δx-Δy=0.
[0051] Before compensation, the resampling pulses are output at an interval of P, and the relay protection device samples at N1 points per second, and the first ΔZ sampling points are selected for compensation among the N1 sampling points, if Δz is a positive deviation, the sampling pulses of the first ΔZ sampling points are output at an interval of P+1, and the remaining sampling points are output at an interval of P; if Δz is a negative deviation, the sampling pulses of the first ΔZ sampling points are output at an interval of P-1, and the remaining sampling points are output at an interval of P, to complete the compensation.
[0052] The resampling pulses are uniformly output at an interval of P, but the substation may cause abnormality to the time source during operation, so the output sampling value message interval still needs to be uniform without the time source, and therefore the input time signal needs to be reliably guarded.
[0053] The time keeping method in the embodiment is: in the absence of a time source, the deviation between the local clock and the GPS time source cannot be considered, only the uniformity of the sampling can be considered, the local clock is counted, and when the counting time reaches 1 second, a time keeping second pulse is output; in the presence of a time source in the early stage and the absence of a time source in the later stage due to abnormality or loss, when the time source is normal, the interval of N3 time keeping second pulses is counted S, the average counting value M and the remainder AM in the time keeping condition are obtained by dividing the total count S by N3, when the time source is abnormal, the time keeping second pulse is output at the interval of the counting M, every N3 second pulses are a period, and in the period, the second pulse is output at the interval of M+1 by selecting AM counts, so that the remainder is compensated, for example, when N3=64, AM<64, the ideal condition is that the total count S=6400000000, the actual total count S=6400005375, the average value M=100000083, and AM=63, that is, the second pulse is output at the interval of 100000084 by selecting 63 counts in a period N3; and when the time source is completely present, the time keeping second pulse is replaced by the time keeping second pulse, and deviation detection and compensation are performed.
[0054] A sampling output module based on FPGA design, comprising a counter, a latch, a comparator and a deviation integration unit cooperating with each other, and the above-mentioned method for improving the sampling interval precision of a relay protection device is executed by the counter, the comparator, the latch and the deviation integration unit cooperating with each other. In addition, the sampling output module further comprises a calculation second pulse average interval unit and a latching second pulse average interval unit, the calculation second pulse average interval unit receives the time keeping second pulse, and the time keeping second pulse is generated by cooperating with the latching second pulse average interval unit.
[0055] Specifically as shown in Fig. 1 The counter comprises a second interval cycle counter and a sampling interval cycle counter, the comparator comprises a first threshold comparator and a second threshold comparator, the latch comprises a first deviation latch and a second deviation latch, the second interval cycle counter receives the time keeping second pulse, the frequency deviation between the local clock second pulse and the time keeping second pulse is calculated by the cooperation of the second interval cycle counter, the first threshold comparator and the first deviation latch, the sampling interval cycle counter receives the time keeping second pulse, the phase deviation between the resampling pulse and the time keeping second pulse is calculated by the cooperation of the sampling interval cycle counter, the second threshold comparator and the second deviation latch, the frequency deviation and the phase deviation are integrated by the deviation integration unit and then input to the sampling interval cycle counter for compensation, and the resampling pulse is output by the sampling interval cycle counter.
[0056] The application further provides a sampling device comprising a memory and a processor, wherein the processor executes the program in the memory to realize the method for improving the sampling interval precision of a relay protection device.
[0057] The above description is further detailed in connection with specific preferred embodiments of the application, and it is not to be construed that the specific implementation of the application is limited to these descriptions. For those skilled in the art of the present application, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, and all of them should be considered as falling within the protection scope of the present application.
Claims
1. A method for improving the sampling interval accuracy of a relay protection device, characterized in that: Includes the following steps: Step S1: Using a standard time source as the synchronization source, receive the standard time source and parse out the synchronization second pulse to obtain the precise start time; Step S2: When a time source is fully present, replace the time-keeping second pulse with the time-synchronized second pulse; When a time source exists in the early stage but not in the later stage, when the time source is normal, the interval of N3 time-synchronized second pulses is counted in total by S. The average count value M and remainder ΔM under time synchronization conditions are obtained by dividing the total count S by N3. When the time source is abnormal, the time-synchronized second pulses are output at intervals of count M. Every N3 second pulses is a cycle. ΔM counts in a cycle are selected and the second pulses are output at intervals of M+1 to achieve remainder compensation. When there is no time source available, the local clock is counted, and a time-keeping second pulse is output when the count time reaches 1 second. Step S3: Under the condition that the time source is completely normal, calculate the frequency deviation between the local clock second pulse and the synchronized time second pulse by cyclic counting, latching and comparing the second pulse intervals. Step S4: Based on the timekeeping second pulse obtained in step S2, calculate the phase deviation between the resampled pulse and the timekeeping second pulse by cyclically counting, latching, and comparing within the sampling interval; Step S5: Integrate the frequency deviation and phase deviation to obtain the integrated deviation, and output the resampling pulse at the counting points of the cyclic counting in the sampling interval to compensate for the integrated deviation.
2. The method for improving the sampling interval accuracy of a relay protection device according to claim 1, characterized in that: In step S3, a second interval cyclic counter performs periodic cyclic counting, with a count value of X in each cycle and N counts per second. The count value at the start of the current local clock second pulse is cleared to zero. The second cyclic interval count value ΔX is latched at the arrival of the time synchronization second pulse. The frequency deviation Δx between the local clock second pulse and the time synchronization second pulse is calculated based on the relationship between the cyclic count X, the count value ΔX, and the local clock period T. The second interval cyclic counter is then cleared to zero again. The direction of the frequency deviation is determined by comparing it with the first threshold parameter.
3. The method for improving the sampling interval accuracy of a relay protection device according to claim 2, characterized in that: The first threshold parameter is set to X / 2. When ΔX≤(X / 2), it means that the local clock second pulse is faster than the synchronized second pulse, and the frequency deviation Δx is a positive deviation, which is the product of the count value ΔX and the local clock period T. When Δx>(X / 2), it means that the local clock second pulse is slower than the synchronized second pulse, and the frequency deviation Δx is a negative deviation, which is the product of the count value (X-Δx) and the local clock period T.
4. The method for improving the sampling interval accuracy of a relay protection device according to claim 1, characterized in that: In step S4, the sampling interval cyclic counter performs periodic cyclic counting, with a count value of Y for each cycle, counting N1 times per second. At the start of the current resampling pulse, the sampling interval cyclic counter is cleared to zero. When the next timekeeping second pulse arrives, the count value ΔY of the sampling interval cyclic counter is latched. The phase deviation Δy between the resampling pulse and the timekeeping second pulse is calculated based on the relationship between the cyclic count Y, the count value ΔY, and the local clock period T. The direction of the phase deviation is determined by comparing it with the second threshold parameter.
5. The method for improving the sampling interval accuracy of a relay protection device according to claim 4, characterized in that: The second threshold parameter is set to Y / 2. When ΔY≤(Y / 2), it means that the resampled pulse is generated earlier than the timekeeping second pulse, and the phase deviation Δy is a positive deviation, which is the product of the count value ΔY and the local clock period T. When ΔY>(Y / 2), it means that the resampled pulse is generated later than the timekeeping second pulse, and the phase deviation Δy is a negative deviation, which is the product of the count value Y-ΔY and the local clock period T.
6. The method for improving the sampling interval accuracy of a relay protection device according to claim 1, characterized in that: In step S5, the deviation value Δz is obtained by combining the magnitude and direction of the frequency deviation and phase deviation, and it is determined whether the deviation value Δz is a positive deviation or a negative deviation. The deviation value Δz is used as the integrated deviation to compensate for any ΔZ counting points in the cyclic counting in the sampling interval. The counting point ΔZ is the ratio of the deviation value Δz to the local clock period.
7. The method for improving the sampling interval accuracy of a relay protection device according to claim 6, characterized in that: When the frequency deviation and the phase deviation are in the same direction, the deviation value Δz is the sum of the frequency deviation and the phase deviation, and the deviation value Δz is either positive or negative deviation. When the frequency deviation and phase deviation are in opposite directions, and the frequency deviation is greater than the phase deviation, the deviation value Δz is the difference between the frequency deviation and the phase deviation. The deviation value Δz and the frequency deviation are both positive or negative deviations. When the frequency deviation and the phase deviation are in opposite directions and equal in magnitude, the deviation value Δz is zero; When the frequency deviation and phase deviation are in opposite directions, and the phase deviation is greater than the frequency deviation, the deviation value Δz is the difference between the phase deviation and the frequency deviation. The deviation value Δz and the phase deviation are both positive or negative deviations.
8. A method for improving the sampling interval accuracy of a relay protection device according to claim 6, characterized in that: Before compensation, the resampling pulse is output at intervals of P, and sampling is performed at N1 points per second. The first ΔZ sampling points are selected from the N1 sampling points for phase compensation. If Δz is a positive deviation, the sampling pulses of the first ΔZ sampling points are output at intervals of P+1, and the remaining sampling points are output at intervals of P. If Δz is the reverse deviation, the sampling pulses of the first ΔZ sampling points are output at intervals of P-1, and the remaining sampling points are output at intervals of P.
9. A sampling output module, comprising a counter, a comparator, a latch, and a bias integration unit, characterized in that: The method for improving the sampling interval accuracy of a relay protection device as described in any one of claims 1-8 is executed by a counter, a comparator, a latch, and a deviation integration unit working together.
10. A sampling output module according to claim 9, characterized in that: It also includes a second pulse average interval calculation unit and a second pulse average interval latching unit. The second pulse average interval calculation unit receives the time synchronization second pulse and works with the second pulse average interval latching unit to generate the timekeeping second pulse.
11. A sampling output module according to claim 9 or 10, characterized in that: The counters include a second-interval cyclic counter and a sampling-interval cyclic counter. The comparators include a first threshold comparator and a second threshold comparator. The latches include a first offset latch and a second offset latch. The second-interval cyclic counter receives the synchronized second pulse and calculates the frequency deviation between the local clock second pulse and the synchronized second pulse using the cooperation of the second-interval cyclic counter, the first threshold comparator, and the first offset latch. The sampling-interval cyclic counter receives the time-keeping second pulse and calculates the phase deviation between the resampled pulse and the time-keeping second pulse using the cooperation of the sampling-interval cyclic counter, the second threshold comparator, and the second offset latch. The offset integration unit integrates the frequency deviation and the phase deviation and inputs them into the sampling-interval cyclic counter for compensation. The sampling-interval cyclic counter outputs the resampled pulse.
12. A sampling device, comprising a memory and a processor, characterized in that: The processor executes a program in the memory to implement the method for improving the sampling interval accuracy of a relay protection device as described in any one of claims 1-8.
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