An image transmission method, device and readable storage medium

Abstract

The application provides an image transmission method, device and readable storage medium. The method comprises the following steps: sending an image acquisition instruction and an image data cache address table to a PL end; the image acquisition instruction is used for instructing the PL end to acquire target image data, and the image data cache address table is used for the PL end to acquire a corresponding target cache address; reading the target image data from a corresponding storage unit when an interrupt signal reported by the PL end after storing the target image data is received; transmitting the target image data to a terminal device, and correspondingly setting a use state of the target cache address. Through implementation of the application scheme, the PL end stores the image data into a storage unit indicated by the corresponding cache address according to the image data cache address table allocated by the PS end and the use state of the cache address, and the PS end transmits the image data according to the instruction of the PL end, so that the phenomenon of image data frame splicing and random frame loss is prevented, and the evaluation of the performance of the image sensor is affected.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of image processing, in particular to an image transmission method, device and readable storage medium. BACKGROUND

[0002] In performance verification of an image sensor that fuses an Event Vision Sensor (EVS) and an Active Pixel Sensor (APS), APS and EVS image data need to be uploaded to a PC end. In order to reduce cost and development cycle, USB3.0 is often used for transmission. In actual application scenarios, the output speed of APS and EVS image data is usually about 10 Gbps, and the transmission speed of USB3.0 is 5 Gbps. When the output rate of image sensor EVS and APS image data is greater than the transmission rate of USB3.0, image transmission errors will occur, for example, the current frame data is being sent and is overwritten by new frame data, resulting in new and old image frame splicing phenomenon; the last frame data has not started transmission and is overwritten by new frame data, resulting in frame loss phenomenon. Due to the random frame splicing and frame loss of APS and EVS, the image will flicker irregularly and errors will occur, and continuous complete image data cannot be saved, thereby affecting the evaluation of image sensor performance. Therefore, the prior art needs to be improved. SUMMARY

[0003] The main purpose of the present application is to provide an image transmission method, device and readable storage medium, which can at least solve the problem that the performance evaluation of the image sensor is affected by random frame splicing and frame loss due to image data transmission in the related art.

[0004] To achieve the above-mentioned purpose, the first aspect of the present application provides an image transmission method applied to a PS end of an extensible processing platform, which comprises the following steps:

[0005] When receiving an image acquisition instruction issued by a terminal device, an image acquisition instruction and an image data cache address table are sent to a PL end; wherein the image acquisition instruction is used to instruct the PL end to acquire target image data, and the image data cache address table is used for the PL end to obtain a target cache address corresponding to the target image data, and the target cache address comprises a default allocated cache address and other available cache addresses;

[0006] When receiving an interrupt signal reported by the PL end after storing the target image data according to the target cache address, the target image data uploaded by the PL end is read from the storage unit indicated by the target cache address;

[0007] The target image data is transmitted to the terminal device, and a use state of the target cache address is set according to a data transmission state; the use state includes an idle state and an occupied state.

[0008] The second aspect of the present application provides an image transmission method applied to a PL end of an extensible processing platform, and the image transmission method comprises the following steps:

[0009] When an image acquisition instruction issued by the PS end is received, target image data is acquired;

[0010] According to an image data cache address table allocated by the PS end, a target cache address corresponding to the target image data is obtained;

[0011] The target image data is stored in a storage unit indicated by the target cache address, and then an interrupt signal is sent to the PS end; the interrupt signal is used to trigger the PS end to read the target image data from the storage unit indicated by the target cache address.

[0012] The third aspect of the present application provides an electronic device, comprising a memory and a processor, wherein the processor is used to execute a first computer program or a second computer program stored in the memory; when the processor executes the first computer program, each step of the image transmission method provided by the first aspect of the present application is realized; when the processor executes the second computer program, each step of the image transmission method provided by the second aspect of the present application is realized.

[0013] The fourth aspect of the present application provides a computer readable storage medium, and a computer program is stored in the computer readable storage medium; when the computer program is executed by a processor, each step of the image transmission method provided by the first aspect and the second aspect of the present application is realized.

[0014] From the above, according to the image transmission method, device and readable storage medium provided by the scheme, when the image collection instruction issued by the terminal device is received, the image collection instruction and the image data cache address table are sent to the PL end; wherein the image collection instruction is used to instruct the PL end to collect target image data, and the image data cache address table is used for the PL end to obtain a target cache address corresponding to the target image data, and the target cache address includes a default allocated cache address and other available cache addresses; when the interrupt signal reported by the PL end after storing the target image data according to the target cache address is received, the target image data uploaded by the PL end is read from the storage unit indicated by the target cache address; the target image data is transmitted to the terminal device, and the use state of the target cache address is set according to the data transmission state; wherein the use state includes an idle state and an occupied state. Through the implementation of the scheme, the PL end stores the collected image data to the corresponding cache address according to the image data cache address table allocated by the PS end and the use state of the target cache address, and the PS end transmits the cached image data according to the indication of the PL end, so as to ensure the integrity of the image data and prevent the image from appearing frame splicing, random frame loss and causing image display flicker. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0016] Figure 1 A basic flow diagram of an image transmission method applied to a PS end of an extensible processing platform provided by the first embodiment of the present application;

[0017] Figure 2 A basic flow diagram of an image transmission method applied to a PL end of an extensible processing platform provided by the first embodiment of the present application;

[0018] Figure 3 A signaling interaction diagram of a refined image transmission method provided by the second embodiment of the present application;

[0019] Figure 4 A structure diagram of an image transmission system provided by the second embodiment of the present application;

[0020] Figure 5 A structure diagram of an electronic device provided by the third embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to make the objectives, characteristics and advantages of the present application more obvious and easy to understand, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0022] In addition, the terms "first", "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, the meaning of "multiple" is two or more, unless otherwise explicitly and specifically limited.

[0023] In order to solve the problem of affecting the performance evaluation of the image sensor due to frame splicing and random frame loss in image data transmission in the related art, the first embodiment of the present application provides an image transmission method applied to the PS end of the extensible processing platform. The embodiment of the present application can be based on the Zynq series (Xilinx zynq) of the extensible processing platform, and uses USB3.0 to transmit APS and EVS image data. The Xilinx Zynq is composed of PL and PS, the PL is programmable logic, and the PS is a processing system; and after designing the PL processing program and the PS processing program respectively, the PL and the PS can interact through the way of reading and writing registers, the PL is mainly used for collecting APS and EVS image data, and buffering the image data to the DDR memory, the PS is mainly used for reading the image data, and transmitting to the terminal device PC end through the USB3.0 interface, the PC end can reset the image sensor, receive and process the APS and EVS image data, and the PC end can collect the APS and EVS image data within a certain time, for example, 5 seconds, the cache size is sufficient within this time, and the integrity of the APS and EVS image and no frame loss can be guaranteed.

[0024] As Figure 1 The basic flowchart of the image transmission method applied to the PS end of the extensible processing platform provided by the embodiment is shown in the figure, and the image transmission method comprises the following steps:

[0025] Step 101, when receiving the image collection instruction issued by the terminal device, send the image collection instruction and the image data buffer address table to the PL end.

[0026] Specifically, in the embodiment, when the PS receives the image acquisition instruction sent by the PC, the PS sends an instruction to start collecting images to the PL, and sends a preset image data cache table to the PL. The image acquisition instruction is used to instruct the PL to collect target image data, and the image data cache address table is used for the PL to obtain a target cache address corresponding to the target image data. The target cache address includes a default allocated cache address and other available cache addresses. The default allocated cache address is a cache address allocated by the PS for each target image data, and the other available cache addresses are other cache addresses except the default allocated cache address.

[0027] In some embodiments of the embodiment, before the step of sending the image acquisition instruction and the image data cache address table to the PL, the method further includes: determining image parameters corresponding to each type of image data; and generating the image data cache address table corresponding to each type of image data based on the image parameters and a preset register definition rule, wherein the image parameters include an image frame rate and an image size.

[0028] Specifically, in the embodiment, the APS and EVS image data can be allocated with corresponding cache numbers and storage units according to actual application scenarios such as APS and EVS image frame rates and image sizes and register definition rules of actual processing platforms, so that the APS and EVS are each allocated with a cache address table, and each storage unit corresponds to a cache address. For example, the value corresponding to the register Register_1 is BUFF_NUM (the number of BUFFs), the value corresponding to the register Register_2 is the storage unit of the first frame of image data, and the corresponding cache address is BUFF_ADDR_1. The value corresponding to the register Register_n is the storage unit of the Nth frame of image data, and the corresponding cache address is BUFF_ADDR_N. N is determined by the number of BUFFs. By defining the number of caches and the cache addresses, the DDR memory can be fully utilized to cache the actual required number of continuous image data.

[0029] Step 102, when receiving the interrupt signal reported by the PL after storing the target image data in the target cache address, reading the target image data uploaded by the PL from the storage unit indicated by the target cache address.

[0030] Specifically, in the embodiment, after receiving the interrupt notification sent by the PL after storing the target image data in the target cache address, the PS will read the target image data from the storage unit indicated by the target cache address.

[0031] Step 103, transmitting the target image data to a terminal device, and setting a use state of the target cache address according to a data transmission state.

[0032] Specifically, in the embodiment, when the PS end reads the target image data, the target image data can be first stored at the tail of the storage queue, and the image data at the head of the current queue can be sent to the PC end, and the use state of the corresponding cache address can be set according to the transmission state of the image data, wherein the use state includes an idle state and an occupied state.

[0033] In some embodiments of the embodiment, the step of setting the use state of the target cache address according to the data transmission state includes: when the transmission state of the target image data is in transmission, setting the use state of the target cache address as the occupied state; and when the transmission state of the target image data is transmission complete, setting the use state of the target cache address as the idle state.

[0034] Specifically, in the embodiment, the transmission state of the image data can be configured by using the lowest bit Bit0 of the register. In the embodiment, the register is 32 bits, and the image transmission address is even, so that the lowest bit Bit0 can be used to configure the transmission state of the image data. When the image data is being transmitted, the value of Bit0 can be set as 1 to indicate that the current cache address is being used by the PS end, that is, the PS end is sending the image data corresponding to the cache address, and the PL end cannot save the image to the cache address to avoid frame splicing phenomenon; when the image data transmission is completed, the value of Bit0 can be set as 0 to indicate that the current cache address can be used, and the PL end can store the image data to the cache address.

[0035] Further, in some embodiments of the embodiment, after the step of setting the use state of the target cache address as the occupied state when the transmission state of the target image data is in transmission, the method further includes: comparing the transmission time corresponding to the target image data with a preset time threshold; when the transmission time is greater than the time threshold, determining that the data transmission state of the target image data is transmission timeout; and when the transmission time is less than the time threshold, determining that the data transmission state of the target image data is transmission complete.

[0036] Specifically, in the embodiment, when the transmission state of the image data is in transmission, the transmission time of the image data is also judged to prevent the transmission process of the following image data from being affected by the transmission delay of the current image data. The transmission time threshold can be set according to actual use requirements. When the transmission time exceeds the time threshold, it is judged that the image data is delayed, indicating that the current image data is not successfully sent; and when the transmission time is less than the time threshold, it is judged that the image data is transmitted.

[0037] Further, in some embodiments of the present embodiment, after the step of determining that the data transmission state of the target image data is a transmission timeout when the transmission time is greater than the time threshold, the method further comprises the steps of: deleting the untransmitted image data in the target image data from the storage unit indicated by the target cache address, and then setting the use state of the target cache address to an idle state.

[0038] Specifically, in the present embodiment, when it is determined that the currently transmitted image data is in a transmission timeout state, in order not to affect the transmission process of subsequent image data, the untransmitted image data will be deleted from the storage unit indicated by the cache address, and then the use state of the cache address will be set to an idle state, that is, Bit0 will be set to 0.

[0039] In addition, the present embodiment also adaptively provides an image transmission method for the PL end of an extensible processing platform, as shown in Figure 2 The basic flowchart of the image transmission method for the PL end of the extensible processing platform provided by the present embodiment is shown in the figure, and the image transmission method comprises the following steps:

[0040] Step 201, when receiving the image acquisition instruction issued by the PS end, acquiring target image data.

[0041] Specifically, in the present embodiment, the PL end is used to acquire image data according to the image acquisition instruction issued by the PS end. In addition, after acquiring the corresponding image data, it can be further determined whether the parameters of the image data, such as the image pixel size, meet the acquisition requirements. If not, the image data can be discarded.

[0042] Step 202, acquiring the target cache address corresponding to the target image data according to the image data cache address table allocated by the PS end.

[0043] Specifically, in the present embodiment, after the PL end acquires the target image data, it scans the image data cache address table allocated by the PS end and acquires the cache address of the image data in the table.

[0044] In some embodiments of the present embodiment, the step of acquiring the target cache address corresponding to the target image data according to the image data cache address table allocated by the PS end comprises the steps of: acquiring the default allocation cache address corresponding to the target image data in the image data cache address table allocated by the PS end; if the use state of the default allocation cache address is an idle state, determining the default allocation cache address as the target cache address; if the use state of the default allocation cache address is an occupied state, querying other available cache addresses in the image data cache address table based on the default allocation cache address, and determining the other available cache addresses obtained by the query as the target cache address.

[0045] Specifically, in the embodiment, when the PL end scans the image data buffer address table to obtain the corresponding buffer address, it is further judged whether the buffer address is available, i.e. whether Bit0 of the buffer address is 0. When the buffer address is available, the buffer address is determined as the target buffer address. When the buffer address is not available, it is further judged whether the buffer address after the buffer address is available. If the buffer address is available, the available buffer address is determined as the target buffer address. Through the image buffer mechanism, the integrity of the image can be guaranteed, and the frame splicing problem can be solved.

[0046] In some other embodiments of the present embodiment, the image transmission method applied to the PL end of the extensible processing platform further includes the step of discarding the target image data if the target buffer address does not exist in the image data buffer address table.

[0047] Specifically, in the embodiment, if the image data cannot be stored in the corresponding buffer address in the image data buffer address table, and other buffer addresses are also not available, the image data will be discarded. In the embodiment, the current buffer address is not available, which indicates that the storage speed of the PL end is greater than the reading speed of the PS end, i.e. a new cycle is performed. If the image data is always discarded due to the unavailability of the default buffer address, the image data will be always blocked, and the phenomenon of continuous lagging will occur. However, if the buffer address after the buffer address is overwritten, the PS end will transmit the next frame of image after the transmission of the current frame is completed. Only the unavailable frame will be temporarily lagged. When the speed is constant, the frequency is uniform, and the frame rate of the EVS image data is fast, which cannot be easily perceived by the naked eye. Therefore, when the frame rate and the transmission rate are constant, the frequency of frame loss is uniform by using the image buffer mechanism, so that the phenomenon of image flicker caused by random frame loss can be avoided.

[0048] Step 203: storing the target image data into the storage unit indicated by the target buffer address, and then sending an interrupt signal to the PS end.

[0049] Specifically, the interrupt signal of the present embodiment is used to trigger the PS end to read the target image data from the storage unit indicated by the target buffer address. In the embodiment, when the PL end stores the collected image data into the storage unit of the corresponding buffer address, the PS end will be interrupted and notified.

[0050] Based on the technical solutions of the embodiments of the present application, when the image collection instruction issued by the terminal device is received, the image collection instruction and the image data cache address table are sent to the PL end; the image collection instruction is used to instruct the PL end to collect target image data, and the image data cache address table is used for the PL end to obtain a target cache address corresponding to the target image data, the target cache address including a default allocation cache address and other available cache addresses; when the interrupt signal reported by the PL end after storing the target image data according to the target cache address is received, the target image data uploaded by the PL end is read from the storage unit indicated by the target cache address; the target image data is transmitted to the terminal device, and the use state of the target cache address is set according to the data transmission state; the use state includes an idle state and an occupied state. Through the implementation of the present application, the PL end stores the collected image data into the corresponding cache address according to the image data cache address table allocated by the PS end and the use state of the target cache address, and the PS end transmits the cached image data according to the indication of the PL end, so as to ensure the integrity of the image data and prevent the image from flickering due to frame splicing and random frame loss.

[0051] Figure 3 The method in the figure is a signaling interaction diagram of a refined image transmission method provided by the second embodiment of the present application, applied to an image transmission system as shown in Figure 4 The image transmission system includes an extensible processing platform and a terminal device, the extensible processing platform includes a PS end and a PL end, and the image transmission method includes the following steps.

[0052] Step 301, the terminal device sends an image collection instruction to the PS end;

[0053] Step 302, the PS end sends the image collection instruction and the image data cache address table to the PL end;

[0054] Step 303, the PL end collects target image data according to the image collection instruction issued by the PS end;

[0055] Step 304, the PL end obtains a default allocation cache address corresponding to the target image data according to the image data cache address table allocated by the PS end;

[0056] Step 305, the PL end judges whether the use state of the default allocation cache address is an idle state; if yes, step 306 is executed; if no, step 307 is executed;

[0057] Step 306, the PL end determines the default allocation cache address as the target cache address;

[0058] Step 307, the PL end queries other available cache addresses in the image data cache address table based on the default allocated cache address, and determines the other available cache addresses obtained by the query as target cache addresses;

[0059] Step 308, the PL end stores the target image data to the storage unit corresponding to the target cache address;

[0060] Step 309, the PL end reports an interrupt signal to the PS end;

[0061] Step 310, the PS end reads the target image data from the storage unit indicated by the target cache address according to the interrupt signal reported by the PL end, and sets the use state of the target cache address according to the data transmission state;

[0062] Step 311, the PS end transmits the target image data to the terminal device.

[0063] It should be understood that the size of the serial number of each step in the embodiment does not mean the order of the execution of the steps, and the execution order of each step should be determined according to its function and inherent logic, and should not constitute the only limitation on the implementation process of the embodiment of the application.

[0064] Based on the technical solutions of the embodiments of the present application, when the PS receives the image data collection instruction issued by the terminal device, the PS sends a corresponding image data collection instruction to the PL. Then, the PL collects image data, and then queries a corresponding default allocated cache address according to the image data cache address table allocated by the PS and judges whether Bit0 of the default allocated cache address is 0, that is, judges whether the cache address is available. If the default allocated cache address is available, the default allocated cache address is determined as the target cache address, and the collected image data is stored in the default allocated cache address. If Bit0 of the default allocated cache address is 1, that is, the address is not available, the next available cache address is queried, the available cache address is determined as the target cache address, and the collected image data is stored in the available cache address. Then, the PS is interrupted to inform that the image data has been stored in the corresponding cache address. Then, the PS reads the image data from the storage unit indicated by the cache address and transmits the image data to the terminal device, and sets the use state of the cache address. Thus, the embodiments of the present application store the collected image data in the cache address only when the cache address is in an idle state, to prevent the occurrence of frame splicing due to the covering of the originally stored image data. In addition, when the default allocated cache address is not available, the next available cache address is searched, to prevent the occurrence of image display flickering due to random frame loss, and to prevent the phenomenon of image output blockage due to continuous frame loss, so that when the image data storage speed is greater than the reading speed, complete and smooth image display effect can still be obtained, the accuracy of the performance verification of the image sensor of the EVS and APS fusion is effectively improved, and the development difficulty of the verification scheme is reduced and the development cycle is shortened.

[0065] Figure 5 An electronic device is provided in the third embodiment of the present application, which can be used to implement the image transmission method in the foregoing embodiments, and mainly includes:

[0066] The memory 501, the processor 502, the first computer program 503 and the second computer program 504 stored in the memory 501 and executable on the processor 502, and the memory 501 and the processor 502 are connected through communication. When the processor 502 executes the first computer program 503, the image transmission method of the PS applied to the expandable processing platform in the foregoing embodiments is implemented. When the processor 502 executes the second computer program 504, the image transmission method of the PL applied to the expandable processing platform in the foregoing embodiments is implemented. The number of processors can be one or more.

[0067] The memory 501 can be a high-speed random access memory (RAM) or a non-volatile memory, such as a disk storage device. The memory 501 is used to store executable program code, and the processor 502 is coupled to the memory 501.

[0068] Furthermore, embodiments of this application also provide a computer-readable storage medium, which may be disposed in the aforementioned electronic device, and the computer-readable storage medium may be as described above. Figure 5 The memory in the illustrated embodiment.

[0069] The computer-readable storage medium stores a computer program that, when executed by a processor, implements the image transmission method described in the foregoing embodiments. Furthermore, the computer-readable storage medium can also be a USB flash drive, a portable hard drive, a read-only memory (ROM), RAM, a magnetic disk, or an optical disk, or any other medium capable of storing program code.

[0070] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or modules may be electrical, mechanical, or other forms.

[0071] The modules described as separate components may or may not be physically separate. Similarly, the components shown as modules may or may not be physical modules; they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0072] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0073] The integrated module, if implemented in the form of a software function module and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such an understanding, the technical solutions of the present application, essentially or in part, or all or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a readable storage medium, including a number of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods in the embodiments of the present application. The aforementioned readable storage medium includes: U disk, mobile hard disk, ROM, RAM, magnetic disk, or optical disk, and various other media that can store program codes.

[0074] It should be noted that, for the foregoing method embodiments, in order to simplify the description, they are all described as a series of action combinations, but those skilled in the art should know that the present application is not limited to the order of the described actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should know that the embodiments described in the specification all belong to preferred embodiments, and the actions and modules involved are not necessarily essential to the present application.

[0075] In the above embodiments, the description of each embodiment has its own emphasis, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0076] The above is the description of the image transmission method, device and readable storage medium provided by the present application. For those skilled in the art, according to the idea of the embodiments of the present application, there will be changes in specific implementation and application range. In summary, the content of the specification should not be understood as a limitation of the present application.

Claims

1. An image transmission method applied to a PS end of an extensible processing platform, characterized in that, The method comprises the following steps: When receiving an image acquisition instruction issued by a terminal device, an image acquisition instruction and an image data cache address table are sent to a PL end, wherein the image acquisition instruction is used to instruct the PL end to acquire target image data, and the image data cache address table is used for the PL end to acquire a target cache address corresponding to the target image data, the target cache address comprising a default allocation cache address and other available cache addresses; when the use state of the default allocation cache address is an occupied state, the target cache address is the other available cache address; if the target cache address does not exist in the image data cache address table, the PL end discards the target image data; When receiving an interrupt signal reported by the PL end after storing the target image data according to the target cache address, the target image data uploaded by the PL end is read from a storage unit indicated by the target cache address; The target image data is transmitted to the terminal device, and a use state of the target cache address is set according to a data transmission state; wherein the use state comprises an idle state and an occupied state; when the transmission state of the target image data is in transmission, the use state of the target cache address is set to the occupied state; a transmission time corresponding to the target image data is compared with a preset time threshold; when the transmission time is greater than the time threshold, it is determined that the data transmission state of the target image data is transmission timeout; untransmitted image data in the target image data is deleted from the storage unit indicated by the target cache address, and then the use state of the target cache address is set to the idle state.

2. The image transmission method according to claim 1, characterized by, Before the step of sending the image acquisition instruction and the image data cache address table to the PL end, the method further comprises the following steps: Determine image parameters corresponding to various types of image data; wherein the image parameters comprise image frame rate and image size; Generate an image data cache address table corresponding to the various types of image data based on the image parameters and a preset register definition rule.

3. The image transmission method according to claim 1, characterized by, The step of setting the use state of the target cache address according to the data transmission state further comprises the following step: When the transmission state of the target image data is transmission complete, the use state of the target cache address is set to the idle state.

4. The image transmission method according to claim 3, characterized by, After the step of setting the use state of the target cache address to the occupied state when the transmission state of the target image data is in transmission, the method further comprises the following step: When the transmission time is less than the time threshold, it is determined that the data transmission state of the target image data is transmission complete.

5. An image transmission method applied to a PL end of an extensible processing platform, characterized in that, The method comprises the following steps: When receiving an image acquisition instruction issued by a PS end, acquire target image data; According to an image data cache address table allocated by the PS end, acquire a target cache address corresponding to the target image data; The target cache address includes a default assigned cache address and other available cache addresses; when the use state of the default assigned cache address is occupied, the target cache address is the other available cache address; if the target cache address does not exist in the image data cache address table, the target image data is discarded; The target image data is stored in the storage unit indicated by the target cache address, and then an interrupt signal is sent to the PS end; the interrupt signal is used to trigger the PS end to read the target image data from the storage unit indicated by the target cache address; The PS end is used to transmit the target image data to a terminal device, and set the use state of the target cache address according to the data transmission state; the use state includes an idle state and an occupied state; when the transmission state of the target image data is in transmission, the use state of the target cache address is set to the occupied state; the transmission time corresponding to the target image data is compared with a preset time threshold; when the transmission time is greater than the time threshold, it is determined that the data transmission state of the target image data is transmission timeout; the untransmitted image data in the target image data is deleted from the storage unit indicated by the target cache address, and then the use state of the target cache address is set to the idle state.

6. The image transmission method according to claim 5, characterized by, The step of obtaining the target cache address corresponding to the target image data according to the image data cache address table assigned by the PS end includes: Obtaining the default assigned cache address corresponding to the target image data in the image data cache address table assigned by the PS end; If the use state of the default assigned cache address is idle, the default assigned cache address is determined as the target cache address; If the use state of the default assigned cache address is occupied, other available cache addresses are queried in the image data cache address table based on the default assigned cache address, and the queried other available cache addresses are determined as the target cache address.

7. An electronic device, comprising: It includes: A memory and a processor, wherein: The processor is used to execute the first computer program or the second computer program stored on the memory; When the processor executes the first computer program, the steps in the image transmission method in any one of claims 1 to 4 are implemented; When the processor executes the second computer program, the steps in the image transmission method in any one of claims 5 to 6 are implemented.

8. A computer-readable storage medium having stored thereon a computer program, characterized in that, When the computer program is executed by the processor, the steps in the image transmission method in any one of claims 1 to 6 are implemented.

Images