High-speed analog-to-digital conversion device and conversion method for image sensor

Abstract

The present invention provides a high-speed analog-to-digital conversion device and conversion method for an image sensor, wherein the method includes: S1, building a high-speed analog-to-digital conversion device, placing a pixel reset voltage at the input end of a comparator; S2, closing the first and second groups of switches, using the comparator to compare the node and the pixel reset voltage, and outputting a first conversion value; S3, when the node is greater than the pixel reset voltage, cutting off the second group of switches, collecting the voltage value of the third capacitor, and disconnecting the first group of switches; S4, opening the third group of switches, using the comparator to compare the node and the pixel reset voltage, and obtaining a second conversion value output at the moment of comparator flipping; S5, disconnecting all switches, placing the pixel signal voltage at the input end of the comparator, repeating steps S2-S4, obtaining the third and fourth conversion values; S6, calculating the obtained conversion value to obtain the analog-to-digital conversion value. The present invention can improve the analog-to-digital conversion speed, reduce fixed noise, and obtain high-quality images.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor image sensing technology, and in particular to a high-speed analog-to-digital conversion device and conversion method for an image sensor. Background Art

[0002] The analog-to-digital converter in the image sensor is used to convert the pixel signal into a digital signal. The analog-to-digital converter of a traditional image sensor, such as a ramp-type analog-to-digital converter, requires at least 2 bits to perform an N-bit analog-to-digital conversion. N Sub-clock count, such as Figure 1 As shown. In this way, when performing conversion of higher bit numbers, a longer analog-to-digital conversion time is required, which limits the frame rate of the image sensor. At the same time, the light signal M entering the photosensitive unit of the image sensor has its own light discrete noise, and its noise size is When the optical signal is strong, the discrete noise it carries will also increase.

[0003] The basic principle of the two-stage analog-to-digital conversion scheme using optical discrete noise is as follows Figure 2 As shown in the figure, in the first stage of conversion, the input signal is compared with several reference signals for a coarse conversion, with the high-order bits of the converted signal outputted. In the second stage of conversion, the difference between the input signal and a reference signal is finely converted, with the low-order bits of the converted signal outputted. During the second stage of conversion, the slope of the ramp signal used for analog-to-digital conversion varies. Larger signals require higher ramp slopes, which increases the quantization noise of the second stage conversion and reduces the time required to convert the same voltage range. Although the quantization noise of the second stage analog-to-digital conversion is higher when a high ramp slope is used, image quality is not degraded due to the high optical discrete noise of the input signal.

[0004] Compared with traditional slope analog-to-digital converters, this two-stage analog-to-digital conversion scheme that utilizes optical noise can greatly improve the speed of analog-to-digital conversion. However, since the second-stage analog-to-digital conversion requires multiple slope analog-to-digital converters with different slopes, it increases the complexity of the design. In addition, when the first-stage analog-to-digital converter makes an erroneous conversion due to noise or other reasons, the design of the second-stage analog-to-digital converter must have an error correction function, otherwise, code leakage and other phenomena will occur.

[0005] When multiple second-stage analog-to-digital converters are used simultaneously, a large fixed pattern noise is generated because each analog-to-digital converter uses a different second-stage ramp slope during the time conversion process. Summary of the Invention

[0006] The purpose of the present invention is to overcome the defects of the existing technology such as complex structure and large fixed pattern noise, and to propose a high-speed analog-to-digital conversion device and conversion method for image sensors, which can simplify the structural design and reduce the fixed pattern noise.

[0007] To achieve the above objectives, the present invention adopts the following specific technical solutions:

[0008] The high-speed analog-to-digital conversion device for an image sensor provided by the present invention includes a comparator, a first capacitor, a second capacitor, a third capacitor, a first group of switches, a second group of switches, a third group of switches, and a control unit. The first group of switches includes a first switch and a second switch, the second group of switches includes a third switch and a fourth switch, and the third group of switches includes a fifth switch and a sixth switch. One input end of the comparator is sequentially connected to the second switch, the second capacitor, and the first switch, and then to a ramp signal. The other input end of the comparator is connected to the first capacitor and then to a pixel reset voltage or a pixel signal voltage. The output end of the comparator is connected to the control unit, and the control unit is used to control the third switch and the fourth switch. The third switch, the third capacitor, and the fourth switch are sequentially connected between the ramp signal and the reference signal. One end of the fifth switch is connected between the ramp signal and the first switch, and the other end is connected between the third capacitor and the fourth switch. One end of the sixth switch is connected between the input end of the comparator and the second switch, and the other end is connected between the third capacitor and the third switch.

[0009] The high-speed analog-to-digital conversion method for an image sensor provided by the present invention is implemented using a high-speed analog-to-digital conversion device for an image sensor. The conversion method includes the following steps:

[0010] S1. Build a high-speed analog-to-digital conversion device for an image sensor, place a pixel reset voltage at the input of a comparator, and ensure that the voltage difference between the first capacitor and the second capacitor is zero.

[0011] S2. Close the first switch, the second switch, the third switch, and the fourth switch to make the output ramp signal a high-slope ramp signal. The initial voltage value of the high-slope ramp signal is less than the voltage value of the pixel reset voltage. Use a comparator to compare the voltage value of the node with the pixel reset voltage and output a first conversion value. The node is the intersection of the three branches where the second switch, the sixth switch, and the input terminal of the comparator are located.

[0012] S3: When the voltage value of the node is greater than the voltage value of the pixel reset voltage, the comparator output flips, the control unit sends a signal to cut off the third switch and the fourth switch, the third capacitor collects the voltage difference between the signal voltage and the reference signal at the flipping moment, and disconnects the first switch and the second switch;

[0013] S4. Turn on the fifth switch and the sixth switch to make the output ramp signal a low-slope ramp signal. The voltage value of the node is the voltage value of the low-slope ramp signal plus the voltage value collected by the third capacitor. A comparator is used to compare the voltage value of the node with the pixel reset voltage to obtain a second conversion value output at the moment the comparator flips.

[0014] S5. Open all switches, place the pixel signal voltage at the input of the comparator, close the first switch, the second switch, the third switch, and the fourth switch, so that the output ramp signal is a high-slope ramp signal, the initial voltage value of the high-slope ramp signal is smaller than the voltage value of the pixel signal voltage, and use the comparator to compare the voltage value of the node with the pixel signal voltage, and output a third conversion value.

[0015] S6. When the voltage value of the node is greater than the voltage value of the pixel signal voltage, the comparator output flips, the control unit sends a signal to cut off the third switch and the fourth switch, the third capacitor collects the voltage difference between the signal voltage at the flipping moment and the reference signal, and disconnects the first switch and the second switch;

[0016] S7. Turn on the fifth switch and the sixth switch to make the output ramp signal a low-slope ramp signal. The voltage value of the node is the voltage value of the low-slope ramp signal plus the voltage value collected by the third capacitor. A comparator is used to compare the voltage value of the node with the pixel signal voltage to obtain a fourth conversion value output at the moment of comparator flipping.

[0017] S8. Calculate the first conversion value, the second conversion value, the third conversion value, and the fourth conversion value to obtain an analog-to-digital conversion value. The calculation formula is as follows:

[0018] DN=k*(DN_C_S-DN_C_R)+(DN_F_S-DN_F_R)(1),

[0019] Wherein, k is the ratio of the voltage values ​​of the low slope ramp signal to the high slope ramp signal, DN is the analog-to-digital conversion value, DN_C_R is the first conversion value, DN_F_R is the second conversion value, DN_C_S represents the third conversion value, and DN_F_S represents the fourth conversion value.

[0020] The present invention can achieve the following technical effects:

[0021] 1. The first ramp signal slope for converting the pixel reset voltage and the pixel signal voltage of the present invention is relatively high, thereby improving the conversion speed; the second ramp signal slope for converting the pixel reset voltage and the pixel signal voltage is relatively low, thereby reducing the quantization noise.

[0022] 2. The present invention performs the same two conversions on the pixel reset voltage and the pixel signal voltage, thereby suppressing the inconsistent performance and non-ideal characteristics of the circuit, and preventing column fixed noise and code loss, thereby obtaining a high-quality image without additional correction.

[0023] 3. The present invention converts the pixel reset voltage and the pixel signal voltage multiple times to achieve high-speed correlated multiple sampling and reduce pixel readout noise. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a schematic diagram of the traditional analog-to-digital conversion method.

[0025] Figure 2 This is a schematic diagram of the basic principle of traditional two-stage analog-to-digital conversion using optical discrete noise.

[0026] Figure 3a 3 is a schematic structural diagram of a high-speed analog-to-digital conversion device for an image sensor provided according to an embodiment of the present invention.

[0027] Figure 3b 1 is a schematic diagram of a conversion sequence of a high-speed analog-to-digital conversion device for an image sensor provided according to an embodiment of the present invention.

[0028] Figure 4 1 is a schematic diagram of a conversion timing of a high-speed analog-to-digital conversion device for an image sensor provided according to an embodiment of the present invention.

[0029] Figure 5 The figure is a flow chart of a conversion method of a high-speed analog-to-digital conversion device for an image sensor according to an embodiment of the present invention.

[0030] Figure 6 1 is a schematic diagram of three conversion timings of a high-speed analog-to-digital conversion device for an image sensor provided according to an embodiment of the present invention.

[0031] The reference numerals include: comparator 1, first capacitor C1, second capacitor C2, third capacitor C3, first group of switches S1, second group of switches S2, third group of switches S3, first switch S11, second switch S12, third switch S21, fourth switch S22, fifth switch S31, sixth switch S32, control unit 2. DETAILED DESCRIPTION

[0032] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the following description, identical modules are denoted by identical reference numerals. In the case of identical reference numerals, their names and functions are also identical. Therefore, their detailed description will not be repeated.

[0033] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and do not constitute a limitation of the present invention.

[0034] Figure 3a The structure of a high-speed analog-to-digital conversion device for an image sensor provided according to an embodiment of the present invention is shown.

[0035] like Figure 3aAs shown, the high-speed analog-to-digital conversion device for an image sensor provided by an embodiment of the present invention includes a comparator 1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first group of switches S1, a second group of switches S2, a third group of switches S3, a first switch S11, a second switch S12, a third switch S21, a fourth switch S22, a fifth switch S31, a sixth switch S32, and a control unit 2; wherein,

[0036] One input terminal of the comparator 1 is sequentially connected to the second switch S12 , the second capacitor C2 , and the first switch S11 , and then connected to the ramp signal.

[0037] The other input end of the comparator 1 is connected to the first capacitor C1 and then to the pixel reset voltage or pixel signal voltage. The output end of the comparator 1 is connected to the control unit 2, and the control unit 2 is used to control the third switch S21 and the fourth switch S22.

[0038] The third switch S21 , the third capacitor C3 and the fourth switch S22 are sequentially connected between the ramp signal and the reference signal.

[0039] One end of the fifth switch S31 is connected between the ramp signal and the first switch S11 , and the other end of the fifth switch S31 is connected between the third capacitor C3 and the fourth switch S22 .

[0040] One end of the sixth switch S32 is connected between the input end of the comparator 1 and the second switch S12 , and the other end of the sixth switch S32 is connected between the third capacitor C3 and the third switch S21 .

[0041] Figure 3b The figure shows the conversion sequence of the high-speed analog-to-digital conversion device for an image sensor provided according to an embodiment of the present invention. Figure 4 The figure shows the conversion timing of a high-speed analog-to-digital conversion device for an image sensor provided according to an embodiment of the present invention. Figure 5 The flow chart of the conversion method of the high-speed analog-to-digital conversion device for image sensors according to the embodiment of the present invention is shown. Figure 3a 、 Figure 3b 、 Figure 4 and Figure 5 , the working principle of the high-speed analog-to-digital conversion device for an image sensor provided according to an embodiment of the present invention is described in detail.

[0042] like Figure 3a 、 Figure 3b 、 Figure 4 and Figure 5 As shown, the conversion method of the high-speed analog-to-digital conversion device for an image sensor provided by an embodiment of the present invention is implemented using the high-speed analog-to-digital conversion device for an image sensor. The conversion method includes the following steps:

[0043] S1. Build a high-speed analog-to-digital conversion device for an image sensor, place a pixel reset voltage at the input of a comparator 1, and ensure that the voltage difference between the first capacitor C1 and the second capacitor C2 is zero.

[0044] S2, close the first switch S11, the second switch S12, the third switch S21 and the fourth switch S22, so that the output ramp signal is a high-slope ramp signal, the initial voltage value of the high-slope ramp signal is less than the voltage value of the pixel reset voltage, and use the comparator 1 to compare the voltage value of the node and the pixel reset voltage to output a first conversion value. The node is the intersection of the three branches where the second switch S12, the sixth switch S32 and the input end of the comparator 1 are located.

[0045] S3. When the voltage value of the node is greater than the voltage value of the pixel reset voltage, the output of the comparator 1 flips, and the control unit 2 sends a signal to cut off the third switch S21 and the fourth switch S22. The third capacitor C3 collects the voltage difference between the signal voltage and the reference signal at the flipping moment, and disconnects the first switch S11 and the second switch S12.

[0046] S4. Turn on the fifth switch S31 and the sixth switch S32 to make the output ramp signal a low-slope ramp signal. The voltage value of the node is the voltage value of the low-slope ramp signal plus the voltage value collected by the third capacitor C3. Comparator 1 is used to compare the voltage value of the node with the pixel reset voltage to obtain a second conversion value output at the flipping moment of comparator 1.

[0047] S5. Disconnect all switches, place the pixel signal voltage at the input of comparator 1, close the first switch S11, the second switch S12, the third switch S21, and the fourth switch S22, so that the output ramp signal is a high-slope ramp signal, and the initial voltage value of the high-slope ramp signal is less than the voltage value of the pixel signal voltage. Use comparator 1 to compare the voltage values ​​of the node and the pixel signal voltage, and output a third conversion value.

[0048] S6. When the voltage value of the node is greater than the voltage value of the pixel signal voltage, the output of the comparator 1 flips, and the control unit 2 sends a signal to cut off the third switch S21 and the fourth switch S22. The third capacitor C3 collects the voltage difference between the signal voltage and the reference signal at the flipping moment, and disconnects the first switch S11 and the second switch S12.

[0049] S7. Turn on the fifth switch S31 and the sixth switch S32 to make the output ramp signal a low-slope ramp signal. The voltage value of the node is the voltage value of the low-slope ramp signal plus the voltage value collected by the third capacitor C3. Comparator 1 is used to compare the voltage value of the node with the pixel signal voltage to obtain a fourth conversion value output at the flipping moment of comparator 1.

[0050] S8. Calculate the first conversion value, the second conversion value, the third conversion value, and the fourth conversion value to obtain an analog-to-digital conversion value. The calculation formula is as follows:

[0051] DN=k*(DN_C_S-DN_C_R)+(DN_F_S-DN_F_R)(1), where k is the ratio of the voltage values ​​of the low-slope ramp signal to the high-slope ramp signal, DN is the analog-to-digital conversion value, DN_C_R is the first conversion value, DN_F_R is the second conversion value, DN_C_S represents the third conversion value, and DN_F_S represents the fourth conversion value.

[0052] according to Figure 4 Next, the conversion timing of the high-speed analog-to-digital conversion device for the image sensor is described in detail. First, the first group of switches S1 and the second group of switches S2 are opened, and the comparator 1 outputs a low-level signal. At this time, the ramp signal is a high-slope ramp signal, and the initial voltage value of the high-slope ramp signal is lower than the voltage value of the pixel reset voltage. The comparator 1 compares the voltage value of the node with the pixel reset voltage. When the node voltage is greater than the voltage value of the pixel reset voltage, the comparator 1 output flips and outputs a high-level signal. The control unit 2 sends a signal to disconnect the second group of switches S2. The capacitor C3 collects the difference between the voltage value at the flipping moment and the reference signal, disconnects the first group of switches S1, and obtains the first conversion value. At this time, the comparator outputs a low-level signal and opens the third group of switches S3, so that the output ramp signal is a low-slope ramp signal. The voltage value of the node is the sum of the voltage value of the low-slope ramp signal and the voltage value collected by the third capacitor C3. When the node voltage is greater than the voltage value of the pixel reset voltage, the comparator 1 output flips and outputs a high-level signal, and the second conversion value output by the comparator 1 is obtained; the first group of switches S 1. The second and third switches S2 and S3 are reset, placing the pixel signal voltage at the comparator input. The first and second switches S1 and S2 are then reopened, and comparator 1 outputs a low-level signal. At this point, the ramp signal is a high-slope ramp signal, and the initial voltage value of the high-slope ramp signal is lower than the pixel signal voltage. Comparator 1 compares the voltage values ​​of the node and the pixel signal voltage. When the node voltage is greater than the pixel signal voltage, the comparator 1 output flips and outputs a high-level signal. Control unit 2 sends a signal to disconnect the second switch S2. Capacitor C3 collects the difference between the voltage value at the flipping moment and the reference signal, disconnects the first switch S1, and obtains a third conversion value. At this point, the comparator outputs a low-level signal and opens the third switch S3, making the output ramp signal a low-slope ramp signal. The node voltage value is the sum of the voltage value of the low-slope ramp signal and the voltage value collected by the third capacitor C3. When the node voltage is greater than the pixel signal voltage, the comparator 1 output flips and outputs a high-level signal, obtaining a fourth conversion value output by comparator 1.

[0053] The ramp signal's swing during the second conversion between the pixel reset voltage and the pixel signal voltage is smaller, and the ramp signal's voltage range is narrower, which improves the speed of analog-to-digital conversion. Because the pixel reset voltage and the pixel signal voltage are operated in the same manner, non-ideal factors such as circuit inconsistencies are effectively suppressed, meaning high-quality images can be achieved without any complex calibration.

[0054] Figure 6 The three conversion timing diagrams of the high-speed analog-to-digital conversion device for image sensors provided in accordance with an embodiment of the present invention are shown. Figure 3a The device shown achieves the correlated double sampling function by adjusting the input control signal. That is, the pixel reset voltage and pixel signal voltage are converted once using a high-slope signal, and the pixel reset voltage and pixel signal voltage are converted twice using a low-slope signal. The calculation formula is as follows:

[0055] DN=2k*(DN_C_S-DN_C_R)+(DN_F_S1-DN_F_R1+DN_F_S2-DN

[0056] _F_R2)(2),

[0057] Among them, DN_C_R is the first conversion value of the high slope signal of the pixel reset voltage, DN_F_R1 is the first conversion value of the low slope signal of the pixel reset voltage, DN_F_R2 is the second conversion value of the low slope signal of the pixel reset voltage, DN_C_S is the first conversion value of the high slope signal of the pixel signal voltage, DN_F_S1 is the first conversion value of the low slope signal of the pixel signal voltage, and DN_F_S2 is the second conversion value of the low slope signal of the pixel signal voltage. The correlated double sampling can reduce the noise of the analog-to-digital conversion.

[0058] In the description of this specification, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0059] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

[0060] The above specific embodiments of the present invention do not constitute a limitation on the scope of protection of the present invention. Any other corresponding changes and modifications made based on the technical concept of the present invention should be included in the scope of protection of the claims of the present invention.

Claims

1. A high-speed analog-to-digital conversion device for an image sensor, comprising a comparator, a first capacitor, a second capacitor, a third capacitor, a first group of switches, a second group of switches, a third group of switches, and a control unit, wherein the first group of switches comprises a first switch and a second switch, the second group of switches comprises a third switch and a fourth switch, and the third group of switches comprises a fifth switch and a sixth switch; characterized in that: in, One input end of the comparator is connected to the second switch, the second capacitor, the first switch in sequence, and then connected to the ramp signal; Another input terminal of the comparator is connected to the first capacitor and then connected to a pixel reset voltage or a pixel signal voltage, an output terminal of the comparator is connected to the control unit, and the control unit is used to control the third switch and the fourth switch; The third switch, the third capacitor and the fourth switch are connected in sequence between the ramp signal and the reference signal; One end of the fifth switch is connected between the ramp signal and the first switch, and the other end is connected between the third capacitor and the fourth switch; One end of the sixth switch is connected between the input end of the comparator and the second switch, and the other end is connected between the third capacitor and the third switch.

2. A conversion method for a high-speed analog-to-digital conversion device for an image sensor, implemented using the high-speed analog-to-digital conversion device for an image sensor according to claim 1, characterized in that: The conversion method includes the following steps: S1. Build the high-speed analog-to-digital conversion device for an image sensor according to claim 1, place the pixel reset voltage at the input end of the comparator, and ensure that the voltage difference between the first capacitor and the second capacitor is 0; S2. Close the first switch, the second switch, the third switch, and the fourth switch to output a high-slope ramp signal, wherein the initial voltage value of the high-slope ramp signal is less than the voltage value of the pixel reset voltage; use the comparator to compare the voltage value of the node with the pixel reset voltage and output a first conversion value; the node is the intersection of three branches where the second switch, the sixth switch, and the input terminal of the comparator are located; S3: When the voltage value of the node is greater than the voltage value of the pixel reset voltage, the comparator output flips, the control unit sends a signal to cut off the third switch and the fourth switch, the third capacitor collects the voltage difference between the signal voltage at the flipping moment and the reference signal, and disconnects the first switch and the second switch; S4. Turn on the fifth switch and the sixth switch to output a low-slope ramp signal. The voltage value of the node is the sum of the voltage value of the low-slope ramp signal and the voltage value collected by the third capacitor. The comparator compares the voltage value of the node with the pixel reset voltage to obtain a second conversion value output at the moment the comparator flips. S5. Open all switches, place the pixel signal voltage at the input of the comparator, close the first switch, the second switch, the third switch, and the fourth switch, so that the output ramp signal is a high-slope ramp signal, where the initial voltage value of the high-slope ramp signal is less than the voltage value of the pixel signal voltage, and use the comparator to compare the voltage value of the node with the pixel signal voltage, and output a third conversion value. S6. When the voltage value of the node is greater than the voltage value of the pixel signal voltage, the comparator output flips, the control unit sends a signal to cut off the third switch and the fourth switch, the third capacitor collects the voltage difference between the signal voltage at the flipping moment and the reference signal, and disconnects the first switch and the second switch; S7, turning on the fifth switch and the sixth switch so that the output ramp signal is a low-slope ramp signal, the voltage value of the node is the voltage value of the low-slope ramp signal plus the voltage value collected by the third capacitor, and using the comparator to compare the voltage value of the node with the pixel signal voltage to obtain a fourth conversion value output at the moment the comparator flips; S8. Calculate the first conversion value, the second conversion value, the third conversion value, and the fourth conversion value to obtain an analog-to-digital conversion value, using the following calculation formula: DN=k*(DN_C_S-DN_C_R)+(DN_F_S-DN_F_R)(1); Wherein, k is the ratio of the voltage values ​​of the low-slope ramp signal to the high-slope ramp signal, DN is the analog-to-digital conversion value, DN_C_R is the first conversion value, DN_F_R is the second conversion value, DN_C_S represents the third conversion value, and DN_F_S represents the fourth conversion value.

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