Method for manufacturing a semiconductor device and semiconductor device

Abstract

The application provides a semiconductor device manufacturing method and a semiconductor device. The method comprises the following steps: firstly, providing a first preliminary substrate comprising a substrate and an ion shielding layer, and a second preliminary substrate comprising a sacrificial substrate, a top layer silicon and an oxide layer which are stacked in sequence; then, bonding the first preliminary substrate and the second preliminary substrate with the ion shielding layer and the oxide layer as a bonding interface, and removing the sacrificial substrate so that the top layer silicon is exposed; after that, forming a first preliminary device and a second device which are arranged at intervals on the exposed surface of the substrate respectively, and the oxide layer on both sides of the first preliminary device is exposed; finally, removing part of the oxide layer on both sides of the first preliminary device and part of the ion shielding layer so that the substrate on both sides of the first preliminary device is exposed, and a first device is obtained. By forming the first device and the second device which are arranged at intervals, the integration of the semiconductor device is ensured to be high, and the purpose of reducing the size of the device is achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor, in particular to a semiconductor device manufacturing method and semiconductor device. BACKGROUND

[0002] It is difficult to obtain high-quality SiO2 meeting the requirement of gate oxide thickness on SiC using traditional oxidation technology, so the gate oxide of SiC-based MOS device is usually manufactured by epitaxial growth. The quality of gate oxide material prepared by epitaxy is poor, which seriously restricts the improvement of SiC-based MOS device performance.

[0003] In addition, in the actual application process, the chip technology has been shrinking the geometry to improve performance, but the size compression requires high equipment and process.

[0004] The above information disclosed in the background section is only used to enhance the understanding of the background of the technology described herein, therefore, the background section can contain some information which is not considered as prior art by those skilled in the art in the country. SUMMARY

[0005] The main purpose of the present application is to provide a semiconductor device manufacturing method and semiconductor device, so as to solve the problems of poor quality of SiO2 obtained by growing on SiC substrate and low chip integration in the prior art.

[0006] In order to achieve the purpose, according to one aspect of the present application, a semiconductor device manufacturing method is provided, comprising: providing a first preliminary substrate and a second preliminary substrate, the first preliminary substrate comprising a substrate and an ion shielding layer, and the second preliminary substrate comprising a sacrificial substrate, a top layer of silicon and an oxide layer which are stacked in sequence; bonding the first preliminary substrate and the second preliminary substrate with the ion shielding layer and the oxide layer as the bonding interface, and removing the sacrificial substrate to expose the top layer of silicon; forming first and second preliminary devices arranged at intervals on the exposed surface of the substrate, and the oxide layer on both sides of the first preliminary device is exposed; removing part of the oxide layer and part of the ion shielding layer on both sides of the first preliminary device to expose the substrate on both sides of the first preliminary device, thereby obtaining a first device.

[0007] Optionally, the method further comprises: forming a gate oxide layer on the exposed surface of the top layer of silicon; forming a first preliminary gate on the exposed surface of the top layer of silicon and a second gate on the exposed surface of the gate oxide layer; removing the top layer of silicon on both sides of the first preliminary gate so that the gate oxide layer on both sides of the first preliminary gate is exposed, and the remaining first preliminary gate and the top layer of silicon form a first gate; forming a first doped region in the substrate on both sides of the first gate to obtain a first preliminary device, and forming a second doped region in the top layer of silicon on both sides of the second gate to obtain a second device.

[0008] Optionally, before forming the gate oxide layer on the exposed surface of the top layer of silicon, the method further comprises: removing part of the top layer of silicon, part of the oxide layer, part of the ion shielding layer, and part of the substrate to form an isolation groove in the top layer of silicon, the oxide layer, the ion shielding layer, and the substrate; and filling a dielectric material in the isolation groove to form an isolation structure, the first device and the second device being located on both sides of the isolation structure, respectively.

[0009] Optionally, forming the gate oxide layer on the exposed surface of the top layer of silicon comprises: oxidizing the exposed surface of the top layer of silicon to form the gate oxide layer.

[0010] Optionally, forming the first preliminary gate on the exposed surface of the top layer of silicon and forming the second gate on the exposed surface of the gate oxide layer comprises: forming a gate layer on the exposed surface of the top layer of silicon and on the exposed surface of the gate oxide layer; forming a patterned mask layer on the exposed surface of the gate layer; and etching the gate layer with the patterned mask layer as a mask so that part of the surface of the gate oxide layer is exposed to form the second gate, and part of the top layer of silicon is exposed to form the first preliminary gate.

[0011] Optionally, removing the top layer of silicon on both sides of the first preliminary gate so that the gate oxide layer on both sides of the first preliminary gate is exposed, and the remaining first preliminary gate and the top layer of silicon form a first gate comprises: forming a protective material on the exposed surface of the second gate and on the exposed surface of the gate oxide layer; removing part of the top layer of silicon so that the gate oxide layer on both sides of the first preliminary gate is exposed to obtain the first gate; and removing the protective material.

[0012] Optionally, after forming the first doped region in the substrate on both sides of the first gate to obtain the first preliminary device and forming the second doped region in the top silicon layer on both sides of the second gate to obtain the second device, the method further comprises: removing the gate oxide layer on both sides of the second gate so that the surface of the second doped region away from the substrate is exposed to obtain the second device.

[0013] Optionally, after removing the top silicon layer, the oxide layer and the ion shielding layer on both sides of the first preliminary device to expose the substrate on both sides of the first preliminary device to obtain the first device, the method further comprises: forming a first sidewall on the exposed sidewall of the first device and forming a second sidewall on the exposed sidewall of the second device to obtain an intermediate structure; forming an interlayer dielectric layer on the exposed surface of the intermediate structure; forming a first metal line in the interlayer dielectric layer penetrating to the surface of the first doped region close to the interlayer dielectric layer and forming a second metal line in the interlayer dielectric layer penetrating to the surface of the second doped region away from the substrate.

[0014] Optionally, the material of the substrate comprises SiC, the material of the ion shielding layer comprises SiON and the material of the oxide layer comprises silicon oxide.

[0015] According to another aspect of the present application, a semiconductor device is provided, which is obtained by using any of the above methods.

[0016] According to the technical scheme, the method for manufacturing the semiconductor device comprises the following steps: providing a first preliminary substrate comprising a substrate and an ion shielding layer, and a second preliminary substrate comprising a sacrificial substrate, a top layer of silicon and an oxide layer which are stacked in sequence; bonding the first preliminary substrate and the second preliminary substrate by taking the ion shielding layer and the oxide layer as a bonding interface, and removing the sacrificial substrate so that the top layer of silicon is exposed; forming a first preliminary device and a second device which are arranged at intervals on the exposed surface of the substrate, and the oxide layer on both sides of the first preliminary device is exposed; and removing the oxide layer on both sides of the first preliminary device and part of the ion shielding layer so that the substrate on both sides of the first preliminary device is exposed, thereby obtaining a first device. Compared with the prior art, the method for manufacturing the semiconductor device grows the oxide layer on the top layer of silicon, and then transfers the oxide layer to the substrate by the bonding process, so that the oxide layer with good quality is formed on the substrate. In addition, the ion shielding layer is formed on the substrate and the oxide layer, the ion shielding layer can shield the influence of the substrate on the oxide layer, so that the performance of the semiconductor device is good. Furthermore, the first device and the second device which are arranged at intervals are formed, so that the integration of the semiconductor device is high, and the purpose of reducing the size of the device is achieved. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings, which form a part of the present application, are included to provide a further understanding of the application, and are incorporated herein for purposes of illustrating the illustrative embodiments of the present application and the explanations provided herein. In the drawings:

[0018] Figure 1 A flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present application is shown;

[0019] Figures 2 to 13 Structural schematic diagrams of a method for manufacturing a semiconductor device according to an embodiment of the present application are shown.

[0020] In the above drawings, the following reference signs are used:

[0021] 10, first preliminary substrate; 20, second preliminary substrate; 30, first preliminary device; 40, second device; 50, first device; 60, isolation groove; 70, isolation structure; 80, first side wall; 90, second side wall; 101, substrate; 102, ion shielding layer; 110, interlayer dielectric layer; 120, first metal line; 130, second metal line; 201, sacrificial substrate; 202, top layer of silicon; 203, oxide layer; 204, gate oxide layer; 205, first preliminary gate; 206, second gate; 207, first gate; 208, gate layer; 209, patterned mask layer; 210, protective material; 211, nitride material; 212, top layer of silicon portion; 213, gate oxide portion; 214, first oxide portion; 215, first ion shielding portion; 216, second oxide portion; 217, second ion shielding portion. DETAILED DESCRIPTION

[0022] It should be noted that the following detailed description is merely exemplary in nature and is not intended to limit the application according to the application. Unless otherwise indicated, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0023] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and / or groups thereof.

[0024] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. In addition, when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements can also be present.

[0025] As introduced in the background section, the prior art has the problem of poor quality of SiO2 grown on SiC substrate and low chip integration, in order to solve the above, the application provides a semiconductor device manufacturing method and semiconductor device.

[0026] According to an embodiment of the application, a semiconductor device manufacturing method is provided.

[0027] Figure 1 is a flowchart of the semiconductor device manufacturing method according to an embodiment of the application. As shown in Figure 1 the method comprises the following steps:

[0028] Step S101, as follows Figure 2 As shown, a first pre-substrate 10 and a second pre-substrate 20 are provided. The first pre-substrate 10 includes a substrate 101 and an ion shielding layer 102. The second pre-substrate 20 includes a sacrificial substrate 201, a top silicon layer 202 and an oxide layer 203 stacked sequentially.

[0029] Step S102, as follows Figure 3 As shown, the first pre-substrate 10 and the second pre-substrate 20 are bonded using the ion shielding layer 102 and the oxide layer 203 as bonding interfaces, and the sacrificial substrate 201 is removed, so that the top silicon 202 is exposed.

[0030] Step S103, as follows Figure 11 As shown, a first preparatory device 30 and a second device 40 are respectively formed at intervals on the exposed surface of the above-mentioned substrate, and the oxide layer 203 on both sides of the first preparatory device 30 is exposed.

[0031] Step S104, as follows Figure 12 As shown, the oxide layer 203 and part of the ion shielding layer 102 on both sides of the first preparatory device 30 are removed to expose the substrate 101 on both sides of the first preparatory device 30, thereby obtaining the first device 50.

[0032] The method for manufacturing the semiconductor device comprises the following steps: firstly, providing a first preliminary substrate comprising a substrate and an ion shielding layer, and a second preliminary substrate comprising a sacrificial substrate, a top layer of silicon and an oxide layer which are sequentially stacked; then, bonding the first preliminary substrate and the second preliminary substrate with the ion shielding layer and the oxide layer as the bonding interface, and removing the sacrificial substrate so that the top layer of silicon is exposed; after that, forming a first preliminary device and a second device which are arranged at intervals on the exposed surface of the substrate, and the oxide layer on both sides of the first preliminary device is exposed; finally, removing the oxide layer on both sides of the first preliminary device and part of the ion shielding layer so that the substrate on both sides of the first preliminary device is exposed, and a first device is obtained. Compared with the prior art which has the problem of poor quality of SiO2 grown on a SiC substrate, the method for manufacturing the semiconductor device of the present application grows the oxide layer on the top layer of silicon, and then transfers the oxide layer to the substrate through the bonding process, so that the oxide layer with good quality is formed on the substrate. In addition, the ion shielding layer is formed on the substrate and the oxide layer, the ion shielding layer can shield the influence of the substrate on the oxide layer, so that the performance of the semiconductor device is good. Meanwhile, the first device and the second device which are arranged at intervals are formed, so that the integration of the semiconductor device is high, and the purpose of reducing the size of the device is achieved.

[0033] According to a specific embodiment of the present application, the step of forming the first preliminary device and the second device which are arranged at intervals on the exposed surface of the substrate comprises the following steps: as shown in Figure 6 , a gate oxide layer 204 is formed on part of the exposed surface of the top layer of silicon 202; as shown in Figure 9 , a first preliminary gate 205 is formed on part of the exposed surface of the top layer of silicon 202, and a second gate 206 is formed on part of the exposed surface of the gate oxide layer 204; the top layer of silicon 202 on both sides of the first preliminary gate 205 is removed so that the oxide layer 203 on both sides of the first preliminary gate 205 is exposed, and the remaining first preliminary gate 205 and the top layer of silicon 202 form a first gate 207 as shown in Figure 10 ; as shown in Figure 11 , a first doped region is formed in the substrate 101 on both sides of the first gate 207 to obtain a first preliminary device 30, and a second doped region is formed in the top layer of silicon 202 on both sides of the second gate 206 to obtain a second device 40. By forming the second device on the top layer of silicon and the first device on the substrate, the integration of the semiconductor device is further improved.

[0034] According to another specific embodiment of the present application, before the step of forming the gate oxide layer 204 on part of the exposed surface of the top layer of silicon 202, the method further comprises the following steps: as shown inFigure 4 As shown, a portion of the top silicon 202, a portion of the oxide layer 203, a portion of the ion shielding layer 102, and a portion of the substrate 101 are removed to form an isolation trench 60 located in the top silicon 202, the oxide layer 203, the ion shielding layer 102, and the substrate 101; as Figure 5 As shown, dielectric material is filled into the aforementioned isolation groove 60 to form an isolation structure 70, as... Figure 12 As shown, the first device 50 and the second device 40 are located on opposite sides of the isolation structure 70. By forming the isolation structure between the first device and the second device, good electrical isolation between the first device and the second device is ensured.

[0035] According to another specific embodiment of this application, as shown in the figure, a gate oxide layer 204 is formed on the partially exposed surface of the top silicon 202, including: Figure 6 As shown, the exposed surface of the top silicon 202 is oxidized to form the gate oxide layer 204. By oxidizing the exposed surface of the top silicon to form the gate oxide layer, the formation of the gate oxide layer can be made relatively easily. Of course, the method for forming the gate oxide layer is not limited to the method described above. Those skilled in the art can also use other existing technologies to form the gate oxide layer, such as depositing oxide materials on the exposed surface of the top silicon.

[0036] In one specific embodiment, such as Figure 6 As shown, before oxidizing a portion of the exposed surface of the top silicon to form the gate oxide layer, the method further includes: forming a nitride material 211 on the exposed surface of the top silicon 202 that does not need to be oxidized; etching a portion of the nitride material 211; and removing the nitride material 211 after forming the gate oxide layer 204. The nitride material can protect other exposed surfaces of the top silicon from oxidation during the subsequent formation of the gate oxide layer.

[0037] To further simplify the fabrication process of the aforementioned semiconductor device, according to a specific embodiment of this application, a first pre-gate 205 is formed on a portion of the exposed surface of the top silicon 202, and a second gate 206 is formed on a portion of the exposed surface of the gate oxide layer 204, including: Figure 7 As shown, a gate layer 208 is formed on the exposed surface of the top silicon layer 202 and the exposed surface of the gate oxide layer 204; as Figure 8 As shown, a patterned mask layer 209 is formed on the exposed surface of the gate layer 208; as Figure 9As shown in Fig. 2, the gate layer 208 is etched by using the patterned mask layer 209 as a mask, so that part of the surface of the gate oxide layer 204 is exposed, forming the second gate 206, and part of the top silicon layer 202 is exposed, forming the first preliminary gate 205; and the patterned mask layer is removed.

[0038] Specifically, after forming the gate layer, before forming the patterned mask layer on the exposed surface of the gate layer, the method further comprises: performing a planarization treatment on the gate layer.

[0039] According to another specific embodiment of the present application, removing the top silicon layer 202 on both sides of the first preliminary gate 205 so that the oxide layer 203 on both sides of the first preliminary gate 205 is exposed, and the remaining first preliminary gate 205 and the top silicon layer 202 form the first gate 207, comprises: Figure 9 and Figure 10 As shown in Fig. 3, a protective material 210 is formed on the exposed surface of the second gate 206 and the exposed surface of the gate oxide layer 204; part of the top silicon layer 202 is removed so that the oxide layer 203 on both sides of the first preliminary gate 205 is exposed, obtaining the first gate 207, and the remaining top silicon layer 202 forms a top silicon part 212; and the protective material 210 is removed. Figure 11 Before forming the first gate, forming a protective material on the exposed surface of the second gate and the exposed surface of the gate oxide layer can ensure that the second device is not affected.

[0040] According to still another specific embodiment of the present application, as shown in Fig. 4, forming a first doped region in the substrate 101 on both sides of the first gate 207 to obtain a first preliminary device 30, and forming a second doped region in the top silicon layer 202 on both sides of the second gate 206 to obtain a second device 40, comprises: Figure 11 As shown in Fig. 4, forming the first doped region in the substrate 101 on both sides of the first gate 207 to obtain the first preliminary device 30, and forming the second doped region in the top silicon layer 202 on both sides of the second gate 206; and Figure 12 As shown in Fig. 5, removing the gate oxide layer 204 on both sides of the second gate 206 so that the surface of the second doped region away from the substrate 101 is exposed, and the remaining gate oxide layer 204 forms a gate oxide part 213, obtaining the second device 40. Forming the first doped region and the second doped region before etching the gate oxide layer ensures that the surface damage is small.

[0041] Specifically, the first doped region and the second doped region are formed by ion implantation.

[0042] Specifically, as shown in Fig. 4, the first doped region and the second doped region are formed by ion implantation. Figures 12 to 13As shown, the first device 50 further comprises a first oxide layer 214 and a first ion shield layer 215, and the second device 40 further comprises a second oxide layer 216 and a second ion shield layer 217, wherein the first oxide layer 214 is between the first gate 207 and the substrate 101, the first ion shield layer 215 is between the first oxide layer 214 and the substrate 101, the second oxide layer 216 is between the top silicon layer 212 and the substrate 101, and the second ion shield layer 217 is between the second oxide layer 216 and the substrate 101.

[0043] According to a specific embodiment of the present application, after removing the top silicon layer, the oxide layer and the ion shield layer on both sides of the first preliminary device to expose the substrate on both sides of the first preliminary device, a first device is obtained, and the method further comprises: Figures 12 to 13 As shown, a first side wall 80 is formed on the exposed sidewall of the first device 50, and a second side wall 90 is formed on the exposed sidewall of the second device 40 to obtain an intermediate structure; an interlayer dielectric layer 110 is formed on the exposed surface of the intermediate structure; a first metal line 120 is formed in the interlayer dielectric layer 110 to penetrate the first doped region and reach the surface of the interlayer dielectric layer 110, and a second metal line 130 is formed in the interlayer dielectric layer 110 to penetrate the second doped region and reach the surface of the substrate 101. The side walls play an isolation role between the interlayer dielectric layer and the sidewall of the device, further ensuring that the semiconductor device has a high integration level, and the metal lines realize electrical interconnection between the devices.

[0044] According to another specific embodiment of the present application, the material of the substrate comprises SiC, the material of the ion shield layer comprises SiON, and the material of the oxide layer comprises silicon oxide.

[0045] Specifically, the material of the substrate is SiC, the material of the ion shield layer is SiON, and the material of the oxide layer is silicon oxide.

[0046] In a specific embodiment, SiC is used as the substrate, on the one hand, the high-quality oxide layer is used as the gate oxide layer of the SiC-based first device, which solves the problem of poor quality of SiO2 grown on the SiC substrate in the prior art, ensures high carrier mobility of the channel of the semiconductor device, and ensures that the semiconductor device has high breakdown voltage, high operating frequency, high current density and other advantages, on the other hand, the SiC substrate has better heat dissipation performance than Si, which further ensures that the semiconductor device has good performance; the SiON is used as the material of the ion shielding layer, which ensures that C ions in the SiC cannot be injected into the oxide layer, and further ensures that the semiconductor device has high reliability.

[0047] In a specific embodiment, the second device can be an active device or a passive device, which can be selected according to actual needs.

[0048] According to the embodiments of the present application, a semiconductor device is also provided, which is obtained by using any of the above methods.

[0049] The semiconductor device is obtained by using any of the above methods, compared with the poor quality of SiO2 grown on the SiC substrate in the prior art, the semiconductor device of the present application grows an oxide layer on the top silicon, and then transfers the oxide layer to the substrate through a bonding process, which ensures that a high-quality oxide layer is formed on the substrate, in addition, the ion shielding layer is formed on the substrate and the oxide layer, the ion shielding layer can shield the influence of the substrate on the oxide layer, which ensures that the semiconductor device has good performance, at the same time, by forming the first device and the second device arranged at intervals, the integration of the semiconductor device is high, which realizes the purpose of reducing the size of the device.

[0050] In the above embodiments of the present application, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0051] From the above description, it can be seen that the embodiments of the present application achieve the following technical effects:

[0052] 1) The semiconductor device manufacturing method of the present application, first, a first preliminary substrate comprising a substrate and an ion shielding layer and a second preliminary substrate comprising a sacrificial substrate, a top layer of silicon and an oxide layer stacked in sequence are provided; then, the first preliminary substrate and the second preliminary substrate are bonded with the ion shielding layer and the oxide layer as the bonding interface, and the sacrificial substrate is removed to expose the top layer of silicon; then, a first preliminary device and a second device are formed on the exposed surface of the substrate, and the oxide layer on both sides of the first preliminary device is exposed; finally, the oxide layer on both sides of the first preliminary device and part of the ion shielding layer are removed to expose the substrate on both sides of the first preliminary device, and a first device is obtained. Compared with the poor quality of SiO2 grown on a SiC substrate in the prior art, the semiconductor device manufacturing method of the present application grows an oxide layer on a top layer of silicon, and then transfers the oxide layer to a substrate through a bonding process, which ensures that a high-quality oxide layer is formed on the substrate. In addition, the ion shielding layer is formed on the substrate and the oxide layer, which can shield the influence of the substrate on the oxide layer, ensuring that the semiconductor device has good performance. At the same time, by forming the first and second devices arranged at intervals, the integration of the semiconductor device is high, and the purpose of reducing the size of the device is achieved.

[0053] 2) The semiconductor device of the present application is made by any of the above methods. Compared with the poor quality of SiO2 grown on a SiC substrate in the prior art, the semiconductor device of the present application grows an oxide layer on a top layer of silicon, and then transfers the oxide layer to a substrate through a bonding process, which ensures that a high-quality oxide layer is formed on the substrate. In addition, the ion shielding layer is formed on the substrate and the oxide layer, which can shield the influence of the substrate on the oxide layer, ensuring that the semiconductor device has good performance. At the same time, by forming the first and second devices arranged at intervals, the integration of the semiconductor device is high, and the purpose of reducing the size of the device is achieved.

[0054] The above is only a preferred embodiment of the present application and is not intended to limit the present application. Those skilled in the art can make various changes and modifications to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method of manufacturing a semiconductor device, characterized by, The method comprises the following steps: providing a first preliminary substrate and a second preliminary substrate, the first preliminary substrate comprising a substrate and an ion shielding layer, and the second preliminary substrate comprising a sacrificial substrate, a top silicon layer and an oxide layer which are sequentially stacked; bonding the first preliminary substrate and the second preliminary substrate with the ion shielding layer and the oxide layer as a bonding interface, and removing the sacrificial substrate so that the top silicon layer is exposed; forming a gate oxide layer on a partially exposed surface of the top silicon layer; forming a first preliminary gate on the partially exposed surface of the top silicon layer and a second gate on the partially exposed surface of the gate oxide layer; removing the top silicon layer on both sides of the first preliminary gate so that the oxide layer on both sides of the first preliminary gate is exposed, and the remaining first preliminary gate and top silicon layer form a first gate; forming a first doped region in the substrate on both sides of the first gate to obtain a first preliminary device, and forming a second doped region in the top silicon layer on both sides of the second gate to obtain a second device, the first preliminary device and the second device being arranged at intervals, and the oxide layer on both sides of the first preliminary device being exposed; removing part of the oxide layer and part of the ion shielding layer on both sides of the first preliminary device so that the substrate on both sides of the first preliminary device is exposed to obtain a first device.

2. The method of claim 1, wherein, Before the step of forming a gate oxide layer on a partially exposed surface of the top silicon layer, the method further comprises: removing part of the top silicon layer, part of the oxide layer, part of the ion shielding layer and part of the substrate to form an isolation groove in the top silicon layer, the oxide layer, the ion shielding layer and the substrate; filling a dielectric material in the isolation groove to form an isolation structure, and the first device and the second device being located on both sides of the isolation structure, respectively.

3. The method of claim 1, wherein, The step of forming a gate oxide layer on a partially exposed surface of the top silicon layer comprises: oxidizing the partially exposed surface of the top silicon layer to form the gate oxide layer.

4. The method of claim 1, wherein, The step of forming a first preliminary gate on a partially exposed surface of the top silicon layer and a second gate on a partially exposed surface of the gate oxide layer comprises: forming a gate layer on the exposed surface of the top silicon layer and the exposed surface of the gate oxide layer; forming a patterned mask layer on the exposed surface of the gate layer; etching the gate layer with the patterned mask layer as a mask so that part of the surface of the gate oxide layer is exposed to form the second gate, and part of the top silicon layer is exposed to form the first preliminary gate.

5. The method of claim 4, wherein, The step of removing the top silicon layer on both sides of the first preliminary gate so that the oxide layer on both sides of the first preliminary gate is exposed, and the remaining first preliminary gate and top silicon layer form a first gate comprises: forming a protective material on the exposed surface of the second gate and the exposed surface of the gate oxide layer; removing part of the top silicon layer so that the oxide layer on both sides of the first preliminary gate is exposed to obtain the first gate; removing the protective material.

6. The method of claim 1, wherein, forming first doped regions in the substrate on both sides of the first gate to obtain a first preliminary device, and forming second doped regions in the top silicon layer on both sides of the second gate to obtain a second device, comprising: forming the first doped regions in the substrate on both sides of the first gate to obtain the first preliminary device, and forming the second doped regions in the top silicon layer on both sides of the second gate; removing the gate oxide layer on both sides of the second gate so that the surface of the second doped regions away from the substrate is exposed to obtain the second device.

7. The method of claim 1, wherein, After removing the top silicon layer, the oxide layer and the ion shield layer on both sides of the first preliminary device to expose the substrate on both sides of the first preliminary device to obtain a first device, the method further comprises: forming first side walls on the exposed sidewalls of the first device, and forming second side walls on the exposed sidewalls of the second device to obtain an intermediate structure; forming an interlayer dielectric layer on the exposed surface of the intermediate structure; forming a first metal line in the interlayer dielectric layer penetrating to the surface of the first doped regions close to the interlayer dielectric layer, and forming a second metal line in the interlayer dielectric layer penetrating to the surface of the second doped regions away from the substrate.

8. The method according to any one of claims 1 to 7, characterized in that, The material of the substrate comprises SiC, the material of the ion shield layer comprises SiON, and the material of the oxide layer comprises silicon oxide.

9. A semiconductor device, characterized by comprising: The semiconductor device is obtained by the method of any one of claims 1 to 8. The material of the substrate comprises SiC, the material of the ion shield layer comprises SiON, and the material of the oxide layer comprises silicon oxide. The semiconductor device is obtained by the method of any one of claims 1 to 8.

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