Ultra-wideband low noise amplifier based on noise cancellation and body bias technology

Abstract

The present application discloses an ultra-wideband low-noise amplifier based on noise cancellation and body bias technology, comprising an STD circuit and an NC circuit, wherein the STD circuit comprises a single-ended signal input terminal, a differential signal output terminal and a plurality of mutually connected MOS amplifier tubes, the MOS amplifier tube being used to amplify the single-ended signal and output the differential signal at two differential signal output terminals; the NC circuit comprises two differential signal input terminals, an output terminal and a plurality of MOS balance tubes, the plurality of MOS balance tubes being used to cancel the common-mode noise included in the differential signal, wherein the STD circuit and the NC circuit are combined in the form of current multiplexing; symmetrical MOS amplifier tubes are connected in parallel, and symmetrical MOS balance tubes are connected in parallel. According to the technical solution of the present application, by setting the STD circuit and the NC circuit, the single-ended noise signal of the amplifier tube is converted into a common-mode noise signal and then subjected to noise reduction, thereby realizing noise cancellation; the power supply voltage can be reduced by the body bias technology, and the bias circuit is omitted at the same time, thereby further achieving the purpose of reducing noise and reducing power consumption.

Description

Technical Field

[0001] The present application relates to the technical field of radio frequency integrated circuits, and in particular to an ultra-wideband low noise amplifier based on noise cancellation and body bias technology. Background Art

[0002] In the past few years, the demand for high-speed wireless communication systems has been growing. UWB (Ultra Wide Band) is popular as a new technology with low power consumption and high data rate transmission. LNA (Low Noise Amplifier) ​​is the first important module in the UWB receiver architecture. It amplifies the weak RF (Radio Frequency) signal from the antenna with minimal noise contribution and suppresses noise for subsequent circuit modules.

[0003] CMOS technology is considered to be a suitable solution, with its low manufacturing cost, ultra-high integration, and ultra-high cost-effectiveness in terms of inductor quality factor and cut-off frequency. Among the various LNA structures based on CMOS technology that have been proposed, the basic structures are common source and common gate structures. For broadband input impedance matching, for example, the resistive feedback amplifier achieves input impedance matching over a wider bandwidth, but this structure reduces the gain at high frequencies. Linearity is one of the most important parameters in high-frequency systems, and nonlinear effects include harmonic distortion, gain reduction, cross-modulation, and intermodulation. The minimum and maximum input levels within the dynamic range depend on noise and nonlinearity, respectively. For this reason, the present application proposes a UWB front-end broadband LNA based on noise cancellation and high linearity. Summary of the invention

[0004] The embodiment of the present application provides an ultra-wideband low noise amplifier based on noise cancellation and body bias technology. By designing STD circuit and NC circuit, low noise, low power consumption and high linearity are combined together to realize a single-ended to differential low noise amplifier.

[0005] The embodiment of the present application provides an ultra-wideband low noise amplifier based on noise cancellation and body bias technology, including:

[0006] A STD circuit, the STD circuit comprising a single-ended signal input terminal, two differential signal output terminals and a plurality of MOS amplifiers connected to each other, the MOS amplifiers being used to amplify the single-ended signal inputted from the single-ended signal input terminal and output differential signals extracted from the single-ended signal at the two differential signal output terminals;

[0007] The NC circuit comprises two differential signal input terminals, one output terminal and a plurality of MOS balancing tubes, wherein the plurality of MOS balancing tubes are used to offset the common mode noise included in the differential signal inputted by the differential signal input terminals, wherein the STD circuit and the NC circuit are combined in the form of current multiplexing; the symmetrical MOS amplifying tubes are connected in parallel, and the symmetrical MOS balancing tubes are connected in parallel.

[0008] The ultra-wideband low-noise amplifier based on noise cancellation and body bias technology of the embodiment of the present application includes an STD circuit and an NC circuit. The STD circuit includes a single-ended signal input terminal, two differential signal output terminals and a plurality of MOS amplifier tubes connected to each other. The MOS amplifier tube is used to amplify the single-ended signal inputted by the single-ended signal input terminal and output the differential signal extracted from the single-ended signal at the two differential signal output terminals. The NC circuit includes two differential signal input terminals, two output terminals and a plurality of MOS balancing tubes. The plurality of MOS balancing tubes are used to cancel the differential signal output terminals. The common-mode noise included in the differential signal input at the input end, wherein the STD circuit and the NC circuit are combined in the form of current multiplexing; the symmetrical MOS amplifier tubes are connected in parallel, and the symmetrical MOS balance tubes are connected in parallel. According to the technical solution of the present application, by setting the STD circuit and the NC circuit, the single-ended signal is converted into a common-mode signal and then noise reduction is performed, thereby realizing noise cancellation, and since the symmetrical MOS amplifier tubes are connected in parallel and the symmetrical MOS balance tubes are connected in parallel, the power supply voltage can be reduced through the body bias technology, and the bias circuit is omitted, thereby further achieving the purpose of reducing noise and reducing power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a structural schematic diagram of an ultra-wideband low noise amplifier based on noise cancellation and body bias technology provided by an embodiment of the present application;

[0010] Figure 2 It is a noise cancellation schematic diagram of M1 of the STD circuit in an ultra-wideband low noise amplifier based on noise cancellation and body bias technology provided by one embodiment of the present application;

[0011] Figure 3 It is a structural schematic diagram of a STD circuit in an ultra-wideband low noise amplifier based on noise cancellation and body bias technology provided by an embodiment of the present application;

[0012] Figure 4 It is a schematic diagram of noise cancellation of an NC circuit in an ultra-wideband low noise amplifier based on noise cancellation and body bias technology provided by another embodiment of the present application;

[0013] Figure 5It is a noise cancellation schematic diagram of M2 of the STD circuit in an ultra-wideband low noise amplifier based on noise cancellation and body bias technology provided by another embodiment of the present application;

[0014] Figure 6 is a structural schematic diagram of an ultra-wideband low noise amplifier based on noise cancellation and body bias technology provided by another embodiment of the present application;

[0015] Figure 7 It is a structural schematic diagram of an ultra-wideband low noise amplifier based on noise cancellation and body bias technology provided by another embodiment of the present application;

[0016] Figure 8 is a structural schematic diagram of an ultra-wideband low noise amplifier based on noise cancellation and body bias technology provided by yet another embodiment of the present application;

[0017] Fig. 9 It is a structural schematic diagram of a PMOS amplifier tube and an NMOS amplifier tube in an ultra-wideband low-noise amplifier based on noise cancellation and body bias technology provided by another embodiment of the present application;

[0018] Fig.10 It is a structural schematic diagram of a dual NMOS amplifier tube in an ultra-wideband low-noise amplifier based on noise cancellation and body bias technology provided in yet another embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0020] It should be noted that the terms "first", "second", etc. are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0021] In the past few years, the demand for high-speed wireless communication systems has continued to grow. UWB (Ultra Wide Band) is a new technology that is popular as a low-power and high-data-rate transmission technology. It is mainly targeted at applications in real-time positioning systems, mobile applications (including smartphones, wearable devices, consumer tags, etc.), automobiles, and smart homes. It can provide seamless connections between consumer electronic devices to transmit video, audio, and other high-bandwidth data. In the current era of the Internet of Everything, indoor positioning and local area network communications are booming, and UWB research is experiencing a new wave. In recent years, UWB-related research has gradually become a research hotspot in academia and industry.

[0022] LNA (Low Noise Amplifier) ​​is the first important module in the UWB receiver architecture. It amplifies the weak RF (Radio Frequency) signal of the antenna with minimal noise contribution and suppresses noise for subsequent circuit modules. As the front end of UWB, LNA is gradually developing towards low power consumption, low noise and high linearity. CMOS technology is considered to be a suitable solution, with its low manufacturing cost, ultra-high integration, and ultra-high cost performance in terms of inductor quality factor (Q) and cut-off frequency. In recent years, with the advent of the 5G era, products are developing towards miniaturization and low power consumption. At the same time, the channels are becoming more and more crowded, and the requirements for linearity are becoming higher and higher. Researchers are constantly weighing gain, stability, noise figure, linearity, input and output impedance matching, and power consumption to design high-performance LNA. Among the various LNA structures based on CMOS technology that have been proposed, the basic structures are common source and common gate structures. For broadband input impedance matching, for example, the resistive feedback amplifier achieves input impedance matching over a wider bandwidth, but this structure reduces the gain at high frequencies. In order to reduce power consumption, the current multiplexing structure is one of the appropriate methods to build the RF front end and reduce power consumption. Linearity is one of the most important parameters in high-frequency systems. Nonlinear effects include harmonic distortion, gain reduction, cross-modulation, and intermodulation. The minimum and maximum input levels within the dynamic range depend on noise and nonlinearity, respectively. Therefore, the linearity index has become increasingly important in research in recent years.

[0023] To this end, the present application proposes an ultra-wideband low noise amplifier based on noise cancellation and body bias technology. It can be understood that body bias technology refers to the use of body effect principle to adjust the difference in substrate voltage. The present application integrates the current development trend of communications and combines low noise, low power consumption and high linearity to realize a broadband LNA with STD (Single-ended signal To Differential signal) circuit and NC (Noise Canceling) circuit.

[0024] The present application provides an ultra-wideband low-noise amplifier based on noise cancellation and body bias technology, including an STD circuit and an NC circuit, wherein the STD circuit includes a single-ended signal input terminal, two differential signal output terminals and a plurality of mutually connected MOS amplifier tubes, the MOS amplifier tube being used to amplify the single-ended signal inputted by the single-ended signal input terminal, and outputting the differential signal extracted from the single-ended signal at the two differential signal output terminals; the NC circuit includes two differential signal input terminals, an output terminal and a plurality of MOS balance tubes, the plurality of MOS balance tubes being used to cancel the common-mode noise included in the differential signal inputted by the differential signal input terminal, wherein the STD circuit and the NC circuit are combined in the form of current multiplexing; symmetrical MOS amplifier tubes are connected in parallel, and symmetrical MOS balance tubes are connected in parallel. According to the technical solution of the present application, by setting the STD circuit and the NC circuit, the single-ended signal is converted into a common-mode noise signal and then noise reduction is performed, thereby realizing noise cancellation, and since the symmetrical MOS amplifier tubes are connected in parallel and the symmetrical MOS balance tubes are connected in parallel, the power supply voltage can be reduced by the body bias technology, and the bias circuit is omitted, thereby further achieving the purpose of reducing noise and reducing power consumption.

[0025] The embodiments of the present application are further described below in conjunction with the accompanying drawings.

[0026] like Figure 1 As shown, Figure 1 It is a structural schematic diagram of an ultra-wideband low-noise amplifier based on noise cancellation and body bias technology provided by an embodiment of the present application. The ultra-wideband low-noise amplifier based on noise cancellation and body bias technology includes an STD circuit and an NC circuit. The STD circuit includes a single-ended signal input terminal, two differential signal output terminals and a plurality of MOS amplifier tubes connected to each other. The MOS amplifier tube is used to amplify the single-ended signal inputted by the single-ended signal input terminal and output the differential signal extracted from the single-ended signal at the two differential signal output terminals; the NC circuit includes two differential signal input terminals, an output terminal and a plurality of MOS balancing tubes. The plurality of MOS balancing tubes are used to cancel the common-mode noise included in the differential signal inputted by the differential signal input terminal, wherein the STD circuit and the NC circuit are combined in the form of current multiplexing; symmetrical MOS amplifier tubes are connected in parallel, and symmetrical MOS balancing tubes are connected in parallel.

[0027] As we all know, under normal circumstances, the main noise contribution of LNA comes from the channel thermal noise of the MOS amplifier tube, which can generally account for 20% to 30% of the overall noise contribution. Therefore, the noise optimization of this application is mainly carried out for the channel thermal noise of the MOS amplifier tube. The operating frequency of UWB is as high as several GHz, so the flicker noise is negligible and can be ignored, and is not within the scope of consideration of this application. Since this application is aimed at STD signals, it is necessary to offset the noise of the two MOS amplifier tubes to achieve the lowest theoretical noise coefficient. At present, the more mainstream STD solutions are CS-CS and CS-CG. Since the CS-CS reverse amplification is obtained through the output of the common source of the previous stage, there are some natural mismatches in its output. Therefore, this application chooses to use CS-CG to generate a pair of differential signals and simultaneously perform noise reduction on the two input tubes.

[0028] In an optional embodiment, the design of the STD circuit in this application adopts CS-CG, such as Figure 2 As shown. The channel thermal noise of the common gate stage is opposite at the drain and source stages. Therefore, for this STD circuit, there is a natural advantage that the channel thermal noise of the common gate can be coupled to the gate of the common source stage through the drain for reverse amplification, and a pair of common mode noises of the same direction are output at the drain of the common source, so that the channel thermal noise of the MOS amplifier tube M1 is effectively offset at the differential end.

[0029] It can be understood that the STD circuit refers to a circuit that converts the input single-ended RF signal into a differential signal. The STD circuit includes a single-ended signal input terminal V in , two MOS amplifier tubes M1, M2 and an auxiliary tube M3, two differential signal output terminals, such as Figure 3 As shown, by receiving the ultra-wideband RF signal through the STD circuit, not only the ideal differential signal is obtained, but also two pairs of common-mode noise are obtained at the output end of the MOS amplifier tube.

[0030] Since the differential signal output by the STD circuit still has a considerable mismatch, and the noise at the output end of the MOS amplifier tube also has a large difference, it is necessary to further reduce the size of the single-ended noise. This application proposes an NC circuit, which can not only be used to eliminate the imbalance at the output end, but also further reduce the noise, achieving a two-birds-at-one effect. The structure of the NC circuit is as follows: Figure 4As shown. The NC circuit includes two differential signal input terminals, and the differential signal output terminal corresponds to the differential signal input terminal. The NC circuit is similar to the classic five-tube OTA, but lacks the tail current source. The NC circuit includes two differential signal input terminals, and the differential signal is effectively amplified here, but the noise of the MOS amplifier tube enters the NC circuit in the form of common mode, so that the common mode noise is effectively offset at the output end, and the noise is further reduced.

[0031] Since the NC circuit is equipped with a MOS balance tube, the NC circuit can offset the common mode noise included in the differential signal, thereby achieving the effect of reducing noise. Figure 4 , M3:M4 and M1:M2 can have a fixed ratio value, so that the noise at the input end can be effectively offset. Ideally, if the noise signals at the input end are of equal amplitude, theoretically the two can be completely offset.

[0032] In another embodiment of the present application, the STD circuit and the NC circuit are combined in the form of current multiplexing to reduce the power consumption of the low noise amplifier, and the symmetrical MOS amplifier tubes are connected in parallel, and the symmetrical MOS balance tubes are connected in parallel, that is, the leakage current is used to bias the voltage of the substrate. In an optional embodiment, refer to Figure 5 By connecting the substrate at the symmetrical end of the NC circuit, on the one hand, the difference at the device level is eliminated, and on the other hand, the unbalanced potential from the STD circuit is also completely eliminated at point X, making the NC circuit in a theoretically completely symmetrical state, that is, reducing the body effect caused by the substrate voltage difference, thereby effectively reducing the signal output misalignment in the circuit.

[0033] In an optional implementation, in order to reduce unnecessary power consumption, the bias circuit is omitted in the present application, and only the leakage current is used to bias the voltage of the substrate. Figure 6 As shown, since it is a differential circuit, the present application connects symmetrical MOS tubes in parallel to reduce the body effect caused by the substrate voltage difference. In the STD circuit, although there is asymmetry on both sides, the lower R2 receives different voltages, which are then transmitted to the NC circuit and cause the deviation of the static operating point at the output end. However, after the improvement of the present application, the difference of the NC circuit is successfully balanced, and a symmetrical substrate self-bias circuit is designed. Figure 7 As shown, Figure 7 (a) is the case where the symmetrical MOS tubes are not connected in parallel. Figure 7 (b) is the case where symmetrical MOS tubes are connected in parallel. The technical solution of the present application is as follows: Figure 7As shown in (b), by connecting the substrate at the symmetrical end of the NC circuit, the difference at the device level is eliminated on the one hand, and the unbalanced potential from the STD circuit is also completely eliminated at point X on the other hand, making the NC circuit in a completely symmetrical state in theory. This effectively avoids the problem of signal output imbalance in the subsequent circuit.

[0034] In another embodiment of the present application, the single-ended signal may be an input radio frequency signal, and the MOS amplifier tube refers to a MOS tube mainly used for amplifying the signal, and the MOS amplifier tube may be made of any form of MOS tube in the related technology, and is not specifically limited here. The MOS balance tube refers to a MOS tube mainly used for balancing the signal output at the output end of the NC circuit, and the MOS balance tube may be made of any form of MOS tube in the related technology, and is not specifically limited here.

[0035] In one embodiment, referring to Figure 8 , the ultra-wideband low noise amplifier based on noise cancellation and body bias technology is further explained, an isolation inductor is arranged between the differential signal output end of the STD circuit and the differential signal input end of the NC circuit, so that the NC circuit obtains a relatively stable source voltage.

[0036] It can be understood that the isolation inductor refers to any form of inductor in the relevant technology, and is not specifically limited here. An isolation inductor is set between the differential signal output end of the STD circuit and the differential signal input end of the NC circuit, so that the STD circuit and the NC circuit are AC isolated, and further, the NC circuit obtains a relatively stable source voltage.

[0037] In another embodiment of the present application, Figure 8 As shown, the STD circuit and the NC circuit are AC isolated by large inductors L1 and L2, so that M4 and M5 of the NC circuit obtain a relatively stable source voltage. The subsequent application can also be analyzed at this point using an approximate AC ground.

[0038] In one embodiment, referring to Figure 8 , the ultra-wideband low noise amplifier based on noise cancellation and body bias technology is further described, a coupling capacitor is set between the differential signal output end of the STD circuit and the differential signal input end of the NC circuit to couple the differential signal to the NC circuit.

[0039] It is understandable that, referring to Figure 8, coupling capacitor refers to a coupling capacitor made of any material in the related art, and is not specifically limited here. Since the differential signal output terminal of the STD circuit is connected to the differential signal input terminal of the NC circuit, a coupling capacitor is arranged between the differential signal output terminal and the differential signal output terminal, that is, coupling capacitors C1 and C2 are arranged to couple the differential signal to the NC circuit. Since the differential signal is essentially a very high-frequency AC signal, the differential signal output in the previous STD circuit can be coupled to the next NC circuit, thereby reducing the interference of the DC signal in the STD circuit.

[0040] In one embodiment, referring to Figure 6 , an ultra-wideband low noise amplifier based on noise cancellation and body bias technology is further described, the MOS amplifier tube includes a first MOS amplifier tube, a second MOS amplifier tube and a third MOS auxiliary tube, the STD circuit also includes an auxiliary transistor parasitic capacitor, and the parasitic capacitor is used to lead the noise of the drain of the second MOS amplifier tube back to the gate of the second MOS amplifier tube.

[0041] It can be understood that the MOS amplifier tube includes a first MOS amplifier tube, a second MOS amplifier tube and a third MOS auxiliary tube. The parasitic capacitance refers to any parasitic capacitance with a capacitive effect in the relevant technology. The parasitic capacitance generally refers to the capacitive characteristics of inductors, resistors, chip pins, etc. under high frequency conditions.

[0042] For the channel thermal noise cancellation of M2, the noise source of the common source M2 can be led back to the gate by feedback, and then other MOS amplifiers, such as M3, are used for amplification cancellation. M3 plays the role of auxiliary noise cancellation. However, this method has great limitations, and it is easy to increase the noise of the overall circuit while reducing the channel of M2. In an optional embodiment, refer to Figure 5 The parasitic capacitance Cgd of the large-sized auxiliary transistor is used to lead the noise at the drain point Y of M2 back to the gate point X of M2. On the one hand, the common source is reversely amplified to cancel it out; on the other hand, the noise is sent to the common gate for amplification. At this time, two common-mode noises of the same direction are generated at the two output ends, and the characteristics of the differential circuit, that is, the STD circuit, are used to effectively cancel them out.

[0043] It is worth noting that referring to Figure 5 , the capacitor Cgs of M2 will also couple the drain noise to the gate of M2, but Cgs will also couple the noise to the gate of M2 at the source level. Although Cgs is much larger than Cgd, Cgd also reaches 38f, so the two are able to cancel the reverse noise of the drain and source level of M2 at the gate. In order to reduce the number of devices, the STD circuit finally designed is as follows Figure 6 shown.

[0044] In one embodiment, referring to Fig. 9 , the ultra-wideband low noise amplifier based on noise cancellation and body bias technology is further described, the MOS amplifier tube includes a PMOS tube and an NMOS tube, and the substrate of the PMOS tube and the substrate of the NMOS tube are connected to each other.

[0045] In the current circuit design, low voltage and low power consumption have always been a major trend in the development of circuit design. In particular, UWB-related chips have been used in mobile phones and mobile positioning devices for wireless communications, and the requirements for power consumption are of utmost importance. On the one hand, power consumption can be reduced by optimizing the circuit and reducing the current as much as possible. At the same time, power consumption can also be reduced by reducing the power supply voltage under the premise of the same performance.

[0046] It is understood that the PMOS tube refers to any PMOS tube in the related art, and the NMOS tube refers to any NMOS tube in the related art. The MOS amplifier tube is located in the STD circuit. In an optional embodiment, refer to Fig. 9 , using the simplest inverter amplifier circuit and a current source as a load common source amplifier, for the inverter amplifier, the substrate of the PMOS tube and the substrate of the NMOS tube are connected to each other, that is, a PN junction at the top of the PMOS tube can be formed, and the NMOS tube uses the same principle to form a diode, thereby forming a simple loop. In order to prevent the current in the loop from being too large, a resistor needs to be connected after the NMOS tube, as long as the resistor can achieve the effect of reducing the current in the loop.

[0047] In one embodiment, referring to Fig.10 , the ultra-wideband low noise amplifier based on noise cancellation and body bias technology is further explained, the MOS amplifier tube includes two NMOS tubes, and the two NMOS tubes are connected to the power supply terminal through a target resistor.

[0048] It is understandable that the power supply terminal refers to any VDD power supply terminal in the related art, and is not specifically limited here. The target resistance refers to the resistance set by any device in the related art, as long as it can achieve the effect of reducing the substrate voltage. Fig.10 In the dual NMOS amplifier shown, since the MOS tube structure based on NPN cannot generate a loop from VDD through NP, it is necessary to directly connect VDD to the target resistor and then to MOS, which is equivalent to only changing the substrate voltage of the lower NMOS without changing the substrate voltage of the upper NMOS. In the embodiment of the present application, since the two NMOS tubes are connected to the power supply terminal through the target resistor, that is, the substrate voltage can be adjusted by adjusting the size of the target resistor, thereby achieving the purpose of low voltage and low power consumption.

[0049] In one embodiment, referring to Figure 6, an ultra-wideband low noise amplifier based on noise cancellation and body bias technology is further described, the STD circuit includes a bias auxiliary transistor, and the bias auxiliary transistor is used to eliminate the third-order nonlinearity around the linearization window.

[0050] Improving linearization is the general trend of communication development in the 5G era. At present, the bandwidth of information transmission is getting larger and larger, and there will be situations where multiple channels are transmitted simultaneously, and the linearization problem needs to be solved urgently. Complementary CMOS can use the NMOS tube and PMOS tube to form reverse GM3 under the same bias voltage to cancel each other to select a better bias voltage. MGTR (Multigated Transistor) technology can eliminate the third-order nonlinearity around the linearization window by carefully designing the size and bias of the auxiliary transistor. In order to minimize power consumption, its bias auxiliary transistor can be designed in the weak inversion layer, but its main disadvantage is that the combined second-order distortion coefficient will be accumulated instead of being ideally weakened. The accumulated second-order distortion coefficient interacts with the parasitic effects distributed in the circuit, which will inevitably constitute a decrease in IP3 at high frequencies. The nonlinear base current and gate voltage IDS-VGS relationship of the MOS tube can be modeled by Taylor series expansion around a specific VG bias point. The formula is as follows:

[0051]

[0052] Here, v gs is the small signal gate-source voltage, n is any natural number, Relative to n th The transconductance of the order g m From the formula, we can know that the most direct and effective way to reduce nonlinearity is to reduce g′ m All higher orders are filtered out. It is well known that the coefficients in formula (1) play an important role in determining the IMD (Intermodulation Distortion) of RF amplifiers. In MGTR, these coefficients can be minimized by linearly stacking appropriately biased and sized CS FET transistors in parallel, i.e., a new type of field effect transistor with a cold source electrode.

[0053] According to the sources of MOS tube nonlinearity introduced above, this application mainly focuses on selecting a better static operating point to obtain a good static operating point area to achieve relatively good linearity performance. The source of nonlinearity mainly comes from the MOS amplifier tube in the STD circuit, so it is necessary to set the GM3 of the output node to a value near zero to obtain the theoretically best iip3 (Input Referred third order intercept point, input reference third order intercept point) index, such as Figure 6shown.

[0054] It is worth noting that referring to Figure 6 In the STD circuit, the common source needs to consider the joint effect of the two MOS tubes M2 and M3, that is, what is needed is the sum of the GM3 of M2 and M3. In the related art, parallel multi-gate transistors are generally used in single-frequency amplifier circuits, but in ultra-wideband amplifier circuits, in order to match a wider bandwidth, the auxiliary design is not so flexible and sacrifices a certain degree of linearity.

[0055] In one embodiment, an ultra-wideband low noise amplifier based on noise cancellation and body bias technology is further described, and an isolation inductor is provided between parallel MOS amplifier tubes to reduce the parasitic capacitance of the single-ended signal input terminal.

[0056] In the field of UWB front-end LNA, multi-gate transistor technology has not been applied to broadband LNA. This is mainly because the parasitic capacitance at the input of the multi-gate transistor is relatively large, the high-frequency gain drops rapidly, and it is difficult to achieve a wide range of matching at a frequency of -3dB. In order to better integrate the multi-gate transistor technology, the present application appropriately utilizes the isolation inductor to resonate with it to reduce the parasitic capacitance at the input end, so as to achieve a wider range of gain and input matching.

[0057] It can be understood that the isolation inductor refers to any form of inductor in the relevant technology. The low-noise amplifier receives the ultra-wideband transmitted RF signal as the input of the STD circuit, and an isolation inductor is set between the parallel MOS amplifier tubes to reduce the parasitic capacitance of the single-ended signal input end, thereby further reducing the power consumption of the low-noise amplifier.

Claims

1. An ultra-wideband low noise amplifier based on noise cancellation and body bias technology, characterized in that: include: A STD circuit, the STD circuit comprising a single-ended signal input terminal, two differential signal output terminals and a plurality of MOS amplifier tubes connected to each other, the MOS amplifier tubes being used to amplify the single-ended signal inputted from the single-ended signal input terminal and output the common-mode noise signal extracted from the single-ended signal at the two differential signal output terminals; The NC circuit comprises two differential signal input terminals, one output terminal and a plurality of MOS balancing tubes, wherein the plurality of MOS balancing tubes are used to offset the common mode noise included in the differential signal inputted by the differential signal input terminals, wherein the STD circuit and the NC circuit are combined in the form of current multiplexing; the symmetrical MOS amplifying tubes are connected in parallel, and the symmetrical MOS balancing tubes are connected in parallel; Wherein, the MOS amplifier tube includes a first MOS amplifier tube, a second MOS amplifier tube and a third MOS auxiliary tube; the third MOS auxiliary tube is used to assist in canceling noise; The gate of the first MOS amplifier tube is grounded through a first capacitor, a pull-up voltage is connected between the gate of the first MOS amplifier tube and the first capacitor, the drain of the first MOS amplifier tube is connected to one of the differential signal output terminals, and the source of the first MOS amplifier tube is grounded through an inductor; The single-ended signal input terminal is connected between the first MOS amplifier tube and the inductor; The gate of the second MOS amplifier tube is connected between the first MOS amplifier tube and the inductor through a second capacitor and is connected to the single-ended signal input terminal, the drain of the second MOS amplifier tube is connected to the other differential signal output terminal, and the source of the second MOS amplifier tube is grounded; The drain of the third MOS auxiliary tube is connected between the drain of the second MOS amplifier tube and the other differential signal output terminal, the source of the third MOS auxiliary tube is grounded, the gate of the third MOS auxiliary tube is connected to one end of a third capacitor, the other end of the third capacitor is connected to the second capacitor, and the other end of the third capacitor is also connected between the first MOS amplifier tube and the inductor and connected to the single-ended signal input terminal; Wherein, a coupling capacitor is provided between the differential signal output end of the STD circuit and the differential signal input end of the NC circuit to couple the differential signal to the NC circuit; an isolation inductor is provided between the differential signal output end of the STD circuit and the differential signal input end of the NC circuit; One of the differential signal output terminals of the STD circuit is connected to one of the differential signal input terminals of the NC circuit through the first isolation inductor; the other differential signal output terminal of the STD circuit is connected to the other differential signal input terminal of the NC circuit through the second isolation inductor; Wherein, the plurality of MOS balance tubes include a fourth MOS balance tube, a fifth MOS balance tube, a sixth MOS balance tube, a seventh MOS balance tube, an eighth MOS balance tube, a ninth MOS balance tube, a tenth MOS balance tube and an eleventh MOS balance tube; The source of the fourth MOS balance tube is connected to the source of the eighth MOS balance tube, the source of the ninth MOS balance tube is connected to a connection line and connected to one of the differential signal input terminals of the NC circuit, the connection line is a connection line connecting the source of the fourth MOS balance tube and the source of the eighth MOS balance tube, the source of the fifth MOS balance tube is connected to the connection line and connected to another differential signal input terminal of the NC circuit; The gate of the fourth MOS balance tube is connected between the second isolation inductor and the other differential signal output end of the STD circuit through the first coupling capacitor, the gate of the fourth MOS balance tube is also connected to the gate of the ninth MOS balance tube, and the drain of the fourth MOS balance tube is connected to the drain of the sixth MOS balance tube; The gate of the fifth MOS balance tube is connected between the first isolation inductor and one of the differential signal output terminals of the STD circuit through the second coupling capacitor, the gate of the fifth MOS balance tube is also connected to the gate of the eighth MOS balance tube, and the drain of the fifth MOS balance tube is respectively connected to the drain of the seventh MOS balance tube and the output terminal of the NC circuit; The source of the sixth MOS balance tube and the source of the seventh MOS balance tube are both connected to the power supply voltage, the gate of the sixth MOS balance tube is connected to the gate of the seventh MOS balance tube, and the gate of the sixth MOS balance tube and the gate of the seventh MOS balance tube are respectively connected between the drain of the sixth MOS balance tube and the drain of the fourth MOS balance tube; the drain of the seventh MOS balance tube is connected to the output end of the NC circuit; The gate of the eighth MOS balance tube is connected between the first isolation inductor and one of the differential signal output terminals of the STD circuit through the second coupling capacitor, and the drain of the eighth MOS balance tube is connected to the drain of the tenth MOS balance tube; The gate of the ninth MOS balance tube is connected between the second isolation inductor and the other differential signal output end of the STD circuit through the first coupling capacitor, and the drain of the ninth MOS balance tube is connected to the drain of the eleventh MOS balance tube and the output end of the NC circuit respectively; The source of the tenth MOS balance tube and the source of the eleventh MOS balance tube are both connected to the power supply voltage, the gate of the tenth MOS balance tube is connected to the gate of the eleventh MOS balance tube, the gate of the tenth MOS balance tube and the gate of the eleventh MOS balance tube are respectively connected between the drain of the tenth MOS balance tube and the drain of the eighth MOS balance tube; the drain of the eleventh MOS balance tube is connected to the output end of the NC circuit.

2. The ultra-wideband low noise amplifier based on noise cancellation and body bias technology according to claim 1, characterized in that: The STD circuit also includes a parasitic capacitor, which is used to guide the noise of the drain of the second MOS amplifier tube back to the gate of the second MOS amplifier tube.

3. The ultra-wideband low noise amplifier based on noise cancellation and body bias technology according to claim 1, characterized in that: The MOS amplifier tube includes a PMOS tube and an NMOS tube. The substrate of the PMOS tube is connected to the substrate of the NMOS tube through a target resistor. The target resistor is used to reduce the current of the loop.

4. The ultra-wideband low noise amplifier based on noise cancellation and body bias technology according to claim 1, characterized in that: The MOS amplifier tube includes two NMOS tubes, and the two NMOS tubes are connected to the power supply terminal through a target resistor.

5. The ultra-wideband low noise amplifier based on noise cancellation and body bias technology according to claim 3, characterized in that: The STD circuit further includes a bias auxiliary transistor, and the bias auxiliary transistor is used to eliminate the third-order nonlinearity around the linearization window.

6. The ultra-wideband low noise amplifier based on noise cancellation and body bias technology according to claim 5, characterized in that: The bias assist transistor is a field effect transistor with a cold source.

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