A linear voltage regulator with enhanced power supply noise suppression

Abstract

The present invention relates to a linear voltage regulator for enhancing power supply noise suppression, comprising: a transconductance ratio tracking module, a power supply ripple amplification module, and a ripple feedforward summing module connected in sequence; the transconductance ratio tracking module is used to track changes in the transconductance ratio of a power transistor (PM), dynamically adjust and determine a feedforward ripple gain; the power supply ripple amplification module is used to amplify the power supply ripple according to the feedforward ripple gain and output a feedforward ripple signal; and the ripple feedforward summing module utilizes a ripple feedforward summator (RFSM) to sum the feedforward ripple signal with a feedback loop signal, thereby driving the power transistor (PM) and reducing noise at the output of the linear voltage regulator. The present invention utilizes feedforward ripple elimination technology, which does not affect the dropout voltage of a low-dropout linear voltage regulator and consumes minimal chip area. When the process voltage, operating temperature, and load current of the circuit change, the transconductance ratio of the power transistor is adaptively tracked by the transconductance ratio tracking module, thereby optimizing the power supply suppression capability of the low-dropout linear voltage regulator.

Description

Technical Field

[0001] The invention belongs to the technical field of circuit power management, and in particular relates to a linear voltage stabilizer capable of enhancing power supply noise suppression. Background Art

[0002] In large-scale System-on-a-Chip (SoC) designs, a Power Management Unit (PMU) is often used to power the load. Traditional PMUs consist of a switching converter cascaded with several low-dropout regulators (LDOs). Due to system integration and performance constraints, the operating frequency of switching converters continues to increase, increasing the frequency of output ripple. High-frequency power supply ripple can cause internal module operating states of precision analog and RF circuits to shift, affecting the performance of subsequent precision analog and RF circuits and reducing overall system accuracy. Furthermore, in SoC designs, noise-sensitive circuits and digital circuits are fabricated on the same chip. Switching noise in the digital circuits can be coupled into the noise-sensitive circuits through interconnects, exacerbating performance degradation in the noise-sensitive circuits.

[0003] Among broadband high power supply rejection (PSR) solutions, feed-forward ripple cancellation (FFRC) technology offers advantages such as high broadband power supply rejection and low power consumption without affecting LDO dropout performance. This technology injects power supply ripple into the gate or body of the power transistor through a feed-forward module, thereby suppressing transconductance noise current at the LDO output.

[0004] However, the ideal ripple gain of the feedforward module is closely related to factors such as the operating state of the power tube and device process parameters. If a fixed power supply ripple gain is used, the optimization effect of FFRC technology will deteriorate when the circuit process, voltage, operating temperature, and load current change. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a linear voltage regulator with enhanced power supply noise suppression. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] The present invention provides a linear voltage regulator for enhancing power supply noise suppression, comprising: a transconductance ratio tracking module, a power supply ripple amplification module and a ripple feedforward summing module connected in sequence;

[0007] The ripple feedforward summing module includes: a ripple feedforward summator RFSM, an error amplifier EA and a power tube PM;

[0008] The first input end of the ripple feedforward summer RFSM is connected to the output end of the power supply ripple amplification module, the second input end is connected to the output end of the error amplifier EA, and the output end is connected to the gate of the power transistor PM; the error amplifier EA is used to generate a feedback loop signal, the non-inverting input end of the error amplifier EA is connected to the drain of the power transistor PM, and the inverting input end is connected to the reference voltage end V REF The source of the power tube PM is connected to the power supply voltage terminal V IN ;

[0009] The transconductance ratio tracking module is used to track the change of the transconductance ratio of the power tube PM, dynamically adjust and determine the feedforward ripple gain; the power supply ripple amplification module is used to amplify the power supply ripple according to the feedforward ripple gain and output a feedforward ripple signal;

[0010] The ripple feedforward summing module uses the ripple feedforward summator RFSM to sum the feedforward ripple signal and the feedback loop signal generated by the error amplifier EA, and outputs the feedforward summation signal to drive the power transistor PM to reduce the noise at the output end of the linear regulator.

[0011] In one embodiment of the present invention, the transconductance ratio tracking module includes: a PMOS transistor PM1, a PMOS transistor PM2, an NMOS transistor NR1, a sensor amplifier SA1, a sensor amplifier SA2, a sensor amplifier SA3, a resistor R2, a current source I1, a current source I2, and a current source I3;

[0012] The gate of the PMOS tube PM1 is connected to the gate of the power tube PM, and the feedforward summation signal V is input. G , the source is connected to the input voltage terminal V IN , the drains are respectively connected to the non-inverting input terminal of the sensing amplifier SA1, the inverting input terminal of the sensing amplifier SA2 and the positive terminal I1 of the current source;

[0013] The gate of the PMOS transistor PM2 is connected to the output terminal of the sensor amplifier SA2, the source is connected to the source of the PMOS transistor PM1, and the drain is connected to the drain of the NMOS transistor NR1; the gate of the NMOS transistor NR1 is connected to the output terminal of the sensor amplifier SA3, and the source is respectively connected to the non-inverting input terminal of the sensor amplifier SA2 and the positive terminal of the current source I2;

[0014] The inverting input terminal of the sensing amplifier SA1 is connected to the drain of the power transistor PM and inputs the output voltage V OUT, the output ends are respectively connected to the control ends of the current source I1, the current source I2 and the current source I3; the negative ends of the current source I1, the current source I2 and the current source I3 are all connected to the ground end GND;

[0015] The output end of the sensing amplifier SA2 is connected to the inverting input end of the sensing amplifier SA3; the non-inverting input end of the sensing amplifier SA3 is connected to the first end of the resistor R2 and the positive end of the current source I3 respectively, and the output end is connected to the power supply ripple amplification module; the second end of the resistor R2 is connected to the gate of the power tube PM.

[0016] In one embodiment of the present invention, the power ripple amplification module includes: NMOS tube NR2, resistor R3, resistor R HPF , capacitor C HPF and adaptive feed-forward ripple amplifier AFRA;

[0017] The gate of the NMOS transistor NR2 is connected to the output end of the sensor amplifier SA3, and the source is connected to the reference voltage terminal V REF , the drain is respectively connected to the inverting input terminal of the adaptive feedforward ripple amplifier AFRA and the first end of the resistor R3; the second end of the resistor R3 is connected to the output terminal of the adaptive feedforward ripple amplifier AFRA and serves as the output terminal of the power supply ripple amplification module;

[0018] The resistor R HPF The first end is connected to the reference voltage terminal V REF , the second end is connected to the capacitor C HPF and the non-inverting input terminal of the adaptive feed-forward ripple amplifier AFRA; the capacitor C HPF The second plate is connected to the input voltage terminal V IN .

[0019] In one embodiment of the present invention, the ripple feedforward summing module further includes: a load current source I L and load capacitance C L ;

[0020] The load current source I L The positive end is connected to the non-inverting input end of the error amplifier EA, the drain of the power tube PM and the load capacitor C L The drain of the power tube PM outputs the output voltage V OUT The load capacitance C L The second plate is connected to the load current source I L and connect the negative terminal of the GND pin to the ground terminal.

[0021] In one embodiment of the present invention, the ripple feedforward transfer function H of the ripple feedforward summation module is ff (s) is:

[0022]

[0023] Among them, g sdp is the drain-source transconductance of the power tube PM; g mp is the gate-source transconductance of the power tube PM; s is the frequency domain parameter; ω s The dominant pole of the ripple feedforward summer RFSM; A s is the low frequency gain of the ripple feedforward summer RFSM.

[0024] Compared with the prior art, the present invention has the following beneficial effects:

[0025] The present invention provides a linear voltage regulator with enhanced power supply noise suppression. This utilizes feedforward ripple cancellation technology, which does not affect the dropout voltage of the low-dropout linear regulator and consumes minimal chip area. When the circuit's process, voltage, operating temperature, and load current change, a transconductance ratio tracking module converts the transconductance ratio of the power transistors into the ratio of two resistors flowing the same current, thereby achieving adaptive tracking of the feedforward ripple gain and optimizing the power supply rejection capability of the low-dropout linear regulator. A power supply ripple amplification module and a ripple feedforward summation module inject the compensated ripple voltage into the gate of the power transistor, reducing the noise current at the output of the linear regulator and further improving the power supply noise suppression capability of the LDO circuit. The above description is merely an overview of the technical solution of the present invention. To better understand the technical means of the present invention, which can be implemented in accordance with the contents of the specification, and to make the above and other objects, features, and advantages of the present invention more readily apparent, the following describes a preferred embodiment in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a flow chart of a linear voltage regulator with enhanced power supply noise suppression according to an embodiment of the present invention;

[0027] Figure 2 1 is a schematic diagram of the circuit structure of a linear voltage regulator for enhancing power supply noise suppression according to an embodiment of the present invention;

[0028] Figure 3 1 is a schematic diagram of a mathematical model of a linear voltage regulator for enhancing power supply noise suppression according to an embodiment of the present invention after a feedforward module is introduced;

[0029] Figure 4 1. It is a schematic diagram for verifying the feasibility of a feed-forward ripple solution in a linear regulator for enhancing power supply noise suppression according to an embodiment of the present invention;

[0030] Figure 5 1 is a PSR characteristic curve diagram of a linear voltage regulator with enhanced power supply noise suppression according to an embodiment of the present invention and a voltage regulator with a traditional structure under light and heavy loads. DETAILED DESCRIPTION

[0031] In order to further illustrate the technical means and effects adopted by the present invention to achieve the predetermined purpose of the invention, the following is a detailed description of a linear voltage regulator with enhanced power supply noise suppression proposed in accordance with the present invention in conjunction with the accompanying drawings and specific embodiments.

[0032] The aforementioned and other technical contents, features, and effects of the present invention are clearly presented in the following detailed description of the specific embodiments in conjunction with the accompanying drawings. Through the description of the specific embodiments, a deeper and more specific understanding of the technical means and effects adopted by the present invention to achieve the intended purpose can be obtained. However, the accompanying drawings are provided for reference and illustration purposes only and are not intended to limit the technical solutions of the present invention.

[0033] Example 1

[0034] Please refer to Figure 1 and Figure 2 , Figure 1 This is a flow chart of a linear voltage regulator with enhanced power supply noise suppression according to an embodiment of the present invention; Figure 2 The figure is a schematic diagram of the circuit structure of a linear voltage regulator for enhancing power supply noise suppression according to an embodiment of the present invention.

[0035] As shown in the figure, the present invention provides a linear voltage regulator for enhancing power supply noise suppression, comprising: a transconductance ratio tracking module 100, a power supply ripple amplification module 200 and a ripple feedforward summing module 300 connected in sequence.

[0036] In this embodiment, in order to improve the power supply noise suppression capability of the low drop-out regulator (LDO), a good power supply noise suppression capability is manifested as a high power supply rejection ratio. IN The ripple is injected into the gate of the power tube PM through the feedforward ripple elimination technology. However, due to the actual working state of the power tube PM and the influence of device process parameters, the input voltage V IN A dynamic gain is applied to the ripple; the transconductance ratio tracking module 100 is used to track the change in the transconductance ratio of the power tube PM, dynamically adjust and determine the feedforward ripple gain; the power ripple amplification module 200 copies the determined feedforward ripple gain, amplifies the power ripple according to the gain, and outputs a feedforward ripple signal; finally, in the ripple feedforward summation module 300, the feedforward ripple signal and the feedback loop signal are summed to reduce the noise at the output end of the linear regulator, thereby achieving the effect of optimizing the power supply rejection capability of the linear regulator.

[0037] In this embodiment, the ripple feed-forward and summation module 300 includes: a ripple feed-forward and summation module RFSM (Ripple Feed-forward and Summation Module), an error amplifier EA and a power transistor PM;

[0038] The first input terminal of the ripple feedforward summer RFSM is connected to the output terminal of the power supply ripple amplification module 200, the second input terminal is connected to the output terminal of the error amplifier EA, and the output terminal is connected to the gate of the power transistor PM; the error amplifier EA is used to generate a feedback loop signal, the non-inverting input terminal of the error amplifier EA is connected to the drain of the power transistor PM, and the inverting input terminal is connected to the reference voltage terminal V REF ; The source of the power tube PM is connected to the power supply voltage terminal V IN The ripple feedforward summer RFSM is used to sum the feedforward ripple signal and the feedback loop signal in the voltage domain, and output the feedforward summed signal to drive the power transistor PM, thereby improving the power supply noise suppression capability of the LDO circuit.

[0039] It is worth noting that the ripple feedforward summation module 300 can be regarded as including two processes. The first is that the transconductance ratio tracking module 100 connected in sequence determines the gain, the power supply ripple amplification module 200 amplifies according to the gain, and finally the ripple feedforward summer RFSM sums and drives the power tube PM; the second is that the gain of the transconductance ratio tracking module 100 is determined by feedback, that is, the transconductance ratio tracking module 100, the power supply ripple amplification module 200 and the ripple feedforward summation module 300 form a feedback loop to feedback control the power tube PM.

[0040] In this embodiment, the transconductance ratio tracking module 100 includes: a PMOS transistor PM1, a PMOS transistor PM2, an NMOS transistor NR1, a sense amplifier SA1, a sense amplifier SA2, a sense amplifier SA3, a resistor R2, a current source I1, a current source I2 and a current source I3.

[0041] In an optional embodiment, the gate of the PMOS transistor PM1 is connected to the gate of the power transistor PM, and the feedforward summation signal V is input. G , the source is connected to the input voltage terminal V IN , the drain is respectively connected to the non-inverting input terminal of the sensor amplifier SA1, the inverting input terminal of the sensor amplifier SA2 and the positive terminal of the current source I1; the gate of the PMOS transistor PM2 is connected to the output terminal of the sensor amplifier SA2, the source is connected to the source of the PMOS transistor PM1, and the drain is connected to the drain of the NMOS transistor NR1; the gate of the NMOS transistor NR1 is connected to the output terminal of the sensor amplifier SA3, and the source is respectively connected to the non-inverting input terminal of the sensor amplifier SA2 and the positive terminal of the current source I2.

[0042] In an optional embodiment, the inverting input terminal of the sensing amplifier SA1 is connected to the drain of the power transistor PM and inputs the output voltage V OUT , the output terminals are connected to the control terminals of current source I1, current source I2 and current source I3 respectively; wherein, the output voltage V OUT The DC reference voltage V REF .

[0043] In an optional embodiment, the negative ends of the current source I1, the current source I2 and the current source I3 are all connected to the ground terminal GND; the output end of the sensor amplifier SA2 is connected to the inverting input end of the sensor amplifier SA3; the non-inverting input end of the sensor amplifier SA3 is connected to the first end of the resistor R2 and the positive end of the current source I3 respectively, and the output end is connected to the power supply ripple amplification module 200; the second end of the resistor R2 is connected to the gate of the power tube PM.

[0044] In this embodiment, the power ripple amplification module 200 includes: an NMOS transistor NR2, a resistor R3, a resistor R HPF , capacitor C HPF and Adaptive Feed-forward Ripple Amplifier AFRA (Adaptive Feed-forward Ripple Amplifier).

[0045] In an optional embodiment, the gate of the NMOS transistor NR2 is connected to the output terminal of the sensing amplifier SA3, and the source is connected to the reference voltage terminal V REF , the drain is respectively connected to the inverting input terminal of the adaptive feedforward ripple amplifier AFRA and the first end of the resistor R3; the second end of the resistor R3 is connected to the output terminal of the adaptive feedforward ripple amplifier AFRA and serves as the output terminal of the power supply ripple amplification module 200.

[0046] In an optional embodiment, the resistor R HPF The first end is connected to the reference voltage terminal V REF , the second end is connected to the capacitor C HPF The first plate and the non-inverting input of the adaptive feed-forward ripple amplifier AFRA; capacitor C HPF The second plate is connected to the input voltage terminal V IN .

[0047] In this embodiment, the ripple feedforward summing module 300 further includes: a load current source I L and load capacitance C L ;

[0048] Among them, the load current source I L The positive end is connected to the non-inverting input of the error amplifier EA, the drain of the power tube PM and the load capacitor C LThe first plate of the power tube PM outputs the output voltage V OUT ; Load capacitance C L The second plate is connected to the load current source I L and connect the negative terminal of the MOSFET to the ground terminal GND.

[0049] See Figure 3 , Figure 3 It is a schematic diagram of a mathematical model of a linear voltage regulator with enhanced power supply noise suppression according to an embodiment of the present invention after a feedforward module is introduced.

[0050] As shown in the figure, based on the LDO circuit small signal model after the feedforward module is introduced, the power supply noise transfer function of the LDO circuit is derived:

[0051]

[0052] Among them, H ff (s) is the ripple feedforward transfer function of the ripple feedforward summation module 300; Δv in (s) is the ripple noise of the input voltage; Δv out (s) is the ripple noise of the output voltage; Z L is the equivalent impedance of the output end of the linear regulator; g sdp is the drain-source transconductance of the power tube PM; g mp A is the gate-source transconductance of the power tube PM; s A is the low-frequency gain of the ripple feedforward summer RFSM; e is the low-frequency gain of the error amplifier EA; s is the frequency domain parameter; ω s The dominant pole of the ripple feedforward summer RFSM; ω e It is the main pole of the error amplifier EA.

[0053] It is worth noting that the power supply rejection ratio (PSRR) is used to describe the ability of the circuit output voltage to resist power supply noise interference, which is expressed as the ratio of the output voltage small signal change to the input voltage small signal change. In formula (1), the power supply noise transfer function of the LDO circuit describes the input voltage V IN When the output voltage V OUT When the transfer function is 0, the input voltage ripple noise Δv in (s) caused by the output voltage V OUT The fluctuation is also 0. At this time, the power supply rejection ratio of the LDO circuit is negative infinity, that is, the best power supply rejection effect is achieved. However, due to the influence of various non-ideal effects in the circuit and the accuracy of the equivalent model, the power supply rejection ratio of the LDO circuit only approaches negative infinity at this time.

[0054] In this embodiment, in order to minimize the output power ripple, the ripple feedforward transfer function H of the feedforward summing module 300 is ff (s) must meet the following requirements:

[0055]

[0056] in, is the feedforward ripple gain of the input voltage ripple noise; is the transconductance ratio of the power tube PM.

[0057] In this embodiment, the low frequency gain A of the ripple feedforward summer RFSM is s In this embodiment, it is set to 1, that is, the magnification is 1 times.

[0058]

[0059] From formula (2.1), we can see that in order to minimize the output power ripple, the input voltage ripple noise Δv in (s), zoom in times and then injected into the gate of the power tube PM; and the feedforward ripple gain Transconductance ratio of the power tube PM Closely related to extraction The transconductance ratio tracking module 100 tracks the change in the transconductance ratio of the power transistor PM and dynamically adjusts the feedforward ripple gain.

[0060] In this embodiment, the PMOS transistor PM1 and the PMOS transistor PM2 are replicas of the power transistor PM, and their sizes are 1 / 1000 of the power transistor PM. The currents I1 and I2 flowing through them are also the load current I flowing through the power transistor PM. L 1 / 1000 of the output current, current is clamped and the output voltage is regulated via sense amplifier SA1. Since PMOS transistor PM1 and power transistor PM share the same gate, source, and drain voltages, PMOS transistor PM1 is equivalent to a scaled-down replica of power transistor PM, sharing the same transconductance data and transconductance ratio. In the transconductance ratio tracking module, NMOS transistor NR1 operates in the deep linear region and acts as a variable resistor. Due to the influence of variable resistor R1, the drain voltage of PMOS transistor PM2 is slightly higher than that of PMOS transistor PM1. However, since I2 is only on the order of μA, the drain voltages of PMOS transistors PM1 and PM2 can be considered approximately equal. Therefore, PMOS transistors PM1 and PM2 also share the same transconductance data and transconductance ratio. At the same current, the difference between PMOS transistors PM1 and PM2 lies in their gate and drain voltages, resulting in the following relationship:

[0061] g sdp (v D2 -vD1 )=g mp (v G1 -v G2 )(3);

[0062] Among them, v D1 is the drain voltage of PMOS tube PM1; v D2 is the drain voltage of PMOS tube PM2; v G1 is the gate voltage of PMOS tube PM1; v G2 is the gate voltage of the PMOS tube PM2.

[0063] Furthermore, the transconductance ratio The voltage ratio across the PMOS tube is expressed as:

[0064]

[0065] Among them, R1 is the equivalent resistance of NMOS tube NR1; Δv G is the gate voltage difference between the PMOS transistor PM1 and the PMOS transistor PM2; I2 is the current value of the PMOS transistor PM2.

[0066] The gate voltage of the PMOS transistor PM2 is copied to the first end of the resistor R2 through the sensing amplifier SA3. The second end of the resistor R2 is connected to the gate of the PMOS transistor PM1. At this time, the voltage on the resistor R2 is equal to the gate voltage difference Δv between the PMOS transistors PM1 and PM2. G Since the current value I3 flowing through R2 is also equal to the load current I L 1 / 1000 of the current, so the transconductance ratio of the power tube PM is achieved through the current clamping effect of the sensing amplifier SA1. Equivalent conversion to the resistance value R1 of the variable resistor:

[0067]

[0068] Wherein, R2 is the resistance value of the resistor R2; I3 is the current value on the resistor R2.

[0069] In this embodiment, the power supply ripple amplification module 200 is used to amplify the power supply ripple according to the feedforward ripple gain and output the feedforward ripple signal to the ripple feedforward summer RFSM, wherein the input voltage V IN Ripple v R Through the capacitor C HPFIt is coupled to the non-inverting input of the adaptive feedforward ripple amplifier AFRA, and then amplified in-phase by feedback resistors R3 and R4 before being output. R4 is similar to the variable resistor R1 formed by NMOS transistor NR1. NMOS transistor NR2 operates in the deep linear region and is equivalent to a mirror image of NMOS transistor NR1, with the same equivalent resistance. Therefore, the amplification factor k of the non-inverting amplifier circuit can be expressed as:

[0070]

[0071] Among them, R3 is the resistance value of the resistor R3; R4 is the equivalent resistance value of the NMOS transistor NR2.

[0072] Furthermore, the feedforward ripple voltage v output by the power ripple amplifier module is IRS for:

[0073]

[0074] According to formula (2.1), we can see that v IRS Feedforwarding to the gate of the power transistor PM can achieve a good PSR optimization effect. Therefore, the feedforward ripple signal and the feedback loop signal are summed in the voltage domain through the ripple feedforward summer RFSM, and the output signal drives the gate of the power transistor PM, thereby improving the power supply rejection capability of the LDO circuit.

[0075] See Figure 4 , Figure 4 This is a schematic diagram for verifying the feasibility of a feedforward ripple solution in a linear regulator for enhancing power supply noise suppression according to an embodiment of the present invention.

[0076] As shown in the figure, the input voltage V IN A sinusoidal ripple with a frequency of 1MHz and an amplitude of 30mV is injected into the power tube, and the gate of the power tube PM is observed at the same time when the load current I L The transient responses are under 1mA and 50mA conditions respectively. Under the above load conditions, the gate ripple amplitude of the power tube PM is 33.87mV and 56.62mV respectively, and the feedforward ripple gain is They are 1.13 and 1.89 respectively, which are consistent with the theoretical optimal feedforward gain determined by the small signal model simulation of formula (1). The feasibility of the feedforward ripple solution of this embodiment is verified.

[0077] See Figure 5 , Figure 5 1 is a PSR characteristic curve diagram of a linear voltage regulator with enhanced power supply noise suppression according to an embodiment of the present invention and a voltage regulator with a traditional structure under light and heavy loads.

[0078] As shown in the figure, the LDO circuit of this embodiment achieves a PSR of approximately -84dB at 1MHz under a light load (1mA), and a PSR of approximately -55dB at 1MHz under a heavy load (50mA). Both performance levels are superior to those of conventional LDO circuits, demonstrating excellent PSR optimization across various load conditions. This LDO circuit maintains excellent power supply rejection at mid- and high-frequency bands.

[0079] The linear regulator with enhanced power supply noise suppression in an embodiment of the present invention utilizes feedforward ripple cancellation technology, which does not affect the dropout voltage of the low-dropout linear regulator and consumes minimal chip area. When the circuit's process, voltage, operating temperature, and load current change, a transconductance ratio tracking module converts the transconductance ratio of the power transistor into the ratio of two resistors passing the same current, thereby achieving adaptive tracking of the feedforward ripple gain and optimizing the power supply suppression capability of the low-dropout linear regulator. A power supply ripple amplification module and a ripple feedforward summation module inject the compensated ripple voltage into the gate of the power transistor, reducing the noise current at the linear regulator's output and further improving the power supply noise suppression capability of the LDO circuit.

[0080] It should be noted that, in this document, relational terms such as first and second are used solely to distinguish one entity or operation from another, and do not necessarily require or imply any actual relationship or order between these entities or operations. Furthermore, the terms "comprise," "include," or any other variations thereof are intended to encompass non-exclusive inclusion, such that an article or device comprising a list of elements includes not only those elements but also other elements not explicitly listed. Without further limitation, an element defined by the phrase "comprising a..." does not preclude the presence of additional identical elements in the article or device comprising the element. Terms such as "connected" or "connected" are not limited to physical or mechanical connections but may include electrical connections, whether direct or indirect. References to orientations or positional relationships, such as "upper," "lower," "left," and "right," are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate description and simplify the description of the present invention. They do not indicate or imply that the device or element referred to must have, be constructed, or operate in a specific orientation, and are therefore not to be construed as limiting the present invention.

[0081] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A linear regulator for enhancing power supply noise suppression, characterized in that: include: A transconductance ratio tracking module (100), a power supply ripple amplification module (200), and a ripple feedforward summing module (300) connected in sequence; The ripple feedforward summing module (300) comprises: a ripple feedforward summator RFSM, an error amplifier EA and a power transistor PM; The first input end of the ripple feedforward summer RFSM is connected to the output end of the power supply ripple amplification module (200), the second input end is connected to the output end of the error amplifier EA, and the output end is connected to the gate of the power transistor PM; the error amplifier EA is used to generate a feedback loop signal, the non-inverting input end of the error amplifier EA is connected to the drain of the power transistor PM, and the inverting input end is connected to the reference voltage end (V REF ); The source of the power tube PM is connected to the power supply voltage terminal (V IN ); The transconductance ratio tracking module (100) is used to track the change in the transconductance ratio of the power tube PM, dynamically adjust and determine the feedforward ripple gain; the power ripple amplification module (200) is used to amplify the power ripple according to the feedforward ripple gain, and output a feedforward ripple signal; The ripple feedforward summing module (300) uses the ripple feedforward summator RFSM to sum the feedforward ripple signal and the feedback loop signal generated by the error amplifier EA, and outputs the feedforward summation signal to drive the power transistor PM, so as to reduce the noise at the output end of the linear regulator.

2. The linear regulator with enhanced power supply noise suppression according to claim 1, characterized in that: The transconductance ratio tracking module (100) comprises: a PMOS transistor PM1, a PMOS transistor PM2, an NMOS transistor NR1, a sensing amplifier SA1, a sensing amplifier SA2, a sensing amplifier SA3, a resistor R2, a current source I1, a current source I2 and a current source I3; The gate of the PMOS tube PM1 is connected to the gate of the power tube PM, and the feedforward summation signal (V G ), the source is connected to the input voltage terminal (V IN ), the drains are respectively connected to the non-inverting input terminal of the sensing amplifier SA1, the inverting input terminal of the sensing amplifier SA2 and the positive terminal I1 of the current source; The gate of the PMOS transistor PM2 is connected to the output end of the sensor amplifier SA2, the source is connected to the source of the PMOS transistor PM1, and the drain is connected to the drain of the NMOS transistor NR1; The gate of the NMOS transistor NR1 is connected to the output terminal of the sensing amplifier SA3, and the source is connected to the non-inverting input terminal of the sensing amplifier SA2 and the positive terminal of the current source I2 respectively; The inverting input terminal of the sensing amplifier SA1 is connected to the drain of the power transistor PM and inputs the output voltage (V OUT ), the output ends are respectively connected to the control ends of the current source I1, the current source I2 and the current source I3; the negative ends of the current source I1, the current source I2 and the current source I3 are all connected to the ground end (GND); The output end of the sensing amplifier SA2 is connected to the inverting input end of the sensing amplifier SA3; the non-inverting input end of the sensing amplifier SA3 is connected to the first end of the resistor R2 and the positive end of the current source I3, respectively, and the output end is connected to the power supply ripple amplification module (200); The second end of the resistor R2 is connected to the gate of the power transistor PM.

3. The linear regulator with enhanced power supply noise suppression according to claim 2, characterized in that: The power ripple amplification module (200) comprises: an NMOS tube NR2, a resistor R3, a resistor R HPF , capacitor C HPF and adaptive feed-forward ripple amplifier AFRA; The gate of the NMOS transistor NR2 is connected to the output terminal of the sensor amplifier SA3, and the source is connected to the reference voltage terminal (V REF ), the drain is respectively connected to the inverting input end of the adaptive feedforward ripple amplifier AFRA and the first end of the resistor R3; the second end of the resistor R3 is connected to the output end of the adaptive feedforward ripple amplifier AFRA and serves as the output end of the power supply ripple amplification module (200); The resistor R HPF The first end is connected to the reference voltage end (V REF ), the second end is connected to the capacitor C HPF a first plate and a non-inverting input terminal of the adaptive feed-forward ripple amplifier AFRA; The capacitor C HPF The second plate is connected to the input voltage terminal (V IN ).

4. The linear regulator with enhanced power supply noise suppression according to claim 3, characterized in that: The ripple feedforward summing module (300) further includes: a load current source I L and load capacitance C L ; The load current source I L The positive end is connected to the non-inverting input end of the error amplifier EA, the drain of the power tube PM and the load capacitor C L a first plate; The drain of the power tube PM outputs the output voltage (V OUT ); The load capacitance C L The second plate is connected to the load current source I L and connect the negative terminal of the GND.

5. The linear regulator with enhanced power supply noise suppression according to claim 1, characterized in that: The ripple feedforward transfer function H of the ripple feedforward summation module (300) is ff (s) is: Among them, g sdp is the drain-source transconductance of the power tube PM; g mp is the gate-source transconductance of the power tube PM; s is the frequency domain parameter; ω s The dominant pole of the ripple feedforward summer RFSM; A s is the low frequency gain of the ripple feedforward summer RFSM.

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