A communication device
By using decoders and inverters to replace multiple signal relays in communication devices, the problem of multiple ports required for multiplexed buses in existing technologies is solved, thereby improving security and stability while reducing cost and power consumption.
Patent Information
- Application Number
- CN202310106828.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-09
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2043-02-09
AI Technical Summary
In existing technologies, the multiplexing of home bus systems, controller area network buses, and 485 buses requires three separate port connections, resulting in complex construction, high safety risks, high costs, and slow response.
Decoders and inverters are used to replace multi-channel signal relays. The processing module determines the bus to be worked and controls the output of the decoder and inverter to ensure that only one bus works at a time, avoiding switching errors caused by mechanical contacts.
It reduces security risks, decreases the number of ports, lowers costs and power consumption, and improves the reliability and stability of communication devices.
Smart Images

Figure CN116366378B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of communication, in particular to a communication device. BACKGROUND
[0002] With the development of the communication field, especially the multiplexing demand of HBS (Home Bus System) bus, CAN (Controller Area Network) bus and 485 bus is increasing, but three ports are needed to connect the three buses together, and a separate port is needed for each bus, so the user needs to identify the bus type and the corresponding port position when wiring. To connect three buses, three different ports need to be connected, the number of ports is large, and the construction requires strong professionalism. If the buses are connected incorrectly, the equipment may malfunction, or even be burned out.
[0003] In the prior art, a single-port connection of three buses is adopted, but a processor is needed to control a multi-channel signal relay to switch the three buses, which has several shortcomings: first, the multi-channel signal relay is large in size and high in cost; second, because the multi-channel signal relay has mechanical contacts, switching errors may occur after long-term work, increasing the safety risk; third, the multi-channel signal relay has slow action, limited action life, and high power consumption. SUMMARY
[0004] The purpose of the present application is to provide a communication device that ensures that only one bus and its corresponding communication conversion module work at the same time. Because the decoder and inverter used do not have mechanical contacts, the entire communication device will not have switching errors due to long-term work, reducing the safety risk. The communication device also has the advantages of small size, low cost, no action life limit, and low power consumption.
[0005] To solve the above technical problems, the present application provides a communication device, comprising:
[0006] a port, the port is connected with N buses, N is an integer not less than 2;
[0007] N buses, each of the N buses is connected with a communication end of a corresponding communication conversion module one by one;
[0008] N communication conversion modules;
[0009] a processing module connected with the communication conversion module, for determining a to-be-operated bus corresponding to a signal currently transmitted by the port, and controlling outputs of the processing module, the decoder and the inverter to make the to-be-operated bus corresponding communication conversion module operate to communicate with the port through the operating communication conversion module, the to-be-operated bus and the port;
[0010] a decoder, an input end of the decoder being connected with the processing module, and an output end of the decoder being connected with an input end of the inverter and the communication conversion module;
[0011] the inverter, an output end of the inverter being connected with the communication conversion module.
[0012] Preferably, when the N buses include any two or three of an HBS bus, a CAN bus and a 485 bus; the N communication conversion modules include:
[0013] an HBS receiving circuit, a receiving end of the HBS receiving circuit being connected with the HBS bus, and a sending end of the HBS receiving circuit being connected with the processing module;
[0014] an HBS sending circuit, a receiving end of the HBS sending circuit being connected with an output end of the inverter, and a sending end of the HBS sending circuit being connected with the HBS bus;
[0015] and / or,
[0016] a first CAN chip, an enable end of the first CAN chip being connected with the processing module, a power supply end of the first CAN chip being connected with a power supply, a receiving end and a sending end of the first CAN chip both being connected with the processing module, a CANH communication end of the first CAN chip being connected with a Y line of the CAN bus, and a CANL communication end of the first CAN chip being connected with an X line of the CAN bus;
[0017] and / or,
[0018] a first 485 chip, a first receiving enable end of the first 485 chip being connected with an output end of the decoder, a first sending enable end of the first 485 chip being connected with an output end of the inverter, a sending end and a receiving end of the first 485 chip both being connected with the processing module, an A communication end of the first 485 chip being connected with an A line of the 485 bus, a communication end of the first 485 chip being connected with a B line of the 485 bus.
[0019] Preferably, the application further comprises:
[0020] a second CAN chip, an enable end of the second CAN chip being connected with the processing module, a power supply end of the second CAN chip being connected with the power supply, a receiving end and a sending end of the second CAN chip both being connected with the processing module, a CANH communication end of the second CAN chip being connected with an X line of the CAN bus, and a CANL communication end of the second CAN chip being connected with a Y line of the CAN bus;
[0021] and / or,
[0022] a second 485 chip, a first receiving enable end of the second 485 chip is connected with an output end of the decoder, a first sending enable end is connected with an output end of the inverter, a sending end and a receiving end are connected with the processing module, a communication end is connected with a B line of the 485 bus, a communication end is connected with an A line of the 485 bus.
[0023] Preferably, determining the to-be-operated bus corresponding to the signal currently transmitted by the port comprises:
[0024] receiving the signal currently transmitted by the port through the HBS bus and the HBS receiving circuit;
[0025] determining the to-be-operated bus corresponding to the signal based on the signal.
[0026] Preferably, further comprising:
[0027] a first switch, a first end of the first switch is connected with the power supply, a second end is connected with a power supply end of the first CAN chip, and a control end is connected with an output end of the decoder;
[0028] a second switch, a first end of the second switch is connected with the power supply, a second end is connected with a power supply end of the second CAN chip, and a control end is connected with an output end of the decoder.
[0029] Preferably, the decoder is a three-eight decoder;
[0030] the A input end, the B input end and the C input end of the three-eight decoder are connected with the processing module, an output end is connected with a first receiving enable end of the first 485 chip, an output end is connected with a first receiving enable end of the second 485 chip, an output end is connected with a 1A input end of the inverter, an output end is connected with a 2A input end of the inverter, an output end is connected with a 3A input end of the inverter, an output end is connected with a 4A input end of the inverter, an output end is connected with a control end of the second switch, an output end is connected with a control end of the first switch.
[0031] Preferably, the port comprises a first interface, a second interface and a port processing module, comprising:
[0032] the first interface and the second interface are connected with the HBS bus respectively;
[0033] The port processing module, the first communication port of the port processing module and the second communication port of the port processing module are connected with the HBS bus, the third communication port of the port processing module and the fourth communication port of the port processing module are connected with the 485 bus, and when the signals transmitted by the first communication port and the second communication port are 485 bus signals, the signals are transmitted from the first communication port and the second communication port to the third communication port and the fourth communication port, and when the signals transmitted by the first communication port and the second communication port are not 485 bus signals, the signals are not transmitted from the first communication port and the second communication port to the third communication port and the fourth communication port.
[0034] Preferably, the port processing module comprises:
[0035] The first resistance, the first end of the first resistance is connected with the HBS bus, and the second end is connected with the base of the first NPN type transistor;
[0036] The first NPN type transistor, the collector of the first NPN type transistor is connected with the HBS bus, and the emitter is connected with the 485 bus;
[0037] The first diode, the cathode of the first diode is connected with the HBS bus, and the anode is connected with the 485 bus;
[0038] The first voltage stabilizing diode, the cathode of the first voltage stabilizing diode is connected with the HBS bus, and the anode is connected with the first end of the second resistance;
[0039] The second resistance, the second end of the second resistance is connected with the base of the second NPN type transistor;
[0040] The second NPN type transistor, the collector of the second NPN type transistor is connected with the second end of the first resistance, and the emitter is connected with the 485 bus;
[0041] The third resistance, the first end of the third resistance is connected with the HBS bus, and the second end is connected with the base of the third NPN type transistor;
[0042] The third NPN type transistor, the collector of the third NPN type transistor is connected with the HBS bus, and the emitter is connected with the 485 bus;
[0043] The third diode, the cathode of the third diode is connected with the HBS bus, and the anode is connected with the 485 bus;
[0044] A second voltage stabilizing diode, a cathode of the second voltage stabilizing diode is connected with the HBS bus, and an anode is connected with a first end of a fourth resistor;
[0045] The fourth resistor, a second end of the fourth resistor is connected with a base of a fourth NPN triode;
[0046] The fourth NPN triode, a collector of the fourth NPN triode is connected with a second end of the third resistor, and an emitter is connected with the 485 bus.
[0047] Preferably, further comprising:
[0048] A common mode interference filtering module, an input end of the common mode interference filtering module is connected with the port, and an output end is connected with the HBS bus.
[0049] Preferably, the common mode interference filtering module is a common mode inductor.
[0050] The purpose of the present application is to provide a communication device, when the port is connected with N buses, because the N buses are connected with the corresponding communication conversion modules, the processing module obtains the signal currently transmitted by the port through the communication conversion module corresponding to the N buses, determines the bus to be worked corresponding to the signal, and controls the output of the decoder and the inverter to make the communication conversion module corresponding to the bus to be worked work, thereby ensuring that only one bus and its corresponding communication conversion module work at the same time. Moreover, because the decoder and the inverter do not have mechanical contacts, the whole communication device will not have the problem of switching error caused by long-term work, reducing the safety risk; the communication device also has the advantages of small size, low cost, no action life limit and low power consumption. BRIEF DESCRIPTION OF DRAWINGS
[0051] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the prior art and the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0052] Figure 1 A structural schematic diagram of a communication device provided by the present application;
[0053] Figure 2 A structural schematic diagram of a communication conversion module corresponding to an HBS bus provided by the present application;
[0054] Figure 3 A structural schematic diagram of a communication conversion module corresponding to a CAN bus provided by the present application;
[0055] Figure 4 A structure diagram of a communication conversion module corresponding to the 485 bus provided by the present application is shown in the figure;
[0056] Figure 5 A structure diagram of another communication device provided by the present application is shown in the figure;
[0057] Figure 6 A structure diagram of another communication device provided by the present application is shown in the figure. DETAILED DESCRIPTION
[0058] The core of the present application is to provide a communication device, which ensures that only one bus and its corresponding communication conversion module work at the same time. Moreover, because the decoder and the inverter do not have mechanical contacts, the whole communication device will not have the problem of switching error caused by long-time work, thereby reducing the safety risk. The communication device also has the advantages of small size, low cost, no action life limit and low power consumption.
[0059] To make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.
[0060] Please refer to Figure 1 , Figure 1 A structure diagram of a communication device provided by the present application is shown in the figure. The device comprises:
[0061] Port 1, the port 1 is connected with N buses 2, and N is an integer not less than 2;
[0062] N buses 2, the N buses 2 are connected with the communication ends of the corresponding communication conversion modules one by one;
[0063] N communication conversion modules 3;
[0064] Processing module 4, the processing module 4 is connected with the communication conversion module, used for determining the to-be-worked bus corresponding to the signal currently transmitted by the port 1, controlling the output of itself, the decoder 5 and the inverter 6 to make the to-be-worked bus corresponding communication conversion module work, so as to communicate through the working communication conversion module, the to-be-worked bus and the port 1;
[0065] Decoder 5, the input end of the decoder 5 is connected with the processing module 4, and the output end is connected with the input end of the inverter 6 and the communication conversion module respectively;
[0066] An inverter 6, an output end of the inverter 6 is connected with the communication conversion module.
[0067] In the application, the port 1 is connected with the N buses 2, when one of the N buses 2 needs to be controlled, the user only needs to transmit signals to the N buses 2 through the port 1, so that the port 1 and the bus to be worked in the N buses 2 can communicate, the safety of the scheme is improved; the processing module 4 is connected with the communication conversion modules corresponding to the N buses 2, receives the signals transmitted by the port 1, and can determine which bus to be worked corresponding to the signals, and then controls the output of the processing module 4, the decoder 5 and the inverter 6 to make the communication conversion module corresponding to the bus to be worked work, so as to communicate through the working communication conversion module, the bus to be worked and the port 1, and then ensure that only one bus and its corresponding communication conversion module work at the same time. Because the decoder 5 and the inverter 6 do not have mechanical contacts, they will not have the problem of switching error caused by long time work like multi-channel signal relays, and the safety risk is reduced; in addition, the decoder 5 and the inverter 6 also have the advantages of small size, low cost, no action life limit and low power consumption.
[0068] In practical application, the method for determining the bus to be worked corresponding to the signals transmitted by the port 1 currently can be that the processing module 4 receives the signals transmitted by the port 1 currently through the HBS bus and the HBS receiving circuit 31, and determines the bus to be worked corresponding to the signals based on the signals, or other methods.
[0069] In practical application, the decoder 5 can be a three-eight decoder or other decoder 5.
[0070] The embodiment provides a communication device, which ensures that only one bus and its corresponding communication conversion module work at the same time. Moreover, because the decoder 5 and the inverter 6 used do not have mechanical contacts, the whole communication device will not have the problem of switching error caused by long time work, and the safety risk is reduced; the communication device also has the advantages of small size, low cost, no action life limit and low power consumption.
[0071] On the basis of the above embodiment:
[0072] As a preferred embodiment, when the N buses 2 include any two or three of the HBS bus, the CAN bus and the 485 bus; the N communication conversion modules 3 include:
[0073] An HBS receiving circuit 31, a receiving end of the HBS receiving circuit 31 is connected with the HBS bus, and a sending end is connected with the processing module 4;
[0074] The HBS sending circuit 32 has a receiving end connected with the output end of the inverter 6 and a sending end connected with the HBS bus;
[0075] In the application, when the HBS bus is included in the N buses 2, the communication conversion module corresponding to the HBS bus includes an HBS receiving circuit 31 and an HBS sending circuit 32, and the specific structure is shown in the figure. Figure 2 The HBS receiving circuit 31 is mainly used for receiving the signal transmitted by the port 1 through the HBS bus, and the HBS sending circuit 32 is mainly used for communicating with the port 1 through the HBS bus. The communication conversion module corresponding to the HBS bus has the advantages of low power consumption and fast information transmission speed.
[0076] It should be noted that after the HBS receiving circuit 31 receives the signal transmitted by the port 1 through the HBS bus, the HBS receiving circuit 31 can transmit the signal to the processing module 4 through HBS_RX in the figure. Figure 2 The processing module 4 can determine the to-be-operated bus corresponding to the signal based on the signal.
[0077] It should be further noted that the triode at the left end of HBS_TA in the HBS sending circuit 32 represents HBS_TA~ and acts as an inverter 6, and the triode at the right end of HBS_TB in the HBS sending circuit 32 represents HBS_TB~ and acts as an inverter 6. When HBS_TA~ is 1 and HBS_TB~ is 0, the triode below outb is turned on, and the triode below outa is not turned on. At this time, outa is 5V, outb is 0V, and the HBS sending circuit works; when HBS_TA~ is 0 and HBS_TB~ is 1, the triode below outb is not turned on, and the triode below outa is turned on. At this time, outa is 0V, outb is 5V, and the HBS sending circuit works; when HBS_TA~ is 0 and HBS_TB~ is 0, the triode below outb is not turned on, and the triode below outa is not turned on. At this time, outa and outb are in a suspended state, and the HBS sending circuit does not work.
[0078] and / or,
[0079] The first CAN chip 33 has an enabling end connected with the processing module 4, a power supply end connected with a power supply, a receiving end and a sending end both connected with the processing module 4, a CANH communication end connected with the Y line of the CAN bus, and a CANL communication end connected with the X line of the CAN bus.
[0080] In the application, when the N buses 2 include a CAN bus, the communication conversion module corresponding to the CAN bus is the first CAN chip 33; after the processing module 4 determines that the bus to be worked corresponding to the signal currently transmitted by the port 1 is the CAN bus, the processing module 4 can enable the first CAN chip 33 through the output of the processing module 4, so that the processing module 4 can make the first CAN chip 33 corresponding to the communication conversion module of the CAN bus work, and the first CAN chip 33, the CAN bus and the port 1 communicate, thereby improving the reliability of the scheme.
[0081] and / or,
[0082] The first 485 chip 34, the first receiving enable end of the first 485 chip 34 is connected with the output end of the decoder 5, the first sending enable end is connected with the output end of the inverter 6, the sending end and the receiving end are both connected with the processing module 4, the A communication end is connected with the A line of the 485 bus, The communication end is connected with the B line of the 485 bus.
[0083] In the application, when the N buses 2 include a 485 bus, the communication conversion module corresponding to the 485 bus is the first 485 chip 34; after the processing module 4 determines that the bus to be worked corresponding to the signal currently transmitted by the port 1 is the 485 bus, the processing module 4 can control the input of the decoder 5, and then control the output of the decoder 5 and the inverter 6 to make the first 485 chip 34 corresponding to the 485 bus work, so as to make the first 485 chip 34, the 485 bus and the port 1 communicate, thereby improving the stability of the scheme.
[0084] As a preferred embodiment, it further includes:
[0085] The second CAN chip 35, the enable end of the second CAN chip 35 is connected with the processing module 4, the power supply end is connected with the power supply, the receiving end and the sending end are both connected with the processing module 4, the CANH communication end is connected with the X line of the CAN bus, and the CANL communication end is connected with the Y line of the CAN bus;
[0086] In the application, when the N buses 2 include a CAN bus, the communication conversion module corresponding to the CAN bus includes the first CAN chip 33 and the second CAN chip 35, and the specific structure is as follows Figure 3When the processing module 4 determines that the to-be-operated bus corresponding to the signal currently transmitted by the port 1 is the CAN bus, the processing module 4 can enable the enable end of the first CAN chip 33 or the enable end of the second CAN chip 35 through the output of the processing module 4, so that the processing module 4 can enable the CAN bus to correspond to the communication conversion module first CAN chip 33 or the second CAN chip 35 to work, and communicate with the port 1 through the working first CAN chip 33 or the second CAN chip 35 and the CAN bus, thereby improving the reliability of the scheme.
[0087] It should be noted that the non-polarity of the CAN bus has no effect on the bus by using the CAN chip to be high-impedance state without power supply, and the chip has a corresponding low-power "silent" mode configuration pin, which is also realized by using two chips to control the enable mode. When the power supply is always powered to the power supply end of the chip, the processing module 4 can enable the enable end of the first CAN chip 33 or the enable end of the second CAN chip 35 through the output of the processing module 4, so that only one of the first CAN chip 33 and the second CAN chip 35 works at the same time, and the non-polarity of the CAN bus is ensured.
[0088] It should be further noted that the STB pin of the first CAN chip 33 is the enable end of the first CAN chip 33, the STB pin of the second CAN chip 35 is the enable end of the second CAN chip 35, and both are connected with the AC_CAN_LE of the processing module 4. The receiving end of the two chips is the RXD pin, and the transmitting end of the two chips is the TXD pin. The receiving end is connected with the AC_RXD of the processing module 4, and the transmitting end is connected with the AC_TXD of the processing module 4.
[0089] and / or,
[0090] The second 485 chip 36, the first receiving enable end of the second 485 chip 36 is connected with the output end of the decoder 5, the first transmitting enable end is connected with the output end of the inverter 6, the transmitting end and the receiving end are connected with the processing module 4, the A communication end is connected with the B line of the 485 bus, The communication end is connected with the A line of the 485 bus.
[0091] In the application, when the 485 bus is included in the N buses 2, and the communication conversion module corresponding to the 485 bus includes the first 485 chip 34 and the second 485 chip 36, the specific structure is as follows Figure 4As shown. When the processing module 4 determines that the signal currently transmitted by the port 1 corresponds to the 485 bus to be worked, the processing module 4 controls the input of the decoder 5, and then controls the output of the decoder 5 and the inverter 6 to make the first 485 chip 34 corresponding to the 485 bus work or the second 485 chip 36 work, so as to communicate with the port 1 through the first 485 chip 34 or the second 485 chip 36 and the 485 bus, thereby improving the stability of the scheme.
[0092] It should be noted that the non-polarity of the 485 bus is realized by reverse connection of the AB bus of the first 485 chip 34 and the second 485 chip 36, and the processing module 4 controls the input of the decoder 5, and then controls the output of the decoder 5 and the inverter 6 to make the first 485 chip 34 and the second 485 chip 36 corresponding to the 485 bus work or not.
[0093] It should be further noted that the application overcomes the compatibility difficulty and realizes non-polarity three-in-one of three bus interfaces. The construction personnel does not need to know what kind of bus the existing bus is, and the polarity does not need to be distinguished. Single-port foolproof access reduces the professional dependence of construction personnel, eliminates the opportunity of human error, reduces the cost of port, the operation and technical support cost of equipment manufacturers, and the cost brought by the requirement of technical personnel level of construction parties. It is safe, simple, efficient, stable, and convenient for large-scale popularization and application of products.
[0094] It should be further noted that the receiving end of the first 485 chip 34 and the second 485 chip 36 is the RO pin, and the transmitting end of the two chips is the pin, and the receiving end is connected with the AC_RXD of the processing module 4, and the transmitting end is connected with the AC_TXD of the processing module 4.
[0095] In actual application, the 485 bus will also use pull-up and pull-down configuration, as shown in Figure 4 , the pull-up and pull-down operation is performed through the AC_485AB, AC_485BA and the corresponding resistors.
[0096] As a preferred embodiment, the port 1 currently transmitted signal corresponding to the bus to be worked is determined, comprising:
[0097] The signal currently transmitted by the port 1 is received through the HBS bus and the HBS receiving circuit 31;
[0098] The signal corresponding to the bus to be worked is determined based on the signal.
[0099] In the application, the processing module 4 receives the signal currently transmitted by the port 1 through the HBS bus and the HBS receiving circuit 31, and determines the to-be-operated bus corresponding to the signal based on the signal, so that the to-be-operated bus corresponding to the signal can be determined more accurately, and the accuracy of the scheme is improved.
[0100] As a preferred embodiment, further comprising:
[0101] The first switch 7 has a first end connected with the power supply, a second end connected with the power supply end of the first CAN chip 33, and a control end connected with the output end of the decoder 5.
[0102] The second switch 8 has a first end connected with the power supply, a second end connected with the power supply end of the second CAN chip 35, and a control end connected with the output end of the decoder 5.
[0103] In the application, the communication device further comprises the first switch 7 and the second switch 8, and the functions of the first switch 7 and the second switch 8 are mainly to prevent the power supply from supplying power to the first CAN chip 33 and the second CAN chip 35 at the same time, to avoid that one of the first CAN chip 33 and the second CAN chip 35 is damaged as a signal mutual interference chip during transmission, and to control the input of the decoder 5 and the output of the decoder 5 when the processing module 4 determines that the to-be-operated bus corresponding to the signal currently transmitted by the port 1 is the CAN bus, so as to control whether the first CAN chip 33 and the second CAN chip 35 corresponding to the CAN bus are powered on, and to control the enable end of the first CAN chip 33 or the enable end of the second CAN chip 35 based on the output of the decoder 5, so that the CAN chip is considered to be in normal operation only when the power supply end of the CAN chip is powered on and the enable end is enabled, and the CAN chip can communicate with the port 1 through the CAN bus, so that the CAN chip does not need to be powered on all the time, and the energy consumption is reduced.
[0104] It should be noted that after the switches are added, whether the first CAN chip 33 and the second CAN chip 35 are powered on is determined by whether CAN1_LE and CAN2_LE are 1, and the truth table can be referred to in the description of the first embodiment. Figure 5
[0105] In actual application, the first switch 7 and the second switch 8 can be P-type MOS tubes or other switching devices.
[0106] Please refer to Figure 5 , Figure 5 for another structure schematic diagram of the communication device provided by the application.
[0107] As a preferred embodiment, the decoder 5 is a three-eight decoder.
[0108] The A input end, the B input end and the C input end of the triplexer are connected with the processing module 4, The output end is connected with the first receiving enable end of the first 485 chip 34, The output end is connected with the first receiving enable end of the second 485 chip 36, The output end is connected with the 1A input end of the inverter 6, The output end is connected with the 2A input end of the inverter 6, The output end is connected with the 3A input end of the inverter 6, The output end is connected with the 4A input end of the inverter 6, The output end is connected with the control end of the second switch 8, The output end is connected with the control end of the first switch 7.
[0109] In the application, the triplexer 5 is a triplexer, after the triplexer is adopted, the input of the triplexer is controlled by the processing module 4, the output of the triplexer can control some communication conversion modules of the N buses 2 to work, the advantages of selecting the triplexer mainly lie in that the output end can perfectly control the case that any two or three of the N buses 2 including the HBS bus, the CAN bus and the 485 bus, and the efficiency of the scheme is improved.
[0110] It should be noted that, for example, when the C input end, the B input end and the A input end of the triplexer are respectively 0, 0, 0 or 0, 1, 0, at this time, the first 485 chip 34 works; when the C input end, the B input end and the A input end of the triplexer are respectively 0, 0, 1 or 0, 1, 1, at this time, the second 485 chip 36 works. When the C input end, the B input end and the A input end of the triplexer are respectively 1, 0, 0 or 1, 0, 1, at this time, the HBS bus works; when the C input end, the B input end and the A input end of the triplexer are respectively 1, 1, 0, at this time, the HBS bus does not work. Other controls can refer to the truth table part in Figure 5 .
[0111] It should be further noted that, Figure 5 The truth table part in RX1 refers to RX1_EN, RX2 refers to RX2_EN, TX1 refers to TX1_EN, TX2 refers to TX2_EN, TA refers to HBS_TA, TB refers to HBS_TB, TA~ refers to HBS_TA~, TB~ refers to HBS_TB~.
[0112] Please refer to Figure 6 , Figure 6 Another communication device structure schematic view provided by the application.
[0113] As a preferred embodiment, the port 1 comprises: a first interface 11, a second interface 12 and a port processing module 13, comprising:
[0114] The first interface 11 and the second interface 12 are connected with the HBS bus respectively;
[0115] The port processing module 13, the first communication port of the port processing module 13 and the second communication port of the port processing module 13 are connected with the HBS bus, the third communication port 1 of the port processing module 13 and the fourth communication port 1 of the port processing module 13 are connected with the 485 bus, for transmitting the signal from the first communication port and the second communication port to the third communication port 1 and the fourth communication port 1 when the signal transmitted by the first communication port and the second communication port is the 485 bus signal, and not transmitting the signal from the first communication port and the second communication port to the third communication port 1 and the fourth communication port 1 when the signal transmitted by the first communication port and the second communication port is not the 485 bus signal.
[0116] It should be noted that the first interface 11 is AC_X, and the second interface 12 is AC_Y.
[0117] In the application, because the port 1 comprises the first interface 11, the second interface 12 and the port processing module 13, when the N buses 2 comprise any two or three of the HBS bus, the CAN bus and the 485 bus, in order to ensure the communication between the port 1 and the N buses 2, the port processing module 13 needs to process the signal, when the signal transmitted by the port 1 is the 485 signal, the port processing module 13 transmits the signal to the 485 bus, when the signal transmitted by the port 1 is not the 485 signal, the port processing module 13 does not transmit the signal to the 485 bus, thereby ensuring the reliability of the scheme.
[0118] As a preferred embodiment, the port processing module 13 comprises:
[0119] The first resistance, the first end of the first resistance is connected with the HBS bus, and the second end is connected with the base of the first NPN triode;
[0120] The first NPN triode, the collector of the first NPN triode is connected with the HBS bus, and the emitter is connected with the 485 bus;
[0121] The first diode, the cathode of the first diode is connected with the HBS bus, and the anode is connected with the 485 bus;
[0122] The first voltage stabilizing diode, the cathode of the first voltage stabilizing diode is connected with the HBS bus, and the anode is connected with the first end of the second resistance;
[0123] The second resistance, the second end of the second resistance is connected with the base of the second NPN triode;
[0124] a second NPN type transistor, a collector of the second NPN type transistor is connected with the second end of the first resistor, and an emitter is connected with the 485 bus;
[0125] a third resistor, a first end of the third resistor is connected with the HBS bus, and a second end is connected with a base of a third NPN type transistor;
[0126] a third NPN type transistor, a collector of the third NPN type transistor is connected with the HBS bus, and an emitter is connected with the 485 bus;
[0127] a third diode, a cathode of the third diode is connected with the HBS bus, and an anode is connected with the 485 bus;
[0128] a second voltage stabilizing diode, a cathode of the second voltage stabilizing diode is connected with the HBS bus, and an anode is connected with a first end of a fourth resistor;
[0129] a fourth resistor, a second end of the fourth resistor is connected with a base of a fourth NPN type transistor;
[0130] a fourth NPN type transistor, a collector of the fourth NPN type transistor is connected with the second end of the third resistor, and an emitter is connected with the 485 bus.
[0131] In the application, because the voltage resistance of the HBS bus and the voltage resistance of the 485 bus are too different, in order to ensure that when the N buses 2 include the HBS bus, the CAN bus and the 485 bus, the voltage of the signal input by the port 1 is too large, the communication between the port 1 and the 485 bus is disconnected; the voltage of the signal input by the port 1 is moderate, the communication between the port 1 and the 485 bus is connected, so the port processing module 13 is composed of the first voltage stabilizing diode, the second voltage stabilizing diode and other devices, the stability and safety of the scheme are improved.
[0132] It needs to be explained that HBS bus, CAN bus and 485 bus are all differential signal transmission buses, since HBS belongs to carrier bus, the voltage difference is the highest, and the signal voltage difference is also the highest, which is placed at the entrance. The bus corresponds to HBS_1, HBS_2. The CAN bus transceiver can withstand voltage of-40 to +40v in the bus empty state, which covers the HBS carrier voltage, so it can be connected after the HBS bus, but it is necessary to ensure that the CAN bus is not enabled when the HBS bus is used. The CAN bus corresponds to C_X (X line), C_Y (Y line). After that is the 485 bus. Since the withstand voltage design of most 485 chips will not exceed-15 to +15v, and the working requirement is that the bus is-7 to +12v, and some brands of HBS use 30v carrier (sending state will reach 35v), so it cannot be directly connected, and the port processing module 13 is used for isolation. Its principle is that the bus voltage higher than the conduction voltage of the zener diode will make the connected triode conduct, and then make another triode in the upper layer close, so that the line with higher voltage is disconnected with the rear bus, (otherwise, the triode in the upper layer is in the conductive state by default, and the bus is in the connected state) and the line with lower voltage is pulled down due to the presence of the front-end diode. The 485 bus corresponds to AC_AB (A line), AC_BA (B line).
[0133] As a preferred embodiment, it further comprises:
[0134] The common mode interference filtering module 9 is connected with the port 1 at the input end and connected with the HBS bus at the output end.
[0135] In the application, the communication device further comprises the common mode interference filtering module 9, since the HBS bus, the CAN bus and the 485 bus are all differential signal transmission buses, so adding a common mode interference filtering module 9 at the connection between the HBS bus and the port 1 can filter out certain common mode interference, thereby improving the reliability of the scheme.
[0136] In actual application, the common mode interference filtering module 9 can be a common mode inductor or other devices.
[0137] As a preferred embodiment, the common mode interference filtering module 9 is a common mode inductor.
[0138] In the application, the common mode interference filtering module 9 adopted is a common mode inductor, which has the advantages of good balance, convenient use and high quality.
[0139] It is to be noted that, in this specification, terms such as first and second, etc., are merely used to distinguish one entity or action from another, and do not necessarily require or imply any actual such relationship or order between such entities or actions. Also, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the recited element.
[0140] The above description of disclosed embodiments provides enabling concepts for practicing or using the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A communication device, characterized in that, include: Each port is connected to N buses, where N is an integer not less than 2; N buses, each of which is connected to the communication terminal of its corresponding communication conversion module; N of the aforementioned communication conversion modules; A processing module, connected to the communication conversion module, is used to determine the bus to be worked corresponding to the signal currently transmitted by the port, and control its own output, the decoder and the inverter to make the communication conversion module corresponding to the bus to be worked work, so as to communicate with the port through the working communication conversion module, the bus to be worked, and the port. A decoder, wherein the input of the decoder is connected to the processing module, and the output is connected to the input of the inverter and the communication conversion module respectively; The inverter, the output of which is connected to the communication conversion module; When the N buses include any two or three of the following: HBS bus, CAN bus, and 485 bus; the N communication conversion modules include: The HBS receiving circuit has its receiving end connected to the HBS bus and its transmitting end connected to the processing module. The HBS transmitting circuit has its receiving end connected to the output end of the inverter and its transmitting end connected to the HBS bus. Determining the bus to be operated corresponding to the signal currently being transmitted at the port includes: The signal currently transmitted at the port is received through the HBS bus and the HBS receiving circuit. The bus to be operated is determined based on the signal.
2. The communication device as described in claim 1, characterized in that, The N communication conversion modules also include: The first CAN chip has its enable terminal connected to the processing module, its power supply terminal connected to the power supply, its receiver and transmitter terminals both connected to the processing module, its CANH communication terminal connected to the Y line of the CAN bus, and its CANL communication terminal connected to the X line of the CAN bus. And / or, A first 485 chip has its first receive enable terminal connected to the output terminal of the decoder, its first transmit enable terminal connected to the output terminal of the inverter, both the transmit and receive terminals connected to the processing module, and its A communication terminal connected to the A line of the 485 bus. The communication terminal is connected to line B of the 485 bus.
3. The communication device as described in claim 2, characterized in that, Also includes: The second CAN chip has its enable terminal connected to the processing module, its power supply terminal connected to the power source, its receiver and transmitter terminals both connected to the processing module, its CANH communication terminal connected to the X-line of the CAN bus, and its CANL communication terminal connected to the Y-line of the CAN bus. And / or, The second 485 chip has its first receive enable terminal connected to the output of the decoder, its first transmit enable terminal connected to the output of the inverter, and both the transmit and receive terminals connected to the processing module. Communication terminal A is connected to line B of the 485 bus. The communication terminal is connected to line A of the 485 bus.
4. The communication device as described in claim 3, characterized in that, Also includes: A first switch, wherein a first end of the first switch is connected to the power supply, a second end is connected to the power supply terminal of the first CAN chip, and a control terminal is connected to the output terminal of the decoder; The second switch has a first end connected to the power supply, a second end connected to the power supply terminal of the second CAN chip, and a control terminal connected to the output terminal of the decoder.
5. The communication device as described in claim 4, characterized in that, The decoder is a 3-8 decoder; The A, B, and C inputs of the 3 / 8 decoder are all connected to the processing module. The output terminal is connected to the first receive enable terminal of the first 485 chip. The output terminal is connected to the first receive enable terminal of the second 485 chip. The output terminal is connected to the 1A input terminal of the inverter. The output terminal is connected to the 2A input terminal of the inverter. The output terminal is connected to the 3A input terminal of the inverter. The output terminal is connected to the 4A input terminal of the inverter. The output terminal is connected to the control terminal of the second switch. The output terminal is connected to the control terminal of the first switch.
6. The communication device according to any one of claims 2 to 5, characterized in that, The port includes: a first interface, a second interface, and a port processing module, including: Both the first interface and the second interface are connected to the HBS bus. The port processing module has its first and second communication ports connected to the HBS bus, and its third and fourth communication ports connected to the 485 bus. When the signals transmitted by the first and second communication ports are 485 bus signals, the module transmits the signals from the first and second communication ports to the third and fourth communication ports. When the signals transmitted by the first and second communication ports are not 485 bus signals, the module does not transmit the signals from the first and second communication ports to the third and fourth communication ports.
7. The communication device as claimed in claim 6, characterized in that, The port processing module includes: A first resistor, the first end of which is connected to the HBS bus, and the second end of which is connected to the base of a first NPN transistor; The first NPN transistor has its collector connected to the HBS bus and its emitter connected to the 485 bus. The first diode has its cathode connected to the HBS bus and its anode connected to the 485 bus. The first Zener diode has its cathode connected to the HBS bus and its anode connected to the first terminal of the second resistor. The second resistor, the second end of which is connected to the base of the second NPN transistor; The collector of the second NPN transistor is connected to the second end of the first resistor, and the emitter is connected to the 485 bus. The third resistor has its first end connected to the HBS bus and its second end connected to the base of the third NPN transistor. The collector of the third NPN transistor is connected to the HBS bus, and the emitter is connected to the 485 bus. The third diode, wherein the cathode of the third diode is connected to the HBS bus and the anode is connected to the 485 bus; The second Zener diode has its cathode connected to the HBS bus and its anode connected to the first terminal of the fourth resistor. The fourth resistor, the second end of which is connected to the base of the fourth NPN transistor; The collector of the fourth NPN transistor is connected to the second end of the third resistor, and the emitter is connected to the 485 bus.
8. The communication device as claimed in claim 6, characterized in that, Also includes: A common-mode interference filtering module, wherein the input terminal of the common-mode interference filtering module is connected to the port, and the output terminal is connected to the HBS bus.
9. The communication device as claimed in claim 8, characterized in that, The common-mode interference filtering module is a common-mode inductor.
Citation Information
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