A method for preparing an electrode for a light emitting diode

Abstract

The present disclosure provides a light-emitting diode electrode preparation method, comprising: coating a photoresist, and making an electrode preparation hole and a first groove surrounding the electrode preparation hole on the photoresist, the electrode preparation hole penetrating through the photoresist, and the first groove not penetrating through the photoresist; wherein the electrode preparation hole and the first groove are both trapezoidal in the vertical plane; making a laminated electrode metal layer on the photoresist formed with the electrode preparation hole and the first groove, the laminated electrode metal layer comprising a first part on the photoresist and a second part in the electrode preparation hole; the laminated electrode metal layer comprises a base layer and a wrapping layer which are sequentially laminated, and the wrapping layer wraps the base layer; and stripping the photoresist and the first part on the photoresist, leaving the second part in the electrode preparation hole as an electrode.

Description

Technical Field

[0001] This disclosure relates to the field of light-emitting diode (LED) fabrication, and particularly to a method for preparing electrodes for LEDs. Background Technology

[0002] A light-emitting diode (LED) chip is a semiconductor electronic component that emits light. As a highly efficient, environmentally friendly, and green new type of solid-state lighting source, it is being rapidly and widely used in applications such as traffic lights, automotive interior and exterior lights, urban landscape lighting, and mobile phone backlights.

[0003] An LED chip includes at least an epitaxial layer and electrodes located on and connected to the epitaxial layer. The electrodes are used to contact a power source and conduct current into the epitaxial layer. During electrode fabrication, photoresist needs to be coated on the surface of the epitaxial layer, and electrode fabrication holes are left on the surface of the photoresist. Electrodes are then deposited within the electrode fabrication holes, and finally, the photoresist is removed.

[0004] In flip-chip LEDs, to improve the external quantum efficiency of light, Cr / Al or Cr / Ag, which are highly reflective materials, are typically used as the N-electrode and P-electrode. Simultaneously, to prevent reactions between air and chemicals and Al or Ag, multiple Ti / Pt or Ni / Pt layers are usually stacked on top of the Cr / Al or Cr / Ag layers, which are then encapsulated. To easily and effectively fabricate these encapsulated multilayer metal electrodes, related technologies use trapezoidal electrode preparation holes in the photoresist. Utilizing the high tensile stress and high adhesion of Ti or Ni metals, the opening of the electrode preparation holes gradually increases with the deposition time, thus fabricating the encapsulated multilayer metal electrode in a single step. However, further improving the encapsulation degree of the multilayer metal electrode to further reduce the influence of air or chemicals on the reflective metal layer remains a challenge that needs to be addressed. Summary of the Invention

[0005] This disclosure provides a method for fabricating electrodes for light-emitting diodes, which can further improve the encapsulation degree of the encapsulated multilayer metal electrode. The technical solution is as follows:

[0006] This disclosure provides a method for fabricating an electrode for a light-emitting diode, the method comprising:

[0007] A photoresist is coated, and an electrode preparation hole and a first groove surrounding the electrode preparation hole are formed on the photoresist. The electrode preparation hole penetrates the photoresist, and the first groove does not penetrate the photoresist. The cross-sectional shape of the electrode preparation hole and the first groove in the vertical plane is trapezoidal, with the bottom of the electrode preparation hole corresponding to the lower base of the trapezoid and the bottom of the first groove corresponding to the upper base of the trapezoid.

[0008] A stacked electrode metal layer is fabricated on a photoresist having the electrode fabrication hole and the first groove. The stacked electrode metal layer includes a first portion located on the photoresist and a second portion located in the electrode fabrication hole. The stacked electrode metal layer includes a base layer and a wrapping layer stacked sequentially, and the wrapping layer wraps the base layer.

[0009] The photoresist and the first portion located on the photoresist are stripped away, leaving the second portion in the electrode fabrication hole as the electrode.

[0010] Optionally, the trapezoid corresponding to the first groove is an isosceles trapezoid, and the angle between the upper base and the hypotenuse of the trapezoid corresponding to the first groove ranges from 100 degrees to 135 degrees.

[0011] Optionally, the depth of the first groove is 0.4 to 0.6 times the thickness of the photoresist, the length of the bottom edge of the first groove is 10 μm to 15 μm, and the horizontal distance between the first groove and the electrode preparation hole is 0.25 μm to 5 μm.

[0012] Optionally, the trapezoid corresponding to the electrode preparation hole is an isosceles trapezoid, and the angle between the lower base and the hypotenuse of the trapezoid corresponding to the electrode preparation hole ranges from 10 degrees to 45 degrees.

[0013] Optionally, the step of fabricating an electrode preparation hole on the photoresist and a first groove surrounding the electrode preparation hole includes:

[0014] The photoresist undergoes a first exposure process, corresponding to the electrode preparation hole; the photoresist undergoes a second exposure process, corresponding to the first groove; the photoresist undergoes a development process to obtain the electrode preparation hole and the first groove.

[0015] Optionally, the method further includes:

[0016] Before fabricating the stacked electrode metal layer, a plurality of second grooves are fabricated in the first groove at intervals.

[0017] Optionally, the plurality of second grooves are located at the bottom of the first groove and on the side of the first groove near the electrode preparation hole.

[0018] Optionally, the depth of the second groove ranges from 0.1 to 0.2 times the thickness of the photoresist.

[0019] Optionally, the total area of ​​the plurality of second grooves accounts for 30% to 60% of the total area of ​​the bottom of the first groove and the side near the electrode preparation hole.

[0020] This disclosure also provides a light-emitting diode chip, which is fabricated using the method described in any of the preceding embodiments.

[0021] In this embodiment of the disclosure, the base layer is a Cr / Al or Cr / Ag stack, and the encapsulation layer is a multi-period Ni / Pt or Ti / Pt stack.

[0022] Optionally, the stacked electrode metal layer further includes a welding layer of the encapsulation layer, which may be an Au layer.

[0023] For example, the stacked electrode metal layer includes a base layer, a coating layer, and a welding layer stacked sequentially. The base layer is a Cr / Al or Cr / Ag stack; the coating layer is a Ni / Pt or Ti / Pt stack with multiple cycles, the number of cycles being 2-4; and the welding layer is an Au layer.

[0024] The stacked electrode metal layer includes a first portion located on the photoresist and a second portion located in the electrode fabrication hole.

[0025] In the second part within the electrode preparation hole, the welding layer Au covers the sides and top surface of the wrapping layer, and the wrapping layer covers the sides and top surface of the base layer, preventing air and chemical agents from reacting with the Al or Ag of the base layer.

[0026] The effects of the embodiments of this disclosure are illustrated below using a Ni / Pt electrode with two-period encapsulation layers as an example:

[0027] A first Ni layer is deposited on the base layer. Due to the good adhesion of Ni metal, the first Ni layer will contact the inside of the electrode preparation hole edge. A first Pt layer is deposited on the first Ni layer. Due to the poor adhesion of Pt metal, the first Pt layer will not cover the first Ni layer at the electrode preparation hole edge. A second Ni layer is deposited on the first Pt layer. The second Ni layer will cover the first Pt layer at the electrode preparation hole edge and contact the first Ni layer. A second Pt layer is deposited on the second Ni layer. The second Pt layer will not cover the second Ni layer at the electrode preparation hole edge. An Au layer is deposited on the second Pt layer. The Au layer will cover the second Pt layer at the electrode preparation hole edge and contact the second Ni layer.

[0028] Because Pt metal has very high tensile stress, after the first Pt metal layer is deposited, a horizontal force extending outward along the photoresist surface is applied to the edge of the electrode preparation hole, thereby enlarging the opening of the electrode preparation hole. After the second Pt metal layer is deposited, the aforementioned horizontal force further increases, thereby further enlarging the opening of the electrode preparation hole. In other words, during the above fabrication process, the opening of the trapezoidal electrode preparation hole gradually increases, which causes the area of ​​each metal layer deposited into the electrode preparation hole to gradually increase as well. This achieves the effect that the later deposited metal layer includes the earlier deposited metal layer, thereby improving the encapsulation effect of the encapsulated stacked metal electrode.

[0029] The force F applied by the encapsulation layer to the edge of the electrode preparation hole can be decomposed into two components: F in the horizontal direction and F in the vertical direction. The horizontal component determines the degree of opening expansion, while the vertical component has no effect on opening expansion. This disclosure creates a first groove around the electrode preparation hole. Due to the presence of this inverted trapezoidal first groove, after each layer of the encapsulation layer is deposited onto the photoresist, the shape of the encapsulation layer at the edge of the electrode preparation hole is flatter compared to the case without the first groove. This results in a larger horizontal force F, thereby increasing the degree of opening expansion of the electrode preparation hole after two Pt metal layer depositions, and enabling better encapsulation of each stack of metal electrodes. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a flowchart of a method for fabricating an electrode for a light-emitting diode provided in an embodiment of this disclosure;

[0032] Figure 2 This is a schematic diagram of the force applied by the encapsulation layer to the edge of the electrode fabrication hole according to an embodiment of this disclosure;

[0033] Figure 3 This is a flowchart of another method for preparing an electrode for a light-emitting diode provided in this disclosure embodiment;

[0034] Figure 4 This is a schematic diagram of the LED chip fabrication process provided in the embodiments of this disclosure;

[0035] Figure 5 This is a schematic diagram of the LED chip fabrication process provided in the embodiments of this disclosure;

[0036] Figure 6This is a schematic diagram of the LED chip fabrication process provided in the embodiments of this disclosure;

[0037] Figure 7 This is a schematic diagram of the LED chip fabrication process provided in the embodiments of this disclosure;

[0038] Figure 8 This is a schematic diagram of the structure of a light-emitting diode chip provided in an embodiment of this disclosure. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0040] Figure 1 This is a flowchart illustrating a method for fabricating an electrode for a light-emitting diode according to an embodiment of this disclosure. See also... Figure 1 The method for fabricating electrodes for this light-emitting diode includes the following steps:

[0041] 101: Coat a photoresist and fabricate an electrode preparation hole and a first groove surrounding the electrode preparation hole on the photoresist.

[0042] Among them, coating photoresist can refer to coating photoresist on the epitaxial layer of a light-emitting diode chip.

[0043] The electrode preparation hole penetrates the photoresist, while the first groove does not penetrate the photoresist. The cross-sectional shape of both the electrode preparation hole and the first groove in the vertical plane is trapezoidal, with the bottom of the electrode preparation hole corresponding to the lower base of the trapezoid and the bottom of the first groove corresponding to the upper base of the trapezoid.

[0044] That is, the electrode preparation hole is a regular trapezoid, and the first groove is an inverted trapezoid.

[0045] 102: A stacked electrode metal layer is fabricated on the photoresist on which the electrode preparation hole and the first groove are formed.

[0046] The stacked electrode metal layer includes a base layer and a wrapping layer stacked sequentially, with the wrapping layer wrapping the base layer.

[0047] In this embodiment of the disclosure, the base layer is a Cr / Al or Cr / Ag stack, and the encapsulation layer is a multi-period Ni / Pt or Ti / Pt stack.

[0048] Optionally, the stacked electrode metal layer further includes a welding layer of the encapsulation layer, which may be an Au layer.

[0049] For example, the stacked electrode metal layer includes a base layer, a coating layer, and a welding layer stacked sequentially. The base layer is a Cr / Al or Cr / Ag stack; the coating layer is a Ni / Pt or Ti / Pt stack with multiple cycles, the number of cycles being 2-4; and the welding layer is an Au layer.

[0050] The stacked electrode metal layer includes a first portion located on the photoresist and a second portion located in the electrode fabrication hole.

[0051] In the second part within the electrode preparation hole, the welding layer Au covers the sides and top surface of the wrapping layer, and the wrapping layer covers the sides and top surface of the base layer, preventing air and chemical agents from reacting with the Al or Ag of the base layer.

[0052] 103: Remove the photoresist and the first portion located on the photoresist, leaving the second portion in the electrode preparation hole as the electrode.

[0053] The effects of the embodiments of this disclosure are illustrated below using a Ni / Pt electrode with two-period encapsulation layers as an example:

[0054] A first Ni layer is deposited on the base layer. Due to the good adhesion of Ni metal, the first Ni layer will contact the inside of the electrode preparation hole edge. A first Pt layer is deposited on the first Ni layer. Due to the poor adhesion of Pt metal, the first Pt layer will not cover the first Ni layer at the electrode preparation hole edge. A second Ni layer is deposited on the first Pt layer. The second Ni layer will cover the first Pt layer at the electrode preparation hole edge and contact the first Ni layer. A second Pt layer is deposited on the second Ni layer. The second Pt layer will not cover the second Ni layer at the electrode preparation hole edge. An Au layer is deposited on the second Pt layer. The Au layer will cover the second Pt layer at the electrode preparation hole edge and contact the second Ni layer.

[0055] Because Pt metal has very high tensile stress, after the first Pt metal layer is deposited, a horizontal force extending outward along the photoresist surface is applied to the edge of the electrode preparation hole, thereby enlarging the opening of the electrode preparation hole. After the second Pt metal layer is deposited, the aforementioned horizontal force further increases, thereby further enlarging the opening of the electrode preparation hole. In other words, during the above fabrication process, the opening of the trapezoidal electrode preparation hole gradually increases, which causes the area of ​​each metal layer deposited into the electrode preparation hole to gradually increase as well. This achieves the effect that the later deposited metal layer includes the earlier deposited metal layer, thereby improving the encapsulation effect of the encapsulated stacked metal electrode.

[0056] Figure 2The diagram illustrates the force F applied by the encapsulation layer to the edge of the electrode preparation hole. F can be decomposed into horizontal and vertical components, where the horizontal component determines the opening expansion, and the vertical component has no effect on opening expansion. This disclosure, by providing a first groove around the electrode preparation hole, results in a more flattened shape of the encapsulation layer at the edge of the electrode preparation hole after each layer of the encapsulation layer is deposited onto the photoresist, compared to the case without the first groove. This means that angle η is smaller, as shown in the diagram. A smaller η results in a larger horizontal force F, thereby increasing the opening expansion of the electrode preparation hole after two Pt metal layer depositions, enabling better encapsulation of the various stacked metal electrode layers.

[0057] Figure 3 This is a flowchart illustrating a method for fabricating an electrode for a light-emitting diode according to an embodiment of this disclosure. See also... Figure 3 The method for fabricating electrodes for this light-emitting diode includes the following steps:

[0058] 201: Fabricate an epitaxial layer on a substrate.

[0059] In one implementation of the embodiments of this disclosure, the substrate may be a sapphire substrate.

[0060] In other implementations of the embodiments of this disclosure, the substrate may also be one of sapphire wafers, GaN wafers, SiC wafers, or Si wafers. This disclosure does not limit this.

[0061] For example, the substrate may be 2 inches, 4 inches, or 6 inches in size.

[0062] The epitaxial layer includes a buffer layer, an N-type nitride semiconductor layer, a quantum well light-emitting layer, a P-type nitride semiconductor layer, and an indium tin oxide (ITO) current spreading layer, which are stacked sequentially.

[0063] For example, see Figure 4 Step 201 may include: depositing a buffer layer (not shown in the figure), an N-type nitride semiconductor layer 12, a quantum well light-emitting layer (not shown in the figure), and a P-type nitride semiconductor layer 13 on the substrate 11 using photolithography; preparing a patterned photoresist on the P-type nitride semiconductor layer 13; performing plasma etching on the epitaxial wafer to prepare a mesa step 20 and an edge step 21 structure; and preparing an ITO current spreading layer 14 on the P-type nitride semiconductor layer 13.

[0064] In one implementation provided in this disclosure, the structure of the epitaxial layer can be as described above. Figure 4 As shown in the diagram. In other implementations provided in this disclosure, the structure of the epitaxial layer can also be... Figure 4 This disclosure does not restrict the addition or reduction of membrane structures based on existing structures.

[0065] It should be noted that, in the embodiments disclosed herein, the growth method of light-emitting diodes can be achieved using Veeco K465iorC4orRBMOCVD (Metal-Organic Chemical Vapor Deposition) equipment or AIXTRON metal-organic chemical vapor deposition equipment. High-purity H2 (hydrogen), high-purity N2 (nitrogen), or a mixture of high-purity H2 and high-purity N2 is used as the carrier gas; high-purity NH3 is used as the N source; trimethylgallium (TMGa) and triethylgallium (TEGa) are used as gallium sources; trimethylindium (TMIn) is used as the indium source; silane (SiH4) is used as the N-type dopant; trimethylaluminum (TMAl) is used as the aluminum source; and magnesium pyrocene (CP2Mg) is used as the P-type dopant.

[0066] 202: Coat the surface of the epitaxial layer with photoresist.

[0067] Photoresist is coated on the surface of the ITO current spreading layer 14, the surface of the mesa step 20, and the surface of the edge step 21. The thickness of the photoresist ranges from 2 to 12 μm.

[0068] 203: Fabricate an electrode preparation hole and a first groove surrounding the electrode preparation hole on the photoresist.

[0069] For example, step 203 may include: performing a first exposure process on the photoresist, the first exposure process corresponding to the electrode preparation hole; performing a second exposure process on the photoresist, the second exposure process corresponding to the first groove; and performing a development process on the photoresist to obtain the electrode preparation hole and the first groove.

[0070] The two exposure processes control the amount of light transmitted through the photomask, thereby enabling the fabrication of the trapezoidal electrode preparation hole and the inverted trapezoidal first groove.

[0071] In this embodiment, the first groove can be an annular groove surrounding the electrode preparation hole, such as a circular ring, a rectangular ring, or a rounded rectangular ring. The annular groove surrounding the electrode preparation hole enlarges the opening of the electrode preparation hole.

[0072] Optionally, before the first exposure, the method further includes baking and homogenizing the photoresist. The baking temperature of the photoresist can be 90–100°C, and the baking time can be 30 minutes. This softens the photoresist, facilitating subsequent homogenization and exposure operations.

[0073] like Figure 5As shown, the electrode preparation hole 33 penetrates the photoresist 31. The cross-sectional shape of the electrode preparation hole 33 in the vertical plane is trapezoidal, and the bottom of the electrode preparation hole 33 corresponds to the lower base of the trapezoid, that is, the electrode preparation hole 33 is a regular trapezoid.

[0074] For example, the trapezoid corresponding to the electrode preparation hole 33 is an isosceles trapezoid, and the angle α between the lower base and the hypotenuse of the trapezoid corresponding to the electrode preparation hole 33 ranges from 10 degrees to 45 degrees. For example, the angle α is 30 degrees.

[0075] The lengths of the upper and lower bottom edges of the electrode fabrication hole 33 are determined based on the electrode design dimensions. For example, the length of the upper bottom edge is greater than the length of the base layer in the second part of the stacked electrode metal layers, but less than the lengths of the encapsulation layer and the weld layer, which are vapor-deposited after the opening is enlarged. The length of the lower bottom edge is greater than the length of the weld layer.

[0076] The above design allows the length of the metal layer deposited into the electrode preparation hole 33 to gradually increase, achieving a structure where the coating layer wraps the base layer and the welding layer wraps the coating layer.

[0077] like Figure 5 As shown, the first groove 32 does not penetrate the photoresist 31. The cross-sectional shape of the first groove 32 in the vertical plane is trapezoidal, and the bottom of the first groove 32 corresponds to the upper base of the trapezoid, that is, the first groove 32 is an inverted trapezoid.

[0078] Among them, the cross-section of the first groove 32 in the vertical plane, that is, the cross-section of the annular groove, is an inverted trapezoid.

[0079] For example, the trapezoid corresponding to the first groove 32 is an isosceles trapezoid, and the angle β between the upper base and the hypotenuse of the trapezoid corresponding to the first groove 32 ranges from 100 degrees to 135 degrees. For example, the angle β is 120 degrees.

[0080] The depth of the first groove 32 ranges from 0.4 to 0.6 times the thickness of the photoresist 31, the length of the bottom edge of the first groove 32 ranges from 10 μm to 15 μm, and the horizontal distance between the first groove 32 and the electrode preparation hole 33 ranges from 0.25 μm to 5 μm. For example, the depth of the first groove 32 is 0.5 times the thickness of the photoresist 31, the length of the bottom edge of the first groove 32 is 12 μm, and the horizontal distance between the first groove 32 and the electrode preparation hole 33 is 2 μm.

[0081] The first groove with the above shape and size can make the shape of the coating layer at the edge of the electrode preparation hole flatter, which is beneficial for expanding the opening of the electrode preparation hole by horizontal force.

[0082] It is worth noting that the cross-sectional shape of the electrode preparation hole 33 and the first groove 32 in the vertical plane is trapezoidal. The electrode preparation hole 33 can be a frustum structure, such as a frustum or a pyramid. The first groove 32 is a circular ring, a rectangular ring, or a rounded rectangular ring with a trapezoidal cross-section.

[0083] 204: A plurality of second grooves are made at intervals within the first groove.

[0084] For example, step 204 may include: performing a third exposure process on the photoresist, the third exposure process corresponding to the plurality of second grooves; and performing a development process on the photoresist to obtain the plurality of spaced second grooves.

[0085] like Figure 6 As shown, the plurality of second grooves 51 are located at the bottom of the first groove and on the side near the electrode preparation hole.

[0086] The force exerted by the coating layer on the edge of the electrode preparation hole opening is also affected by the magnitude of the deformation of the coating layer due to the tension of the Ni or Ti layer. The uneven structure formed by multiple second grooves 51 increases the adhesion between the coating layer and the photoresist. When the coating layer shrinks in volume due to tensile stress and tightens the opening, the uneven structure plays a positioning role, which can effectively reduce the volume of deformation of the coating layer due to the tensile stress of the Pt or Ti metal layer, thereby increasing the horizontal force exerted by the coating layer on the edge of the electrode preparation hole opening.

[0087] In other possible implementations, the second groove 51 may also be provided at the bottom and sides of the entire first groove.

[0088] For example, the depth of the second groove ranges from 0.1 to 0.2 times the thickness of the photoresist. The total area of ​​the plurality of second grooves accounts for 30% to 60% of the total area of ​​the bottom of the first groove and the side surface near the electrode fabrication hole. For example, the depth of the second groove is 0.15 times the thickness of the photoresist. The total area of ​​the plurality of second grooves accounts for 50% of the total area of ​​the bottom of the first groove and the side surface near the electrode fabrication hole.

[0089] The depth and area design of the second groove ensures that the concave-convex structure effectively increases the adhesion between the coating layer and the photoresist.

[0090] The second groove can be an annular groove located within the first groove and surrounding the electrode preparation hole. This annular shape can be a circular ring, a rectangular ring, or a rounded rectangular ring, etc. Multiple rings of the second groove ensure that the uneven structure effectively increases the adhesion between the coating layer and the photoresist.

[0091] The cross-sectional shape of the second groove can be a cuboid, a cylinder, or other regular or irregular shapes.

[0092] 205: Fabricate a stacked electrode metal layer on the photoresist on which the electrode preparation hole and the first groove are formed.

[0093] The stacked electrode metal layer includes a first portion located on the photoresist and a second portion located in the electrode fabrication hole.

[0094] The stacked electrode metal layer includes a base layer, a wrapping layer, and a welding layer stacked sequentially.

[0095] The base layer is a Cr / Al or Cr / Ag stack; the coating layer is a multi-period Ni / Pt or Ti / Pt stack with 2-4 periods; the welding layer is an Au layer.

[0096] The following explanation of step 205 uses a stacked electrode metal layer with two cycles of encapsulation layers as an example. Figure 7 As shown:

[0097] A Cr / Al or Cr / Ag base layer 41 is deposited on the surface of the patterned photoresist layer 31 by electron beam evaporation.

[0098] An encapsulation layer 42 consisting of two Ni / Pt stacks or Ti / Pt stacks is deposited on a Cr / Al or Cr / Ag base layer 41 using electron beam evaporation technology.

[0099] An Au welding layer 43 is deposited on the encapsulation layer 42 using electron beam evaporation technology.

[0100] The thickness of the Cr layer is 0.5 nm to 3 nm, the thickness of the Al or Ag layer is 10 nm to 200 nm, the thickness of the Ni or Ti layer is 50 nm to 500 nm, the thickness of the Pt layer is 30 nm to 200 nm, and the thickness of the Au layer is 500 nm to 1500 nm.

[0101] Optionally, to better achieve the encapsulation of the base layer 41 by the encapsulation layer 42, a low thermal conductivity NiCr metal material can be added between the base layer 41 and the encapsulation layer 42. The low thermal conductivity NiCr metal layer can effectively block the heat from the encapsulation layer 42 and the welding layer 43 from being conducted downwards in a direction perpendicular to the LED chip surface, thereby promoting the transfer of heat along a direction parallel to the LED chip surface to the electrode preparation hole opening. This makes the photoresist near the electrode preparation hole opening softer, which in turn helps the encapsulation layer 42 shrink the photoresist at the edge of the electrode preparation hole opening and enlarge the electrode preparation hole opening.

[0102] For example, the electrode deposition pressure in the stacked electrode metal layer is 2.0 × 10⁻⁶ Torr. This ensures the stable fabrication of the entire electrode.

[0103] Optionally, the deposition rate of the first Ni electrode metal layer is 2 to 10 A / s.

[0104] During the evaporation process, maintaining the evaporation rate of the first Ni electrode metal layer within the above range ensures a relatively dense structure. The shrinkage of the first Ni electrode metal layer also exerts a stabilizing force on the photoresist. Furthermore, the first Ni electrode metal layer obtained using the above evaporation rate exhibits good quality and a relatively smooth surface, ensuring the quality of the subsequent evaporation of the motor metal layer.

[0105] For example, the evaporation temperature of the first Ni electrode metal layer is 20-70°C.

[0106] When the evaporation temperature of the first Ni electrode metal layer is within this range, the crystal quality of the first Ni electrode metal layer can be guaranteed. At the same time, the evaporation temperature difference between the first Ni electrode metal layer and the electrode metal layer following it will not be too large, which can ensure that the shrinkage of the first Ni electrode metal layer is small and the impact on the deformation of the photoresist is relatively small.

[0107] Optionally, the evaporation rate of the second Ni electrode metal layer is the same as that of the first Ni electrode metal layer. This ensures further shrinkage of the photoresist, controls the further increase in the aperture of the electrode preparation hole in the direction away from the epitaxial layer, and achieves further outward expansion of the electrode sides within the electrode preparation hole, resulting in stable deposition.

[0108] Optionally, the evaporation temperature of the second Ni electrode metal layer is higher than that of the first Ni electrode metal layer.

[0109] The evaporation temperature of the second Ni electrode metal layer is higher than that of the first Ni electrode metal layer. This ensures that the second Ni electrode metal layer shrinks further on top of the shrinkage generated by the first Ni electrode metal layer. It also controls the aperture of the electrode preparation hole to increase further in the direction away from the epitaxial layer, thus achieving a slow transition in the aperture of the electrode preparation hole and stable deposition of the electrode within the electrode preparation hole.

[0110] For example, the difference between the evaporation temperature of the first Ni electrode metal layer and the evaporation temperature of the second Ni electrode metal layer is 5°C to 15°C. This ensures a slow transition in the aperture of the electrode preparation holes.

[0111] 206: Remove the photoresist and the first portion located on the photoresist, leaving the second portion in the electrode fabrication hole as the electrode.

[0112] The photoresist and a first portion of the metal electrode layer thereon are removed using a stripping technique, leaving only a second portion of the metal electrode layer within the electrode fabrication hole 33 as the electrode. For example, an organic solvent can be used to remove the photoresist, facilitating its stripping.

[0113] Here, two electrode fabrication holes are formed during the fabrication of the light-emitting diode chip. Multiple first grooves are formed around each electrode fabrication hole to obtain two electrodes, namely an N electrode and a P electrode.

[0114] Optionally, the method further includes: fabricating a distributed Bragg reflection (DBR) layer, P-pads, and N-pads using photolithography and ion beam evaporation techniques to obtain a flip-chip LED. The DBR reflective layer comprises a SiO2 / TiO2 structure.

[0115] This disclosure also provides a light-emitting diode chip, which employs as follows: Figure 1 Or prepare using the method shown in Figure 3.

[0116] The light-emitting diode chip includes a substrate and an epitaxial layer and electrodes sequentially stacked on the substrate. The electrodes are connected to the epitaxial layer and are located on the epitaxial layer.

[0117] Figure 8 This is a schematic diagram of the structure of a light-emitting diode chip provided in an embodiment of this disclosure. See also... Figure 8 The light-emitting diode chip includes a substrate 11, a buffer layer (not shown in the figure), an N-type nitride semiconductor layer 12, a quantum well light-emitting layer (not shown in the figure), a P-type nitride semiconductor layer 13, and an ITO current spreading layer 14 stacked on the substrate 11, an N-electrode 15 on the N-type nitride semiconductor layer 12, a P-electrode 16 on the ITO current spreading layer 14, a DBR reflective layer 17 covering the current spreading layer 14, the N-electrode 15, and the P-electrode 16, a P-pad 18 on the DBR reflective layer 17 and connected to the P-electrode 16, and an N-pad 19 on the DBR reflective layer 17 and connected to the N-electrode 15.

[0118] Both N electrode 15 and P electrode 16 include a base layer, a wrapping layer and a welding layer stacked in sequence.

[0119] The base layer is a Cr / Al or Cr / Ag stack; the coating layer is a multi-period Ni / Pt or Ti / Pt stack with 2-4 periods; the welding layer is an Au layer.

[0120] The thickness of the Cr layer is 0.5 nm to 3 nm, the thickness of the Al or Ag layer is 10 nm to 200 nm, the thickness of the Ni or Ti layer is 50 nm to 500 nm, the thickness of the Pt layer is 30 nm to 200 nm, and the thickness of the Au layer is 500 nm to 1500 nm.

[0121] The above description is not intended to limit this disclosure in any way. Although this disclosure has been disclosed above through embodiments, it is not intended to limit this disclosure. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this disclosure. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this disclosure without departing from the content of the technical solution of this disclosure shall still fall within the scope of the technical solution of this disclosure.

Claims

1. A method for fabricating electrodes for a light-emitting diode, characterized in that, The method for fabricating electrodes for light-emitting diodes includes: A photoresist is coated, and an electrode preparation hole and a first groove surrounding the electrode preparation hole are formed on the photoresist. The electrode preparation hole penetrates the photoresist, and the first groove does not penetrate the photoresist. The cross-sectional shape of the electrode preparation hole and the first groove in the vertical plane is trapezoidal, with the bottom of the electrode preparation hole corresponding to the lower base of the trapezoid and the bottom of the first groove corresponding to the upper base of the trapezoid. A stacked electrode metal layer is fabricated on a photoresist having the electrode fabrication hole and the first groove. The stacked electrode metal layer includes a first portion located on the photoresist and a second portion located in the electrode fabrication hole. The stacked electrode metal layer includes a base layer and a wrapping layer stacked sequentially, and the wrapping layer wraps the base layer. The photoresist and the first portion located on the photoresist are stripped away, leaving the second portion in the electrode fabrication hole as the electrode.

2. The method for preparing electrodes for light-emitting diodes according to claim 1, characterized in that, The trapezoid corresponding to the first groove is an isosceles trapezoid, and the angle between the upper base and the hypotenuse of the trapezoid corresponding to the first groove ranges from 100 degrees to 135 degrees.

3. The method for preparing electrodes for light-emitting diodes according to claim 2, characterized in that, The depth of the first groove ranges from 0.4 to 0.6 times the thickness of the photoresist, the length of the bottom edge of the first groove ranges from 10 μm to 15 μm, and the horizontal distance between the first groove and the electrode preparation hole ranges from 0.25 μm to 5 μm.

4. The method for preparing electrodes for light-emitting diodes according to claim 1, characterized in that, The trapezoid corresponding to the electrode preparation hole is an isosceles trapezoid, and the angle between the lower base and the hypotenuse of the trapezoid corresponding to the electrode preparation hole ranges from 10 degrees to 45 degrees.

5. The method for fabricating an electrode for a light-emitting diode according to any one of claims 1 to 4, characterized in that, The process of fabricating an electrode preparation hole on the photoresist and a first groove surrounding the electrode preparation hole includes: The photoresist undergoes a first exposure process, the first exposure process corresponding to the electrode preparation hole; the photoresist undergoes a second exposure process, the shape of the first exposure process corresponding to the first groove; the photoresist undergoes a development process to obtain the electrode preparation hole and the first groove.

6. The method for preparing an electrode for a light-emitting diode according to any one of claims 1 to 4, characterized in that, The method further includes: Before fabricating the stacked electrode metal layer, a plurality of second grooves are fabricated in the first groove at intervals.

7. The method for preparing an electrode for a light-emitting diode according to claim 6, characterized in that, The plurality of second grooves are located at the bottom of the first groove and on the side of the first groove near the electrode preparation hole.

8. The method for preparing an electrode for a light-emitting diode according to claim 6, characterized in that, The depth of the second groove ranges from 0.1 to 0.2 times the thickness of the photoresist.

9. The method for preparing an electrode for a light-emitting diode according to claim 6, characterized in that, The total area of ​​the plurality of second grooves accounts for 30% to 60% of the total area of ​​the bottom of the first groove and the side near the electrode preparation hole.

10. A light-emitting diode chip, characterized in that, The light-emitting diode chip is prepared by the method described in any one of claims 1 to 9.

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