Light emitting diode and manufacturing method thereof, light emitting unit

Abstract

The present disclosure provides a light emitting diode, a manufacturing method thereof and a light emitting unit, and belongs to the field of light emitting devices. The light emitting diode comprises an epitaxial structure and a pad structure. The pad structure comprises a first substructure and a second substructure. One end of the first substructure is connected with the epitaxial structure, and the other end of the first substructure is connected with the second substructure. The projection of the first substructure on the light emitting surface of the light emitting diode is located within the projection of the second substructure on the light emitting surface of the light emitting diode.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and in particular to a light-emitting diode and its manufacturing method and light-emitting unit. Background Technology

[0002] A light-emitting diode (LED) is a semiconductor light-emitting device that can be used in display, lighting and other display fields.

[0003] The related technology provides a light-emitting diode, which includes an epitaxial structure and a pad structure.

[0004] During packaging, the pads of the aforementioned light-emitting diode are soldered to the packaging substrate. However, for small-sized light-emitting diode chips, such as micro LEDs and mini LEDs, the bonding force (pull force) between the pads and the packaging substrate is not strong, affecting the packaging reliability. Summary of the Invention

[0005] This disclosure provides a light-emitting diode (LED) and its fabrication method, as well as a light-emitting unit, which can improve the bonding force between the pads and the packaging substrate, thereby improving packaging reliability. The technical solution is as follows:

[0006] On the one hand, a light-emitting diode is provided, the light-emitting diode comprising: an epitaxial structure and a pad structure;

[0007] The pad structure includes a first substructure and a second substructure, one end of the first substructure is connected to the epitaxial structure, and the other end of the first substructure is connected to the second substructure.

[0008] The projection of the first substructure onto the light-emitting surface of the LED is located within the projection of the second substructure onto the light-emitting surface of the LED.

[0009] Optionally, the minimum distance from any point on the projection edge of the first substructure to the projection edge of the second substructure is 2 to 6 micrometers.

[0010] Optionally, both the first substructure and the second substructure are frustum-shaped structures, each frustum-shaped structure including a first surface and a second surface, wherein the area of ​​the first surface is smaller than the area of ​​the second surface.

[0011] The first surface of the first substructure is connected to the second surface of the second substructure.

[0012] Optionally, both the first substructure and the second substructure are frustum-shaped structures, each frustum-shaped structure including a first surface and a second surface;

[0013] The angle between the second surface of the first substructure and the sidewall of the first substructure is greater than the angle between the second surface of the second substructure and the sidewall of the second substructure.

[0014] Optionally, the thickness of the first substructure is greater than the thickness of the second substructure.

[0015] Optionally, the thickness of the first substructure is equal to the thickness of the second substructure.

[0016] On the other hand, a light-emitting unit is provided, the light-emitting unit comprising a light-emitting diode and a packaging substrate as described in any of the preceding claims;

[0017] The light-emitting diode and the packaging substrate are soldered together using solder paste;

[0018] The second substructure of the light-emitting diode is located within the solder paste.

[0019] On the other hand, a method for manufacturing a light-emitting diode is provided, the method comprising:

[0020] Fabrication of epitaxial structures;

[0021] A pad structure is fabricated on the epitaxial structure. The pad structure includes a first substructure and a second substructure. One end of the first substructure is connected to the epitaxial structure, and the other end of the first substructure is connected to the second substructure.

[0022] The projection of the first substructure onto the light-emitting surface of the LED is located within the projection of the second substructure onto the light-emitting surface of the LED.

[0023] Optionally, a pad structure is fabricated on the epitaxial structure, including:

[0024] A first layer of photoresist is formed on the epitaxial structure;

[0025] Under the cover of the first mask, the first layer of photoresist is exposed, and the unexposed area of ​​the first layer of photoresist corresponds to the position of the first substructure;

[0026] A second layer of photoresist is formed on the first layer of photoresist;

[0027] Under the cover of the second mask, the second layer of photoresist is exposed, and the unexposed area of ​​the second layer of photoresist corresponds to the position of the second substructure.

[0028] Optionally, a pad structure is fabricated on the epitaxial structure, including:

[0029] The first substructure is fabricated on the epitaxial structure;

[0030] A first layer of photoresist covering the first substructure is formed on the epitaxial structure;

[0031] Under the cover of the second mask, the first layer of photoresist is exposed and developed to reveal the first substructure;

[0032] A second layer of photoresist is formed on the first layer of photoresist;

[0033] Under the cover of the second mask, the second layer of photoresist is exposed, and the unexposed area of ​​the second layer of photoresist corresponds to the position of the second substructure;

[0034] The second layer of photoresist is developed to remove the unexposed areas of the second layer of photoresist.

[0035] The beneficial effects of the technical solutions provided in this disclosure are:

[0036] In this embodiment, the pad structure includes a first substructure and a second substructure. The other end of the first substructure is connected to the second substructure. The projection of the first substructure onto the light-emitting surface of the epitaxial structure lies within the projection of the second substructure onto the light-emitting surface of the epitaxial structure; that is, the second substructure, which is farther from the epitaxial structure, has a larger cross-sectional area. When soldering the pads of the light-emitting diode to the packaging substrate, the second substructure of the pad is wrapped with solder paste, forming a barbed structure. This results in a strong bond between the pad and the solder paste, thereby strengthening the bonding force (pushing force) between the pad and the packaging substrate and improving packaging reliability. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure;

[0039] Figure 2 This is a schematic diagram of the structure of a light-emitting unit provided in an embodiment of this disclosure;

[0040] Figure 3 This is a flowchart illustrating a method for manufacturing a light-emitting diode according to an embodiment of the present disclosure;

[0041] Figure 4 This is a flowchart of another method for manufacturing a light-emitting diode provided in this embodiment of the present disclosure;

[0042] Figure 5This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0043] Figure 6 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0044] Figure 7 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0045] Figure 8 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0046] Figure 9 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0047] Figure 10 This is a flowchart of another method for manufacturing a light-emitting diode provided in this embodiment of the present disclosure;

[0048] Figure 11 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0049] Figure 12 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0050] Figure 13 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0051] Figure 14 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0052] Figure 15 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure;

[0053] Figure 16 This is a schematic diagram of the structure of a light-emitting diode during the manufacturing process according to an embodiment of this disclosure.

[0054] The attached figures are labeled as follows:

[0055] 10: Epitaxial structure; 20: Pad structure; 30: Substrate; 40: Insulating reflective layer; 50: Current spreading layer; 201: First substructure; 202: Second substructure; 21: First pad; 22: Second pad; 41: Through-hole; 100: Light-emitting diode; 200: Packaging substrate; 300: Solder paste; 400: First photoresist layer; 500: First mask; 501: First pattern; 600: Second photoresist layer; 700: Second mask; 701: Second pattern; 800: Groove. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0057] Analysis of the stress conditions during soldering of pads and packaging substrates in related technologies revealed through die-bonding force testing that LED detachment most commonly occurs between the pads and solder paste. Therefore, the solution provided in this disclosure improves the pad structure of LEDs and, through designing the pad fabrication process, reduces the number of additional steps and simplifies the process compared to pad fabrication in related technologies.

[0058] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure. See also... Figure 1 The light-emitting diode includes an epitaxial structure 10 and a pad structure 20.

[0059] The pad structure 20 includes a first substructure 201 and a second substructure 202. One end of the first substructure 201 is connected to the epitaxial structure 10, and the other end of the first substructure 201 is connected to the second substructure 202.

[0060] The projection of the first substructure 201 onto the light-emitting surface of the LED is located within the projection of the second substructure 202 onto the light-emitting surface of the LED.

[0061] In this embodiment, the pad structure includes a first substructure and a second substructure. The other end of the first substructure is connected to the second substructure. The projection of the first substructure onto the light-emitting surface of the epitaxial structure lies within the projection of the second substructure onto the light-emitting surface of the epitaxial structure; that is, the second substructure, being farther from the epitaxial structure, has a larger cross-sectional area. When soldering the pads of the light-emitting diode to the packaging substrate, the second substructure of the pad is wrapped with solder paste, forming a barbed structure. This results in a strong bond between the pad and the solder paste, thereby strengthening the bonding force between the pad and the packaging substrate and improving packaging reliability.

[0062] In this embodiment of the disclosure, the minimum distance from any point on the projection edge of the first substructure 201 to the projection edge of the second substructure 202 is 2 to 6 micrometers.

[0063] In this implementation, by limiting the minimum distance of the above projection, the bonding force between the barb structure and the solder paste is made strong enough.

[0064] For example, the minimum distance from any point on the projection edge of the first substructure 201 to the projection edge of the second substructure 202 is 3, 4 or 5 micrometers.

[0065] like Figure 1 As shown, both the first substructure 201 and the second substructure 202 are frustum-shaped structures, each frustum-shaped structure including a first surface and a second surface, wherein the area of ​​the first surface is smaller than the area of ​​the second surface.

[0066] The first surface of the first substructure 201 is connected to the second surface of the second substructure 202.

[0067] The first surface can also be called the top surface, and the second surface can also be called the bottom surface.

[0068] By adopting the above shape, the cross-sections of the light-emitting surfaces of the first substructure 201 and the second substructure 202 perpendicular to the epitaxial structure are both inverted trapezoids. The inverted trapezoid shape is conducive to the insertion of the solder pad into the solder paste, and not easy to remove it from the solder paste, thus enhancing the bonding force.

[0069] For example, both the first substructure 201 and the second substructure 202 are frustum-shaped.

[0070] In other examples, the first substructure 201 and the second substructure 202 may also be columnar structures, such as cylinders.

[0071] like Figure 1 As shown, the angle between the second surface of the first substructure 201 and the sidewall of the first substructure 201 is greater than the angle between the second surface of the second substructure 202 and the sidewall of the second substructure 202.

[0072] Since the first substructure 201 is connected to the epitaxial structure via its second surface, and the second substructure 202 is connected to the solder paste via its first surface, the included angle between the first substructure 201 and the second substructure 202 is set as described above. By controlling the dimensions of the contact surfaces between the first substructure 201 and the epitaxial structure, and between the second substructure 202 and the solder paste, the area difference between the first surface of the first substructure 201 and the second surface of the second substructure 202 is increased, thereby improving the bonding force between the solder pads and the solder paste.

[0073] For example, the angle between the second surface of the first substructure 201 and the sidewall of the first substructure 201 is 45 degrees, and the angle between the second surface of the second substructure 202 and the sidewall of the second substructure 202 is 30 degrees.

[0074] In other examples, the angle between the second face of the first substructure 201 and the sidewall is equal to or less than the angle between the second face of the second substructure 202 and the sidewall of the second substructure 202.

[0075] In this embodiment of the disclosure, the thickness of the first substructure 201 is greater than the thickness of the second substructure 202.

[0076] In this implementation, the first substructure mainly serves as a connector and is set to be relatively thick, so that the gap between the second substructure and the epitaxial structure is large enough to accommodate the solder paste during soldering. The second substructure mainly hooks into the solder paste, so its thickness can be designed to be relatively small to avoid being too large and making it difficult to penetrate into the solder paste.

[0077] In other examples, the thickness of the first substructure 201 is equal to the thickness of the second substructure 202.

[0078] In this implementation, the thickness of the first substructure and the thickness of the second substructure are set to be equal, which can ensure both the connection between the pad and the epitaxial layer and the connection strength between the pad and the solder paste.

[0079] In this embodiment of the disclosure, the thickness of the pad structure 20 is 2 to 6 micrometers.

[0080] In this implementation, the pad structure uses the aforementioned total thickness, which can meet the welding requirements and bonding strength requirements.

[0081] For example, the thickness of the first substructure 201 is 2 to 4 micrometers, and the thickness of the second substructure 202 is 1 to 2 micrometers.

[0082] For example, the thickness of the first substructure 201 is 3 micrometers, and the thickness of the second substructure 202 is 1 micrometer.

[0083] For example, the thickness of the first substructure 201 is 2 micrometers, and the thickness of the second substructure 202 is 2 micrometers.

[0084] In this embodiment of the disclosure, the pad structure 20 may be formed by stacking multiple layers of metal.

[0085] In this embodiment of the disclosure, the pad structure 20 includes multiple periodically overlapping stacked structures and multiple single-layer structures.

[0086] The number of periods in the stacked structure can be 1 to 6.

[0087] The stacked structure is a Ti layer / Al layer stacked structure, an Al layer / Ti layer stacked structure, a Ti layer / Pt layer stacked structure, or a Pt layer / Ti layer stacked structure.

[0088] The plurality of single-layer structures comprises at least two of the following single-layer structures:

[0089] Ni layer, Au layer, Ti layer, Al layer, Pt layer.

[0090] In this implementation, the above-mentioned film layers are used for pad stacking, which can ensure the connection between the pad structure and the epitaxial layer, as well as the connection between each film layer, and also ensure its welding and reflection functions.

[0091] In this embodiment of the disclosure, the thickness of the Ni layer in the above-described pad structure is 5000~15000 angstroms;

[0092] The thickness of the Au layer is 1000~5000 angstroms;

[0093] The thickness of the Ti layer is 5~2000 angstroms;

[0094] The thickness of the Al layer is 500~8000 angstroms;

[0095] The thickness of the Pt layer is 500~5000 angstroms.

[0096] In this implementation, the aforementioned thicknesses of each film layer ensure both the total thickness and the effectiveness of each film layer in fulfilling its function, such as reflection, bonding, or welding.

[0097] For example, the thickness of the Ni layer is 10,000 angstroms;

[0098] The thickness of the Au layer is 3000 angstroms;

[0099] The thickness of the Ti layer is 1000 angstroms;

[0100] The thickness of the Al layer is 5000 angstroms;

[0101] The thickness of the Pt layer is 3000 angstroms.

[0102] For example, the pad structure 20 includes multiple Ti / Al stacked structures, a Ni layer and an Au layer stacked sequentially;

[0103] Alternatively, it may include multiple Ti / Al stacked structures, with Ti, Ni and Au layers stacked sequentially.

[0104] Alternatively, it may include multiple Al / Ti stacked structures, Ni layers, and Au layers stacked sequentially.

[0105] Alternatively, it may include multiple Al / Ti stacked structures, with Al, Ni and Au layers stacked sequentially.

[0106] Alternatively, it may include multiple Ti / Pt stacked structures, Au layer, Pt layer, Ti layer, Ni layer and Au layer stacked sequentially;

[0107] Alternatively, it may consist of multiple Pt / Ti stacked structures, Au layer, Pt layer, Ti layer, Ni layer, and Au layer stacked sequentially.

[0108] See you again Figure 1 The light-emitting diode also includes a substrate 30, and an epitaxial structure 10 located on the substrate 30.

[0109] The light-emitting surface of the light-emitting diode is the surface of the substrate 30 away from the pad structure 20.

[0110] See you again Figure 1 The light-emitting diode also includes an insulating reflective layer 40 and a current spreading layer 50.

[0111] The current spreading layer 50 is connected to the epitaxial structure 10, the insulating reflective layer 40 covers the epitaxial structure 10 and the current spreading layer 50, and the pad structure 20 passes through the insulating reflective layer 40 and is connected to the current spreading layer 50.

[0112] The extension structure 10 includes a stepped structure, which includes a top surface and a bottom surface. The pad structure 20 includes a first pad 21 and a second pad 22, and both the first pad 21 and the second pad 22 include a first substructure 201 and a second substructure 202.

[0113] The current spreading layer 50 is located on the bottom and top surfaces of the step, and the insulating reflective layer 40 has two through holes 41. The first pad 21 is connected to the current spreading layer 50 on the bottom surface of the step through one through hole 41, and the second pad 22 is connected to the current spreading layer 50 on the top surface of the step through the other through hole 41.

[0114] like Figure 1 As shown, the thickness of the first pad 21 is greater than or equal to the thickness of the second pad 22.

[0115] The thickness of the first substructure 201 of the first pad 21 is greater than or equal to the thickness of the first substructure 201 of the second pad 22.

[0116] The thickness of the second substructure 202 of the first pad 21 is equal to the thickness of the second substructure 202 of the second pad 22.

[0117] Optionally, the light-emitting diode may also include a current blocking layer, which is located between the epitaxial structure and the current spreading layer.

[0118] For example, the epitaxial structure 10 may include a first semiconductor layer, an active layer and a second semiconductor layer stacked sequentially, with the bottom surface of the step structure located on the first semiconductor layer and the top surface of the step structure located on the second semiconductor layer.

[0119] In the embodiments disclosed herein, the substrate 30 may be any of the following: patterned sapphire substrate, silicon substrate, etc. The material of the substrate is not limited in this disclosure.

[0120] For example, substrate 30 is a patterned sapphire substrate.

[0121] In this embodiment of the disclosure, the first semiconductor layer can be an N-type semiconductor layer, the active layer can be a multi-quantum well layer, and the second semiconductor layer can be a P-type semiconductor layer.

[0122] For example, the first semiconductor layer is an N-type GaN layer, the active layer is an InGaN / GaN layer, and the second semiconductor layer is a P-type GaN layer.

[0123] In another example, the first semiconductor layer can be a P-type semiconductor layer, the active layer can be a multi-quantum-well layer, and the second semiconductor layer can be an N-type semiconductor layer.

[0124] For example, the first semiconductor layer is a GaP layer, the active layer is a GaInP / AlGaInP layer, and the second semiconductor layer is an AlInP or AlGaInP layer.

[0125] In this embodiment of the disclosure, the insulating reflective layer 40 includes a distributed Bragg reflector (DBR) layer.

[0126] For example, the DBR layer may be a stack formed of at least one period of silicon oxide layer (e.g., SiO2) and titanium oxide layer (e.g., TiO2).

[0127] In this embodiment of the disclosure, the current spreading layer 50 can be an indium tin oxide (ITO) layer.

[0128] Figure 2 This is a schematic diagram of the structure of a light-emitting unit provided in an embodiment of this disclosure. See also... Figure 2 The light-emitting unit includes, for example, Figure 1 The light-emitting diode 100 and the packaging substrate 200 are shown.

[0129] The light-emitting diode 100 and the packaging substrate 200 are soldered together using solder paste 300;

[0130] The second substructure 202 of the light-emitting diode 100 is located within the solder paste 300.

[0131] The packaging substrate 200 can be a printed circuit board (PCB).

[0132] In this embodiment of the present disclosure, when soldering the pads of the light-emitting diode to the packaging substrate, the second substructure of the pad is wrapped with solder paste to form a barbed structure, which makes the bonding force between the pad and the solder paste strong, thereby making the bonding force between the pad and the packaging substrate stronger and improving the packaging reliability.

[0133] Figure 3 This disclosure provides a method for manufacturing a light-emitting diode (LED). See also: Figure 3 The method includes the following steps:

[0134] S11. Fabricate the extensional structure.

[0135] The epitaxial structure includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked sequentially.

[0136] In this embodiment of the disclosure, the first semiconductor layer can be an N-type semiconductor layer, the active layer can be a multi-quantum well layer, and the second semiconductor layer can be a P-type semiconductor layer.

[0137] For example, the first semiconductor layer is an N-type GaN layer, the active layer is an InGaN / GaN layer, and the second semiconductor layer is a P-type GaN layer.

[0138] S12. A pad structure is fabricated on the epitaxial structure. The pad structure includes a first substructure and a second substructure. One end of the first substructure is connected to the epitaxial structure, and the other end of the first substructure is connected to the second substructure.

[0139] The projection of the first substructure onto the light-emitting surface of the LED is located within the projection of the second substructure onto the light-emitting surface of the LED.

[0140] In this embodiment, the pad structure includes a first substructure and a second substructure. The other end of the first substructure is connected to the second substructure. The projection of the first substructure onto the light-emitting surface of the epitaxial structure lies within the projection of the second substructure onto the light-emitting surface of the epitaxial structure; that is, the second substructure, being farther from the epitaxial structure, has a larger cross-sectional area. When soldering the pads of the light-emitting diode to the packaging substrate, the second substructure of the pad is wrapped with solder paste, forming a barbed structure. This results in a strong bond between the pad and the solder paste, thereby strengthening the bonding force between the pad and the packaging substrate and improving packaging reliability.

[0141] Figure 4 This is a flowchart illustrating another method for fabricating a light-emitting diode (LED) according to an embodiment of this disclosure. See also... Figure 4 The method includes the following steps:

[0142] S21. A first semiconductor layer, an active layer, and a second semiconductor layer are sequentially fabricated on the surface of a substrate, wherein the first semiconductor layer, the active layer, and the second semiconductor layer have a stepped structure.

[0143] In this embodiment of the disclosure, the first semiconductor layer is an N-type GaN layer, the active layer is an InGaN / GaN layer, and the second semiconductor layer is a P-type GaN layer.

[0144] In one example, step S21 includes:

[0145] The first step is to grow the first semiconductor layer.

[0146] The first semiconductor layer is an N-type GaN layer.

[0147] For example, an N-type GaN layer can be grown on a substrate surface using a metal-organic chemical vapor deposition (MOCVD) device.

[0148] In the embodiments disclosed herein, semiconductor layer growth can be achieved using Veeco K465i, C4, or RB MOCVD equipment or AIXTRON metal-organic chemical vapor deposition equipment. High-purity H2 (hydrogen), high-purity N2 (nitrogen), or a mixture of high-purity H2 and high-purity N2 is used as the carrier gas; high-purity NH3 is used as the N source; trimethylgallium (TMGa) and triethylgallium (TEGa) are used as gallium sources; trimethylindium (TMIn) is used as the indium source; silane (SiH4) is used as the N-type dopant; trimethylaluminum (TMAl) is used as the aluminum source; and magnesium pyrocene (CP2Mg) is used as the P-type dopant.

[0149] The second step is to grow the active layer.

[0150] The active layer is an InGaN / GaN layer.

[0151] For example, an InGaN / GaN layer is grown on the surface of an N-type GaN layer using an MOCVD device.

[0152] The third step is to grow a second semiconductor layer.

[0153] The second semiconductor layer is a P-type GaN layer.

[0154] For example, a P-type GaN layer is grown on the surface of an InGaN / GaN layer using an MOCVD device.

[0155] The fourth step involves patterning the first semiconductor layer, the active layer, and the second semiconductor layer to form a stepped structure.

[0156] For example, inductively coupled plasma (ICP) etching technology is used to pattern the first semiconductor layer, active layer and second semiconductor layer stacked sequentially in the epitaxial structure to form a stepped structure, thereby obtaining the epitaxial structure.

[0157] S22. Fabricate a current spreading layer, which is located on the bottom and top surfaces of the step.

[0158] In one example, step S22 includes:

[0159] An ITO thin film is formed on the surface of an epitaxial structure using magnetron sputtering technology; a photoresist mask pattern is formed on the ITO thin film; and under the cover of the photoresist mask pattern, an ITO etching solution is used to pattern the current spread layer.

[0160] It should be noted that if a photoresist mask pattern is used in the method provided in this embodiment, a photoresist removal step is also included after use, which will not be described in detail here.

[0161] S23. An insulating reflective layer is formed on the epitaxial structure. The insulating reflective layer has two through holes, which are located on the top and bottom surfaces of the stepped structure, respectively.

[0162] In one example, step S23 includes:

[0163] An insulating reflective film covering a current spreading layer is deposited on the surface of the epitaxial structure; the insulating reflective film is patterned (opened) using ICP etching technology to obtain the insulating reflective layer.

[0164] S24. A first layer of photoresist is formed on the insulating reflective layer.

[0165] In this embodiment of the disclosure, the photoresist is a negative photoresist.

[0166] In other embodiments, the photoresist can also be a positive photoresist, in which case the area blocked by the mask is the opposite of that in this embodiment.

[0167] In this step, negative glue is used for spin coating on a spin coater. By adjusting the spin coating speed and the amount of glue dripped, the thickness of the spin coating is controlled between 1 and 4 micrometers.

[0168] S25. Under the cover of the first mask, the first layer of photoresist is exposed, and the unexposed area of ​​the first layer of photoresist corresponds to the position of the first substructure.

[0169] In this step, the exposure should not be too high, because a higher exposure will result in a larger chamfer θ1 on the first layer of photoresist. A lower exposure will result in a smaller chamfer θ1 (see [reference needed]). Figure 6 The smaller the value, the smaller the photolithographic chamfer θ1 becomes. This chamfer is the angle between the beveled edge of the exposed and unexposed areas and the light-emitting surface of the epitaxial structure. After exposure, the exposed negative resist is baked for 1-5 minutes using a hot plate at 80-120℃ to allow it to undergo a crosslinking reaction.

[0170] Figure 5 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 5As shown, after the first layer of photoresist 400 is formed on the insulating reflective layer 40, it is shielded by the first mask plate 500, and then the first layer of photoresist 400 is exposed.

[0171] The two first patterns 501 of the first mask 500 correspond to the two through holes of the insulating reflective layer 40, and the first pattern 501 is the light-shielding area.

[0172] Figure 6 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 6 As shown, after exposure, the area of ​​the first photoresist 400 that is blocked by the first mask 500 remains unchanged (still appears as a white area), while the area of ​​the first photoresist 400 that is not blocked by the first mask 500 changes (from a white area to a diagonally filled area).

[0173] S26. A second layer of photoresist is formed on the first layer of photoresist.

[0174] In this step, negative glue is used for spin coating on a spin coater. By adjusting the spin coating speed and the amount of glue dripped, the thickness of the spin coating is controlled between 1 and 4 micrometers.

[0175] S27. Under the cover of the second mask, the second layer of photoresist is exposed, and the unexposed area of ​​the second layer of photoresist corresponds to the position of the second substructure.

[0176] In this step, the area covered by the second mask is larger than the area covered by the first mask because the projected area of ​​the second substructure is larger than the projected area of ​​the first substructure.

[0177] In this design, the pattern (i.e., the light-shielding area) of the second mask extends outward by 2 to 6 micrometers compared to the pattern (i.e., the light-shielding area) of the first mask. Correspondingly, the top surface radius of the second substructure of the pad can be 2 to 6 micrometers larger than the top surface radius of the first substructure.

[0178] In this step, the exposure should not be too high, because a higher exposure will result in a larger chamfer θ2 on the second layer of photoresist. A lower exposure will result in a smaller chamfer θ2 (see [reference needed]). Figure 8 The smaller the value, the better. After exposure, bake the exposed negative adhesive for 1-5 minutes using a hot plate at 80-120℃ to allow it to undergo a cross-linking reaction.

[0179] Figure 7 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 7 As shown, after the second photoresist 600 is formed on the first photoresist 400, it is blocked by the second mask 700, and then the second photoresist 600 is exposed.

[0180] The two second patterns 701 of the second mask 700 correspond to the two through holes of the insulating reflective layer 40, respectively. The second pattern 701 is a light-shielding area, and the area of ​​the second pattern 701 is larger than the area of ​​the first pattern 501.

[0181] Figure 8 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 8 As shown, after exposure, the area of ​​the second photoresist 600 that is blocked by the second mask 700 does not change (it remains a white area), while the area of ​​the second photoresist 600 that is not blocked by the second mask 700 changes (from a white area to a diagonally filled area).

[0182] S28. Develop the first layer of photoresist and the second layer of photoresist to remove the unexposed areas of the first layer of photoresist and the second layer of photoresist, forming a groove.

[0183] In this process, the unexposed areas of the negative photoresist can be dissolved by the developer, thus forming grooves.

[0184] In this step, the development time is 50~200s. The shorter the development time, the larger the bottom angle of the formed groove. The longer the development time, the smaller the bottom angle of the formed groove. By adjusting the exposure and development time, the bottom angle of the formed groove is controlled between 30~90°, thereby controlling the included angle between the bottom surface and the sidewall of the formed pad structure.

[0185] Figure 9 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 9 As shown, after development, the unexposed areas in the first photoresist layer 400 and the second photoresist layer 600 are removed, forming a groove 800. The shape of the groove 800 corresponds to the shape of the first substructure 201 plus the second substructure 202.

[0186] S29. Evaporate pad metal on the surface of the second layer of photoresist and in the groove.

[0187] In this step, the pad metal is deposited using an evaporator.

[0188] S210. Remove the first layer of photoresist, the second layer of photoresist, and the pad metal on the surface of the second layer of photoresist, leaving the pad metal in the groove, to obtain the pad structure.

[0189] After the above steps, the following is obtained: Figure 1 The structure of the light-emitting diode shown is shown.

[0190] In this embodiment, a mask pattern structure is formed by spin-coating photoresist twice and exposure, followed by pad evaporation. After removing the mask pattern structure, a pad structure resembling a "rivet" is obtained. After reflow soldering, the contact area with solder paste is increased, and the "rivet" structure of the pad electrodes can better hook the tin metal on the packaging substrate, significantly improving the die-bonding force of the light-emitting diode. Furthermore, the above fabrication process is simple and easy to implement.

[0191] Figure 10 This is a flowchart illustrating another method for fabricating a light-emitting diode (LED) according to an embodiment of this disclosure. See also... Figure 10 The method includes the following steps:

[0192] S31. A first semiconductor layer, an active layer, and a second semiconductor layer are sequentially fabricated on the surface of a substrate, wherein the first semiconductor layer, the active layer, and the second semiconductor layer have a stepped structure.

[0193] The implementation process for this step is the same as step S21.

[0194] S32. Fabricate a current spreading layer, which is located on the bottom and top surfaces of the step.

[0195] The implementation process for this step is the same as step S22.

[0196] S33. An insulating reflective layer is formed on the epitaxial structure. The insulating reflective layer has two through holes, which are located on the top and bottom surfaces of the stepped structure, respectively.

[0197] The implementation process for this step is the same as step S23.

[0198] S34. The first substructure is fabricated on the insulating reflective layer.

[0199] The first substructure in this step is fabricated using conventional methods, namely, a process of photoresist spin coating, exposure, development, followed by evaporation of pad metal, and finally removal of the photoresist to obtain the first substructure.

[0200] Figure 11 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 11 As shown, two first substructures 201 are formed on the insulating reflective layer 40, and the two first substructures 201 are respectively connected to the current spreading layer 50 on the bottom surface of the step and the top surface of the step.

[0201] S35. A first layer of photoresist covering the first substructure is formed on the insulating reflective layer.

[0202] In this embodiment of the disclosure, the photoresist is a negative photoresist.

[0203] In other embodiments, the photoresist can also be a positive photoresist, in which case the area blocked by the mask is the opposite of that in this embodiment.

[0204] In this step, negative glue is used for spin coating on a spin coater. By adjusting the spin coating speed and the amount of glue dripped, the thickness of the spin coating is controlled between 1 and 4 micrometers.

[0205] S36. Under the cover of the second mask, the first layer of photoresist is exposed and developed to expose the first substructure.

[0206] In this step, the exposure can be maximized to create a photolithographic chamfer close to 90 degrees. After baking and development, the unexposed first layer of photoresist is removed, exposing the first substructure.

[0207] For example, after exposure, bake the exposed negative adhesive for 1-5 minutes using a hot plate at 80-120℃ to induce a cross-linking reaction. After baking, the development time can be 50-200 seconds.

[0208] Figure 12 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 12 As shown, after the first layer of photoresist 400 is formed on the insulating reflective layer 40, it is shielded by the second mask 700, and then the first layer of photoresist 400 is exposed.

[0209] The two second patterns 701 of the second mask 700 correspond to the two first substructures 201 respectively, and the second pattern 701 is the light-blocking area.

[0210] Figure 13 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 13 As shown, after exposure, the area of ​​the first photoresist layer 400 that is blocked by the second mask 700 remains unchanged, while the area of ​​the first photoresist layer 400 that is not blocked by the second mask 700 changes. Based on this, development is performed, and the area not blocked by the second mask 700 is removed, exposing the first substructure 201.

[0211] S37. A second layer of photoresist is formed on the first layer of photoresist.

[0212] The implementation process for this step is described in step S26.

[0213] S38. Under the cover of the second mask, the second layer of photoresist is exposed, and the unexposed area of ​​the second layer of photoresist corresponds to the position of the second substructure.

[0214] The implementation process for this step is the same as step S27.

[0215] Figure 14 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 14 As shown, after the second photoresist 600 is formed on the first photoresist 400, it is blocked by the second mask 700, and then the second photoresist 600 is exposed.

[0216] The two second patterns 701 of the second mask plate 700 correspond to the two first substructures 201 respectively.

[0217] Figure 15 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 15 As shown, after exposure, the area of ​​the second photoresist 600 that is blocked by the second mask 700 does not change (it remains a white area), while the area of ​​the second photoresist 600 that is not blocked by the second mask 700 changes (from a white area to a diagonally filled area).

[0218] S39. Develop the second layer of photoresist to remove the unexposed areas of the second layer of photoresist and form a groove.

[0219] In this process, the unexposed areas of the negative photoresist can be dissolved by the developer, thus forming grooves.

[0220] In this step, the development time is 50~200s. The shorter the development time, the larger the bottom angle of the formed groove. The longer the development time, the smaller the bottom angle of the formed groove. By adjusting the exposure and development time, the bottom angle of the formed groove is controlled between 30~90°, thereby controlling the included angle between the bottom surface and the sidewall of the formed pad structure.

[0221] Figure 16 This is a schematic diagram of the structure of a light-emitting diode (LED) during the manufacturing process according to an embodiment of this disclosure. Figure 16 As shown, after development, the unexposed areas in the second layer of photoresist 600 are removed, forming a groove 800. The shape of the groove 800 corresponds to the shape of the second substructure 202.

[0222] S310. Deposit pad metal on the surface of the second layer of photoresist and in the groove.

[0223] In this step, the pad metal is deposited using an evaporator.

[0224] S311. Remove the first layer of photoresist, the second layer of photoresist, and the pad metal on the surface of the second layer of photoresist, leaving the pad metal in the groove, to obtain the second substructure.

[0225] After the above steps, the following is obtained: Figure 1 The structure of the light-emitting diode shown is shown.

[0226] In this embodiment, the first substructure is first formed by photolithography and vapor deposition. Then, a mask pattern structure is formed by spin-coating photoresist twice and exposure. Next, the second substructure is vapor-deposited to obtain a pad structure resembling a "rivet." After reflow soldering, the contact area with solder paste is increased. Furthermore, the "rivet" structure of the pad electrodes better hooks onto the tin metal on the packaging substrate, significantly improving the die-bonding force of the LED. Moreover, the above fabrication process is simple and easy to implement.

[0227] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A light-emitting diode, characterized in that, The light-emitting diode includes: an epitaxial structure (10) and a pad structure (20). The pad structure (20) includes a first substructure (201) and a second substructure (202), one end of the first substructure (201) is connected to the epitaxial structure (10), and the other end of the first substructure (201) is connected to the second substructure (202); The projection of the first substructure (201) onto the light-emitting surface of the light-emitting diode is located within the projection of the second substructure (202) onto the light-emitting surface of the light-emitting diode, and the projected area of ​​the second substructure (202) is greater than the projected area of ​​the first substructure (201).

2. The light-emitting diode according to claim 1, characterized in that, The minimum distance from any point on the projection edge of the first substructure (201) to the projection edge of the second substructure (202) is 2 to 6 micrometers.

3. The light-emitting diode according to claim 1 or 2, characterized in that, Both the first substructure (201) and the second substructure (202) are frustum-shaped structures, each frustum-shaped structure including a first surface and a second surface, wherein the area of ​​the first surface is smaller than the area of ​​the second surface; The first surface of the first substructure (201) is connected to the second surface of the second substructure (202).

4. The light-emitting diode according to claim 1 or 2, characterized in that, Both the first substructure (201) and the second substructure (202) are frustum-shaped structures, each frustum-shaped structure including a first surface and a second surface; The angle between the second surface of the first substructure (201) and the sidewall of the first substructure (201) is greater than the angle between the second surface of the second substructure (202) and the sidewall of the second substructure (202).

5. The light-emitting diode according to claim 1 or 2, characterized in that, The thickness of the first substructure (201) is greater than the thickness of the second substructure (202).

6. The light-emitting diode according to claim 1 or 2, characterized in that, The thickness of the first substructure (201) is greater than the thickness of the second substructure (202).

7. A light-emitting unit, characterized in that, The light-emitting unit includes a light-emitting diode (100) and a packaging substrate (200) as described in any one of claims 1 to 6. The light-emitting diode (100) and the packaging substrate (200) are soldered together using solder paste (300); The second substructure (202) of the light-emitting diode (100) is located within the solder paste (300).

8. A method for manufacturing a light-emitting diode, characterized in that, The method includes: Fabrication of epitaxial structures; A pad structure is fabricated on the epitaxial structure. The pad structure includes a first substructure and a second substructure. One end of the first substructure is connected to the epitaxial structure, and the other end of the first substructure is connected to the second substructure. The projection of the first substructure onto the light-emitting surface of the LED is located within the projection of the second substructure onto the light-emitting surface of the LED, and the projected area of ​​the second substructure is larger than the projected area of ​​the first substructure.

9. The method according to claim 8, characterized in that, Fabricating a pad structure on the epitaxial structure includes: A first layer of photoresist is formed on the epitaxial structure; Under the cover of the first mask, the first layer of photoresist is exposed, and the unexposed area of ​​the first layer of photoresist corresponds to the position of the first substructure; A second layer of photoresist is formed on the first layer of photoresist; Under the cover of the second mask, the second layer of photoresist is exposed, and the unexposed area of ​​the second layer of photoresist corresponds to the position of the second substructure.

10. The method according to claim 8, characterized in that, Fabricating a pad structure on the epitaxial structure includes: The first substructure is fabricated on the epitaxial structure; A first layer of photoresist covering the first substructure is formed on the epitaxial structure; Under the cover of the second mask, the first layer of photoresist is exposed and developed to reveal the first substructure; A second layer of photoresist is formed on the first layer of photoresist; Under the cover of the second mask, the second layer of photoresist is exposed, and the unexposed area of ​​the second layer of photoresist corresponds to the position of the second substructure; The second layer of photoresist is developed to remove the unexposed areas of the second layer of photoresist.

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