A single photon avalanche diode pixel structure

By employing shallow trench isolation technology and potential gradient design in the single-photon avalanche diode pixel structure, the problems of large avalanche junction area and dead zone in traditional structures are solved, achieving more efficient photon detection.

CN116417480BActive Publication Date: 2026-07-07SHENZHEN ANSIJIANG TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SHENZHEN ANSIJIANG TECH CO LTD
Filing Date
2021-12-31
Publication Date
2026-07-07

AI Technical Summary

Technical Problem

Traditional single-photon avalanche diode pixel structures suffer from problems such as large avalanche junction area, large junction capacitance leading to severe afterpulse, long dead time, and dead zones within the pixel.

Method used

Shallow trench isolation technology is used to discretely distribute avalanche junctions. A potential gradient is formed by combining the highly doped regions at the top, sidewalls and bottom of the pixel, which reduces the avalanche junction area and junction capacitance. The avalanche junctions are separated by an insulating isolation layer to form multiple small avalanche junctions.

Benefits of technology

The avalanche junction area and junction capacitance were reduced, the afterpulse of the device was improved, the dead time was shortened, the photon detection efficiency was increased, the dead zone inside the pixel was reduced, and the probability of photon detection was improved.

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Abstract

The application discloses a single photon avalanche diode pixel structure, which comprises a silicon substrate with a first type of doping, and an avalanche junction doping area with a second type of doping; an avalanche junction area below the avalanche junction doping area is separated into multiple by an insulating isolation layer; the top of the silicon substrate has a pixel top heavily doped area with the first type of doping, both sides have pixel sidewall heavily doped areas with the first type of doping, and the bottom has a pixel bottom heavily doped area with the first type of doping; further comprising: a first electrode located in the pixel sidewall heavily doped area, a sidewall electrode extending downward along the pixel sidewall heavily doped area, and a second electrode located in the avalanche junction area. The application adopts discrete distribution of the avalanche junction, achieves the purpose of reducing the area of the avalanche junction and the junction capacitance, suppresses the after-pulse of the device, and reduces the dead time of the device during detection.
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Description

Technical Field

[0001] This invention relates to the fields of semiconductor integrated circuits and image sensors, and specifically to a single-photon avalanche diode pixel structure. Background Technology

[0002] 3D image sensors can significantly enhance user experience and strengthen the competitiveness of related products. Unlike ordinary 2D imaging devices such as mobile phone cameras and camcorders, which can only acquire two-dimensional image information of objects, 3D image sensors can acquire depth information of objects, thereby constructing 3D image information of objects. Therefore, 3D image sensors are widely used in AR / VR, facial recognition, 3D machine vision, 3D industrial measurement, parts modeling, security monitoring, medical diagnosis, and many other fields. Direct time-of-flight (DTOF) ranging / imaging devices are one of the mainstream 3D ranging / imaging devices. DTOF ranging / imaging devices can directly measure the time of flight of photons. In terms of ranging range, anti-interference, and power consumption, DTOF has unique advantages, has a very wide range of applications, and has great commercial application value. With the continuous development of the 3D image sensor market, direct time-of-flight (DTOF) ranging / imaging devices are gradually being applied in fields such as robotic vacuum cleaners, proximity sensors, mobile phone LiDAR cameras, and AR / VR.

[0003] Common DTOF ranging / imaging devices such as Figure 1 As shown, the system includes: a transmitter 11 (TX), an object 12 requiring ranging or imaging, a receiver 13 (RX), and a photon propagation path 14 from the transmitter TX, after reflection from the object, to the receiver RX. In this system, the transmitter 11 typically includes sub-optical device modules such as a VCSEL laser chip, a collimating lens, and DOE diffraction optics. The receiver 13 comprises: 131 a focusing lens group, which focuses the light reflected from the object onto the receiving sensor chip; 132 a filter, which filters the incident light, allowing light of specific wavelengths (such as 850nm, 905nm, 940nm, etc.) to pass through and be received by the sensor chip; and 133 a dTOF sensor chip, which senses photons and performs photon counting and time-of-flight measurement.

[0004] like Figure 1 The working principle of the dTOF system shown is summarized as follows:

[0005] At the start of ranging, the TDC circuit inside the dTOF sensor chip 133 records this moment as the start signal for the photon flight time. Simultaneously, it outputs a synchronous trigger signal, which, after being amplified by the driver IC, drives the VCSEL laser chip at the transmitter 11 to emit a laser pulse signal. Photons in the laser pulse encounter the object 12 in the propagation path 14 and are reflected, then propagate towards the receiver 13. After passing through the focusing lens group 131, the filter 132 filters out unwanted wavelengths, also known as noise signals, leaving photons of specific wavelengths that are received by the dTOF sensor chip 133. The dTOF sensor chip 133 generates an avalanche effect upon receiving the photons. The resulting electrical pulse signal serves as the end signal for the photon flight time. The distance to the object ahead, d = 1 / 2 * c * t, is calculated using the photon flight time. TOF (where c is the speed of light, t) TOF (This refers to the photon flight time value).

[0006] Single-photon avalanche diode (SPAD) is the basic building block of the pixel array in a dTOF sensor array chip.

[0007] Figure 2 A conventional single-photon avalanche diode pixel structure 200 is illustrated. The composition and function of each part of the pixel are described as follows: 201a is a highly doped silicon substrate, doped using the first type of doping (the doping type referred to in this application can be p-type or n-type; if the first type of doping is p-type, then the second type of doping is n-type, and vice versa); 201b is a lightly doped silicon substrate, doped using the first type of doping; 202 is the avalanche junction doped region, using the second type of doping; 203 is the first electrode doped region, using the first type of doping; 205 is the avalanche junction region, a PN junction formed by the avalanche junction doped region 202 and the lightly doped silicon substrate 201b. After photogenerated carriers enter the avalanche junction region, they are subjected to a high electric field (generally greater than 10). 5 The avalanche multiplication effect is generated under the action of V / cm; 206 is the first electrode, 207 is the second electrode, and 208 is the third electrode; the first electrode 206 and the third electrode 208 can be reverse biased to the device; the second electrode 207 outputs the avalanche current signal to the quenching circuit and the reading circuit.

[0008] The avalanche diode disclosed in patent application CN109713075A includes: at least one PN junction; at least one depletion structure adjacent to the PN junction and configured to form a depletion region; and at least two electrodes polarizing the at least one PN junction. Conventional single-photon avalanche diode pixel structures 200 have the following disadvantages:

[0009] (1) The avalanche junction region formed by the avalanche junction doped region 202 and the low-doped silicon substrate 201b has a large area and a large junction capacitance, which not only causes the back pulse to have a more serious impact on the device, but also causes the device to have a longer dead time during photon detection.

[0010] (2) Within the pixel unit 200, in the pixel region within the lateral spacing d between the edge of the avalanche junction region 205 and the pixel sidewall, there is a pixel dead zone 209 that cannot detect incident photons (a problem existing in traditional pixel structures). Summary of the Invention

[0011] To address the problems of severe afterpulse and long dead time caused by the large avalanche junction area and large junction capacitance of traditional single-photon avalanche diodes, as well as the existence of dead zones within the pixel, this invention proposes a shallow trench isolation method to discretely distribute the avalanche junctions. This reduces the avalanche junction area and junction capacitance, suppresses afterpulse, and shortens the dead time during detection. Furthermore, the highly doped region at the top of the pixel, together with the highly doped regions on the sidewalls and bottom, forms a potential gradient of the avalanche junctions tending towards different locations, reducing the dead zone portion within the pixel from which photons cannot be detected.

[0012] A single-photon avalanche diode pixel structure includes a silicon substrate with a first type of doping and an avalanche junction doped region with a second type of doping.

[0013] The avalanche junction region formed by the silicon substrate and the avalanche junction doped region is separated into multiple regions by an insulating isolation layer; the top of the silicon substrate has a pixel top heavily doped region using the first type of doping, the sides have pixel sidewall heavily doped regions using the first type of doping, and the bottom has a pixel bottom heavily doped region using the first type of doping.

[0014] It also includes: a first electrode located in the heavily doped region of the pixel sidewall, a sidewall electrode extending downward along the heavily doped region of the pixel sidewall, and a second electrode located in the avalanche junction region.

[0015] This invention divides the large avalanche junction of the pixel structure into smaller avalanche junctions, reducing the area and junction capacitance of the avalanche junctions. On the one hand, this can improve the afterpulse of the device, and on the other hand, the smaller junction capacitance can reduce the dead time of the device and increase the probability of photons being detected. Under reverse bias, the combined effect of the heavily doped region at the top of the pixel, the heavily doped regions on the sidewalls of the pixel, and the heavily doped region at the bottom of the pixel can effectively improve the photon detection efficiency and reduce the area of ​​the dead zone of the pixel that cannot detect photons.

[0016] Several alternative methods are provided below, but they are not intended as additional limitations on the overall solution above. They are merely further additions or optimizations. Provided there are no technical or logical contradictions, each alternative method can be combined individually with respect to the overall solution above, or multiple alternative methods can be combined with each other.

[0017] Furthermore, the doping concentration of the silicon substrate ranges from 1E16 to 1E17 cm⁻¹. -3 The doping concentration range of the avalanche junction doped region is 1E19-1E20 cm⁻¹. -3 The doping concentration range of the heavily doped region at the top of the pixel, the heavily doped region on the sidewall of the pixel, and the heavily doped region at the bottom of the pixel is 1E19-1E20 cm⁻¹. -3 .

[0018] The heavily doped region of the present invention helps to form a potential gradient that tends toward the avalanche junction region, which not only facilitates the collection of photogenerated carriers, but also reduces the drift time of photogenerated carriers to the avalanche junction region and reduces the timing jitter of the avalanche photodiode.

[0019] Preferably, the second electrode consists of multiple electrodes connected in parallel, each connected to a separate avalanche junction doped region, and the electrode outputs an avalanche current signal to the quenching circuit and the readout circuit.

[0020] Preferably, the insulating layer is made of silicon oxide, silicon nitride, or a stack of silicon oxide and silicon nitride, which serves to isolate each separate avalanche knot region.

[0021] In another preferred embodiment, the avalanche junction doped region includes a first avalanche junction doped region employing a first type of doping and a second avalanche junction doped region employing a second type of doping, with the first avalanche junction doped region spanning the lower part of the separate second avalanche junction doped region, and the avalanche junction region is formed by the first avalanche junction doped region and the second avalanche junction doped region.

[0022] In this embodiment, the avalanche junction is formed by using the first doped region and the second doped region of the avalanche junction. This can effectively reduce the avalanche breakdown voltage, reduce the power consumption and heat generation of the device, improve the temperature coefficient of the device, and suppress the temperature drift of the avalanche breakdown voltage.

[0023] Preferably, the doping concentration range of the first doped region of the avalanche junction is 1E17-5E17 cm⁻¹. -3 The doping concentration range of the second doped region of the avalanche junction is 1E19-1E20 cm⁻¹. -3 .

[0024] In another preferred embodiment, the avalanche junction doped region includes a first avalanche junction doped region employing a first type of doping and a second avalanche junction doped region employing a second type of doping; the second avalanche junction doped region is separated into multiple regions by an insulating isolation layer, and the first avalanche junction doped region is correspondingly disposed at the lower part of each second avalanche junction doped region, with the first avalanche junction doped region and the second avalanche junction doped region forming the avalanche junction region.

[0025] Preferably, the doping concentration range of the first doped region of the avalanche junction is 1E17-5E17 cm⁻¹. -3 The doping concentration range of the second doped region of the avalanche junction is 1E19-1E20 cm⁻¹. -3 .

[0026] Preferably, the first doped region of the avalanche junction is smaller than the second doped region of the avalanche junction.

[0027] In this embodiment, an avalanche junction is formed by using a first avalanche junction doped region and a second avalanche junction doped region, and the first avalanche junction doped region is smaller than the second avalanche junction doped region, which can further reduce the area of ​​the avalanche junction region and the capacitance value of the avalanche junction, and further improve the impact of after-pulse and dead time on the device.

[0028] Preferably, the single-photon avalanche diode pixel structure is used in a front-illuminated pixel structure or a back-illuminated pixel structure. Furthermore, using a back-illuminated pixel structure is preferred as it can more effectively improve photon detection efficiency.

[0029] This invention employs a discrete distribution of avalanche junctions to reduce the avalanche junction area and junction capacitance, suppressing after-pulse of the device and reducing the dead time during device detection. The highly doped region at the top of the pixel, together with the highly doped regions at the sidewalls and bottom, forms a potential gradient of avalanche junctions tending towards different positions, reducing the dead zone portion of undetectable photons inside the pixel. Attached Figure Description

[0030] Figure 1 A typical dTOF system diagram;

[0031] Figure 2 A traditional SPAD pixel structure;

[0032] Figure 3 The single-photon avalanche diode pixel structure of Embodiment 1 of the present invention;

[0033] Figure 4 The motion path of photogenerated minority carriers inside the pixel device shown in Embodiment 1 of the present invention;

[0034] Figure 5 The single-photon avalanche diode pixel structure in Embodiment 2 of the present invention;

[0035] Figure 6 The single-photon avalanche diode pixel structure in Embodiment 3 of the present invention. Detailed Implementation

[0036] Many specific details are set forth in the following description to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and therefore, the invention is not limited to the specific embodiments disclosed below. The directional terms “up,” “down,” “left,” and “right” used herein are based on the corresponding drawings, and it is understood that the use of these directional terms does not limit the scope of protection of the invention.

[0037] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0038] Example 1

[0039] like Figure 3 The diagram illustrates a single-photon avalanche diode pixel structure. The composition and function of each part of this pixel structure 300 are described below:

[0040] 301 is a silicon substrate, and the substrate is doped using type I doping (the doping type referred to in this application can be p-type or n-type; if the type I doping type is p-type, then the type II doping type is n-type, and vice versa), and the doping concentration range can be selected as 1E16-1E17 cm⁻¹. -3 302 is the avalanche junction doped region, using type II doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 303a is the heavily doped region at the top of the pixel, using type I doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 303b is the heavily doped region on the pixel sidewall, using type I doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 303c is the heavily doped region at the bottom of the pixel, using type I doping, with a doping concentration range of 1E19-1E20cm⁻¹. -3 The heavily doped region consisting of 303a-303c helps to form a potential gradient tending towards the avalanche junction region 305. This not only facilitates the collection of photogenerated carriers but also reduces the drift time of photogenerated carriers to the avalanche junction region, thus reducing the timing jitter of the avalanche photodiode. 305 is the avalanche junction region, which is a PN junction formed by the avalanche junction doped region 302 and the silicon substrate 301. After photogenerated carriers enter the avalanche junction region, they are attracted to the avalanche junction region under a high electric field (generally greater than 10). 5The action of V / cm can generate an avalanche multiplication effect, thereby generating an avalanche current; 306a is the first electrode, and 306b is the sidewall electrode; the first electrode 306a and the sidewall electrode 306b can conduct the applied reverse bias voltage to the top heavily doped region 303a, the sidewall heavily doped region 303b, and the bottom heavily doped region 303c of the pixel, forming a potential gradient tending towards the avalanche junction region 305; in addition, the sidewall electrode 306b also plays an important role in reducing crosstalk between pixels; 307 is the second electrode, which is composed of multiple discrete parts, and all discrete parts can be connected in parallel through interconnection. This electrode outputs the avalanche current signal to the quenching circuit and the readout circuit; 308 is an insulating isolation layer, the material of which can be silicon oxide, silicon nitride, or a stack of silicon oxide and silicon nitride, which serves to isolate each separate avalanche junction region 305.

[0041] and Figure 2 Compared to the traditional single-photon pixel structure shown, Figure 4 The illustrated embodiment 1 of the present invention has the following advantages:

[0042] (1) The traditional single-photon pixel structure 200 has a large avalanche junction area and a large junction capacitance. In Embodiment 1 of the present invention, shallow trench isolation technology is used to divide the large avalanche junction of the pixel structure into small avalanche junctions, thereby reducing the area and junction capacitance of the avalanche junction. On the one hand, this can improve the after-pulse of the device, and on the other hand, the smaller junction capacitance can reduce the dead time of the device and increase the probability of photons being detected.

[0043] (2) Under the reverse bias, the pixel top heavy doped region 303a used in Embodiment 1 of the present invention, together with the pixel sidewall heavy doped region 303b and bottom heavy doped region 303c, can effectively improve the photon detection efficiency and reduce the area of ​​the pixel dead zone that cannot detect photons.

[0044] (3) Embodiment 1 of the present invention can be used as a front-illuminated pixel structure or a back-illuminated pixel structure, but as a back-illuminated pixel structure, it can more effectively improve the photon detection efficiency.

[0045] Figure 4 The motion path of photogenerated carriers inside the pixel device shown in Embodiment 1 of the present invention under the potential gradient is illustrated. Figure 4 The composition and function of each part of the pixel shown are described below:

[0046] 401 is a silicon substrate, and the substrate is doped using type I doping (the doping type referred to in this application can be p-type or n-type; if the type I doping type is p-type, then the type II doping type is n-type, and vice versa), and the doping concentration range can be selected as 1E16-1E17 cm⁻¹. -3402 is the avalanche junction doped region, using type II doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 403a is the heavily doped region at the top of the pixel, using type I doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 403b is the heavily doped region on the pixel sidewall, using type I doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 403c is the heavily doped region at the bottom of the pixel, using type I doping, with a doping concentration range of 1E19-1E20cm⁻¹. -3 The heavily doped region consisting of 403a-403c helps to form a potential gradient tending towards the avalanche junction region 405. This not only facilitates the collection of photogenerated carriers but also reduces the drift time of photogenerated carriers to the avalanche junction region, thus reducing the timing jitter of the avalanche photodiode. 405 is the avalanche junction region, which is a PN junction formed by the avalanche junction doped region 402 and the silicon substrate 401. After photogenerated carriers enter the avalanche junction region, they are attracted to the avalanche junction region under a high electric field (typically greater than 10). 5 The action of V / cm can generate an avalanche multiplication effect, thereby generating an avalanche current; 406a is the first electrode, and 406b is the sidewall electrode. The first electrode 406a and the sidewall electrode 406b can conduct the applied reverse bias voltage to the heavily doped region 403a at the top of the pixel, the heavily doped region 403b on the sidewall of the pixel, and the heavily doped region 403c at the bottom of the pixel, forming a potential gradient tending towards the avalanche junction region 405; in addition, the sidewall electrode 406b also plays an important role in reducing crosstalk between pixels; 407 is the second electrode, which is composed of multiple discrete parts, and all discrete parts can be interconnected. When connected together, the electrode outputs an avalanche current signal to the quenching circuit and the readout circuit; 408 is an insulating isolation layer, the material of which can be silicon oxide, silicon nitride, or a stack of silicon oxide and silicon nitride, which serves to isolate each separated avalanche junction region 405; 409a, 409b, 409c, and 409d are the photogenerated minority carriers generated after absorbing photons at different positions inside the device, respectively; 410a, 410b, 410c, and 410d are the optimal motion paths for the photogenerated minority carriers generated after absorbing photons at different positions inside the device to drift towards the separated avalanche junctions at different positions under the potential gradient.

[0047] Depend on Figure 4 As can be seen, the applied reverse bias voltage is conducted from the first electrode 406a and the sidewall electrode 406b to the heavily doped region 403a at the top of the pixel, the heavily doped region 403b on the sidewall of the pixel, and the heavily doped region 403c at the bottom, forming a potential gradient that tends towards the separated avalanche junctions at different locations. Guided by the potential gradient, the photogenerated minority carriers generated by the absorption of photons at different locations inside the device move to the avalanche junction 405 with the closest location distance; as Figure 4As shown, photogenerated carriers 409a, 409b, and 409d generated at the edge of the device move along paths 410a, 410b, and 410d under the guidance of the potential gradient to the corresponding avalanche junctions 405a, 405b, and 405d. Photogenerated carriers 409c generated at the bottom center of the device move along path 410c under the guidance of the potential gradient to the corresponding avalanche junction 405c. The heavily doped region 403a at the top of the pixel can effectively reduce the dead zone of photon detection and improve the efficiency of photon detection in this process (explanation of dead zone reduction in this embodiment).

[0048] Example 2

[0049] Figure 5 The single-photon avalanche diode pixel structure of Embodiment 2 of the present invention is shown. The composition and function of each part of the pixel structure 500 are described below:

[0050] 501 is a silicon substrate, and the substrate is doped using type I doping (the doping type referred to in this application can be p-type or n-type; if the type I doping type is p-type, then the type II doping type is n-type, and vice versa), and the doping concentration range can be selected as 1E13-1E15 cm⁻¹. -3 502a is the first doped region of the avalanche junction, using type I doping, with a doping concentration range of 1E17-5E17 cm⁻¹. -3 502b is the second doped region of the avalanche junction, employing type II doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 503a is the heavily doped region at the top of the pixel, using type I doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 503b is the heavily doped region on the pixel sidewall, using type I doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 503c is the heavily doped region at the bottom of the pixel, using type I doping, with a doping concentration range of 1E19-1E20cm⁻¹. -3 The heavily doped region consisting of 503a-503c helps to form a potential gradient tending towards the avalanche junction region 505. This not only facilitates the collection of photogenerated carriers but also reduces the drift time of photogenerated carriers to the avalanche junction region, thus reducing the timing jitter of the avalanche photodiode. 505 is the avalanche junction region, which is a PN junction formed by the first avalanche junction doped region 502a and the second avalanche junction doped region 502b. After photogenerated carriers enter the avalanche junction region, they are attracted to the avalanche junction region under a high electric field (generally greater than 10). 5The action of V / cm can generate an avalanche multiplication effect, thereby generating an avalanche current; 506a is the first electrode, and 506b is the sidewall electrode. The first electrode 506a and the sidewall electrode 506b can conduct the applied reverse bias voltage to the top heavily doped region 503a of the pixel, the sidewall heavily doped region 503b of the pixel, and the bottom heavily doped region 503c of the pixel, forming a potential gradient tending towards the avalanche junction region 505; in addition, the sidewall electrode 506b also plays an important role in reducing crosstalk between pixels; 507 is the second electrode, which is composed of multiple discrete parts. All discrete parts can be interconnected in parallel. This electrode outputs the avalanche current signal to the quenching circuit and the readout circuit; 508 is an insulating isolation layer, the material of which can be silicon oxide, silicon nitride, or a stack of silicon oxide and silicon nitride, which serves to isolate each separate avalanche junction region 505.

[0051] and Figure 3 Compared with the pixel structure 300 of Embodiment 1, the pixel structure 500 of this embodiment, in addition to having the advantages of Embodiment 1, uses an avalanche junction first doped region 502a and an avalanche junction second doped region 502b to form an avalanche junction, instead of using an avalanche junction doped region 302 and a substrate 301 to form an avalanche junction. Therefore, compared with Embodiment 1, Embodiment 2 can effectively reduce the avalanche breakdown voltage, reduce the power consumption and heat generation of the device, improve the temperature coefficient of the device, and suppress the temperature drift of the avalanche breakdown voltage. In addition, Embodiment 2 can increase the avalanche probability of the device under the same overbias voltage to a certain extent, thereby increasing the photon detection efficiency of the device.

[0052] Example 3

[0053] Figure 6 The single-photon avalanche diode pixel structure of Embodiment 3 of the present invention is shown. The composition and function of each part of the pixel structure 600 are described below:

[0054] 601 is a silicon substrate, and the substrate is doped using type I doping (the doping type referred to in this application can be p-type or n-type; if the type I doping type is p-type, then the type II doping type is n-type, and vice versa), and the doping concentration range can be selected as 1E13-1E15 cm⁻¹. -3 602a is the first doped region of the avalanche junction, using type I doping, with a doping concentration range of 1E17-5E17 cm⁻¹. -3 602b is the second doped region of the avalanche junction, employing type II doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 603a is the heavily doped region at the top of the pixel, using type I doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3603b is the heavily doped region on the pixel sidewall, using type I doping, with a doping concentration range of 1E19-1E20 cm⁻¹. -3 603c is the heavily doped region at the bottom of the pixel, using type I doping, with a doping concentration range of 1E19-1E20cm⁻¹. -3 The heavily doped region consisting of 603a-603c helps to form a potential gradient tending towards the avalanche junction region 605. This not only facilitates the collection of photogenerated carriers but also reduces the drift time of photogenerated carriers reaching the avalanche junction region, thus reducing the timing jitter of the avalanche photodiode. 605 is the avalanche junction region, which is a PN junction formed by the first avalanche junction doped region 602a and the second avalanche junction doped region 602b. After photogenerated carriers enter the avalanche junction region, they are attracted by a high electric field (generally greater than 10). 5 The action of V / cm can generate an avalanche multiplication effect, thereby generating an avalanche current; 606a is the first electrode, and 606b is the sidewall electrode. The first electrode 606a and the sidewall electrode 606b can conduct the applied reverse bias voltage to the top heavily doped region 303a of the pixel, the sidewall heavily doped region 603b of the pixel, and the bottom heavily doped region 603c of the pixel, forming a potential gradient tending towards the avalanche junction region 605; in addition, the sidewall electrode 606b also plays an important role in reducing crosstalk between pixels; 607 is the second electrode, which is composed of multiple discrete parts. All discrete parts can be interconnected in parallel. This electrode outputs the avalanche current signal to the quenching circuit and the readout circuit; 608 is a shallow trench insulating isolation layer, the material of which can be silicon oxide, silicon nitride, or a stack of silicon oxide and silicon nitride, which serves to isolate each separate avalanche junction region 605.

[0055] and Figure 5 Compared to Example 2, Example 3 uses a first doped region 602a and a second doped region 602b to form an avalanche junction, wherein the first doped region 602a is smaller than the second doped region 602b. Therefore, compared to Example 2, Example 3, in addition to having the advantages of Example 2, can further reduce the area of ​​the avalanche junction and the capacitance value of the avalanche junction, and further improve the impact of after-pulse and dead time on the device. In addition, since the first doped region 602a in Example 3 is smaller than the second doped region 602b, a virtual protective ring can be formed at each isolated avalanche junction edge, which can effectively protect the device and prevent edge breakdown.

[0056] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A single-photon avalanche diode pixel structure, characterized in that, The device includes a silicon substrate with a first type of doping and an avalanche junction doped region with a second type of doping. The avalanche junction region at the bottom of the avalanche junction doped region is separated into multiple regions by an insulating isolation layer. The top of the silicon substrate has a pixel top heavily doped region with a first type of doping, the sides have pixel sidewall heavily doped regions with a first type of doping, and the bottom has a pixel bottom heavily doped region with a first type of doping. It also includes: a first electrode located in the heavily doped region of the pixel sidewall, a sidewall electrode extending downward along the heavily doped region of the pixel sidewall, and a second electrode located in the avalanche junction region.

2. The single-photon avalanche diode pixel structure according to claim 1, characterized in that, The doping concentration of the silicon substrate is in the range of 1E16-1E17 cm⁻¹. -3 The doping concentration range of the avalanche junction doped region is 1E19-1E20 cm⁻¹. -3 The doping concentration range of the heavily doped region at the top of the pixel, the heavily doped region on the sidewall of the pixel, and the heavily doped region at the bottom of the pixel is 1E19-1E20 cm⁻¹. -3 .

3. The single-photon avalanche diode pixel structure according to claim 1, characterized in that, The second electrode consists of multiple electrodes connected in parallel, each connected to a separate avalanche junction doped region.

4. The single-photon avalanche diode pixel structure according to claim 1, characterized in that, The insulating layer is made of silicon oxide, silicon nitride, or a stack of silicon oxide and silicon nitride, and serves to isolate each separate avalanche junction region.

5. The single-photon avalanche diode pixel structure according to claim 1, characterized in that, The avalanche junction doped region includes a first avalanche junction doped region using a first type of doping and a second avalanche junction doped region using a second type of doping. The first avalanche junction doped region spans the lower part of the separate second avalanche junction doped region, and the avalanche junction region is formed by the first avalanche junction doped region and the second avalanche junction doped region.

6. The single-photon avalanche diode pixel structure according to claim 5, characterized in that, The doping concentration range of the first doped region of the avalanche junction is 1E17-5E17 cm⁻¹. -3 The doping concentration range of the second doped region of the avalanche junction is 1E19-1E20 cm⁻¹. -3 .

7. The single-photon avalanche diode pixel structure according to claim 1, characterized in that, The avalanche junction doped region includes a first avalanche junction doped region using a first type of doping and a second avalanche junction doped region using a second type of doping. The second avalanche junction doped region is separated into multiple regions by an insulating isolation layer. The first avalanche junction doped region is correspondingly disposed at the lower part of each second avalanche junction doped region, and the avalanche junction region is formed by the first avalanche junction doped region and the second avalanche junction doped region.

8. The single-photon avalanche diode pixel structure according to claim 7, characterized in that, The doping concentration range of the first doped region of the avalanche junction is 1E17-5E17 cm⁻¹. -3 The doping concentration range of the second doped region of the avalanche junction is 1E19-1E20 cm⁻¹. -3 .

9. The single-photon avalanche diode pixel structure according to claim 7, characterized in that, The first doped region of the avalanche junction is smaller than the second doped region of the avalanche junction.

10. The single-photon avalanche diode pixel structure according to claim 1, characterized in that, The single-photon avalanche diode pixel structure is used in front-illuminated or back-illuminated pixel structures.