Display panel and display device

Abstract

The embodiment of the present application discloses a display panel and a display device, the display panel further comprises a substrate, a plurality of light emitting elements located on one side of the substrate and in a display area, a plurality of pixel circuits, at least one driving circuit, at least one driving circuit signal line group, a plurality of data lines and a plurality of scan lines, the driving circuit signal line group is used for providing driving signals for the driving circuit, the driving circuit is used for transmitting driving signals to the pixel circuit, and the pixel circuit is used for driving the light emitting element; the scan line extends along a first direction, and the data line extends along a second direction; the driving circuit comprises a plurality of cascaded shift register circuits; and the driving circuit signal line group extends along the first direction. The technical scheme of the embodiment of the present application can reduce the width of the left and right borders of the display panel, realize narrow frame, and even realize left and right frameless.

Description

[0001] This application is a divisional application based on the patent application filed on May 6, 2021, with application number 202110490929.7 and invention title "A display panel and display device". Technical Field

[0002] The present invention relates to display technology, and more particularly to a display panel and a display device. Background Technology

[0003] Light-emitting diode (LED) display panels, such as micro-LED and mini-LED display panels, have many advantages such as self-illumination, low driving voltage, high luminous efficiency, short response time, and high clarity and contrast, and have gradually become a research hotspot in the field of display technology.

[0004] In existing technologies, driving circuits are fabricated on the left and / or right bezels of the display panel to drive pixels to emit light line by line, thus completing the display of the image. However, the approach of placing the driving circuits on the left and right bezels does not conform to the development trend of narrow bezels in display panels. Summary of the Invention

[0005] This invention provides a display panel and display device to reduce the width of the display panel's bezel, achieving a narrow bezel or even a bezel-less design.

[0006] In a first aspect, embodiments of the present invention provide a display panel, including a display area;

[0007] The display panel also includes:

[0008] Substrate;

[0009] The display area includes multiple light-emitting elements, multiple pixel circuits, at least one driving circuit, at least one set of driving circuit signal line groups, multiple data lines, and multiple scan lines located on one side of the substrate. The driving circuit signal line groups are used to provide driving signals to the driving circuits, the driving circuits are used to transmit driving signals to the pixel circuits, and the pixel circuits are used to drive the light-emitting elements.

[0010] The scan line extends along a first direction, and the data line extends along a second direction;

[0011] The driving circuit includes a multi-stage cascaded shift register circuit;

[0012] The signal line group of the driving circuit extends along the first direction.

[0013] Secondly, embodiments of the present invention also provide a display device, including the display panel provided in the previous aspect.

[0014] This invention provides an embodiment of the invention by setting at least one set of driving circuit signal lines that extend along a first direction. Compared to the prior art, which sets the driving circuit signal lines on the left and right bezels of the display panel, this solution can reduce the width of the left and right bezels, achieving narrow bezels or even borderless bezels. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0016] Figure 2 This is a partial cross-sectional structural diagram of a display panel provided in an embodiment of the present invention;

[0017] Figure 3 This is a schematic diagram of a drive circuit.

[0018] Figure 4 This is a circuit diagram of a pixel circuit;

[0019] Figure 5 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0020] Figure 6 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0021] Figure 7 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0022] Figure 8 yes Figure 7 A detailed circuit diagram of the mid-scan shift register circuit;

[0023] Figure 9 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0024] Figure 10 yes Figure 9 A detailed circuit diagram of the light-emitting control shift register circuit;

[0025] Figure 11 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0026] Figure 12 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0027] Figure 13 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0028] Figure 14This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0029] Figure 15 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0030] Figure 16 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0031] Figure 17 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0032] Figure 18 yes Figure 17 The diagram shows the structure of the display panel in region Q2.

[0033] Figure 19 yes Figure 17 The diagram shows the structure of the display panel in area Q3;

[0034] Figure 20 yes Figure 17 The diagram shows another structural representation of the display panel in region Q2.

[0035] Figure 21 yes Figure 17 The diagram shows another structural representation of the display panel in area Q3.

[0036] Figure 22 yes Figure 17 The diagram shows another structural representation of the display panel in region Q2.

[0037] Figure 23 This is a partial structural schematic diagram of a display panel provided in an embodiment of the present invention;

[0038] Figure 24 This is a partial structural schematic diagram of another display panel provided in an embodiment of the present invention;

[0039] Figure 25 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0040] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the invention, not all structures, and the shapes and sizes of the elements in the drawings do not reflect their actual proportions; their purpose is merely to illustrate the content of the invention.

[0041] Figure 1This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Figure 2 This is a partial cross-sectional structural diagram of a display panel provided in an embodiment of the present invention. Figure 3 This is a schematic diagram of a drive circuit. See [link / reference] Figures 1-3 The display panel 100 includes a display area AA; the display panel 100 also includes a substrate 1 and a plurality of light-emitting elements 20, a plurality of pixel circuits 3 and at least one driving circuit 4 located on one side of the substrate 1 and in the display area AA. The driving circuit 4 is used to transmit driving signals to the pixel circuits 3, and the pixel circuits 3 are used to drive the light-emitting elements 20. The plurality of light-emitting elements 20 includes a plurality of light-emitting element rows 2, the light-emitting element rows 2 extending along a first direction x, the plurality of light-emitting element rows being arranged along a second direction y, the first direction x and the second direction y intersecting and both being parallel to the plane of the substrate 1; the driving circuit 4 includes a multi-stage cascaded shift register circuit (VSR, the number following it represents the stage of the shift register circuit) 40, the shift register circuit 40 being located between adjacent light-emitting element rows 2.

[0042] like Figure 1 As shown, pixel circuit 3 responds to the drive signal of the corresponding shift register circuit 40, generates a drive current, and drives the corresponding light-emitting element 20 to emit light. This is because the multi-stage shift register circuits 40 are cascaded (see reference). Figure 3 (The output terminal OUT of this stage shift register circuit is electrically connected to the input terminal IN of the next stage shift register circuit). Therefore, the driving circuit 4 can scan the pixel circuit 3 line by line to achieve the display of one frame. Furthermore, the pixel circuit 3 and the light-emitting element 20 can correspond one-to-one, or the pixel circuit 3 can correspond to multiple light-emitting elements 20, i.e., one-to-many. This embodiment of the invention does not limit the correspondence between the pixel circuit 3 and the light-emitting element 20. Figure 1 The explanation will be based on the example of a one-to-one correspondence between pixel circuit 3 and light-emitting element 20.

[0043] In the prior art, the driving circuit is usually located on the left and / or right bezel (non-display area) of the display panel. The more driving circuits there are, the wider the bezel becomes, which is not conducive to the realization of narrow bezels.

[0044] In this embodiment of the invention, by placing the shift register circuit of at least one driving circuit between adjacent rows of light-emitting elements, at least one driving circuit can be moved from the non-display area to the display area, thereby reducing the bezel width and achieving a narrow bezel. If the shift register circuits of all driving circuits are placed between rows of light-emitting elements, then borderless operation on the left and right sides can be achieved.

[0045] It should be noted that, Figure 1This diagram only shows the structure where the shift register circuit 40 is positioned between adjacent rows of light-emitting elements 2 along the second direction y. The relative dimensions of the shift register circuit 40 and the light-emitting elements 20 along the first direction x do not represent the relative dimensions of the two in the actual product. Furthermore, when driving circuits are provided on both the left and right edges of an existing product, the shift register circuits on both sides can be positioned between adjacent rows of light-emitting elements. Figure 1 The illustration only takes the left-side shift register circuit being set between adjacent rows of light-emitting elements as an example. Those skilled in the art can design according to the actual situation.

[0046] For example, the light-emitting element can be a light-emitting diode (LED), specifically, a micro-LED or mini-LED. Figure 1 As shown, multiple light-emitting elements may include light-emitting elements with different emitting colors. In a row 2 of light-emitting elements, red light-emitting element 201, green light-emitting element 202 and blue light-emitting element 203 may be arranged periodically.

[0047] Different types of pixel circuits require different driving circuits, and this embodiment of the invention does not limit the type of pixel circuit. Taking a 2T1C (2 thin-film transistors and 1 capacitor) pixel circuit as an example, the driving circuit includes a scan driving circuit; taking a 7T1C (7 thin-film transistors and 1 capacitor) pixel circuit as an example, the driving circuit includes a scan driving circuit and a light emission control driving circuit. Since the 7T1C pixel circuit can achieve threshold compensation and has a more stable driving current, the following description will use a 7T1C pixel circuit as an example. In this case, the shift register circuits at least one of the scan driving circuit and the light emission control driving circuit can be placed between adjacent rows of light-emitting elements to achieve narrow left and right bezels or even borderless left and right bezels.

[0048] For example, Figure 4 This is a circuit diagram of a pixel circuit, consisting of 7 thin-film transistors and 1 capacitor. Its working principle will not be explained in detail here. The third transistor M3 is the driving transistor. When the third transistor M3 generates a driving current to drive the light-emitting element 20 to emit light, the path between the first power signal terminal PVDD and the second power signal terminal PVEE is opened. The first power signal terminal PVDD is electrically connected to the first power line, and the second power signal terminal is electrically connected to the second power line. The potential of the first power line is greater than the potential of the second power line. Figure 4As shown, the first transistor M1 and the seventh transistor M7 receive the light emission control signal EMIT, which is provided by the corresponding light emission control shift register circuit in the light emission control driving circuit; the fifth transistor M5 and the sixth transistor M6 receive the first scan signal SCAN1, which is provided by the corresponding scan shift register circuit in the scan driving circuit; the second transistor M2 and the fourth transistor M4 receive the second scan signal SCAN2, which is provided by the corresponding scan shift register circuit in the scan driving circuit; or the fifth transistor M5 receives the first scan signal SCAN1, and the second transistor M2, the fourth transistor M4 and the sixth transistor M6 receive the second scan signal SCAN2. This embodiment of the invention does not limit this.

[0049] See also Figure 1 Optionally, multiple light-emitting elements 20 can be evenly arranged. These multiple light-emitting elements 20 can be arranged individually, or they can be arranged pixel-by-pixel. Each pixel can include three colors of light-emitting elements 20, and the distance between the light-emitting elements 20 within a pixel can differ from the distance between pixels. This configuration ensures display uniformity and guarantees a good display effect on the display panel.

[0050] See also Figure 1 and Figure 2 Optionally, the light-emitting element 20 and the pixel circuit 3 do not overlap.

[0051] In an LED display panel, multiple light-emitting elements can be transferred to an array substrate via mass transfer and electrically connected to corresponding pixel circuits through bonding. In this embodiment, by ensuring that the light-emitting elements 20 and pixel circuits 3 do not overlap, damage to the transistors in the pixel circuits 3 during the bonding process can be avoided, thus guaranteeing the quality and yield of the display panel.

[0052] like Figure 2 As shown, optionally, the display panel 100 also includes a contact electrode 108, and the light-emitting element 20 is bonded to the contact electrode 108; the pixel circuit 3 includes a plurality of transistors (such as... Figure 4 The contact electrode 108 does not overlap with the pixel circuit 3.

[0053] Figure 2 Only one transistor in the pixel circuit 3 is shown as an example. Specifically, the electrodes of the light-emitting element can be bonded to the contact electrode 108 through the eutectic layer 109. By setting the contact electrode 108 and the pixel circuit 3 to not overlap, this embodiment of the invention can avoid damage to the transistor in the pixel circuit 3 when the light-emitting element 20 is bonded to the contact electrode 108, thus ensuring the quality and yield of the display panel.

[0054] like Figure 2As shown, a buffer layer 101, an active layer 102, a gate insulating layer 103, a first metal layer 104, an interlayer insulating layer 105, a second metal layer 106, and a passivation layer (or planarization layer) 107 are sequentially disposed on the side of the substrate 1 closest to the light-emitting element 20. An encapsulation layer 110 is also disposed on the side of the light-emitting element furthest from the substrate. Figure 2 The first metal layer 104 shown is specifically the gate of a transistor, and the second metal layer 106 is specifically the source and drain of the transistor. Furthermore, the first metal layer may, for example, form scan lines, and the second metal layer may, for example, form data lines. The display panel may also include, for example, a third metal layer, which may, for example, form capacitor electrodes, etc. Figure 2 The structure shown is for illustrative purposes only and is not a limitation. Any scheme in which the pixel circuit 3 and the light-emitting element 20 do not overlap is within the protection scope of this invention. Furthermore, while ensuring that the light-emitting element 20 and the pixel circuit 3 do not overlap, such as... Figure 1 As shown, the pixel circuit 3 can be offset towards the corresponding light-emitting element 20 along the second direction y to reserve space between the rows of light-emitting elements 2 for setting up the shift register circuit 40. Furthermore, along the first direction x, the pixel circuit 3 near the edge of the display area AA can be slightly offset relative to the corresponding light-emitting element 20 towards the center of the display area AA. The remaining pixel circuits 3 and their corresponding light-emitting elements 20 are projected and overlapped along the second direction y, so that the pixel circuits 3 located at the edge avoid the cutting path (such as the outer frame of the substrate 1), preventing the cutting process from affecting the pixel circuits. Moreover, the offset of the pixel circuit 3 relative to the light-emitting element 20 along the first direction x is small, making wiring simpler and facilitating electrical connection between the pixel circuit and the corresponding light-emitting element.

[0055] See also Figure 1 Optionally, the light-emitting element 20 and the driving circuit 4 do not overlap. Specifically, the light-emitting element 20 and the shift register circuit 40 do not overlap.

[0056] In an LED display panel, multiple light-emitting elements can be transferred onto an array substrate via mass transfer and bonded to contact electrodes. In this embodiment, by ensuring that the light-emitting elements 20 and the driving circuit 4 do not overlap, damage to the transistors in the driving circuit 4 during the bonding process can be avoided, thus ensuring the quality and yield of the display panel.

[0057] Figure 5 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 5 In the diagram, "2" indicates the row of light-emitting elements, and the number following "2" (1 to N) represents the row number of the light-emitting elements; "3" indicates the pixel circuit, and the number following "3" (1 to N) represents the row number of the pixel circuit. This marking method will be used in the subsequent diagrams and will not be repeated hereafter.

[0058] See Figure 5 Optionally, the multiple light-emitting element rows include the i-th light-emitting element row and the (i+1)-th light-emitting element row; where i≥1 and i is an integer; the pixel circuit includes the i-th pixel circuit and the (i+1)-th pixel circuit, the i-th pixel circuit is used to drive the multiple light-emitting elements in the i-th light-emitting element row, and the (i+1)-th pixel circuit is used to drive the multiple light-emitting elements in the (i+1)-th light-emitting element row; along the second direction y, the i-th pixel circuit and the (i+1)-th pixel circuit are located between the i-th light-emitting element row and the (i+1)-th light-emitting element row, and no shift register circuit is provided between the i-th light-emitting element row and the (i+1)-th light-emitting element row.

[0059] Specifically, if no shift register circuit is set between the i-th row of light-emitting elements and the (i+1)-th row of light-emitting elements, the pixel circuits of the i-th row and the (i+1)-th row of light-emitting elements can be set between the i-th row of light-emitting elements and the (i+1)-th row of light-emitting elements to reserve more space for setting shift register circuits between other rows of light-emitting elements and reduce the difficulty of fabrication.

[0060] For example, Figure 5 The illustration shows an example where pixel circuits 3-(N-1) in row (N-1) and 3-N in row N are positioned between row 2-(N-1) and row 2-N of light-emitting elements in row (N-1), without any shift register circuit between them. This arrangement allows for more space between row 2-1 and row 2-(N-1) of light-emitting elements in row (N-1), providing more room for the shift register circuit 40 and reducing manufacturing complexity. Furthermore, since row 2-N of light-emitting elements in row N is close to the upper edge of the display area, positioning pixel circuits 3-N between row 2-(N-1) and row 2-N also keeps them away from the cutting edge above the display panel, preventing the cutting process from affecting the pixel circuits.

[0061] It should be noted that, Figure 5 The structure shown is for illustrative purposes only and is not intended to be limiting. In other embodiments, it is also possible to choose not to provide a shift register circuit between any two adjacent rows of light-emitting elements. In this case, the two rows of pixel circuits corresponding to the two rows of light-emitting elements can be set between these two adjacent rows of light-emitting elements. This embodiment of the present invention does not limit this.

[0062] Figure 6 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, see 4 or Figure 6Optionally, the multiple rows of light-emitting elements include a j-th row and a (j+1)-th row; where j ≥ 1 and j is an integer; the pixel circuit includes a j-th row and a (j+1)-th row, the j-th row pixel circuit is used to drive multiple light-emitting elements in the j-th row, and the (j+1)-th row pixel circuit is used to drive multiple light-emitting elements in the (j+1)-th row; along the second direction y, the j-th row pixel circuit is located on the side of the j-th row away from the (j+1)-th row, and the (j+1)-th row pixel circuit is located on the side of the (j+1)-th row closer to the j-th row; the shift register circuit is located between the j-th row and the (j+1)-th row (see...). Figure 6 Alternatively, along the second direction y, the pixel circuit of row j is located on the side of row j near row j+1 of the light-emitting element row, the pixel circuit of row j+1 is located on the side of row j+1 of the light-emitting element row away from row j, and the shift register circuit is located between row j and row j+1 of the light-emitting element row (see...). Figure 5 ).

[0063] Specifically, if a shift register circuit is set between adjacent rows of light-emitting elements, the pixel circuits of each row corresponding to each row of light-emitting elements can be uniformly set on the same side of the corresponding light-emitting element. In this way, it can be ensured that there is space for setting the shift register circuit between adjacent rows of light-emitting elements, and the reserved space is basically the same, thereby ensuring that the layout of each structure in the display area is relatively uniform.

[0064] For example, such as Figure 5 As shown, the display panel includes N rows of light-emitting elements (2-1 to 2-N). In the first row of light-emitting elements 2-1 to the (N-1)th row of light-emitting elements 2-(N-1), a shift register circuit 40 is provided between two adjacent rows of light-emitting elements. Along the second direction y, the pixel circuit corresponding to any row of light-emitting elements is located on the side of the row of light-emitting elements closer to the next row of light-emitting elements. In this way, in the first row of light-emitting elements 2-1 to the (N-1)th row of light-emitting elements 2-(N-1), space can be reserved between adjacent rows of light-emitting elements for the setting of the shift register circuit, and the reserved space is basically the same, thereby ensuring that the layout of each structure in the display area is relatively uniform.

[0065] like Figure 6 As shown, the display panel includes N rows of light-emitting elements (2-1 to 2-N). The pixel circuit corresponding to any row of light-emitting elements is set on the side of the row away from the next row of light-emitting elements. In this way, space can be reserved between adjacent rows of light-emitting elements for setting up shift register circuits, and the reserved space is basically the same, thereby ensuring that the layout of each structure in the display area is relatively uniform.

[0066] As mentioned earlier, for the 7T1C pixel circuit, the driving circuit includes a scanning driving circuit and an emissive control driving circuit. Figure 7 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. See also... Figure 7 Optionally, the driving circuit includes a scan driving circuit 41, which includes a multi-level cascaded scan shift register circuit 401; the scan shift register circuit 401 is located between adjacent rows of light-emitting elements 2.

[0067] like Figure 7 As shown, in this embodiment, the light emission control driving circuit 42 is still located in the border area (as shown in the left border of the figure), and only the scan shift register circuit 401 in the scan driving circuit 41 is located between adjacent light emission element rows, so as to reduce the left and right borders of the display panel.

[0068] See also Figure 7 Optionally, the scan shift register circuit 401 includes a first latch module 4011, a logic module 4012, and a first buffer module 4013, which are arranged along a first direction x.

[0069] In this embodiment of the invention, the scan shift register circuit 401 is divided into a first latch module 4011, a logic module 4012, and a first buffer module 4013, and the first latch module 4011, logic module 4012, and first buffer module 4013 are arranged along the first direction x. This reduces the length of space occupied by the scan shift register circuit 41 along the second direction y, avoids excessive compression of the space occupied by the light-emitting element 20 and the pixel circuit 3, ensures that the small reserved space is sufficient to accommodate the scan shift register circuit 401, and reduces the difficulty of the process.

[0070] It should be noted that the scan shift register circuit 401 is not limited to being divided into a first latch module 4011, a logic module 4012, and a first buffer module 4013. Those skilled in the art can divide the scan shift register circuit into several modules as needed, and the embodiments of the present invention do not limit this.

[0071] For example, Figure 8 yes Figure 7 A detailed circuit diagram of the mid-scan shift register circuit is shown. This circuit can be configured according to... Figure 8 The structure is divided into a first latch module (Latch) 4011, a logic module (NAND) 4012, and a first buffer module (Buffer) 4013. Their working principles will not be explained in detail here.

[0072] It should be noted that, Figure 8The scan shift register circuit 401 shown is only schematic and not a limitation. Those skilled in the art can use any known scan shift register circuit and divide it into several small modules to reduce the length of space occupied by the scan shift register circuit 41 along the second direction y. Scan shift register circuits with other structures that include latch modules, logic modules and buffer modules in terms of functional division are all within the protection scope of the embodiments of the present invention.

[0073] Figure 9 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Optionally, the driving circuit includes a light-emitting control driving circuit 42, which includes a multi-level cascaded light-emitting control shift register circuit 402. The light-emitting control shift register circuit 402 is located between adjacent rows 2 of light-emitting elements.

[0074] like Figure 9 As shown, in this embodiment, the scanning drive circuit 41 is still located in the border area (as shown in the left border of the figure), and only the light emission control shift register circuit 402 in the light emission control drive circuit 42 is located between adjacent light emission element rows 2, so as to reduce the left and right borders of the display panel.

[0075] See also Figure 9 Optionally, the light-emitting control shift register circuit 402 includes a second latch module 4021 and a second buffer module 4022, which are arranged along a first direction x.

[0076] In this embodiment of the invention, the light-emitting control shift register circuit 402 is divided into a second latch module 4021 and a second buffer module 4022, and the second latch module 4021 and the second buffer module 4022 are arranged along the first direction x. This reduces the length of space occupied by the light-emitting control shift register circuit 402 along the second direction y, avoids excessive compression of the space occupied by the light-emitting element 20 and the pixel circuit 3, ensures that the small reserved space is sufficient to accommodate the light-emitting control shift register circuit 402, and reduces the difficulty of the process.

[0077] It should be noted that the light-emitting control shift register circuit 402 is not limited to being divided into a second latch module 4021 and a second buffer module 4022. Those skilled in the art can divide the light-emitting control shift register circuit into several modules as needed, and the embodiments of the present invention do not limit this.

[0078] For example, Figure 10 yes Figure 9 A detailed circuit diagram of the light-emitting control shift register circuit is shown. This circuit can be configured according to... Figure 10The diagram shows a second latch module (Latch) 4021 and a second buffer module (Buffer) 4022. Their working principles will not be explained in detail here.

[0079] It should be noted that, Figure 10 The light-emitting control shift register circuit 402 shown is only schematic and not a limitation. Those skilled in the art can use any known light-emitting control shift register circuit and divide it into several small modules to reduce the length of space occupied by the light-emitting control shift register circuit 402 along the second direction y. Other light-emitting control shift register circuits with different structures that include latching modules and buffer modules in their functional division are all within the protection scope of this invention.

[0080] It should also be noted that, Figure 7 and Figure 9 The illustration only takes the shift register circuit in the scanning drive circuit 41 or the light emission control drive circuit 42 as an example of setting it between adjacent rows of light emission elements. In other embodiments, the shift register circuits in both the scanning drive circuit and the light emission control drive circuit can be set between adjacent rows of light emission elements to achieve a borderless design on the left and right sides.

[0081] Figure 11 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 11 Pixel circuitry is not shown. See also Figure 11 Optionally, at least one group of light-emitting element rows is provided with a cascaded two-stage shift register circuit (VSR, where the number after the VSR represents the stage of the shift register circuit). The light-emitting element row group includes two adjacent light-emitting element rows arranged along the second direction y (e.g., light-emitting element row 2-1 and light-emitting element row 2-2 form a light-emitting element row group).

[0082] Typically, the number of shift register circuits in a driving circuit is greater than or equal to the number of rows of pixel circuits. For example, in a light emission control driving circuit, a first-level light emission control shift register circuit corresponds to one row of pixel circuits, providing light emission control signals to that row of pixel circuits during the light emission phase. In a scanning driving circuit, a first-level scanning shift register circuit typically provides a first scan signal during the initialization phase of the first row of pixel circuits, a second-level scanning shift register circuit provides a second scan signal during the data writing phase of the first row of pixel circuits, and also provides a first scan signal during the initialization phase of the second row of pixel circuits, and so on, to provide first and second scan signals to each row of pixel circuits. Therefore, typically, the number of scanning shift register circuits is one more than the number of rows of pixel circuits.

[0083] At this time, if all the light-emitting element rows are equipped with shift register circuits, since the number of light-emitting element rows is one less than the number of pixel circuit rows, at least one group of light-emitting element rows can be equipped with two-stage shift register circuits in cascade, ensuring that the shift register circuit can be set in the light-emitting element row 2, realizing the narrow bezel or even bezel-less design of the display panel and increasing the screen ratio of the display panel.

[0084] like Figure 11 As shown, the display panel includes, for example, 80 rows of light-emitting elements (2-1 to 2-80), therefore, the number of light-emitting element row groups is 79. If the number of stages of the shift register circuit VSR is 80, then at least one group of light-emitting element rows is provided with two cascaded shift register circuits. Figure 11 The illustration is based on an example of a row group of light-emitting elements consisting of rows 2-79 and 2-80, which includes cascaded shift register circuits VSR79 (79th stage) and VSR80 (80th stage). The notation in subsequent figures will be similar to... Figure 11 same.

[0085] For example, Figure 12 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. See also... Figure 12 Optionally, the driving circuit includes a scanning driving circuit and a light emission control driving circuit; the scanning driving circuit includes a multi-level cascaded scanning shift register circuit (SCAN-VSR), and the light emission control driving circuit includes a multi-level cascaded light emission control shift register circuit (EMIT-VSR); at least two groups of light emission element rows are provided with a cascaded two-level scanning shift register circuit (SCAN-VSR); at least one group of light emission element rows is provided with a cascaded two-level light emission control shift register circuit (EMIT-VSR).

[0086] As described above, given that the number of scan shift register circuits is one more than the number of pixel circuit rows, while the number of light-emitting element row groups is one less than the number of pixel circuit rows, if all light-emitting element row groups are equipped with scan shift register circuits, then at least two light-emitting element row groups can be equipped with cascaded two-stage scan shift register circuits. This ensures that both the scan shift register circuit and the light-emitting control shift register circuit can be located in the light-emitting element row 2, achieving a narrow bezel or even bezel-less design for the display panel and increasing the screen-to-body ratio. Figure 12As shown, the row group of light-emitting elements composed of rows 2-79 and 2-80 is provided with cascaded 81st-level scan shift register circuit SCAN-VSR81 and 80th-level scan shift register circuit SCAN-VSR80, and the row group of light-emitting elements composed of rows 2-78 and 2-79 is provided with cascaded 78th-level scan shift register circuit SCAN-VSR78 and 79th-level scan shift register circuit SCAN-VSR79.

[0087] Furthermore, since the number of light-emitting control shift register circuits is equal to the number of rows of pixel circuits, and the number of light-emitting element rows is one less than the number of pixel circuit rows, if all light-emitting element rows are equipped with light-emitting control shift register circuits, then at least one group of light-emitting element rows can be equipped with cascaded two-stage light-emitting control shift register circuits. This ensures that both the scan shift register circuit and the light-emitting control shift register circuit can be placed in the light-emitting element row 2, achieving a narrow bezel or even bezel-less design for the display panel and increasing the screen-to-body ratio. Figure 12 As shown, the row group of light-emitting elements consisting of rows 2-79 and 2-80 is provided with a cascaded 79th stage light-emitting control shift register circuit EMIT-VSR79 and an 80th stage light-emitting control shift register circuit EMIT-VSR80.

[0088] Of course, without considering the number of shift register circuits, in other embodiments, regardless of the type of shift register circuit, any row of light-emitting elements optionally equipped with a shift register circuit may have two cascaded shift register circuits, such as... Figure 13 The diagram shown is a schematic representation of another display panel structure provided by an embodiment of the present invention. The embodiments of the present invention do not limit the specific arrangement of the scan shift register circuit and the light emission control shift register circuit, as long as the scan shift register circuit and the light emission control shift register circuit can be arranged between the rows of light-emitting elements to achieve a narrow bezel or even a bezel-less design of the display panel, thereby increasing the screen-to-body ratio of the display panel.

[0089] See also Figure 11 Optionally, at least two shift register circuits are located in different light-emitting element rows, the light-emitting element rows comprising two adjacent light-emitting element rows arranged along the second direction y.

[0090] By cascading two-stage shift register circuits within the same row group of light-emitting elements, the difference in the number of shift register circuits compared to the number of light-emitting element rows can be compensated for. However, regardless of whether it is a scanning shift register circuit or a light-emitting control shift register circuit, the difference between the number of shift register circuits and the number of light-emitting element rows is relatively small. Therefore, some shift register circuits can be located in different light-emitting element rows. In this way, the shift register circuits are closer to the corresponding pixel circuits, which facilitates wiring and reduces the manufacturing process difficulty. Figure 11 As shown, in the multiple light-emitting element row groups consisting of light-emitting element rows 2-1 to 2-79, each light-emitting element row group is provided with only one level of shift register circuit VSR.

[0091] Of course, besides the conventional quantitative relationships mentioned above, in special cases, regardless of whether it's a scan shift register circuit or a light emission control shift register circuit, a single-level shift register circuit can simultaneously correspond to multiple rows of pixel circuits and provide driving signals (e.g., light emission control signals, first scan signals, and second scan signals) to multiple rows of pixel circuits. In this case, the number of shift register circuits in the driving circuit can be less than the number of pixel circuit rows and light emission element rows, allowing each shift register circuit to be located in a different group of light emission element rows, such as... Figure 14 The diagram shown is a schematic representation of another display panel provided by an embodiment of the present invention. It should be noted that the following explanation will only use the example where the number of scan shift register circuits is one more than the number of rows of pixel circuits, and the number of light emission control shift register circuits is equal to the number of rows of pixel circuits.

[0092] Optionally, when cascaded shift register circuits are located in different rows of light-emitting elements, the projections of any two cascaded shift register circuits along the second direction y overlap (e.g., Figure 14 Or, two cascaded shift register circuits can be arranged in a zigzag pattern with their projections along the second direction y that do not overlap (e.g., ...). Figure 11 ).

[0093] See Figure 11 , Figure 12 or Figure 13 Optionally, the multi-stage cascaded shift register circuit includes an odd-stage shift register circuit and an even-stage shift register circuit; the multi-stage odd-stage shift register circuit is arranged along the second direction y, and the multi-stage even-stage shift register circuit is arranged along the second direction y; the odd-stage shift register circuit and the even-stage shift register circuit are arranged sequentially along the first direction x.

[0094] like Figure 12As shown, both the scanning drive circuit and the light emission control drive circuit can be divided into odd-level shift register circuits and even-level shift register circuits (as mentioned above, the numbers in the figure indicate the level of each shift register circuit's VSR). Typically, odd-level shift register circuits are electrically connected to the same clock signal line, and even-level shift register circuits are also electrically connected to the same clock signal line. Therefore, in this embodiment of the invention, by arranging multiple odd-level shift register circuits along the second direction y and multiple even-level shift register circuits along the second direction y, and sequentially arranging the odd-level and even-level shift register circuits along the first direction x, it is beneficial to reduce wiring difficulty.

[0095] For example, when there are two cascaded shift register circuits in a row of light-emitting elements, and / or when there are at least two cascaded shift register circuits located in different rows of light-emitting elements, the above-described configuration can be adopted, in which the multi-level odd-numbered shift register circuits are configured along the second direction y, the multi-level even-numbered shift register circuits are configured along the second direction y, and the odd-numbered shift register circuits and even-numbered shift register circuits are configured sequentially along the first direction x.

[0096] Furthermore, Figure 15 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. See also... Figure 15 Optionally, the shift register circuit VSR includes at least a latch module and a buffer module; in the first direction x, the latch module of the odd-level shift register circuit is located on the side of its buffer module closer to the even-level shift register circuit, and the latch module of the even-level shift register circuit is located on the side of its buffer module closer to the odd-level shift register circuit.

[0097] Specifically, refer to Figure 15 and Figure 7 For the scan-shift register circuit (SCAN-VSR), the scan-shift register circuit 401 includes a first latch module 4011, a logic module (NAND) 4012, and a first buffer module 4013. In the first direction x, the first latch module 4011 of the odd-level scan-shift register circuit can be disposed on the side of the first buffer module 4013 closer to the even-level scan-shift register circuit, and the first latch module 4011 of the even-level scan-shift register circuit can be disposed on the side of its first buffer module 4013 closer to the odd-level scan-shift register circuit.

[0098] Reference Figure 15 and Figure 9For the light emission control shift register circuit (EMIT-VSR), the light emission control shift register circuit 402 includes a second latch module 4021 and a second buffer module 4022. In the second direction y, the second latch module 4021 of the odd-level light emission control shift register circuit can be disposed on the side of its second buffer module 4022 close to the even-level light emission control shift register circuit, and the second latch module 4021 of the even-level light emission control shift register circuit can be disposed on the side of its second buffer module 4022 close to the odd-level light emission control shift register circuit.

[0099] In summary, regardless of whether it's a scanning shift register circuit or a light-emitting control shift register circuit, when multiple odd-level shift register circuits are set along the second direction y, multiple even-level shift register circuits are set along the second direction y, and the odd-level and even-level shift register circuits are set sequentially along the first direction x, the latch modules in the shift register circuit can be set relative to each other. The reason for this setting is as follows:

[0100] Reference Figure 8 or Figure 10 Regardless of the scan shift register circuit 401 ( Figure 8 ) or the light-emitting control shift register circuit 402 ( Figure 10 Each shift register circuit cascades an enable level by transmitting it from the output terminal NEXT of the current shift register circuit to the input terminal IN of the next shift register circuit, thus triggering the next shift register circuit to start operating. Figure 8 and Figure 10 It can be seen that the output terminal NEXT and input terminal IN of the scan shift register circuit 401 and the light emission control shift register circuit 402 are both located in their latch modules. When the multi-level odd-stage shift register circuit is set along the second direction y, the multi-level even-stage shift register circuit is set along the second direction y, and the odd-stage shift register circuit and the even-stage shift register circuit are set sequentially along the first direction x, if the latch modules of the odd-stage shift register circuit and the even-stage shift register circuit are far apart, it will increase the wiring difficulty and is not conducive to cascading the two. In this embodiment, by setting the latch modules in the odd-stage shift register circuit and the even-stage shift register circuit relative to each other, the distance between the latch modules of the odd-stage shift register circuit and the even-stage shift register circuit can be shortened, which facilitates the sequential cascading of adjacent odd-stage shift register circuits and even-stage shift register circuits, avoids winding, and reduces the manufacturing difficulty.

[0101] Figure 16 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. See also... Figure 16 Optionally, the display panel includes multiple driving circuits, which are arranged sequentially along the first direction x.

[0102] like Figure 16 As shown, the multiple driving circuits can be a scanning driving circuit 41 and a light emission control driving circuit 42. The scanning driving circuit 41 and the light emission control driving circuit 42 are arranged sequentially along the first direction x, so that a borderless design can be achieved on the left and right sides.

[0103] In other embodiments, the multiple driving circuits may also refer to multiple scanning driving circuits arranged along the first direction x. This allows different scanning driving circuits to drive pixel circuits at different locations, reducing the impact of trace resistance on the scanning signal and ensuring the normal conduction of the corresponding thin-film transistors in the pixel circuit. Alternatively, the multiple driving circuits may also refer to multiple light-emitting control driving circuits arranged along the first direction x. This allows different light-emitting control driving circuits to drive pixel circuits at different locations, reducing the impact of trace resistance on the light-emitting control signal and ensuring the normal conduction of the corresponding thin-film transistors in the pixel circuit.

[0104] Figure 17 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. See also... Figure 17 Optionally, multiple driving circuits include a scanning driving circuit 41 and a light emission control driving circuit 42, which are alternately arranged in the first direction x.

[0105] For example, Figure 17 Taking a display panel comprising two scanning drive circuits 41 and two light-emitting control drive circuits 42 as an example, the scanning drive circuits 41 and the light-emitting control drive circuits 42 are alternately arranged along the first direction x. This not only achieves a borderless design on the left and right sides, but also allows different scanning drive circuits 41 and different light-emitting control drive circuits 42 to drive pixel circuits at different locations, reducing the impact of trace resistance on the drive signals (e.g., scanning signals and light-emitting control signals). The arrangement of the drive circuits in each area can be referred to the description in the above embodiment, and will not be repeated here. Furthermore, since both the scanning drive circuit 41 and the light-emitting control drive circuit 42 require input of high-level signals (VGH) and low-level signals (VGL) during operation, the alternate arrangement of the scanning drive circuit 41 and the light-emitting control drive circuit 42 allows them to share high-level signal traces and low-level signal traces, reducing the number of signal traces and ensuring a simpler wiring process for the display panel.

[0106] Figure 18 yes Figure 17 The schematic diagram of the display panel in region Q2 shows a specific arrangement of the area where the light-emitting control driving circuit 42 is located. Figure 19 yes Figure 17The schematic diagram of the display panel in region Q3 shows a specific arrangement of the area where the scan drive circuit 41 is located. (See also...) Figure 18 and Figure 19 Optionally, the display panel 100 further includes at least one set of drive circuit signal line group 5, which is used to provide drive signals to the drive circuit; the drive circuit signal line group 5 extends along the first direction x.

[0107] In existing technologies, drive circuit signal line groups are typically located on the left and right borders and extend along the second direction y. Signal terminals electrically connected to the drive chip are connected to each drive circuit signal line via diagonal wires to provide drive signals for each stage of the shift register circuit. This approach increases the width of the left and right borders, and the diagonal wire connection method limits the flexibility in setting the signal terminals, requiring consideration of the terminal size and spacing between adjacent terminals.

[0108] In this embodiment, by setting the drive circuit signal line group 5 to extend along the first direction x, it can achieve a borderless design on the left and right sides, and also facilitate wiring into the display area. This enables the signal lines in the drive signal line group to be electrically connected to the drive circuit, and can also be electrically connected to the signal terminals by pulling straight wires, thereby increasing the freedom of setting the signal terminals.

[0109] See also Figure 18 and Figure 19 Optionally, at least one group of light-emitting element rows is provided with a driving circuit signal line group 5; at least two groups of light-emitting element rows are provided with a cascaded two-stage shift register circuit VSR; the light-emitting element row group includes two light-emitting element rows arranged adjacent to each other along the second direction y.

[0110] Furthermore, in this embodiment, by placing the driving circuit signal line group 5 in the light-emitting element row group, the lower bezel of the display panel can be avoided.

[0111] At this time, since the drive signal line group 5 occupies at least one group of light-emitting element rows, the number of light-emitting element rows used to set the shift register circuit VSR is reduced by at least one. Therefore, at least two groups of light-emitting element rows are equipped with cascaded two-stage shift register circuits VSR, ensuring that the shift register circuits can be set in the light-emitting element row 2, realizing the narrow bezel or even bezel-less design of the display panel and increasing the screen ratio of the display panel.

[0112] For example, Figure 18 and Figure 19 The illustration takes an example of a row of light-emitting elements with a drive circuit signal line group 5. (See also...) Figure 18 and Figure 19The display panel has 80 rows of light-emitting elements (2-1 to 2-80), therefore, the number of light-emitting element row groups is 79. Since a drive circuit signal line group is provided between light-emitting element rows 2-1 and 2-2, and no shift register circuit is provided between light-emitting element rows 2-79 and 2-80, the number of light-emitting element row groups where shift register circuits can be installed is 77. Thus, for an 80-level light-emitting control shift register circuit, at least three light-emitting element row groups need to have cascaded two-stage shift register circuits (see...). Figure 18 For an 81-level scan shift register circuit, at least four groups of light-emitting element rows need to have cascaded two-stage shift register circuits (see...). Figure 19 ).

[0113] In general, for every reduction in the number of light-emitting element rows used to set up the shift register circuit, the number of light-emitting element rows with cascaded two-stage shift register circuits increases by one. This will not be discussed further hereafter.

[0114] See Figure 18 and Figure 19 Optionally, at least one set of driving circuit signal line groups 5 includes a first driving circuit signal line group 51; the first driving circuit signal line group 51 is used to provide signals to the driving circuit during the testing and display phases. When the display panel includes only one set of driving circuit signal line groups (i.e., the first driving circuit signal line group), the first driving circuit signal line group is used both to provide signals to the driving circuit during the testing phase to complete the testing of the display panel, and to provide signals to the driving circuit during the display phase to complete the normal display of the display panel. It can be understood that when the display panel includes only one set of driving circuit signal line groups, this driving circuit signal line group includes both signal lines that provide driving signals to the scanning driving circuit and signal lines that provide driving signals to the light emission control driving circuit.

[0115] See Figure 18Optionally, the drive circuit signal line group 5 includes a first clock signal line CK1, a second clock signal line XCK1, a third clock signal line CK2, a fourth clock signal line XCK2, a first enable signal line STV1, a second enable signal line STV2, a first level signal line VGH, and a second level signal line VGL; the drive circuit includes a scan drive circuit and a light emission control drive circuit; the first clock signal line CK1 and the second clock signal line XCK1 are used to provide clock signals to the scan drive circuit; the first enable signal line STV1 is used to provide an initial start signal to the scan drive circuit; the third clock signal line CK2 and the fourth clock signal line XCK2 are used to provide clock signals to the light emission control drive circuit; the second enable signal line STV2 is used to provide an initial start signal to the light emission control drive circuit; the first level signal line VGH and the second level signal line VGL are used to provide first level signals and second level signals to the scan drive circuit and the light emission control drive circuit.

[0116] The first enable signal line provides an initial start signal to the first-stage scan shift register circuit in the scan drive circuit to trigger its operation. Subsequent scan shift register circuits receive the output signal of the previous-stage scan shift register circuit as their trigger signal, thus achieving cascading. Similarly, the second enable signal line provides an initial start signal to the first-stage light emission control shift register circuit in the light emission control drive circuit to trigger its operation. Subsequent light emission control shift register circuits receive the output signal of the previous-stage light emission control shift register circuit as their trigger signal, thus achieving cascading.

[0117] It should be noted that the signal lines included in the above-mentioned drive circuit signal line group are for illustrative purposes only and are not limited. The specific signal lines in the drive circuit signal line group can be set according to the structure of the shift register circuit.

[0118] Figure 20 yes Figure 17 The diagram shown illustrates another structural configuration of the display panel in region Q2, demonstrating a different arrangement of the light-emitting control driving circuit 42 in that region. Figure 21 yes Figure 17 The diagram shown illustrates another structural configuration of the display panel in region Q3, demonstrating a different arrangement of the scan drive circuit 41 in that region. (See also...) Figure 20 and Figure 21Optionally, at least one set of driving circuit signal line groups includes a first driving circuit signal line group 51 and a second driving circuit signal line group 52; the first driving circuit signal line group 51 and the second driving circuit signal line group 52 are located in different light-emitting element row groups; at least three sets of light-emitting element row groups are provided with cascaded two-stage shift register circuits VSR; the first driving circuit signal line group 51 is used to provide signals to the driving circuit during the display stage, and the second driving circuit signal line group 52 is used to provide signals to the driving circuit during the testing stage.

[0119] This embodiment of the invention uses two sets of driving circuit signal line groups, namely a first driving circuit signal line group 51 and a second driving circuit signal line group 52. The first driving circuit signal line group 51 provides signals to the driving circuit during the display phase, and the second driving circuit signal line group 52 provides signals to the driving circuit during the testing phase, making the control method simple and flexible. It is understood that both the first driving circuit signal line group 51 and the second driving circuit signal line group 52 include signal lines providing driving signals to both the scanning driving circuit and the light-emitting control driving circuit. Because the number of driving circuit signal line groups increases, the number of light-emitting element rows that can be used to set up shift register circuits decreases. Therefore, the number of light-emitting element rows with cascaded two-stage shift register circuits increases, as described above.

[0120] It should be noted that, Figures 18-21 The positions of the signal line groups of each driving circuit are for illustrative purposes only and are not limited. In other embodiments, the signal line groups of the driving circuit may also be located in the row of light-emitting elements in the center of the display area.

[0121] Figure 22 yes Figure 17 The diagram shows another structural representation of the display panel in region Q2. Taking the region where the light-emitting control driving circuit 42 is located as an example, the arrangement of the driving circuit signal lines has been improved. The driving signal lines in other regions are the same as in this region. See also Figure 22 Optionally, the driving circuit signal line group 5 includes at least a first signal line group portion 501 and a second signal line group portion 502; the driving circuit includes a scanning driving circuit and a light emission control driving circuit; the first signal line group portion 501 is used to provide a driving signal to the scanning driving circuit, and the second signal line group portion 502 is used to provide a driving signal to the light emission control driving circuit; the first signal line group portion 501 is provided in at least one group of light emission element rows; the second signal line group portion 502 is provided in at least one group of light emission element rows, and the second signal line group portion 501 and the first signal line group portion 502 are located in different groups of light emission element rows; at least three groups of light emission element rows are provided with cascaded two-stage shift register circuits VSR; wherein, the light emission element row group includes two light emission element rows arranged adjacent to each other along the second direction y.

[0122] Since the signal lines in the driving circuit signal line group 5 have a certain line width and spacing, when the reserved space between two adjacent light-emitting element rows is insufficient to accommodate the driving circuit signal line group 5, the driving circuit signal line group 5 can be split into a first signal line group portion 501 for providing driving signals to the scanning driving circuit, and a second signal line group portion 502 for providing driving signals to the light-emitting control driving circuit. The first signal line group portion 501 and the second signal line group portion 502 are then placed in different light-emitting element row groups to reduce process difficulty, avoid the adverse effects of compressing the line width and spacing of the signal lines, and improve product yield. Correspondingly, the first signal line group portion 501 may include a first clock signal line CK1, a second clock signal line XCK1, a first enable signal line STV1, a first level signal line VGH, and a second level signal line VGL; the second signal line group portion 502 may include a third clock signal line CK2, a fourth clock signal line XCK2, and a second enable signal line STV2. Alternatively, the first signal line component 501 may include a first clock signal line CK1, a second clock signal line XCK1, and a first enable signal line STV1; the second signal line component 502 may include a third clock signal line CK2, a fourth clock signal line XCK2, a second enable signal line STV2, a first level signal line VGH, and a second level signal line VGL.

[0123] It should be noted that the splitting method of the driving circuit signal line group 5 is not limited to this. In other embodiments, optionally, a group of driving circuit signal line groups 5 is located in at least two groups of light-emitting element rows; wherein, the light-emitting element row group includes two light-emitting element rows arranged adjacent to each other along the second direction y.

[0124] Specifically, a set of driving circuit signal lines can be divided into two parts and arranged in two sets of light-emitting element rows in other ways. It is not limited to one set of light-emitting element rows including only the first signal line group and the other set including only the second signal line group. For example, the first clock signal line CK1, the second clock signal line XCK1, the first enable signal line STV1, the third clock signal line CK2, the fourth clock signal line XCK2, and the second enable signal line STV2 may be located in one set of light-emitting element rows; the first level signal line VGH and the second level signal line VGL may be located in another set of light-emitting element rows. Furthermore, a set of driving signal lines can also be arranged in three or more sets of light-emitting element rows, or even one signal line may be arranged in each set of light-emitting element rows. This embodiment of the invention does not limit this.

[0125] Figure 23 This is a partial structural schematic diagram of a display panel provided in an embodiment of the present invention. See also... Figure 23Optionally, the display panel also includes multiple data lines (DATA) and multiple scan lines (SCAN1 and SCAN2) located on one side of the substrate and in the display area. The multiple data lines extend along the second direction y and are arranged along the first direction x, and the multiple scan lines extend along the first direction x and are arranged along the second direction y.

[0126] like Figure 23 As shown, the scan lines include a first scan line SCAN1 and a second scan line SCAN2. The scan lines extend along a first direction x and are used to provide scan signals to a row of pixel circuits 3 arranged along the first direction x. The data lines DATA generally extend along a second direction y and are used to provide data signals to at least one pixel circuit in a column of pixel circuits 3 arranged along the second direction y. Furthermore, as... Figure 23 As shown, the display panel also includes multiple light-emitting control lines (EMITs) located on one side of the substrate and in the display area. These EMITs extend along a first direction x and are arranged along a second direction y, providing light-emitting control signals to a row of pixel circuits 3 arranged along the first direction x. Based on the cascading of shift register circuits in the driving circuit, the pixel circuits can be scanned row by row, enabling the light-emitting elements to emit light row by row, thus displaying one frame of an image.

[0127] See also Figure 23 Optionally, the display panel also includes a drive signal transmission trace 6, which is electrically connected to the drive circuit signal line group 5 and the drive circuit 4, respectively; the drive signal transmission trace 6 extends along the second direction y. Specifically, the drive signal transmission trace 6 is electrically connected to the shift register circuits 40 at each stage in the drive circuit signal line group 5 and the drive circuit 4, respectively. Figure 23 As can be seen, since the drive circuit signal line group 5 extends along the first direction x, the drive signal transmission trace 6 connecting the drive circuit signal line group 5 and the shift register circuit 40 can be extended along the second direction y in a straight line manner, ensuring that the wiring method of the drive signal transmission trace 6 is simple.

[0128] See also Figure 23 Optionally, the shift register circuit 40 includes at least two shift register circuit modules 4001, and two adjacent shift register circuit modules 4001 are connected by wiring; the shift register circuit modules 4001 are located between four adjacent light-emitting elements in the same light-emitting element row group, wherein the light-emitting element row group includes two light-emitting element rows that are adjacent along the second direction y.

[0129] Specifically, for the scan shift register circuit, the shift register circuit module can refer to the first latch module, the logic module, and the first buffer module; for the light emission control shift register circuit, the shift register circuit module can refer to the second latch module and the second buffer module.

[0130] For example, Figure 23 The four shift register circuit modules 4001, from left to right, can be, for example, the buffer module of the i-th level shift register circuit, the latch module of the i-th level shift register circuit, the latch module of the (i+1)-th level shift register circuit, and the buffer module of the (i+1)-th level shift register circuit, as follows: Figure 23 As shown, the latch module and buffer module of the same level shift register circuit 40 are electrically connected through wiring, and the latch modules of adjacent level shift register circuits are electrically connected to achieve cascading.

[0131] from Figure 23 As can be seen, by setting the shift register circuit module 4001 between four adjacent light-emitting elements in the same row of light-emitting elements, the present invention can avoid the overlap of the projection of the shift register circuit module 4001 and the pixel circuit 3 in the second direction y. Furthermore, the space between the four adjacent light-emitting elements can be used to set up the drive signal transmission trace 6, avoiding conflict between the drive signal transmission trace 6 and the data line DATA. When multiple light-emitting elements 20 and multiple pixel circuits 3 are arranged in a pixel cluster, that is, within a pixel cluster, the spacing between the light-emitting elements 20 and the pixel circuit 3 is small, while the spacing between pixel clusters is large. Therefore, the shift register circuit module 4001 can be located between four adjacent pixel clusters.

[0132] In addition, from Figure 23 It can also be seen that the number of drive signal transmission traces 6 corresponding to each shift register module 4001 is relatively small. Therefore, in this embodiment of the invention, by dividing the shift register circuit 40 into at least two shift register modules 4001 and placing the shift register circuit modules 4001 between four adjacent light-emitting elements in the same light-emitting element row group, the drive signal transmission traces 6 of the shift register circuit 40 can be distributed in different spaces, which helps to reduce the wiring difficulty.

[0133] Combination Figure 23 , Figure 17 as well as Figure 18 and Figure 19 It can also be seen that, in this embodiment of the invention, by alternately arranging the scanning drive circuit 41 and the light emission control drive circuit 42 along the first direction x, and dividing both the scanning shift register circuit 41 and the light emission shift register circuit 42 into several shift register modules (such as the latch module and buffer module mentioned above), the modules are distributed between adjacent rows of light emission elements. This allows the number of jumpers between all data lines and the shift register circuit to be kept as consistent as possible in the first direction x and the second direction y, making the parasitic capacitance of the data lines consistent, which is beneficial to ensuring display uniformity.

[0134] See also Figure 23Optionally, the data line DATA includes a winding portion D1, which is adjacent to the shift register circuit module 4001 and does not overlap with the shift register circuit module 4001 in the direction perpendicular to the substrate.

[0135] like Figure 23 As shown, the data lines that overlap with the projection of the shift register circuit 40 in the first direction x have a winding design, thereby avoiding short circuits and reducing mutual interference with the shift register circuit 40. Additionally, as... Figure 23 As shown, the winding length of each data line is basically the same, which ensures that the trace resistance of each data line is basically the same, thus guaranteeing display uniformity.

[0136] See Figure 18 and Figure 19 Optionally, the display panel also includes a multiplexer (mux) circuit, which is located in the display area AA. The area where the multiplexer (mux) is located does not overlap with the areas for the light-emitting elements, pixel circuits, or driving circuits. Each multiplexer (mux) is electrically connected to multiple data lines (DATA) for time-division multiplexing of data signals to each data line, thus addressing the imbalance between the number of data lines and the number of driver chip pins. This embodiment, by placing the multiplexer (mux) circuit in the display area, can reduce the width of the bottom bezel.

[0137] See Figure 20 and Figure 21 Alternatively, the multiplexing circuit (mux) can be positioned between two adjacent rows 2 of light-emitting elements. This configuration further shifts the original structure located at the bottom bezel toward the display area, thereby reducing the size of the bottom bezel.

[0138] See Figure 16 Optionally, the display panel 100 further includes a signal terminal 7, which includes at least one of a data signal terminal, a power signal terminal, a clock signal terminal, and an electrostatic shielding terminal. The signal terminal 7 is located in the display area AA, and the area where the signal terminal 7 is located does not overlap with the area where the light-emitting element, the area where the pixel circuit is located, or the area where the driving circuit is located. In this embodiment, by placing the signal terminal 7 in the display area, the display panel can be made bezel-less.

[0139] See Figure 16 Optionally, the display panel 100 also includes an electrostatic shielding trace 8 surrounding the display area AA. Exemplarily, the electrostatic shielding trace 8 is electrically connected to the electrostatic shielding terminal in the signal terminal 7 to shield against external static electricity and prevent electrostatic damage to the internal circuit structure of the display area.

[0140] See Figure 16Optionally, the display panel 100 also includes an electrostatic discharge (ESD) protection circuit, which is disposed in the display area AA. For example, the ESD protection circuit can be disposed at the edge of the display area, and does not overlap with the area where the light-emitting element, the pixel circuit, and the driving circuit are disposed, thus also serving to shield against static electricity.

[0141] Figure 24 This is a partial structural diagram of another display panel provided in an embodiment of the present invention. See also... Figure 24 Optionally, the display panel further includes a flexible circuit board 9; the flexible circuit board 9 is disposed on the non-light-emitting side of the display panel, and the flexible circuit board 9 is electrically connected to the signal terminal 7 through a conductive structure 71; the conductive structure 71 is located on the side of the display panel. This arrangement can reduce the bottom bezel of the display panel and increase the screen-to-body ratio. The conductive structure 71 can be, for example, conductive silver paste, and the upper surface of the conductive silver paste can be covered with a protective ink 72.

[0142] Through the above technical solutions, the display panel provided in the embodiments of the present invention can achieve narrow bezels or even bezel-less displays, thereby enabling it to be used for splicing displays, that is, splicing multiple display panels into a larger display panel for display.

[0143] Based on the same inventive concept, embodiments of the present invention also provide a display device. Figure 25 This is a schematic diagram of a display device according to an embodiment of the present invention. The display device 200 includes the display panel 100 provided in any of the above embodiments, and therefore has the same beneficial effects as the above-described display panel. The similarities can be found in the description of the above-described display panel embodiments, and will not be repeated here. The display device provided in this embodiment of the present invention can be... Figure 25 The mobile phone shown can also be any electronic product with display function, including but not limited to the following categories: television, laptop, desktop monitor, tablet computer, digital camera, smart bracelet, smart glasses, in-vehicle display, medical equipment, industrial control equipment, touch interactive terminal, etc. The embodiments of the present invention do not make any special limitations on this.

[0144] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that, Including the display area; The display panel also includes: Substrate; The display area includes multiple light-emitting elements, multiple pixel circuits, at least one driving circuit, at least one set of driving circuit signal line groups, multiple data lines, and multiple scan lines located on one side of the substrate. The driving circuit signal line groups are used to provide driving signals to the driving circuits, the driving circuits are used to transmit driving signals to the pixel circuits, and the pixel circuits are used to drive the light-emitting elements. The scan line extends along a first direction, and the data line extends along a second direction; The driving circuit includes a multi-stage cascaded shift register circuit; The drive circuit signal line group includes multiple signal lines that provide drive signals to the drive circuit, and the drive circuit signal line group extends along the first direction; The display panel further includes drive signal transmission lines, which are located in the display area and extend along the second direction; The drive signal transmission trace connects the signal lines in the drive circuit signal line group to the drive circuit.

2. The display panel according to claim 1, characterized in that, The plurality of light-emitting elements include a plurality of rows of light-emitting elements, the rows of light-emitting elements extending along the first direction, and the plurality of rows of light-emitting elements arranged along the second direction; The shift register circuit is located between adjacent rows of light-emitting elements.

3. The display panel according to claim 1, characterized in that, The plurality of light-emitting elements include a plurality of rows of light-emitting elements, the rows of light-emitting elements extending along the first direction, and the plurality of rows of light-emitting elements arranged along the second direction; At least one group of light-emitting elements is provided with the driving circuit signal line group; The light-emitting element row group includes two light-emitting element rows arranged adjacent to each other along the second direction.

4. The display panel according to claim 1, characterized in that, At least one group of the drive circuit signal lines includes a first drive circuit signal line group; The first drive circuit signal line group is used to provide signals to the drive circuit during the testing and display phases.

5. The display panel according to claim 1, characterized in that, The plurality of light-emitting elements include a plurality of rows of light-emitting elements, the rows of light-emitting elements extending along the first direction, and the plurality of rows of light-emitting elements arranged along the second direction; At least one group of the drive circuit signal lines includes a first drive circuit signal line group and a second drive circuit signal line group; The first driving circuit signal line group and the second driving circuit signal line group are located in different light-emitting element row groups; The first driving circuit signal line group is used to provide signals to the driving circuit during the display stage, and the second driving circuit signal line group is used to provide signals to the driving circuit during the testing stage; The light-emitting element row group includes two light-emitting element rows arranged adjacent to each other along the second direction.

6. The display panel according to claim 1, characterized in that, The plurality of light-emitting elements include a plurality of rows of light-emitting elements, the rows of light-emitting elements extending along the first direction, and the plurality of rows of light-emitting elements arranged along the second direction; The driving circuit signal line group includes at least a first signal line group and a second signal line group; The driving circuit includes a scanning driving circuit and a light emission control driving circuit; The first signal line component is used to provide a driving signal to the scanning driving circuit, and the second signal line component is used to provide a driving signal to the light emission control driving circuit. At least one group of light-emitting elements is provided with the first signal line group; At least one group of light-emitting element rows is provided with a second signal line group portion, and the second signal line group portion and the first signal line group portion are located in different groups of light-emitting element rows; The light-emitting element row group includes two light-emitting element rows arranged adjacent to each other along the second direction.

7. The display panel according to claim 1, characterized in that, The plurality of light-emitting elements include a plurality of rows of light-emitting elements, the rows of light-emitting elements extending along the first direction, and the plurality of rows of light-emitting elements arranged along the second direction; A set of drive circuit signal lines is located in at least two sets of light-emitting element rows; The light-emitting element row group includes two light-emitting element rows arranged adjacent to each other along the second direction.

8. The display panel according to claim 1, characterized in that, The drive circuit signal line group includes a first clock signal line, a second clock signal line, a third clock signal line, a fourth clock signal line, a first enable signal line, a second enable signal line, a first level signal line, and a second level signal line; The driving circuit includes a scanning driving circuit and a light emission control driving circuit; The first clock signal line and the second clock signal line are used to provide clock signals to the scan driving circuit; the first enable signal line is used to provide an initial start signal to the scan driving circuit. The third clock signal line and the fourth clock signal line are used to provide clock signals to the light-emitting control driving circuit; The second enable signal line is used to provide an initial start signal to the light emission control driving circuit; The first level signal line and the second level signal line are used to provide a first level signal and a second level signal to the scanning driving circuit and the light emission control driving circuit.

9. The display panel according to claim 1, characterized in that, The driving circuit includes a scanning driving circuit, which includes a multi-stage cascaded scanning shift register circuit. The scan shift register circuit includes a first latch module, a logic module, and a first buffer module, wherein the first latch module, the logic module, and the first buffer module are arranged along the first direction.

10. The display panel according to claim 1, characterized in that, The driving circuit includes a light-emitting control driving circuit, which includes a multi-stage cascaded light-emitting control shift register circuit. The light-emitting control shift register circuit includes a second latch module and a second buffer module, which are arranged along the first direction.

11. The display panel according to claim 1, characterized in that, The multiple light-emitting elements are arranged uniformly.

12. The display panel according to claim 1, characterized in that, The light-emitting element does not overlap with the pixel circuit.

13. The display panel according to claim 12, characterized in that, It also includes a contact electrode, to which the light-emitting element is bonded; The pixel circuit includes multiple transistors; The contact electrode does not overlap with the pixel circuit.

14. The display panel according to claim 1, characterized in that, The light-emitting element and the driving circuit do not overlap.

15. The display panel according to claim 1, characterized in that, The plurality of light-emitting elements include a plurality of rows of light-emitting elements, the rows of light-emitting elements extending along the first direction, and the plurality of rows of light-emitting elements arranged along the second direction; At least one group of light-emitting element rows is provided with two cascaded shift register circuits, and the group of light-emitting element rows includes two light-emitting element rows arranged adjacent to each other along the second direction.

16. The display panel according to claim 15, characterized in that, The driving circuit includes a scanning driving circuit and a light emission control driving circuit; the scanning driving circuit includes a multi-stage cascaded scanning shift register circuit, and the light emission control driving circuit includes a multi-stage cascaded light emission control shift register circuit. At least two groups of light-emitting elements are provided with two cascaded scanning shift register circuits; At least one group of light-emitting elements is provided with two cascaded light-emitting control shift register circuits.

17. The display panel according to claim 1, characterized in that, The plurality of light-emitting elements include a plurality of rows of light-emitting elements, the rows of light-emitting elements extending along the first direction, and the plurality of rows of light-emitting elements arranged along the second direction; At least two levels of the shift register circuit are located in different light-emitting element rows, the light-emitting element rows comprising two light-emitting element rows arranged adjacent to each other along the second direction.

18. The display panel according to claim 1, characterized in that, The display panel includes multiple driving circuits, which are arranged sequentially along the first direction.

19. The display panel according to claim 18, characterized in that, The plurality of driving circuits include a scanning driving circuit and a light emission control driving circuit, and in the first direction, the scanning driving circuit and the light emission control driving circuit are alternately arranged.

20. The display panel according to claim 1, characterized in that, The display panel also includes a multiplexing circuit, which is located in the display area.

21. The display panel according to claim 20, characterized in that, The plurality of light-emitting elements include a plurality of rows of light-emitting elements, the rows of light-emitting elements extending along the first direction, and the plurality of rows of light-emitting elements arranged along the second direction; The multiplexing circuit is positioned between two adjacent rows of light-emitting elements.

22. The display panel according to claim 1, characterized in that, The display panel further includes signal terminals, which include at least one of data signal terminals, power signal terminals, clock signal terminals, and electrostatic shielding terminals; The signal terminal is located in the display area, and the area where the signal terminal is located does not overlap with the area where the light-emitting element is located, the area where the pixel circuit is located, or the area where the driving circuit is located.

23. The display panel according to claim 22, characterized in that, The display panel also includes a flexible circuit board; The flexible circuit board is disposed on the non-light-emitting side of the display panel, and the flexible circuit board is electrically connected to the signal terminal through a conductive structure; The conductive structure is located on the side of the display panel.

24. The display panel according to claim 1, characterized in that, The display panel also includes electrostatic shielding traces surrounding the display area.

25. The display panel according to claim 1, characterized in that, The display panel also includes an electrostatic discharge (ESD) protection circuit, which is disposed in the display area.

26. A display device, characterized in that, Includes the display panel as described in any one of claims 1-25.

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