Array substrate and display device

Abstract

The present disclosure provides an array substrate and a display device, the array substrate comprising a plurality of gate lines extending along a first direction and a plurality of data lines extending along a second direction, the plurality of gate lines and the plurality of data lines crossing each other to define a plurality of sub-pixels; a plurality of touch signal lines extending along the second direction, the touch signal lines being disposed in non-light-transmitting regions of the sub-pixels; a plurality of touch electrodes insulated from each other; a plurality of metal pattern units, one metal pattern unit corresponding to one sub-pixel, the metal pattern unit being disposed in the non-light-transmitting region of the sub-pixel, the metal pattern unit comprising a first metal strip disposed on at least one side of the data line and extending along the second direction, the overlapping area of the orthographic projection of the first metal strip on a substrate and the orthographic projection of the touch signal line on the substrate being A, and the ratio of the overlapping area A to the area of the orthographic projection of the first metal strip on the substrate being greater than a threshold value. The array substrate and the display device of the present disclosure can reduce the display product defects and improve the quality of the display product.

Description

Technical Field

[0001] This disclosure relates to the field of touch display technology, and in particular to an array substrate and a display device. Background Technology

[0002] With the rapid development of display technology, touchscreens have become widely used. Among them, in-cell touchscreens embed the touch electrode units inside the LCD screen, which can reduce the thickness of the module and lower manufacturing costs. They have advantages such as integration, thinness, low cost, low power consumption, high image quality, and the ability to achieve multiple touch types, making them popular with consumers and panel manufacturers and becoming a new development direction for the future. Summary of the Invention

[0003] This disclosure provides an array substrate and a display device, which can reduce display product defects and improve display product quality.

[0004] The technical solutions provided in this disclosure are as follows:

[0005] This disclosure provides an array substrate, including a substrate, and a plurality of gate lines extending in a first direction and a plurality of data lines extending in a second direction disposed on the substrate, wherein the plurality of gate lines and the plurality of data lines intersect each other to define a plurality of sub-pixels; the array substrate further includes:

[0006] Multiple touch signal lines extending along the second direction, the touch signal lines being disposed in the non-transparent area of ​​the sub-pixel;

[0007] A plurality of mutually insulated touch electrodes, wherein each touch electrode is connected to at least one touch signal line;

[0008] Multiple metal graphic units are provided, each metal graphic unit corresponds to one sub-pixel, and the metal graphic unit is disposed in the non-transparent area of ​​the corresponding sub-pixel. Each metal graphic unit includes a first metal strip disposed on at least one side of the data line and extending along the second direction. The overlapping area of ​​the orthographic projection of the first metal strip on the substrate and the orthographic projection of the touch signal line on the substrate is A. The ratio of the overlapping area A to the orthographic projection area of ​​the touch signal line on the substrate is greater than a threshold.

[0009] For example, in a direction parallel to the substrate and perpendicular to the second direction, the size of the touch signal line is smaller than the size of the first metal strip.

[0010] For example, in a direction parallel to the substrate and perpendicular to the second direction, the boundary of the orthographic projection of the first metal strip on the substrate exceeds the boundary of the orthographic projection of the touch signal line on the substrate by 0.8 to 2.0 micrometers.

[0011] For example, the touch signal line has a center line extending along the second direction; the first metal strip has a center line extending along the second direction; the orthographic projection of the center line of the touch signal line on the substrate completely overlaps with the orthographic projection of the center line of the first metal strip on the substrate.

[0012] For example, the orthographic projection of the first metal strip on the substrate does not overlap with the orthographic projection of the data line on the substrate.

[0013] For example, in a direction parallel to the substrate and perpendicular to the second direction, the minimum distance between the boundary of the orthographic projection of the first metal strip on the substrate and the boundary of the orthographic projection of the data line on the substrate is 2.1 to 8 micrometers.

[0014] For example, the metal graphic unit further includes a second metal strip, the second metal strip comprising:

[0015] A first sub-metal line is disposed on at least one side of the gate line and extends along the first direction;

[0016] And, a second sub-metal line disposed on at least one side of the data line and extending along the second direction, wherein the first sub-metal line is connected to the second sub-metal line, and the second sub-metal line and the first metal strip are disposed on opposite sides of the corresponding sub-pixel.

[0017] For example, the first metal strip and the second metal strip are disposed in the same layer, and the first metal strip and the second metal strip in the same metal pattern unit have a first break in the second direction; the two first sub-metal lines in different metal pattern units have a second break in the first direction.

[0018] For example, each of the touch electrodes includes a plurality of touch sub-electrodes, wherein the orthographic projection of the touch sub-electrodes on the substrate does not overlap with the orthographic projection of the gate line and the data line on the substrate;

[0019] In the same touch electrode, the first sub-metal lines between multiple metal graphic units are connected to the second disconnection port through a first bridging portion disposed in the same layer or different layer from the first metal strip, and at least one metal graphic unit is coupled to at least one touch sub-electrode in the touch electrode; in different touch electrodes, the first sub-metal lines between multiple metal graphic units are disconnected and not connected through the second disconnection port.

[0020] In the same touch electrode, the first metal strip and the second metal strip of at least one column of the metal graphic units arranged in the second direction are connected to the first disconnection port through a second bridging portion disposed in the same layer or different layer as the first metal strip, and the first metal strip is coupled to the corresponding touch signal line; the metal graphic units are not connected between adjacent touch electrodes in the second direction.

[0021] For example, in the same touch electrode, at least one column of the first metal strips arranged in the second direction is coupled to the corresponding touch signal line, and all the first metal strips corresponding to the touch electrode are not coupled to touch signal lines that are not corresponding to the touch electrode, so that the metal graphic units are not connected between adjacent touch electrodes in the second direction.

[0022] Alternatively, in the same touch electrode, at least two columns of the first metal strips arranged in the second direction are respectively connected to different touch signal lines. The first metal strip connected to the touch signal line that does not correspond to the touch electrode is disconnected from the second metal strip in the touch electrode through the first disconnection port, so that the metal graphic units are not connected between adjacent touch electrodes in the second direction.

[0023] For example, each of the touch electrodes includes a plurality of touch sub-electrodes, wherein the orthographic projection of the touch sub-electrodes on the substrate does not overlap with the orthographic projection of the gate line and the data line on the substrate;

[0024] In the same touch electrode, the first sub-metal lines between multiple metal graphic units are connected to the second disconnection port through a first bridging portion disposed in the same layer or different layer as the first metal strip, and at least one metal graphic unit is coupled to at least one of the touch sub-electrodes in the touch electrode.

[0025] Furthermore, in the same touch electrode, the first metal strip and the second metal strip in at least one column of the metal graphic units arranged in the second direction are connected to the first disconnection port through a second bridging portion disposed in the same layer or different layer as the first metal strip, and the first disconnection port between the first metal strip and the second metal strip in at least one column arranged in the second direction is not connected.

[0026] In the same touch electrode, at least two columns of the metal graphic units arranged in the second direction are respectively connected to different touch signal lines, and the different touch electrodes are disconnected and not connected through the first disconnection port.

[0027] For example, in two adjacent metal graphic units, the first metal strip of one metal graphic unit and the second sub-metal line of the other metal graphic unit are located on opposite sides of the same data line, and the distance between the boundary of the orthographic projection on the substrate and the boundary of the orthographic projection of the data line on the substrate is the same in a direction parallel to the substrate and perpendicular to the second direction.

[0028] For example, the array substrate further includes a pixel electrode and a common electrode disposed within the sub-pixel, wherein the touch sub-electrode is multiplexed as the common electrode.

[0029] For example, in a direction parallel to the substrate and perpendicular to the second direction, the distance between the boundary of the orthographic projection of the data line on the substrate and the boundary of the orthographic projection of the pixel electrode in the two sub-pixels adjacent to the data line on the substrate are equal; the distance between the boundary of the orthographic projection of the data line on the substrate and the boundary of the orthographic projection of the common electrode in the two sub-pixels adjacent to the data line on the substrate are equal.

[0030] For example, the array substrate further includes: an organic insulating layer; the touch signal line and the data line are disposed on the same layer and made of the same material, and the organic insulating layer is disposed between the layer where the data line is located and the layer where the touch electrode is located.

[0031] For example, the array substrate further includes: a gate insulating layer and a passivation layer;

[0032] Along the direction away from the substrate, the layer containing the metal graphic unit, the gate insulating layer, the layer containing the touch signal line and the data line, the organic insulating layer, the layer containing the touch electrode, the passivation layer, and the layer containing the pixel electrode are sequentially arranged;

[0033] The touch electrode is coupled to the second metal strip through a first connection via, the first connection via penetrating at least the passivation layer, the organic insulating layer and the gate insulating layer;

[0034] The touch signal line is coupled to the first metal strip through a second connection via, the second connection via penetrating at least the passivation layer, the organic insulating layer and the gate insulating layer.

[0035] For example, the first connection via includes a first sub-via and a second sub-via;

[0036] The first sub-via penetrates the passivation layer, exposing the touch electrode portion;

[0037] The second sub-via penetrates the organic insulating layer and the gate insulating layer, exposing part of the second metal strip;

[0038] The array substrate further includes a first connection pattern, the orthographic projection of the first connection pattern on the substrate covering the orthographic projection of the first sub-via of the first connection via and the second self-via on the substrate, so as to couple the touch electrode and the second metal strip.

[0039] For example, the first connection pattern is disposed in the same layer as the pixel electrode and is made of the same material.

[0040] For example, the second connection via includes a third sub-via and a fourth sub-via;

[0041] The third sub-via penetrates the passivation layer, exposing part of the touch signal line;

[0042] The fourth sub-via penetrates the organic insulating layer and the gate insulating layer, exposing part of the first metal strip;

[0043] The array substrate further includes a second connection pattern, the orthographic projection of the second connection pattern on the substrate covering the orthographic projections of the third sub-via and the fourth sub-via of the second connection via on the substrate, so as to couple the touch signal line and the first metal strip.

[0044] For example, the array substrate further includes: a driving circuit, at least a portion of the output electrode of the driving circuit being located on the side of the organic insulating layer near the substrate;

[0045] The pixel electrode is coupled to the output electrode through a third connection via. The third connection via penetrates at least the organic insulating layer and the passivation layer to expose the output electrode of the driving circuit, thereby coupling the pixel electrode to the output electrode.

[0046] For example, the driving circuit includes: a driving transistor; the third connection via includes: a fifth sub-via and a sixth sub-via; the fifth sub-via penetrates the organic insulating layer, the sixth sub-via penetrates the passivation layer, and the orthogonal projection of the fifth sub-via on the substrate includes the orthogonal projection of the sixth sub-via on the substrate; the pixel electrode is coupled to the output electrode through the third connection via.

[0047] For example, each of the pixel electrodes includes a plurality of slits extending along the second direction.

[0048] This disclosure also provides a display device, including an array substrate and a counter substrate disposed opposite to each other, and a liquid crystal layer disposed between the array substrate and the counter substrate, wherein the array substrate is the array substrate provided in this disclosure.

[0049] For example, the opposing substrate is provided with a black matrix, the orthographic projection of the black matrix on the array substrate is located in the non-transparent area of ​​the sub-pixel, and in a direction parallel to the substrate and perpendicular to the second direction, the distance between the boundary of the orthographic projection of the black matrix on the substrate and the boundary of the orthographic projection of the pixel electrode in the two sub-pixels adjacent to the black matrix on the substrate is equal; the distance between the boundary of the orthographic projection of the black matrix on the substrate and the boundary of the orthographic projection of the common electrode in the two sub-pixels adjacent to the black matrix on the substrate is equal.

[0050] The beneficial effects of the embodiments disclosed herein are as follows:

[0051] The array substrate and display device provided in this disclosure have touch signal lines and data lines arranged parallel to each other, with the touch signal lines located in the non-transparent area between adjacent sub-pixels. In this way, the touch signal lines and data lines can be covered by the black matrix on the opposing substrate, thereby solving the problem of uneven electric field between the touch signal lines and the left and right electrodes when the touch signal lines are located in the middle of the sub-pixels in the related art, and reducing the phenomenon of smudge defects. In addition, the touch signal lines can be at least partially covered by the metal graphic unit, and the metal graphic unit can also play a light-shielding role, reducing the dependence on the light-shielding effect of the black matrix, thereby reducing the light-shielding area of ​​the black matrix on the opposing substrate. Attached Figure Description

[0052] Figure 1 This diagram illustrates the layout of sub-pixels in an array substrate according to an embodiment of the present disclosure.

[0053] Figure 2 express Figure 1 A schematic diagram showing the positional relationship between the black matrix along the C1-C2 direction and the touch signal lines and data lines;

[0054] Figure 3 This diagram illustrates the layout of multiple metal graphic units located in the same touch sub-region and metal graphic units in different touch sub-regions in an array substrate provided in some embodiments of this disclosure.

[0055] Figure 4 for Figure 1 A schematic diagram of the cross-section along the D1-D2 direction;

[0056] Figure 5 for Figure 1 A schematic diagram of the cross-section along the A1-A2 direction;

[0057] Figure 6 for Figure 1 A schematic diagram of the cross-section along the B1-B2 direction;

[0058] Figure 7 A schematic diagram illustrating the manufacturing process of the array substrate provided in this embodiment of the disclosure;

[0059] Figure 8 This diagram illustrates the layout of multiple metal graphic units located in the same touch sub-region and metal graphic units in different touch sub-regions in an array substrate provided in other embodiments of this disclosure.

[0060] Figure 9 This diagram illustrates the layout of multiple metal graphic units located in the same touch sub-region and metal graphic units in different touch sub-regions in an array substrate provided in other embodiments of this disclosure. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0062] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0063] In this disclosure, the term "same-layer arrangement" means that the two structures are formed from the same material layer, and therefore they are in the same layer in terms of stacking relationship. However, this does not mean that the distance between them and the substrate is equal, nor does it mean that their other layer structures with the substrate are completely the same.

[0064] In this disclosure, "patterning process" refers to the steps of forming a structure with a specific pattern, which can be a photolithography process, including one or more steps such as forming a material layer, coating photoresist, exposure, development, etching, and photoresist stripping; of course, "patterning process" can also be other processes such as imprinting process and inkjet printing process.

[0065] The present disclosure will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale. Furthermore, some well-known parts may not be shown in the drawings.

[0066] Many specific details of this disclosure, such as the structure, materials, dimensions, processing methods, and techniques of the components, are described below to provide a clearer understanding of the disclosure. However, as those skilled in the art will understand, this disclosure may be implemented without following these specific details.

[0067] Before providing a detailed description of the array substrate and display device provided in the embodiments of this disclosure, it is necessary to explain the related technologies as follows:

[0068] In related technologies, a Thin Film Transistor (TFT) refers to a liquid crystal display where each liquid crystal pixel is driven by a thin-film transistor integrated behind it. Based on their working principle and the medium through which information is transmitted, touchscreens can be divided into four main categories: resistive, capacitive, infrared, and surface acoustic wave (SAW) touchscreens. Resistive and capacitive touchscreens are widely used, with projected capacitive touchscreens being the most common due to their ability to achieve multi-touch applications. Their main disadvantages are higher cost and greater bulk, while lower cost and thinner designs are becoming the new trend in the touchscreen field.

[0069] To achieve thinner and lighter touch panels, research into integrating touch panels and LCD panels is becoming increasingly popular. Among these, in-cell touch solutions, which embed the touch panel inside the LCD panel, have attracted widespread attention.

[0070] In-Cell touch technology includes three types: resistive, capacitive, and optical. Capacitive solutions include two methods: self-capacitance touch and mutual capacitance touch. In self-capacitance touch, the transparent conductive layer on the array substrate, which serves as the common (VCOM) electrode, is divided into several squares to act as touch electrodes. One end of a touch signal line (Tx line) is connected to the touch electrode through a via, and the other end is connected to a driver integrated circuit. When a finger touches the array substrate, it causes a fluctuation in the capacitance value of the touch electrode at the corresponding location. The driver integrated circuit detects this fluctuation to determine the location of the touch point, thus achieving the touch function.

[0071] Full In-Cell (FIC) capacitive touchscreens use a Tx In Dot design, meaning the Tx line is located in the middle of the sub-pixel. This presents the following problems: Each sub-pixel contains multiple pixel grids as its pixel electrode, with gaps (Slits) between adjacent pixel grids. The Tx line is located in the exact middle of these gaps, without any shielding against the black matrix (BM) on the color filter substrate. If the pixel grid pattern on the left and right sides of the Tx line changes abruptly, the distance from the Tx line to the pixel grid patterns on the left and right sides will be unequal, resulting in uneven electric fields on the left and right sides of the Tx line and causing smudge defects.

[0072] To address the aforementioned issues, this disclosure provides an array substrate and a display device that can reduce display product defects and improve display product quality.

[0073] The array substrate provided in this disclosure integrates both touch electrodes and touch signal lines within the array substrate. This allows the liquid crystal display panel (LCD) to integrate the touch electrodes and touch signal lines for touch functionality within the LCD panel itself, achieving a Full In Cell Touch structure. This Full In Cell Touch LCD panel integrates touch and display functions, enabling seamless one-stop production and offering advantages such as integration, thinness, low cost, low power consumption, high image quality, and the ability to implement multiple touch types (i.e., Multi-Touch).

[0074] Please see Figures 1 to 9 This disclosure provides an array substrate.

[0075] The array substrate provided in this embodiment includes a substrate 100, and a plurality of gate lines 200 extending in a first direction and a plurality of data lines 300 extending in a second direction disposed on the substrate 100. The plurality of gate lines 200 and the plurality of data lines 300 intersect each other to define a plurality of sub-pixels 400; the array substrate further includes:

[0076] Multiple touch signal lines (Tx lines) 500 extending along the second direction are provided in the non-transparent area of ​​the sub-pixel 400;

[0077] Multiple touch electrodes 600 that are insulated from each other, with each touch electrode corresponding to at least one touch signal line;

[0078] Multiple metal graphic units are provided, with each metal graphic unit corresponding to a sub-pixel setting. The metal graphic unit is set in the non-transparent area of ​​the corresponding sub-pixel. The metal graphic unit includes a first metal strip set on at least one side of the data line and extending along a second direction. The overlapping area of ​​the orthographic projection of the first metal strip on the substrate and the orthographic projection of the touch signal line on the substrate is A. The ratio of the overlapping area A to the orthographic projection area of ​​the first metal strip on the substrate is greater than a threshold.

[0079] For example, the first direction includes the vertical direction, and the second direction includes the horizontal direction.

[0080] In some embodiments, at least a portion of the first metal strip is coupled to the touch signal line.

[0081] It should be noted that the coupling method between the first metal strip and the touch signal line can be achieved by overlapping a portion of the first metal strip with a portion of the touch signal line, and then connecting the overlapping area through vias. Specifically, at the coupling point between the first metal strip and the touch signal line, the overlapping area of ​​the orthographic projection of the first metal strip onto the substrate and the orthographic projection of the touch signal line onto the substrate is B. The threshold is the ratio of the overlapping area B to the orthographic projection area of ​​the first metal strip onto the substrate, for example, the threshold can be 5%–10%, 10–20%, or 30%–60%. Thus, in this embodiment, the overlapping area A of the orthographic projection of the first metal strip onto the substrate and the orthographic projection of the touch signal line onto the substrate is greater than the threshold, meaning that the first metal strip has other overlapping areas besides the overlapping point with the touch signal line.

[0082] For example, the touch signal lines 500 can be coupled to the corresponding touch electrodes 600 in the array substrate and the chips subsequently bonded to the array substrate. After the array substrate and the opposing substrate are assembled to form a liquid crystal display panel, when a touch operation occurs in the touch area of ​​the liquid crystal display panel, the touch operation can change the touch signal formed on the touch electrodes 600 in the array substrate. At the same time, the touch signal lines 500 are used to transmit the touch signal collected on the touch unit to the chip. The chip determines the specific location of the touch based on the touch signal received from each touch signal line 500.

[0083] In the array substrate provided in this disclosure, the aperture area corresponding to the sub-pixel 400 is the actual light-transmitting area of ​​the sub-pixel 400, and the non-aperture area corresponding to the sub-pixel 400 is the non-light-transmitting area corresponding to the sub-pixel 400. The larger the area of ​​the aperture area in a liquid crystal display panel of the same size, the higher the aperture ratio of the liquid crystal display panel and the better the display quality of the liquid crystal display panel; the non-aperture area is located around the aperture area.

[0084] In one exemplary embodiment, the aperture area corresponding to sub-pixel 400 is the actual light-transmitting area of ​​sub-pixel 400, and the non-aperture area corresponding to sub-pixel 400 is the non-light-transmitting area of ​​sub-pixel 400. The larger the area of ​​the aperture area in a liquid crystal display panel of the same size, the higher the aperture ratio of the liquid crystal display panel and the better the display quality of the liquid crystal display panel; the non-light-transmitting area is located around the light-transmitting area.

[0085] For example, in the array substrate of this disclosure, the driving circuit corresponding to the sub-pixel 400 is located in the non-transparent area corresponding to the sub-pixel 400, and the gate line 200 and data line 300 in the array substrate are also located in the non-transparent area. When setting the touch signal line 500, the touch signal line 500 and the data line 300 can be set to be parallel and adjacent, both located in the non-transparent area of ​​the sub-pixel 400. With this setting, the purpose of simultaneously blocking the touch signal line 500 and the data line 300 by the black matrix on the opposing substrate can be achieved, and the problem of uneven electric field on the left and right sides caused by the touch signal line 500 being located at the overlapping position of the pixel electrode can no longer exist, thereby improving the staining defect phenomenon.

[0086] In some embodiments, the touch electrode 600 can also be reused as a common electrode (Vcom), and correspondingly, the touch signal line 500 can also be reused as a common electrode line. Based on this, during the touch phase, the touch signal line 500 provides a touch drive signal to the touch electrode 600 and receives a touch feedback signal; during the display phase, the touch signal line 500 provides a Vcom signal to the touch electrode 600, providing the signal required by the common electrode during display. When the touch electrode 600 is reused as a common electrode and the touch signal line 500 is reused as a common electrode line, the thickness of the array substrate is reduced, and when the array substrate is applied to a touch display panel, the thickness of the touch display panel is reduced.

[0087] In some embodiments of this disclosure, since the array substrate is provided with multiple metal pattern units 700, the touch electrode 600 can also be electrically connected to the metal pattern unit 700. That is, it is equivalent to connecting a resistor in parallel with the touch electrode 600, thereby reducing the resistance of the touch electrode 600, reducing the load on the touch signal line 500, and improving touch response. In addition, when the touch electrode 600 is reused as a common electrode, it is equivalent to reducing the resistance of the common electrode.

[0088] Furthermore, the overlapping area of ​​the orthographic projection of the first metal strip on the substrate and the orthographic projection of the touch signal line on the substrate is A. The ratio of the overlapping area A to the orthographic projection area of ​​the touch signal line on the substrate is greater than a threshold. Thus, the first metal strip 710 also plays a light-shielding role, which reduces the dependence on the light-shielding effect of the black matrix to a certain extent. This can effectively reduce the area of ​​the black matrix pattern on the opposing substrate, thereby improving the aperture ratio.

[0089] In the array substrate provided in this disclosure, the material of the substrate 100 can be selected according to actual needs. For example, a glass substrate can be used, but it is not limited to this.

[0090] For example, in a direction parallel to the substrate 100 and perpendicular to the second direction, the size of the touch signal line 500 is smaller than the size of the first metal strip 710. That is, the width of the touch signal line 500 is smaller than the width of the first metal strip 710. (Refer to...) Figure 2 As shown in this embodiment, the first metal strip 710 can be located on the side of the touch signal line 500 near the substrate 100. That is, after the array substrate 10 and the opposing substrate 20 are assembled, the touch signal line 500 is located on the side of the first metal strip 710 facing the light-emitting surface of the display panel. When the width of the first metal strip 710 is greater than the width of the touch signal line 500, the first metal strip 710 can completely wrap around the touch signal line 500.

[0091] Please refer to Figure 2 As shown, in a direction parallel to the substrate 100 and perpendicular to the second direction, the boundary of the orthographic projection of the first metal strip 710 onto the substrate 100 exceeds the boundary of the orthographic projection of the touch signal line 500 onto the substrate 100 by a dimension of 0.8 to 2.0 micrometers. Specifically, in practical applications, this dimension can be adjusted and determined according to the specific size of the display panel and the specific size of the sub-pixels 400. For example, the width of the overlapping area of ​​the boundary of the first metal strip 710 beyond the touch signal line 500 can be 0.95 micrometers.

[0092] In addition, please refer to Figure 2 As shown, in a direction parallel to the substrate 100 and perpendicular to the second direction, the minimum spacing between the touch signal line 500 and the data line 300 can be 4 to 6 micrometers. Correspondingly, the minimum distance between the boundary of the orthographic projection of the first metal strip 710 on the substrate and the boundary of the orthographic projection of the data line 300 on the substrate is 2.1 to 8 micrometers. Specifically, in practical applications, this size can be adjusted and determined according to the manufacturing process capability, the specific size of the display panel, and the specific size of the sub-pixel 400. For example, the minimum spacing between the touch signal line 500 and the data line 300 can be 5.05 micrometers, and the minimum spacing between the first metal strip 710 and the data line 300 can be 4.1 micrometers.

[0093] For example, the orthographic projection of the first metal strip 710 on the substrate 100 completely covers the orthographic projection of the touch signal line 500 on the substrate 100. In this way, the light-shielding effect on the touch signal line 500 can be further increased, and when designing the black matrix 21 on the opposing substrate, it is not even necessary to consider the shading of the touch signal line 500 by the black matrix 21, so as to further improve the aperture ratio.

[0094] In addition, such as Figure 1As shown, in some embodiments, the touch signal line 500 has a center line extending along a second direction; the first metal strip 710 has a center line extending along a second direction; the orthographic projection of the center line of the touch signal line 500 on the substrate 100 completely overlaps with the orthographic projection of the center line of the first metal strip 710 on the substrate 100. (Refer to...) Figure 2 As shown in this embodiment, the center of the touch signal line 500 overlaps with the center of the first metal strip 710. At this time, the first metal strip 710 can completely wrap the touch signal line 500, and the degree of wrapping of the touch signal line 500 by the first metal strip 710 is the same in the first direction. This is beneficial to the same light emission display of two adjacent sub-pixels 400 on both sides of the touch signal line 500, thus ensuring the display effect of the display panel.

[0095] In addition, please refer to Figure 2 As shown, the orthographic projection of the metal graphic unit 700 on the substrate 100 does not overlap with the orthographic projection of the data line 300 on the substrate 100. This avoids the metal graphic unit 700 affecting the electric field of the data line 300.

[0096] For example, the array substrate 10 includes a first indium tin oxide layer (1ITO layer) and a second indium tin oxide layer (2ITO layer), the 1ITO layer is located between the substrate 100 and the 2ITO layer, the 1ITO layer includes a common electrode 600, and the 2ITO layer includes a pixel electrode 620.

[0097] Considering that if the orthographic projections of the touch electrode 600, data line 300, and gate line 200 on the substrate 100 overlap, the signal on the touch electrode 600 may affect the signals on the data line 300 and gate line 200. Therefore, in some embodiments, the touch electrode 600 may be located in the touch area of ​​the array substrate 10. The touch electrode 600 includes multiple independent sub-touch electrodes 610, and the multiple touch electrodes 600 may be arranged in an array. That is, the touch area may be divided into multiple touch sub-regions T, and the touch electrodes 600 are located one-to-one in each touch sub-region T. However, this is not the only possibility.

[0098] Each touch electrode 600 includes multiple touch sub-electrodes 610. The orthographic projection of the touch sub-electrodes 610 on the substrate 100 has no overlapping area with the orthographic projection of the gate line 200 and the data line 300 on the substrate 100. Each touch sub-electrode 610 in the same touch electrode 600 is connected together and connected to a corresponding touch signal line 500. Different touch electrodes 600 are disconnected from each other and are not connected.

[0099] Since the orthographic projections of the data line 300 and the gate line 200 on the substrate 100 do not overlap with the orthographic projection of the touch sub-electrode 610 on the substrate 100, the touch electrode 600 is prevented from affecting the signals on the data line 300 and the gate line 200.

[0100] Based on this, in related technologies, multiple touch sub-electrodes 610 in the touch electrode 600 are connected together by conductive lines fabricated in the same layer as the touch electrode 600. Since the material of the touch electrode 600 is generally ITO or IZO, the resistance of the conductive lines is relatively large. In this embodiment, multiple touch sub-electrodes 610 in the same touch electrode 600 can be connected together by a metal graphic unit 700 and a touch signal line 500. The metal graphic unit 700 and the touch electrode 600 are electrically connected to each other. Since the resistance of the metal graphic unit 700 is less than that of ITO or IZO, the resistance of the touch electrode 600 can be reduced.

[0101] It should be noted that the specific location of the touch area can be set according to actual needs. For example, the touch area may coincide with the entire display area of ​​the array substrate 10 after the liquid crystal display panel is formed; or the touch area may be located within the display area and coincide with only a designated area within the display area. That is to say, for the multiple sub-pixels 400 on the array substrate 10, each sub-pixel 400 may be provided with a touch sub-electrode 610; or some sub-pixels 400 may be provided with touch sub-electrodes 610 and some sub-pixels 400 may not be provided with touch sub-electrodes 610.

[0102] It should also be noted that the metal pattern unit 700 can be fabricated separately, not on the same layer as the existing pattern layer on the array substrate 10, or it can be fabricated on the same layer as the existing pattern layer on the array substrate 10. For example, in some embodiments, such as Figures 1 to 3 As shown, the metal pattern unit 700 can be fabricated on the same layer as the gate line 200, that is, the metal pattern unit 700 and the gate line 200 are on the same layer and made of the same material. When the metal pattern unit 700 and the gate line 200 are on the same layer and made of the same material, the metal pattern unit 700 and the gate line 200 can be fabricated simultaneously, thereby simplifying the fabrication process of the array substrate 10.

[0103] When the metal graphic unit 700 and the gate line 200 are in the same layer and made of the same material, there is no overlapping area between the metal graphic unit 700 and the gate line 200. Therefore, when designing the metal graphic unit 700, the metal graphic unit 700 must not only meet the requirement of connecting with the touch electrode 600 and the touch signal line 500 to reduce the resistance of the touch electrode 600, but also realize the electrical connection between each touch sub-electrode 610 in the same touch electrode 600, as well as the disconnection between different touch electrodes 600.

[0104] Therefore, in some embodiments, such as Figure 1and Figure 3 As shown, the metal graphic unit 700 further includes a second metal strip 720, which includes a first sub-metal line 721 and a second sub-metal line 722. The first sub-metal line 721 is disposed on at least one side of the gate line and extends along a first direction; the second sub-metal line 722 is disposed on at least one side of the data line and extends along a second direction, wherein the first sub-metal line 721 and the second sub-metal line 722 are connected, and the second sub-metal line 722 and the first metal strip 711 are disposed on opposite sides of the corresponding sub-pixel.

[0105] Using the above scheme, the metal graphic unit 700 includes a first metal strip 710 and a second metal strip 720. The second metal strip 720 includes a first sub-metal line 721 and a second sub-metal line 722. In this way, the metal graphic unit 700 is set around the opening area of ​​the sub-pixel, so that the light-shielding effect of the metal graphic unit 700 can be utilized, and even the black matrix 21 is not required.

[0106] In some embodiments, such as Figure 3 As shown, the first metal strip 710 and the second metal strip 720 are arranged in the same layer, and the first metal strip 710 and the second metal strip 720 in the same metal pattern unit 700 have a first break 730 in the second direction; the two first sub-metal lines 721 of different metal pattern units 700 have a second break 740 in the first direction.

[0107] For example, such as Figure 3 As shown, in the same touch electrode 600, the first sub-metal lines 721 between a plurality of adjacent metal graphic units 700 along the first direction are connected to the second disconnection port 740 through a first bridging portion 741 disposed in the same layer or different layer as the first metal strip 710, and at least one metal graphic unit is coupled to at least one touch sub-electrode in the touch electrode; in different touch electrodes adjacent along the first direction, the first sub-metal lines 721 between a plurality of metal graphic units 700 are disconnected and not connected through the second disconnection port 740;

[0108] In the same touch electrode 600, the first metal strip 710 and the second metal strip 720 of at least one column of metal graphic units arranged in the second direction are connected to the first disconnection port 730 through the second bridging part 742 disposed in the same layer or different layer as the first metal strip 710, and the first metal strip 710 is coupled to the corresponding touch signal line 500; the metal graphic units 700 are not connected between adjacent touch electrodes 600 in the second direction.

[0109] In the above scheme, the material of the common electrode may include ITO, and the material of the metal pattern unit 700 may include conductive metal. Typically, the resistivity of conductive metal is much lower than that of ITO. In this way, by coupling the common electrode in the same touch sub-region T through the metal pattern unit 700, the overall resistance of the common electrode in the array substrate 10 can be greatly reduced, and the resistance uniformity of the common electrode in the same touch sub-region T can be improved.

[0110] In addition, in the above scheme, refer to Figures 1 to 3 Multiple metal graphic units located in the same touch sub-region T can be coupled together via a bridging section 700.

[0111] Specifically, Figure 3 This diagram illustrates the layout of multiple metal graphic units located in the same touch sub-region and metal graphic units in different touch sub-regions within an array substrate provided in some embodiments of this disclosure. Figure 3 As shown, in some embodiments, among a plurality of metal graphic units 700 located in the same touch sub-region T, adjacent metal graphic units 700 arranged along a first direction (row direction) are connected by a first bridging portion 741. The first bridging portion 741 is located between the first sub-metal lines of two adjacent metal graphic units. It can be disposed on the same layer as the first sub-metal lines, that is, the first sub-metal lines of two adjacent metal graphic units are connected as one unit. Alternatively, the first bridging portion 741 can be disposed on a different layer from the first sub-metal lines and connected through vias, thereby realizing the connection of the same touch electrode in the row direction. Meanwhile, the metal graphic units 700 between different touch sub-regions T are disconnected in the row direction through a first disconnection port 730.

[0112] In the second direction (i.e., the column direction), the first metal strip and the second metal strip 720 are connected to the first break point by a second bridging portion 742 disposed on the same layer or different layer as the first metal strip. The second bridging portion 742 is located between the first sub-metal line 721 and the first metal strip 711 of the same metal graphic unit 700. It can be disposed on the same layer as the first sub-metal line, that is, the first sub-metal lines of two adjacent metal graphic units are connected as one unit. Alternatively, the second bridging portion 742 can be disposed on a different layer from the first sub-metal line and connected through a via. At least one column of first metal strips arranged in the second direction within the same touch sub-area T... The metal strip can be coupled to the same touch signal line (i.e., the touch signal line corresponding to the touch sub-area) via vias (the circular dashed area O in the figure indicates the via location), but not coupled to other non-corresponding touch signal lines (i.e., touch signal lines not corresponding to the touch sub-area). This allows metal graphic units within the same touch sub-area to be connected in the column direction via corresponding touch signal lines. However, because the first metal strip is only connected to the corresponding touch signal lines in the column direction and not to non-corresponding touch signal lines, adjacent touch electrodes in the second direction are not connected to each other.

[0113] For example, the first bridging portion 741 and the second bridging portion 742 may be fabricated on a different layer than the existing pattern layer on the array substrate 10, or they may be fabricated on the same layer as the existing pattern layer on the array substrate 10. For instance, the first bridging portion 741 and the second bridging portion 742 may be fabricated on the same layer as the gate line 200. That is, the first bridging portion 741 and the second bridging portion 742 are on the same layer and made of the same material as the gate line 200. When the first bridging portion 741 and the second bridging portion 742 are on the same layer and made of the same material as the gate line 200, the metal pattern unit 700 and the gate line 200 can be fabricated simultaneously, thereby simplifying the fabrication process of the array substrate 10.

[0114] It should be noted that the above is only an example. In this exemplary embodiment, the touch electrode is divided into blocks in the row direction by connecting adjacent second metal strips 720 in the row direction and controlling whether the second disconnection port 740 is connected.

[0115] In the column direction, the first metal strip 710 and the second metal strip 720 in the metal graphic unit of each touch sub-area are connected by a first connecting bridge set in the same layer or different layers. The first metal strip 710 is not connected to the touch signal line 500 through vias. Only the touch signal line and touch electrode corresponding to the touch sub-area where the first metal strip 710 is located are connected through vias. The non-corresponding touch signal lines and touch electrodes are not connected. That is, by controlling the on and off of the first metal strip 710 and different touch signal lines, the touch electrode is divided into blocks in the column direction.

[0116] It should be noted that, in the above exemplary embodiments, as shown in the figures, in some embodiments, such as... Figure 3 As shown, the first metal strip 710 and the second metal strip 720 in the metal graphic unit within each touch sub-area are connected; in other embodiments, such as Figure 9 As shown, among the multiple metal graphic units in the same touch sub-area, the first metal strip and the second metal strip of some metal graphic units are connected, while the first metal strip and the second metal strip of other metal graphic units are disconnected through the first disconnection port 730.

[0117] also, Figure 8 This diagram illustrates the layout of multiple metal graphic units located in the same touch sub-region and metal graphic units in different touch sub-regions in an array substrate provided in other embodiments of this disclosure.

[0118] like Figure 8 As shown, in the same touch electrode, the first sub-metal lines between multiple metal graphic units are connected to the second disconnection port through a first bridging portion disposed in the same layer or different layer as the first metal strip, and at least one metal graphic unit is coupled to at least one touch sub-electrode in the touch electrode; in different touch electrodes, the first sub-metal lines between multiple metal graphic units are disconnected and not connected through the second disconnection port.

[0119] In the same touch electrode, at least two columns of first metal strips arranged in the second direction are respectively connected to different touch signal lines through vias (the dotted circular area O in the figure is the location of the via). The first metal strip connected to the touch signal line that does not correspond to the touch electrode is disconnected from the second metal strip in the touch electrode through the first disconnection port, so that the metal graphic units are not connected between adjacent touch electrodes in the second direction.

[0120] In the above embodiment, adjacent second metal strips 720 are connected in the row direction. By controlling whether the second disconnection port 740 is connected, the touch electrode is divided into blocks in the row direction.

[0121] In the column direction, the first metal strip 710 and the touch signal line 500 are all connected through vias. At this time, by controlling whether the first disconnection port 730 is connected, the corresponding touch signal line and touch electrode are connected, and the non-corresponding touch signal line and touch electrode are not connected, thereby realizing the segmentation of touch electrodes in the column direction.

[0122] Furthermore, in some exemplary embodiments, such as Figures 1 to 3As shown, in two adjacent metal graphic units 700, the first metal strip 710 of one metal graphic unit 700 and the second sub-metal line 722 of the other metal graphic unit 700 are located on opposite sides of the same data line 300, and the distance between the boundary of the orthographic projection on the base 100 and the boundary of the orthographic projection of the data line 300 on the base 100 is the same in a direction parallel to the base 100 and perpendicular to the second direction.

[0123] Furthermore, in some embodiments, please refer to Figures 1 to 3 As shown, the orthographic projections of the first sub-metal line 721 and the second sub-metal line 722 onto the substrate 100 are completely covered by the orthographic projections of the light-shielding strips of the corresponding black matrix 21 on the opposing substrate 20 onto the substrate 100. For example, in a direction parallel to the substrate 100 and perpendicular to the first direction, the boundary of the orthographic projection of the black matrix 21 onto the substrate 100 exceeds the boundary of the orthographic projection of the first metal strip 710 onto the substrate 100 by a size of 1 to 3 micrometers. Specifically, in practical applications, this size can be adjusted and determined according to the specific size of the display panel and the specific size of the sub-pixels 400. For example, the boundary of the orthographic projection of the black matrix 21 onto the substrate 100 exceeds the boundary of the orthographic projection of the first metal strip 710 onto the substrate 100 by a size of 1.5 micrometers.

[0124] Similarly, in a direction parallel to the substrate 100 and perpendicular to the first direction, the boundary of the orthographic projection of the black matrix 21 onto the substrate 100 exceeds the boundary of the orthographic projection of the second metal strip 720 onto the substrate 100 by a dimension of 1 to 3 micrometers. Specifically, in practical applications, this dimension can be adjusted and determined according to the specific size of the display panel and the specific size of the sub-pixels 400. For example, the boundary of the orthographic projection of the black matrix 21 onto the substrate 100 exceeds the boundary of the orthographic projection of the second metal strip 720 onto the substrate 100 by a dimension of 1.5 micrometers.

[0125] Furthermore, in some embodiments of this disclosure, in a direction parallel to the substrate 100 and perpendicular to the second direction, the distance between the boundary of the orthographic projection of the data line 300 onto the substrate 100 and the boundary of the orthographic projection of the pixel electrode 620 within the two adjacent sub-pixels 400 onto the substrate 100 are equal; the distance between the boundary of the orthographic projection of the data line 300 onto the substrate 100 and the boundary of the orthographic projection of the common electrode within the two adjacent sub-pixels 400 onto the substrate 100 are equal.

[0126] In the above scheme, the 1st ITO and the 2nd ITO can be made symmetrical with respect to the data line 300. That is, the distance between the left and right sides of the data line 300 and the electrode is equal. This can reduce the defects caused by the different parasitic capacitances between the data line 300 and the left and right side electrodes.

[0127] In addition, by way of example, the array substrate 10 also includes: an organic insulating layer 810; the touch signal line 500 and the data line 300 are disposed on the same layer and made of the same material, and the organic insulating layer 810 is disposed between the layer where the data line 300 is located and the layer where the touch electrode 600 is located.

[0128] In the above scheme, for example, the organic insulating layer 810 has a relatively thick thickness, which has a flattening effect. The organic insulating layer 810 is located at least partially between the touch signal line 500 and the common electrode, increasing the distance between the touch signal line 500 and the pixel electrode 620. This helps to improve the problem of asymmetrical electric fields between the touch signal line 500 and the pixel electrode 620 caused by process variations in the pixel electrode 620, thereby improving the transmittance deviation in the opening area. This better solves the visual unevenness caused by transmittance deviation, resulting in visual defects such as black or white stains, effectively improving the product yield.

[0129] When a common electrode located in the same touch sub-region T is reused as a touch electrode 600 in that touch sub-region T, the specific process of realizing the touch display function using the liquid crystal display panel after forming the liquid crystal display panel using the array substrate 10 is as follows:

[0130] During the touch phase, the touch signal line 500 provides a touch signal to the coupled common electrode (i.e., touch electrode 600). When a touch operation occurs in the touch area of ​​the liquid crystal display panel, the touch signal corresponding to the touch electrode 600 unit at the location of the touch operation changes. The touch electrode 600 unit transmits the changed touch signal to the chip through the corresponding touch signal line 500. The chip determines the specific location of the touch operation based on the changed touch signal. During the display phase, the touch signal line 500 provides the common electrode signal required for display to the coupled common electrode. At the same time, the sub-pixel 400 driving circuit in the array substrate 10 provides a driving signal to the corresponding pixel electrode 620, thereby generating an electric field between the pixel electrode 620 and the common electrode to drive the liquid crystal deflection, thus enabling the liquid crystal display panel to perform the display function.

[0131] In addition, such as Figure 2As shown, in some embodiments, the array substrate 10 further includes: a gate insulating layer (GI layer) 820 and a passivation layer 830; along the direction away from the substrate 100, the layers containing the metal graphic unit 700, the gate insulating layer 820, the layers containing the touch signal line 500 and the data line 300, the organic insulating layer (ORG) 810, the layer containing the touch electrode 600, the passivation layer (PVX) 830, and the layer containing the pixel electrode 620 are sequentially arranged; the touch electrode 600 is coupled to the metal graphic unit 700 through a first connection via Via1, the first connection via Via1 at least penetrating the passivation layer 830, the organic insulating layer 810, and the gate insulating layer 820; the touch signal line 500 is coupled to the metal graphic unit through a second connection via Via2, the second connection via Via2 at least penetrating the passivation layer 830, the organic insulating layer 810, and the gate insulating layer 820.

[0132] Please see Figure 4 For example, the first connection via Via1 includes a first sub-via and a second sub-via; the first sub-via penetrates the passivation layer 830 and exposes a portion of the touch electrode 600; the second sub-via penetrates the organic insulating layer 810 and the gate insulating layer 820 and exposes a portion of the metal pattern unit 700; the array substrate 10 also includes a first connection pattern 910, the orthographic projection of the first connection pattern 910 on the substrate 100 covering the orthographic projections of the first sub-via and the second sub-via of the first connection via Via1 on the substrate 100, so as to couple the touch electrode 600 and the metal pattern unit 700.

[0133] For example, please see Figure 5 The second connecting via Via2 includes a third sub-via and a fourth sub-via;

[0134] The third sub-via penetrates the passivation layer 830, exposing a portion of the touch signal line 500; the fourth sub-via penetrates the organic insulating layer 810 and the gate insulating layer 820, exposing a portion of the metal pattern unit 700; the array substrate 10 also includes a second connection pattern 920, the orthographic projection of the second connection pattern 920 on the substrate 100 covering the orthographic projections of the third and fourth sub-vias of the second connection via Via2 on the substrate 100, so as to couple the touch signal line 500 and the metal pattern unit 700.

[0135] In the above scheme, the touch electrode 600 can be connected to the metal pattern through the first connection pattern 910. The orthographic projection of the first connection pattern 910 on the substrate 100 covers the orthographic projections of the first sub-via of the first connection via Via1 and the second sub-via on the substrate 100. In this embodiment, during the fabrication of the array substrate 10, a patterning process can be performed first to remove the vias (corresponding to the first sub-vias of the first via) on the organic insulating layer 810 to expose part of the touch electrode 600. Then, during another patterning process to fabricate the vias on the passivation layer 830, the gate insulating layer 820 and the passivation layer 830 on the metal pattern unit 700 can be removed simultaneously to expose part of the metal pattern unit. This eliminates the need for a separate etching step on the gate insulating layer 820, saving a masking process, thereby simplifying the fabrication process of the array substrate 10 and reducing its manufacturing cost.

[0136] In some embodiments, the first connecting pattern 910 and the second connecting pattern 920 can both be disposed in the same layer as the pixel electrode 620 and made of the same material. Distributing the first connecting pattern 910 and the second connecting pattern 920 in the same layer and with the pixel electrode 620 allows them to be formed in the same patterning process, simplifying the fabrication process of the array substrate 10 and reducing its manufacturing cost. It is understood that the first connecting pattern 910 and the second connecting pattern 920 can also be fabricated separately.

[0137] In addition, for some exemplary embodiments, please refer to Figure 6 As shown, the array substrate 10 further includes: a driving circuit, at least a portion of the output electrode 840 of the driving circuit is located on the side of the organic insulating layer 810 near the substrate 100; the pixel electrode 620 is coupled to the output electrode 840 through a third connection via Via3, the third connection via Via3 at least penetrating the organic insulating layer 810 and the passivation layer 830 to expose the output electrode 840 of the driving circuit, thereby coupling the pixel electrode 620 to the output electrode 840.

[0138] For example, the driving circuit includes: a driving transistor; the third connection via Via3 includes: a fifth sub-via and a sixth sub-via; the fifth sub-via penetrates the organic insulating layer 810, the sixth sub-via penetrates the passivation layer 830, and the orthographic projection of the fifth sub-via on the substrate 100 includes the orthographic projection of the sixth sub-via on the substrate 100; the pixel electrode 620 is coupled to the output electrode 840 through the third connection via Via3.

[0139] In the above scheme, the gate of the thin-film transistor is coupled to the corresponding gate line 200, the input electrode of the thin-film transistor is coupled to the corresponding data line 300, and the output electrode 840 of the thin-film transistor serves as the output electrode 840 of the driving circuit, and the output electrode 840 is coupled to the pixel electrode 620. For example, the output electrode 840 includes the source of the thin-film transistor.

[0140] For example, the output electrode 840 is disposed in the same layer and material as the data line 300 and the touch signal line 500. Figures 1 to 9 As shown, along the direction away from the substrate 100, the gate insulating layer 820, the output electrode 840, the organic insulating layer 810, the common electrode, the passivation layer 830 and the pixel electrode 620 are stacked sequentially.

[0141] For example, after forming the organic insulating layer 810, a patterning process is performed to form an opening in the organic insulating layer 810, forming a fifth sub-via penetrating the organic insulating layer 810. Then, a passivation layer 830 is formed, and a next patterning process is performed to pattern the passivation layer 830 to form a sixth sub-via penetrating the passivation layer 830. It should be noted that a portion of the passivation layer 830 is located within the fifth sub-via, and this portion is etched to form the sixth sub-via. The orthographic projection of the fifth sub-via on the substrate 100 surrounds the orthographic projection of the sixth sub-via on the substrate 100, forming a via. Then, a pixel electrode 620 is formed, and the pixel electrode 620 is coupled to the output electrode 840 through the first and second sub-vias.

[0142] In the display substrate provided in the above embodiment, by setting the orthographic projection of the boundary of the fifth sub-via on the substrate 100 to at least partially overlap with the orthographic projection of the output electrode 840 on the substrate 100, at least a portion of the boundary of the fifth sub-via can be located on the output electrode 840, thereby controlling at least a portion of the boundary of the sixth sub-via to be located on the output electrode 840. This avoids the pixel electrode 62040 from being completely disconnected at the boundary of the output electrode 840, thus ensuring good connection performance between the pixel electrode 620 and the output electrode 840.

[0143] In related technologies, multiple slits are provided on the pixel electrodes to reduce their resistance. To ensure the normal display function of the liquid crystal display panel, the extension direction of the trenches in the alignment layer needs to be the same as the extension direction of the slits. That is, during the alignment process, the alignment cloth needs to rub the alignment film along a direction perpendicular to the extension direction of the data line. When the alignment cloth rubs near the data line, it needs to climb a slope at the data line, which can easily lead to a large alignment shadow (Rubbing Shadow) area near the data line. Since this area is prone to light leakage, it needs to be blocked by the black matrix pattern on the opposing substrate after cell alignment. This increases the width of the black matrix pattern in the direction perpendicular to the extension direction of the data line and reduces the aperture ratio of the liquid crystal display panel.

[0144] Based on the aforementioned problems, the discloser has discovered through research that by changing the direction of the slit extension, making the slit extension direction the same as the data line extension direction, and making the direction of the trench after alignment of the alignment layer the same as the data line extension direction, the alignment shadow area near the data line can be avoided during the alignment process, thereby reducing the width of the black matrix pattern used to block the data line in the direction perpendicular to the data line extension, and effectively improving the aperture ratio of the liquid crystal display panel.

[0145] Optional, such as Figure 1 As shown, each pixel electrode 620 includes a plurality of slits 620a extending along the second direction.

[0146] Here, "slit 620a extends along the second direction" means that slit 620a extends entirely along the second direction. In some embodiments, pixel electrode 620 includes one domain, in which case slit 620a is linear; in other embodiments, pixel electrode 620 divides two domains, in which case, such as Figure 1 As shown, each slit 620a includes a first sub-slit and a second sub-slit, and the angle θ between the first sub-slit and the second sub-slit is an obtuse angle.

[0147] The process of forming an alignment layer on an array substrate includes:

[0148] First, an alignment material film is fabricated on one side of the array substrate where the pixel electrode is located. Then, an alignment cloth is used to perform triboelectric alignment along the extension direction of the slit in the pixel electrode (i.e., the extension direction of the data line) to form an alignment layer with trenches. The extension direction of the trenches is the same as the extension direction of the slits.

[0149] Since the slit 620a extends along the second direction, when the alignment cloth is used to align the alignment film, it moves along the second direction, so that a large rubbing shadow area will not be formed near the data lines during the alignment of the alignment material film on the array substrate. Due to the light leakage problem caused by the absence of rubbing shadow area, the width of the light-shielding strip in the black matrix 21 pattern along the first direction can be designed to be narrower, thereby effectively improving the aperture ratio.

[0150] like Figure 1 As shown, in some embodiments of this disclosure, since the second metal strip 720 is connected to the touch electrode through a first connection via Via1, the pixel electrode has an adaptive notch to avoid this first connection via. Correspondingly, the length of the slit 620a in the second direction in the area corresponding to the notch is less than the length of the slit 620a in the second direction in other areas. Figure 1 Taking the specific embodiment shown as an example, there can be 7 slits in a pixel electrode. The upper and lower ends of the two slits on the side closer to the second sub-metal line are aligned. The length of these two slits is less than the length of the five slits on the side closer to the first metal strip. The upper and lower ends of the five slits on the side closer to the first metal strip are aligned.

[0151] Of course, the above is just an example. In practical applications, the number and length of slits are not limited to this.

[0152] It should be noted that, Figure 1 This diagram illustrates the layout of sub-pixels in an array substrate according to an embodiment of this disclosure. The traces in the diagram have bends and turns, and the bends and turns are shown as sharp corners. In actual products, due to manufacturing processes, the bends and turns should be rounded. The rounded corners are not shown here for ease of illustration.

[0153] This disclosure also provides a display device, including an array substrate 10 and an opposing substrate 20 disposed opposite to each other, and a liquid crystal layer disposed between the array substrate 10 and the opposing substrate 20, wherein the array substrate 10 is the array substrate 10 provided in this disclosure.

[0154] A black matrix 21 is provided on the opposing substrate 20. The orthographic projection of the black matrix 21 on the array substrate is located in the non-transparent area of ​​the sub-pixel. In a direction parallel to the substrate and perpendicular to the second direction, the distance between the boundary of the orthographic projection of the black matrix on the substrate and the boundary of the orthographic projection of the pixel electrode in the two sub-pixels adjacent to the black matrix on the substrate is equal. The distance between the boundary of the orthographic projection of the black matrix on the substrate and the boundary of the orthographic projection of the common electrode in the two sub-pixels adjacent to the black matrix on the substrate is equal.

[0155] In the above scheme, the 1st ITO and the 2nd ITO can be symmetrical with respect to the black matrix 21. That is, the distance between the black matrix 21 and the electrode is equal on the left and right sides. Therefore, the occlusion effect of the black matrix on the sub-pixel will be more conducive to the uniformity of the light transmittance of the sub-pixel, which means it is conducive to the symmetry of the pixel.

[0156] It should be noted that the display device can be any product or component with display function, such as an LCD panel, television, monitor, digital photo frame, mobile phone, electronic paper, tablet computer, laptop computer, navigator, etc.

[0157] The display device provided in this embodiment of the present disclosure has the same beneficial effects when including the array substrate 10 described above, and will not be repeated here.

[0158] This disclosure also provides a method for fabricating an array substrate 10, the method comprising:

[0159] Step S01: Provide substrate 100;

[0160] Step S02: Fabricate multiple gate lines 200, multiple data lines 300, multiple touch signal lines 500, multiple touch electrodes 600, and metal graphic units 700 on the substrate 100. The multiple gate lines 200 extend along a first direction, and the multiple data lines 300 extend along a second direction. The multiple gate lines 200 and multiple data lines 300 intersect each other to define multiple sub-pixels 400. The multiple touch signal lines 500 extend along the second direction and are disposed in the non-transparent area between adjacent sub-pixels 400. The multiple touch electrodes 600 are insulated from each other. The multiple metal graphic units 700 are disposed in the non-transparent area between adjacent sub-pixels 400. One metal graphic unit 700 corresponds to one touch electrode 600. The touch electrode 600 is coupled to the corresponding touch signal line 500 through the corresponding metal graphic unit 700, and the orthographic projection of the metal graphic unit 700 on the substrate 100 at least partially overlaps with the orthographic projection of the touch signal line 500 on the substrate 100.

[0161] The manufacturing method of the array substrate 10 provided in this embodiment arranges the touch signal line 500 and the data line 300 in parallel, with the touch signal line 500 located in the non-transparent area between adjacent sub-pixels 400. In this way, the touch signal line 500 and the data line 300 can be covered by the black matrix 21 on the opposing substrate 20, thereby solving the problem of uneven electric field between the touch signal line 500 and the left and right electrodes when the touch signal line 500 is located in the middle of the sub-pixels 400 in the related art, and reducing the phenomenon of smudge defects. In addition, the touch electrode 600 and the touch signal line 500 are electrically connected through the metal pattern, which can reduce the resistance of the touch electrode 600, effectively reduce the loss on the touch signal line 500, improve touch sensitivity, and improve the overall product quality. Furthermore, the touch signal line 500 can be at least partially covered by the metal pattern unit, which can also play a role in shielding light, reducing the dependence on the light shielding effect of the black matrix 21, thereby reducing the light shielding area of ​​the black matrix 21 on the opposing substrate 20.

[0162] In some embodiments, step S02 specifically includes:

[0163] Step S021: Fabricate gate line 200, drive transistor gate and metal pattern unit 700 on substrate 100; metal pattern unit 700 is used for subsequent coupling with common electrode to reduce the transmission resistance of common electrode.

[0164] More specifically, a first gate metal layer is fabricated on the substrate 100. The first gate metal layer includes a first molybdenum metal layer, a first aluminum metal layer, and a second molybdenum metal layer sequentially stacked along a direction away from the substrate 100. The thickness of the first molybdenum metal layer is... The thickness of the first aluminum metal layer is The thickness of the second molybdenum metal layer is A patterning process is performed on the first gate metal layer, which sequentially includes processes such as coating, exposure, development, and wet etching to form gate lines 200, gates, and metal pattern units 700. In some embodiments, the metal pattern unit 700 further includes a first bridging portion 741 and a second bridging portion 742 for coupling with each metal pattern unit 700 within the same touch sub-region T.

[0165] Step S022: Fabricate a driving circuit, a data line 300, and a touch signal line 500 on a substrate 100 on which the gate line 200 and the metal pattern unit 700 are formed.

[0166] More specifically, in this step, firstly, a full-layer gate insulating layer 820 is deposited, covering the gate line 200, the gate electrode, and the metal pattern unit 700; the material of the gate insulating layer 820 includes silicon nitride. The thickness of the gate insulating layer 820 is...

[0167] Next, the active layer of the thin-film transistor is fabricated. The thickness of the active layer is...

[0168] Next, the source / drain metal layer of the thin-film transistor is fabricated. The source / drain metal layer includes a third molybdenum metal layer, a second aluminum metal layer, and a fourth molybdenum metal layer sequentially stacked along a direction away from the substrate 100. The thickness of the third molybdenum metal layer is... The thickness of the second aluminum metal layer is The thickness of the fourth molybdenum metal layer is The source and drain metal layers are patterned using a process that includes deposition, exposure, development, wet etching, etc., to form the input and output electrodes 840 of the driving circuit, as well as the data line 300 and the touch signal line 500.

[0169] Step S023: An organic insulating layer 810 is fabricated on the substrate 100 on which the driving circuit is formed. The organic insulating layer 810 covers the output electrode 840, data line 300 and touch signal line 500 of the driving circuit.

[0170] More specifically, in this embodiment of the present disclosure, a buffer layer can be formed by depositing silicon nitride material, and the thickness of the buffer layer is [missing information]. Using organic resin, a full-length organic insulating layer 810 is deposited on the side of the buffer layer facing away from the substrate 100. The thickness of the organic insulating layer 810 is...

[0171] In a patterning process, a second sub-via, a fourth sub-via, and a fifth sub-via are formed on the organic insulating layer 810. The second and fourth sub-vias penetrate the organic insulating layer 810 to expose at least a portion of the metal pattern unit 700; the fourth and third sub-vias; and the fifth sub-via penetrate the organic insulating layer 810 and expose at least a portion of the output electrode 840 of the drive circuit.

[0172] Step S024: Fabricate the common electrode;

[0173] More specifically, in this step, indium tin oxide (ITO) can be used to fabricate an ITO layer, the thickness of which is... A patterning process is performed on the 1ITO layer, which includes processes such as coating, exposure, development, and wet etching to form a common electrode.

[0174] Step S027: Fabricate passivation layer 830, which covers the common electrode;

[0175] More specifically, in this step, silicon nitride is used to deposit a full-length passivation layer 830. The thickness of the passivation layer 830 is...

[0176] More specifically, in this step, a patterning process is performed on the passivation layer 830 to form a first sub-via, a third sub-via, and a sixth sub-via penetrating the passivation layer 830. Specifically, the first sub-via penetrates the passivation layer 830 to partially expose the touch electrode 600; the third sub-via penetrates the passivation layer 830 to partially expose the touch signal line 500; and the sixth sub-via penetrates the passivation layer 830. The orthographic projection of the fifth sub-via onto the substrate 100 includes the orthographic projection of the sixth sub-via onto the substrate 100.

[0177] Step S027: Fabricate pixel electrode 620, first connection pattern 910 and second connection pattern 920. The orthographic projection of the first connection pattern 910 on the substrate 100 covers the orthographic projections of the first sub-via and the second sub-via of the first connection via Via1 on the substrate 100, so as to couple the touch electrode 600 and the metal graphic unit. The orthographic projection of the second connection pattern 920 on the substrate 100 covers the orthographic projections of the third and fourth sub-vias of the second connection via Via2 on the substrate 100, so as to couple the touch signal line 500 and the metal graphic unit.

[0178] More specifically, in this step, indium tin oxide (ITO) is used to fabricate a 2ITO layer, the thickness of which is... A patterning process is performed on the 2ITO layer, which includes processes such as coating, exposure, development, and wet etching to form a pixel electrode 620, a first connection pattern 910, and a second connection pattern 920.

[0179] The following points need to be explained:

[0180] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0181] (2) For clarity, the thickness of layers or regions is enlarged or reduced in the drawings used to describe embodiments of the present disclosure, i.e., these drawings are not drawn to actual scale. It will be understood that when an element such as a layer, film, region or substrate is referred to as being “above” or “below” another element, the element may be “directly” located “above” or “below” the other element or there may be intermediate elements.

[0182] (3) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0183] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. The scope of protection of this disclosure shall be determined by the scope of the claims.

Claims

1. An array substrate, comprising a substrate, and a plurality of gate lines extending along a first direction and a plurality of data lines extending along a second direction disposed on the substrate, wherein the plurality of gate lines and the plurality of data lines intersect each other to define a plurality of sub-pixels; characterized in that, The array substrate further includes: Multiple touch signal lines extending along the second direction, the touch signal lines being disposed in the non-transparent area of ​​the sub-pixel; A plurality of mutually insulated touch electrodes, wherein each touch electrode is connected to at least one touch signal line; Multiple metal graphic units are provided, each metal graphic unit corresponds to one sub-pixel, and the metal graphic unit is disposed in the non-transparent area of ​​the corresponding sub-pixel. The metal graphic unit includes a first metal strip disposed on at least one side of the data line and extending along the second direction. The overlapping area of ​​the orthographic projection of the first metal strip on the substrate and the orthographic projection of the touch signal line on the substrate is A. The ratio of the overlapping area A to the orthographic projection area of ​​the first metal strip on the substrate is greater than a threshold. The metal graphic unit further includes a second metal strip, the second metal strip comprising: A first sub-metal line is disposed on at least one side of the gate line and extends along the first direction; And, a second sub-metal line disposed on at least one side of the data line and extending along the second direction, wherein the first sub-metal line is connected to the second sub-metal line, and the second sub-metal line and the first metal strip are disposed on opposite sides of the corresponding sub-pixel.

2. The array substrate according to claim 1, characterized in that, In a direction parallel to the substrate and perpendicular to the second direction, the size of the touch signal line is smaller than the size of the first metal strip.

3. The array substrate according to claim 2, characterized in that, In a direction parallel to the substrate and perpendicular to the second direction, the boundary of the orthographic projection of the first metal strip on the substrate exceeds the boundary of the orthographic projection of the touch signal line on the substrate by a dimension of 0.8 to 2.0 micrometers.

4. The array substrate according to claim 3, characterized in that, The touch signal line has a center line extending along the second direction; the first metal strip has a center line extending along the second direction; the orthographic projection of the center line of the touch signal line on the substrate completely overlaps with the orthographic projection of the center line of the first metal strip on the substrate.

5. The array substrate according to claim 1, characterized in that, The orthographic projection of the first metal strip on the substrate does not overlap with the orthographic projection of the data line on the substrate.

6. The array substrate according to claim 5, characterized in that, In a direction parallel to the substrate and perpendicular to the second direction, the minimum distance between the boundary of the orthographic projection of the first metal strip on the substrate and the boundary of the orthographic projection of the data line on the substrate is 2.1 to 8 micrometers.

7. The array substrate according to claim 1, characterized in that, The first metal strip and the second metal strip are disposed in the same layer, and the first metal strip and the second metal strip in the same metal graphic unit have a first break in the second direction; the two first sub-metal lines in different metal graphic units have a second break in the first direction.

8. The array substrate according to claim 7, characterized in that, Each of the touch electrodes includes a plurality of touch sub-electrodes, wherein the orthographic projection of the touch sub-electrodes on the substrate does not overlap with the orthographic projection of the gate line and the data line on the substrate; In the same touch electrode, the first sub-metal lines between adjacent metal graphic units along the first direction are connected to the second disconnection port through a first bridging portion disposed in the same layer or different layer as the first metal strip, and at least one metal graphic unit is coupled to at least one touch sub-electrode in the touch electrode; in different touch electrodes adjacent along the first direction, the first sub-metal lines between multiple metal graphic units are disconnected and not connected through the second disconnection port; In the same touch electrode, the first metal strip and the second metal strip of at least one column of the metal graphic units arranged in the second direction are connected to the first disconnection port through a second bridging portion disposed in the same layer or different layer as the first metal strip, and the first metal strip is coupled to the corresponding touch signal line; the metal graphic units are not connected between adjacent touch electrodes in the second direction.

9. The array substrate according to claim 8, characterized in that, In the same touch electrode, at least one column of the first metal strips arranged in the second direction is coupled to the corresponding touch signal line, and all the first metal strips corresponding to the touch electrode are not coupled to touch signal lines that are not corresponding to the touch electrode, so that the metal graphic units are not connected between adjacent touch electrodes in the second direction. Alternatively, in the same touch electrode, at least two columns of the first metal strips arranged in the second direction are respectively connected to different touch signal lines. The first metal strip connected to the touch signal line that does not correspond to the touch electrode is disconnected from the second metal strip in the touch electrode through the first disconnection port, so that the metal graphic units are not connected between adjacent touch electrodes in the second direction.

10. The array substrate according to claim 1, characterized in that, In two adjacent metal graphic units in the first direction, the first metal strip of one metal graphic unit and the second sub-metal line of the other metal graphic unit are located on opposite sides of the same data line, and in a direction parallel to the base and perpendicular to the second direction, the distance between the boundary of the orthographic projection on the base and the boundary of the orthographic projection of the data line on the base is the same.

11. The array substrate according to claim 8 or 9, characterized in that, The array substrate further includes a pixel electrode and a common electrode disposed within the sub-pixel, wherein the touch sub-electrode is multiplexed as the common electrode.

12. The array substrate according to claim 11, characterized in that, In a direction parallel to the substrate and perpendicular to the second direction, the distance between the boundary of the orthographic projection of the data line onto the substrate and the boundary of the orthographic projection of the pixel electrode in the two sub-pixels adjacent to the data line onto the substrate is equal. The distance between the boundary of the orthographic projection of the data line onto the substrate and the boundary of the orthographic projection of the common electrode in the two sub-pixels adjacent to the data line onto the substrate is equal.

13. The array substrate according to claim 12, characterized in that, The array substrate further includes: an organic insulating layer; the touch signal line and the data line are disposed on the same layer and made of the same material, and the organic insulating layer is disposed between the layer where the data line is located and the layer where the touch electrode is located.

14. The array substrate according to claim 13, characterized in that, The array substrate further includes: a gate insulating layer and a passivation layer; Along the direction away from the substrate, the layer containing the metal graphic unit, the gate insulating layer, the layer containing the touch signal line and the data line, the organic insulating layer, the layer containing the touch electrode, the passivation layer, and the layer containing the pixel electrode are sequentially arranged; The touch electrode is coupled to the second metal strip through a first connection via, the first connection via penetrating at least the passivation layer, the organic insulating layer and the gate insulating layer; The touch signal line is coupled to the first metal strip through a second connection via, the second connection via penetrating at least the passivation layer, the organic insulating layer and the gate insulating layer.

15. The array substrate according to claim 14, characterized in that, The first connection via includes a first sub-via and a second sub-via; The first sub-via penetrates the passivation layer, exposing the touch electrode portion; The second sub-via penetrates the organic insulating layer and the gate insulating layer, exposing part of the second metal strip; The array substrate further includes a first connection pattern, the orthographic projection of the first connection pattern on the substrate covering the orthographic projections of the first sub-via and the second sub-via of the first connection via on the substrate, so as to couple the touch electrode and the second metal strip.

16. The array substrate according to claim 15, characterized in that, The first connection pattern is disposed in the same layer as the pixel electrode and is made of the same material.

17. The array substrate according to claim 15, characterized in that, The second connection via includes a third sub-via and a fourth sub-via; The third sub-via penetrates the passivation layer, exposing part of the touch signal line; The fourth sub-via penetrates the organic insulating layer and the gate insulating layer, exposing part of the first metal strip; The array substrate further includes a second connection pattern, the orthographic projection of the second connection pattern on the substrate covering the orthographic projections of the third sub-via and the fourth sub-via of the second connection via on the substrate, so as to couple the touch signal line and the first metal strip.

18. The array substrate according to claim 14, characterized in that, The array substrate further includes a driving circuit, wherein at least a portion of the output electrode of the driving circuit is located on the side of the organic insulating layer near the substrate; The pixel electrode is coupled to the output electrode through a third connection via. The third connection via penetrates at least the organic insulating layer and the passivation layer to expose the output electrode of the driving circuit, thereby coupling the pixel electrode to the output electrode.

19. The array substrate according to claim 18, characterized in that, The driving circuit includes a driving transistor; the third connection via includes a fifth sub-via and a sixth sub-via; the fifth sub-via penetrates the organic insulating layer, the sixth sub-via penetrates the passivation layer, and the orthogonal projection of the fifth sub-via on the substrate includes the orthogonal projection of the sixth sub-via on the substrate; the pixel electrode is coupled to the output electrode through the third connection via.

20. The array substrate according to claim 11, characterized in that, Each pixel electrode includes a plurality of slits extending along the second direction.

21. A display device, characterized in that, The array includes an array substrate and a counter substrate disposed opposite each other, and a liquid crystal layer disposed between the array substrate and the counter substrate, wherein the array substrate is an array substrate as described in any one of claims 1 to 20.

22. The display device according to claim 21, characterized in that, The opposing substrate has a black matrix, and the orthographic projection of the black matrix on the array substrate is located in the non-transparent area of ​​the sub-pixel. In a direction parallel to the substrate and perpendicular to the second direction, the distance between the boundary of the orthographic projection of the black matrix on the substrate and the boundary of the orthographic projection of the pixel electrode in the two sub-pixels adjacent to the black matrix on the substrate is equal. The distance between the boundary of the orthographic projection of the black matrix onto the substrate and the boundary of the orthographic projection of the common electrode in the two sub-pixels adjacent to the black matrix onto the substrate is equal.

Images