Semiconductor structure and method of manufacturing the same

By employing a double conductive layer structure and dielectric layer gap design in DRAM devices, the gate structure is optimized, solving the problem of gate-induced drain leakage current, improving device reliability, reducing power consumption, and enhancing data storage and read/write performance.

CN116489988BActive Publication Date: 2026-06-12CHANGXIN MEMORY TECH INC

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHANGXIN MEMORY TECH INC
Filing Date
2022-01-12
Publication Date
2026-06-12

AI Technical Summary

Technical Problem

In existing DRAM devices, the gate-induced drain leakage current (GIDL) problem increases significantly after the device size is reduced and the gate oxide layer is thinned, resulting in reduced reliability and increased power consumption, affecting data storage and read/write performance.

Method used

A double-layer conductive layer structure is adopted, in which the work function of the first conductive layer is greater than that of the second conductive layer, and a gate dielectric layer is formed by the dielectric layer and the gap. The isolation layer, the conductive layer, the dielectric layer and the sidewall of the trench form a gap, thus optimizing the gate structure of the semiconductor structure.

🎯Benefits of technology

It effectively suppresses gate-drain leakage current, improves the reliability of semiconductor structure and reduces power consumption, while also enhancing data storage and read/write performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of the present application relate to a semiconductor structure and a preparation method thereof. The semiconductor structure comprises: a substrate, a trench is formed in the substrate; a conductive layer is located in the trench, the conductive layer comprises a first conductive layer and a second conductive layer, the second conductive layer is located on the first conductive layer, and a projection area of a bottom of the second conductive layer in the trench is greater than a projection area of a top of the first conductive layer in the trench; a dielectric layer is located between the conductive layer and an inner wall of the trench, and a top of the dielectric layer is lower than a top of the first conductive layer; an isolation layer is located on the conductive layer; and a gap is enclosed by the isolation layer, the conductive layer, the dielectric layer and a side wall of the trench. A work function of the first conductive layer is greater than a work function of the second conductive layer. The opening speed of the transistor is improved, the gate-induced drain leakage current of the semiconductor structure is reduced, the reliability of the semiconductor structure is improved, and the power consumption of the semiconductor structure is reduced.
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