Semiconductor structure and method of manufacturing the same
By employing a double conductive layer structure and dielectric layer gap design in DRAM devices, the gate structure is optimized, solving the problem of gate-induced drain leakage current, improving device reliability, reducing power consumption, and enhancing data storage and read/write performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGXIN MEMORY TECH INC
- Filing Date
- 2022-01-12
- Publication Date
- 2026-06-12
AI Technical Summary
In existing DRAM devices, the gate-induced drain leakage current (GIDL) problem increases significantly after the device size is reduced and the gate oxide layer is thinned, resulting in reduced reliability and increased power consumption, affecting data storage and read/write performance.
A double-layer conductive layer structure is adopted, in which the work function of the first conductive layer is greater than that of the second conductive layer, and a gate dielectric layer is formed by the dielectric layer and the gap. The isolation layer, the conductive layer, the dielectric layer and the sidewall of the trench form a gap, thus optimizing the gate structure of the semiconductor structure.
It effectively suppresses gate-drain leakage current, improves the reliability of semiconductor structure and reduces power consumption, while also enhancing data storage and read/write performance.
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