Discriminable <110> Crystal orientation and <100> Methods and equipment for measuring wafer warpage of crystal orientation

Abstract

This application discloses a discriminative method. <110> Crystal orientation and <100> A method and apparatus for measuring wafer warpage of crystal orientation are disclosed. The method includes: placing the wafer to be measured on three support points forming an isosceles triangle with a vertex angle of 45°, ensuring the center of the wafer coincides with the circumcenter of the isosceles triangle; planning a sampling path on the wafer to collect warpage data; acquiring wafer morphology information along the sampling path; calculating the warpage value after removing interference factors; and determining the wafer's crystal orientation based on the warpage value. This measurement method is applicable to wafer materials primarily composed of… <110> Crystal orientation and <100> For factories or enterprises with two types of crystal orientation, this method can determine the crystal orientation while measuring the wafer morphology. Compared with the prior art, which uses different equipment and processes to measure wafer warpage and determine crystal orientation separately, the measurement method provided in this application has multiple benefits, simple operation steps, high detection efficiency, accurate and reliable determination, and meets the actual production needs.

Description

Technical Field

[0001] This application relates to the field of silicon wafer warpage measurement technology, and more particularly to the measurement of wafer warpage in the semiconductor material manufacturing industry, specifically relating to a method for determining warpage. <110> Crystal orientation and <100> Methods for measuring wafer warpage of crystal orientation and equipment for measuring wafer warpage. Background Technology

[0002] In the process of integrated circuit manufacturing, the warpage of the wafer has a significant impact on the performance of the manufactured devices, and the measurement of wafer warpage has become an indispensable step before processing.

[0003] Warpage is one of the morphological parameters of a wafer. Geometric parameters characterizing wafer morphology include: wafer thickness, TTV (Total Thickness Variation), BOW (Bend), WARP (Warpage), TIR (Total Indicated Reading), STIR (Site Total Indicated Reading), and LTV (Local Thickness Variation), etc.

[0004] Currently, commonly used methods for obtaining wafer surface morphology and step height include, but are not limited to, the following: 1. Obtaining wafer surface shape using an interferometer (Fizeau interferometer); 2. Measuring wafer warpage, waviness, and roughness using a white light interferometer; 3. Measuring warpage, waviness, roughness, stress, and step height using a profilometer / probe profiler; 4. Measuring wafer surface morphology, surface roughness, mechanical, and electrical properties using an atomic force microscope; 5. Measuring wafer surface morphology and analyzing its composition using a scanning electron microscope.

[0005] The aforementioned wafer surface morphology measurement methods can only obtain the wafer surface morphology, but cannot determine the wafer's crystal orientation. Wafers with different crystal orientations have different physical properties and are applicable to the manufacture of different types of integrated circuit chips. Therefore, in addition to measuring the wafer morphology, it is necessary to further detect the wafer's crystal orientation.

[0006] Crystal orientation detection is divided into two methods: professional equipment detection and manual measurement. Professional equipment detection mainly includes two types: X-ray diffraction and optical patterning. These methods typically involve complex procedures and expensive equipment. Manual measurement relies on experienced technicians making visual judgments; this method is inaccurate, inefficient, and requires highly skilled operators.

[0007] It is evident that in existing technologies, wafer warpage measurement and wafer orientation determination must be completed sequentially using different equipment and instruments. The detection methods generally suffer from complex operation, low detection efficiency, and high equipment operating costs.

[0008] Existing wafer orientation detection methods are more suitable for small-batch laboratory testing, but cannot be carried out simultaneously with large-scale engineering measurement of wafer warpage in factories (or enterprises).

[0009] <110> and <100> Crystal orientation is one of the two types that are produced in large quantities and widely circulated in the market.

[0010] Therefore, if it is possible to simultaneously measure wafer warpage and perform measurements on widely used wafers... <110> Crystal orientation and <100> Determining crystal orientation will reduce factory testing costs and improve production efficiency. Summary of the Invention

[0011] This application provides a discriminative <110> Crystal orientation and <100> A method for measuring wafer warpage by crystal orientation is proposed to solve the problems of low detection efficiency and high equipment cost caused by the existing technology of measuring wafer warpage and determining crystal orientation separately by using different equipment and processes.

[0012] To achieve the above objectives, this application provides the following technical solution:

[0013] This application provides a discriminative <110> Crystal orientation and <100> The method for measuring wafer warpage of crystal orientation includes the following steps:

[0014] S1: Select a three-point support structure with appropriate size according to the size of the wafer to be measured; the three-point support structure includes three support points for adsorbing or releasing the wafer, the three support points are distributed in a tripod manner on the horizontal plane, forming an isosceles triangle with a vertex angle of 45°;

[0015] S2: Place the wafer to be measured on the three-point support structure, and make the center point of the wafer to be measured coincide with the circumcenter of the isosceles triangle with a vertex angle of 45°;

[0016] S3: Plan a sampling path on the wafer to be measured. The sampling path consists of multiple straight lines that intersect at the center point of the wafer to be measured. The straight lines are sampled sequentially by a probe on the measurement equipment.

[0017] S4: After the probe completes data sampling of a straight line, the wafer is rotated by a preset angle with the center point of the wafer as the rotation center, so that the probe can sample the next straight line.

[0018] S5: After the probe completes data sampling for each straight line, the computer processing system performs interference removal processing on the collected data and calculates the warping value;

[0019] S6: Determine the wafer orientation based on the warpage value.

[0020] Furthermore, in step S3 of the above technical solution, the sampling path consists of four intersecting straight lines in a star shape at the center point of the wafer to be measured, with the included angle between any two adjacent straight lines being 45°.

[0021] Furthermore, in step S4, the preset angle for rotating the wafer is 45°.

[0022] Furthermore, let the three supporting points be A, B, and C, and the circumcenter of the isosceles triangle be O. The lengths of the hypotenuse AC and BC are equal, ∠AOB = 90°, and ∠AOC = ∠BOC = 135°.

[0023] Furthermore, in step S3, a sampling path is planned on the wafer to be measured, specifically including: assuming the crystal orientation of the wafer to be measured is... <110> Crystal orientation, planned and aligned with the wafer to be measured. <110> Sampling path adapted to crystal orientation; or, self-assume the crystal orientation of the wafer to be measured is... <100> Crystal orientation, planned and aligned with the wafer to be measured. <100> Crystal orientation-adaptive sampling path.

[0024] Furthermore, in step S6, the criteria for determining the wafer orientation based on the warp value are as follows: if the warp value is less than or equal to 10, the wafer orientation to be measured is the same as the orientation corresponding to the planned sampling path; if the warp value is greater than or equal to 30, the wafer orientation to be measured is different from the orientation corresponding to the planned sampling path; if the warp value is between 10 and 30, the wafer orientation to be measured needs to be further checked.

[0025] Furthermore, with <110> The method for planning sampling paths with crystal orientation adaptation is as follows:

[0026] First, the wafer to be measured is placed in the initial position of the three-point support structure, so that the straight line formed by the notch on the wafer and the center of the wafer is used as the first sampling line for sampling by the probe.

[0027] Then, using the first sampling line as a reference, the positions of the remaining sampling lines are determined: with the center point of the wafer to be measured as the rotation center, the first sampling line is rotated 45° counterclockwise to obtain the second sampling line; the first sampling line is rotated 90° counterclockwise to obtain the third sampling line; the first sampling line is rotated 135° counterclockwise to obtain the fourth sampling line; the four sampling lines form a star-shaped sampling path.

[0028] Furthermore, with <100> The method for planning sampling paths with crystal orientation adaptation is as follows:

[0029] First, place the wafer to be measured in the initial position of the three-point support structure, find the straight line formed by the notch on the wafer and the center of the wafer, and use it as the positioning line;

[0030] Secondly, with the center point of the wafer to be measured as the rotation center, the positioning line is rotated 45° clockwise to obtain the first sampling line, which is the first line sampled by the probe.

[0031] Next, using the first sampling line as a reference, determine the positions of the remaining sampling lines: with the center point of the wafer to be measured as the rotation center, rotate the first sampling line counterclockwise by 45° to obtain the second sampling line; rotate the first sampling line counterclockwise by 90° to obtain the third sampling line; rotate the first sampling line counterclockwise by 135° to obtain the fourth sampling line; the four sampling lines form a star-shaped sampling path.

[0032] Furthermore, in step S5, the interference removal process includes gravity removal and interference removal filtering.

[0033] Based on the above-mentioned discriminable method <110> Crystal orientation and <100> In addition to the method for measuring wafer warpage of crystal orientation, this application also provides a device for measuring wafer warpage, which, in conjunction with the aforementioned discriminative method... <110> Crystal orientation and <100> A method for measuring wafer warpage by crystal orientation, which measures the warpage and determines the crystal orientation of the wafer to be measured.

[0034] Furthermore, in the above technical solution, the device includes a silicon wafer carrier stage, on which the three-point support structure is provided. The three-point support structure includes three support points for adsorbing or releasing the wafer. The three support points are distributed in a tripod manner on a horizontal plane, forming an isosceles triangle with a vertex angle of 45°. A probe for sampling data on the upper surface morphology of the wafer is provided above the silicon wafer carrier stage, and a probe for sampling data on the lower surface morphology of the wafer is provided below the silicon wafer carrier stage.

[0035] Compared with the prior art, this application has the following advantages:

[0036] This application provides a discriminative <110> Crystal orientation and <100> The wafer warpage measurement method based on crystal orientation primarily involves placing the wafer to be measured on three support points arranged in a tripod configuration on a horizontal plane, forming an isosceles triangle with a 45° apex angle. The center of the wafer coincides with the circumcenter of this triangle. A sampling path for acquiring warpage information is planned on the wafer, and morphological information is collected along this path. Warpage information after removing interference factors is calculated. Based on the obtained warpage information, the validity of the crystal orientation corresponding to the planned sampling path is examined, thereby determining the wafer's crystal orientation. This measurement method involves first assuming and then verifying, determining the validity of the assumption based on the verification results. Therefore, it is more suitable for wafers with stable incoming materials (i.e., the wafer material is mainly...). <110> Crystal orientation and <100> This method allows for direct determination of wafer warpage and crystal orientation at the same time, providing a clear-cut result. It is highly efficient and accurate, achieving the goal of determining crystal orientation simultaneously with wafer warpage measurement. Compared to existing technologies that use different equipment and processes to measure wafer warpage and determine crystal orientation separately, the method provided in this application offers multiple benefits, simplifies operation, significantly improves detection efficiency, and provides accurate and reliable results, perfectly meeting actual production needs. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It should be understood that the specific shapes and structures shown in the drawings should not generally be regarded as limiting conditions for implementing this application; for example, based on the technical concepts disclosed in this application and the exemplary drawings, those skilled in the art are able to easily make conventional adjustments or further optimizations to the addition / reduction / classification, specific shapes, positional relationships, connection methods, and size ratios of certain units (components).

[0038] Figure 1 This is a partial three-dimensional structural schematic diagram of a wafer warpage measurement device that can be used in conjunction with the measurement method provided in this application in one embodiment;

[0039] Figure 2 This is a diagram showing the distribution of a support point structure consisting of three support points for supporting a wafer, provided in this application, in one embodiment.

[0040] Figure 3 This is a schematic planar diagram of a star-shaped sampling path planned on a wafer in one embodiment;

[0041] Figure 4Images (a), (b), (c), and (d) are examples of embodiments provided in this application that are related to... <110> A schematic diagram of the measurement of the cross-shaped sampling path for wafer adaptation in crystal orientation;

[0042] Figure 5 Images (a), (b), (c), and (d) are examples of embodiments provided in this application that are related to... <100> A schematic diagram of the measurement of the cross-shaped sampling path for wafer adaptation in crystal orientation;

[0043] Figure 6 As one embodiment, the discriminative method provided in this application <110> Crystal orientation and <100> Flowchart of a method for measuring the morphology of a wafer with crystal orientation;

[0044] Figure 7 In another embodiment, the discriminative method provided in this application <110> Crystal orientation and <100> A flowchart of a method for measuring the morphology of a wafer with crystal orientation.

[0045] Explanation of reference numerals in the attached figures:

[0046] 1. Silicon wafer transport stage; 2. Linear guide rail; 3. Left slide stage; 4. Right slide stage; 5. Upper probe; 6. Lower probe; 7. Front angle rotary stage; 8. Rear angle rotary stage; 9. Wafer; 91. Notch. Detailed Implementation

[0047] The present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0048] In the description of this application: unless otherwise stated, "a plurality of" means two or more. The terms "first," "second," "third," etc., in this application are intended to distinguish the objects referred to and do not have any special meaning in terms of technical connotation (e.g., they should not be construed as an emphasis on importance or order). Expressions such as "comprising," "including," and "having" also mean "not limited to" (certain units, components, materials, steps, etc.).

[0049] The terms used in this application, such as "upper," "lower," "left," "right," and "middle," are generally used to facilitate intuitive understanding by referring to the accompanying drawings, and are not absolute limitations on the positional relationships in the actual product. Changes in these relative positional relationships, without departing from the technical concept disclosed in this application, should also be considered within the scope of this application.

[0050] Example 1

[0051] Currently, wafer warpage measurement and crystal orientation inspection are performed separately, requiring different equipment platforms, which increases the number of processes, time, and equipment costs.

[0052] In existing wafer warpage measurement methods, there are two main wafer support methods: 1. Ring support, which uses a ring support below the outer edge of the silicon wafer; 2. Equilateral triangular support, which uses three support points distributed in an equilateral triangle pattern below the silicon wafer. The inventors discovered that the symmetrical nature of the wafer support methods in existing wafer warpage measurement methods makes it impossible to determine the wafer's crystal orientation during the measurement process. Based on this, the inventors believe that by changing the wafer support method in wafer warpage measurement, crystal orientation determination can be achieved simultaneously with wafer warpage measurement.

[0053] Based on this, this application provides a discriminative <110> Crystal orientation and <100> A method for measuring wafer warpage based on crystal orientation. This method is suitable for wafers with relatively stable incoming material (i.e., the wafer material is mainly composed of...). <110> Crystal orientation and <100> (Crystal orientation) factories or enterprises.

[0054] This application provides a discriminative method <110> Crystal orientation and <100> The wafer warpage measurement method for crystal orientation can be completed with any silicon wafer morphology measurement device with a three-point support structure. Of course, in the aforementioned three-point support structure, the three support points form an isosceles triangle with a vertex angle of 45° on the horizontal plane.

[0055] In this embodiment, the present application provides a discriminative method. <110> Crystal orientation and <100> The method for measuring wafer warpage in crystal orientation can be completed using a device with an unlimited measurement range for silicon wafers disclosed in Chinese Patent CN202211415218.4. For details, see... Figure 1 The device for measuring silicon wafers without limitation includes: a silicon wafer transport stage 1, linear guide rails 2, a left slide stage 3, a right slide stage 4, an upper probe 5, a lower probe 6, a front angle rotary stage 7, and a rear angle rotary stage 8. The two linear guide rails 2 are spaced apart and parallel to each other. The left slide stage 3 is slidably mounted on the left linear guide rail 2, and the right slide stage 4 is slidably mounted on the right linear guide rail 2. The silicon wafer transport stage 1 is mounted on the upper surface of the left slide stage 3 and the right slide stage 4. An opening is provided in the middle of the silicon wafer transport stage 1. The top surface of the silicon wafer transport stage 1 is provided with three support points with vacuum adsorption function. The upper probe 5 and the lower probe 6 are located between the two linear guide rails 2. The upper probe 5 is located directly above the lower probe 6. The front angle rotary stage 7 and the rear angle rotary stage 8 are located on the front and rear sides of the lower probe 6, respectively. The upper ends of the front angle rotary stage 7 and the rear angle rotary stage 8 have vacuum adsorption, lifting, and rotation functions. The silicon wafer carrier stage 1 has a double crescent ring structure, with the centers of the upper probe 5 and the lower probe 6 located in the vertical plane containing the left and right center lines of the silicon wafer carrier stage 1.

[0056] Based on the device with unlimited silicon wafer measurement range, the three support points with vacuum adsorption function set on the top surface of the silicon wafer carrier stage 1 are the support structure. These three support points are distributed in a tripod manner on the horizontal plane, forming an isosceles triangle with a vertex angle of 45°.

[0057] In this embodiment, see Figure 2 Let the three supporting points be A, B, and C, forming triangle ABC, with circumcenter O. Furthermore, triangle ABC is an isosceles triangle, with hypotenuse AC equal to hypotenuse BC, ∠AOB = 90°, ∠AOC = 135°, and ∠BOC = 135°. It should be noted that the radius of the circle containing the three supporting points is not limited and can be chosen according to the size of the wafer. For example, for a 12-inch wafer, the radius of the circle containing the three supporting points can be 100mm.

[0058] See also Figure 2 In the figure, the dashed line PQ represents the spatial path for sampling the morphology information of the silicon wafer when the probe and the carrier stage on which the silicon wafer is placed move relative to each other. It can be simply understood as the movement path of the probe when it performs sampling; or, PQ represents the movement path of the carrier stage that carries the silicon wafer.

[0059] When the center of the wafer coincides with the circumcenter O of triangle ABC, rotating and flipping the wafer around point O can create a symmetrical effect (points A and B) and an asymmetrical effect (points A and C or points B and C) on the wafer warping due to the wafer's own gravity.

[0060] As can be seen from the above, this application provides a discriminative method. <110> Crystal orientation and <100> The wafer warpage measurement method for crystal orientation primarily involves placing the wafer to be measured on three support points, ensuring that the wafer's center (o) coincides with the circumcenter (O) of triangle ABC. A sampling path (also called a "template" or "recipe") for warpage information is planned on the wafer. Thickness information of the silicon wafer is collected along the sampling path, and the warpage after removing interference factors is calculated. Based on the obtained warpage, the effectiveness of the sampling path is examined to determine the wafer's crystal orientation. The aforementioned calculation of interference factors includes, but is not limited to, gravity removal and interference filtering. Therefore, the discriminative method provided in this application... <110> Crystal orientation and <100> The wafer warpage measurement method based on crystal orientation is more suitable for wafers with relatively stable incoming materials (i.e., the wafer material is mainly...). <110> Crystal orientation and <100> By identifying the crystal orientation of a factory or enterprise, a binary decision can be made, resulting in high efficiency and accuracy. This achieves the goal of determining the crystal orientation while measuring the wafer warpage.

[0061] This application provides a discriminative method <110> Crystal orientation and <100> The wafer warpage measurement method for crystal orientation plans sampling paths adapted to two different crystal orientations. In a preferred embodiment, the sampling paths for both crystal orientations are star-shaped paths; that is, the wafer warpage sampling path consists of four straight lines intersecting at the wafer's center point in a star shape, with adjacent lines spaced 45° apart. The center point of the star-shaped path coincides with the circumcenter O of the isosceles triangle formed by the three-point support structure. See [link to documentation]. Figure 3 Let ab, cd, ef, and gh be the four straight lines that form the star-shaped path. The four straight lines intersect at point o (the circumcenter O of the isosceles triangle supported by three points coincides with the center point o of the star-shaped path); such that the straight line ab coincides with the left and right center lines of the silicon wafer carrier stage 1.

[0062] for <110> For wafers with crystal orientation, the measurement path adopts Figure 4 In the paths shown in (a), (b), (c), and (d) respectively, the initial position of the notch (or marker) on the wafer is located on the left and right center lines of the silicon wafer carrier stage 1. At this time, the notch is facing the probe, and the straight line ab of the star-shaped path passes through the notch (the straight line ab is the first sampling line). During measurement, after the probe has finished sampling along the straight line ab (when the probe samples the target sampling path, the probe and the silicon wafer carrier stage generate relative motion. Therefore, the probe can be moved while the silicon wafer carrier stage is stationary, or the probe is stationary while the silicon wafer carrier stage is moving, depending on the structural conditions of the measurement equipment), the wafer is rotated 45° clockwise so that the next straight line cd of the star-shaped path is located on the left and right center lines of the silicon wafer carrier stage 1. This process is repeated until the information acquisition of the four sampling paths is completed.

[0063] for <100> For wafers with crystal orientation, the measurement path adopts Figure 5 In the paths shown in (a), (b), (c), and (d) respectively, the initial position of the notch on the wafer is not on the left and right center lines of the silicon wafer carrier stage 1. A straight line c1d1 passing through the wafer center in the star-shaped path passes through the wafer notch and can be used as a positioning line. Using the center point of the wafer to be measured as the rotation center, c1d1, serving as the positioning line, is rotated 45° counterclockwise to obtain the first sampling line a1b1. Line a1b1 is then aligned with the left and right center lines of the silicon wafer carrier stage 1. During measurement, after the probe samples line a1b1 on the wafer along the left and right center lines of the silicon wafer carrier stage 1, the wafer is rotated 45° clockwise so that the next straight line c1d1 in the star-shaped path is located on the left and right center lines of the silicon wafer carrier stage 1. This process is repeated until information acquisition for all four sampling paths is completed.

[0064] In specific measurement examples, this application provides a discriminative method <110> Crystal orientation and <100> For methods of measuring wafer warpage in crystal orientation, see [link to relevant documentation]. Figure 4(a), (b), (c), (d) and Figure 6 The main measurement steps include the following:

[0065] 1. Place the wafer to be measured on the three-point support structure mentioned above;

[0066] 2. Assume the wafer crystal orientation is <110> Crystal orientation, planned on the wafer with <110> Sampling path corresponding to crystal orientation;

[0067] 3. The topographic information of the upper surface of the wafer is sampled along the straight line ab using the upper probe above the wafer, and the topographic information of the lower surface of the wafer is sampled along the straight line ab using the lower probe below the wafer.

[0068] 4. Turn off the vacuum adsorption function of the three support points, release the wafer, and rotate the wafer clockwise through the front angle rotary stage 7 or the rear angle rotary stage 8. After rotating 45° clockwise, make the straight line cd coincide with the left and right center lines of the silicon wafer carrier stage 1.

[0069] 5. The topographic information of the upper surface of the wafer is sampled along the straight line cd using the upper probe above the wafer, and the topographic information of the lower surface of the wafer is sampled along the straight line cd using the lower probe below the wafer.

[0070] 6. Turn off the vacuum adsorption function of the three support points, release the wafer, and rotate the wafer clockwise through the rear angle rotary stage 8 or the front angle rotary stage 7. After rotating 45° clockwise, make the straight line ef coincide with the left and right center lines of the silicon wafer carrier stage 1.

[0071] 7. The topographic information of the upper surface of the wafer is sampled along the straight line ef using the upper probe above the wafer, and the topographic information of the lower surface of the wafer is sampled along the straight line ef using the lower probe below the wafer.

[0072] 8. Turn off the vacuum adsorption function of the three support points, release the wafer, and rotate the wafer clockwise through the front angle rotary stage 7 or the rear angle rotary stage 8. After rotating 45° clockwise, make the straight line gh coincide with the left and right center lines of the silicon wafer carrier stage 1.

[0073] 9. The topographic information of the upper surface of the wafer is sampled along the straight line gh using the upper probe above the wafer, and the topographic information of the lower surface of the wafer is sampled along the straight line gh using the lower probe below the wafer.

[0074] 10. In the above steps, the wafer surface topography information obtained by the upper and lower probes is transmitted and stored in the computer processing system. After the computer processing system processes the sampled wafer surface topography information to remove interference factors, it calculates the wafer warp value according to the warp calculation standard specified by the SEMI organization.

[0075] 11. Determine the wafer orientation based on the warp value. The criterion is: if Warp ≤ 10, then the wafer orientation being measured is the same as the orientation indicated by the sampling path (Recipe) (i.e., the assumption is true, the wafer orientation is...). <110> Crystal orientation); if Warp ≥ 30, then the crystal orientation of the measured wafer is not the crystal orientation structure indicated by the current Recipe (i.e., the assumption is not valid, the wafer crystal orientation is a different crystal orientation structure, which is...). <100> (Crystal orientation); if the Warp is between (10 and 30), further inspection is required (the inventors found in experiments that this situation rarely occurs).

[0076] In a specific measurement example, the sampling path can be 4mm off, meaning that data collected within 4mm of the wafer edge is discarded. When the probe collects data along the sampling path, the sampling points are spaced 1mm apart.

[0077] Example 2

[0078] The discriminative method provided in Embodiment 1 above <110> Crystal orientation and <100> The method for measuring wafer warpage based on crystal orientation assumes the wafer's crystal orientation is as follows during measurement. <110> Crystal orientation: This embodiment provides another method for measuring wafer warpage that can determine crystal orientation, which assumes that the wafer crystal orientation is... <100> Crystal orientation, see [reference] Figure 5 (a), (b), (c), (d) and Figure 7 The main measurement steps include the following:

[0079] 1. Place the wafer to be measured on the three-point support structure mentioned above;

[0080] 2. Assume the wafer crystal orientation is <100> Crystal orientation, planned on the wafer with <100> Sampling path corresponding to crystal orientation;

[0081] 3. The topographic information of the upper surface of the wafer is sampled along the straight line a1b1 using the upper probe above the wafer, and the topographic information of the lower surface of the wafer is sampled along the straight line a1b1 using the lower probe below the wafer.

[0082] 4. Turn off the vacuum adsorption function of the three support points, release the wafer, and rotate the wafer clockwise through the front angle rotary stage 7 or the rear angle rotary stage 8. After rotating 45° clockwise, make the straight line c1d1 coincide with the left and right center lines of the silicon wafer carrier stage 1.

[0083] 5. The topographic information of the upper surface of the wafer is sampled along the straight line c1d1 using the upper probe above the wafer, and the topographic information of the lower surface of the wafer is sampled along the straight line c1d1 using the lower probe below the wafer.

[0084] 6. Turn off the vacuum adsorption function of the three support points, release the wafer, and rotate the wafer clockwise through the rear angle rotary stage 8 or the front angle rotary stage 7. After rotating 45° clockwise, make the straight line e1f1 coincide with the left and right center lines of the silicon wafer carrier stage 1.

[0085] 7. The topographic information of the upper surface of the wafer is sampled along the straight line e1f1 using the upper probe above the wafer, and the topographic information of the lower surface of the wafer is sampled along the straight line e1f1 using the lower probe below the wafer.

[0086] 8. Turn off the vacuum adsorption function of the three support points, release the wafer, and rotate the wafer clockwise through the front angle rotary stage 7 or the rear angle rotary stage 8. After rotating 45° clockwise, make the straight line g1h1 coincide with the left and right center lines of the silicon wafer carrier stage 1.

[0087] 9. The topographic information of the upper surface of the wafer is sampled along the straight line g1h1 using the upper probe above the wafer, and the topographic information of the lower surface of the wafer is sampled along the straight line g1h1 using the lower probe below the wafer.

[0088] 10. In the above steps, the wafer surface topography information obtained by the upper and lower probes is transmitted and stored in the computer processing system. After the computer processing system processes the sampled wafer surface topography information to remove interference factors, it calculates the wafer warp value according to the warp calculation standard specified by the SEMI organization.

[0089] 11. Determine the wafer orientation based on the warp value. The criterion is: if Warp ≤ 10, then the wafer orientation being measured is the same as the orientation indicated by the sampling path (Recipe) (i.e., the assumption is true, the wafer orientation is...). <100> Crystal orientation); if Warp ≥ 30, then the crystal orientation of the measured wafer is not the crystal orientation structure indicated by the current Recipe (i.e., the assumption is not valid, the wafer crystal orientation is a different crystal orientation structure, which is...). <110> (Crystal orientation); if the Warp is between (10 and 30), further inspection is required (the inventors found in experiments that this situation rarely occurs).

[0090] In a specific measurement example, the sampling path can be 4mm off, meaning that data collected within 4mm of the wafer edge is discarded. When the probe collects data along the sampling path, the sampling points are spaced 1mm apart. The probe used for sampling can be a capacitive probe or other probes that can be used for sampling, such as a white light confocal probe or an infrared laser interferometer probe.

[0091] Example 3

[0092] Based on the discriminative method provided in this application <110> Crystal orientation and <100> The present application also provides a device for measuring wafer morphology, which can be used in conjunction with the aforementioned method for determining wafer warp. <110> Crystal orientation and <100> The wafer warpage measurement method based on crystal orientation completes the measurement of wafer warpage and determination of crystal orientation.

[0093] Specifically, the equipment used to measure the morphology of wafers includes a silicon wafer carrier stage, on which a three-point support structure is set. The three-point support structure includes three support points for adsorbing or releasing wafers. The three support points are distributed in a tripod manner on the horizontal plane, forming an isosceles triangle with a vertex angle of 45°.

[0094] Furthermore, a probe for sampling data on the top surface morphology of the wafer is installed above the silicon wafer carrier stage, and a probe for sampling data on the bottom surface morphology of the wafer is installed below the silicon wafer carrier stage.

[0095] The aforementioned silicon wafer carrier stage and probe can generate relative motion, and either the silicon wafer carrier stage or the probe must have a guide rail and a locking structure for sliding.

[0096] It should be understood that the device provided in this application for measuring wafer warpage can be any existing device that is equipped with the three-point support structure provided in this application and can be used for wafer morphology measurement.

[0097] In summary, the supply of wafer materials is basically stable (i.e., the wafer materials are mainly...). <110> Crystal orientation and <100> For factories or enterprises with crystal orientation, the method provided in this application that can distinguish crystal orientation can be used in actual production. <110> Crystal orientation and <100> A wafer warpage measurement method for crystal orientation can simultaneously measure the wafer morphology and determine its crystal orientation. Compared to existing technologies that use different equipment and processes to measure wafer morphology and determine crystal orientation sequentially, this measurement method offers multiple advantages: simple operation, reduced measurement costs, improved testing efficiency, and accurate and reliable results, meeting actual production needs.

[0098] The technical features of the above embodiments can be combined in any way (as long as there is no contradiction in the combination of these technical features). For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described; these embodiments not explicitly written should also be considered to be within the scope of this specification.

[0099] The present application has been described in a relatively specific and detailed manner above through general descriptions and specific embodiments. It should be understood that, based on the technical concept of the present application, several conventional adjustments or further innovations can be made to these specific embodiments; however, as long as they do not depart from the technical concept of the present application, the technical solutions obtained by these conventional adjustments or further innovations also fall within the protection scope of the claims of the present application.

Claims

1. A discriminable <110> Crystal orientation and <100> A method for measuring wafer warpage of crystal orientation, characterized in that, Includes the following steps: S1: Select a three-point support structure with appropriate size according to the size of the wafer to be measured; the three-point support structure includes three support points for adsorbing or releasing the wafer, the three support points are distributed in a tripod manner on the horizontal plane, forming an isosceles triangle with a vertex angle of 45°; S2: Place the wafer to be measured on the three-point support structure, and make the center point of the wafer to be measured coincide with the circumcenter of the isosceles triangle with a vertex angle of 45°; S3: Plan a sampling path on the wafer to be measured. The sampling path consists of multiple straight lines that intersect at the center point of the wafer to be measured. The straight lines are sampled sequentially by a probe on the measurement equipment. S4: After the probe completes data sampling of a straight line, the wafer is rotated by a preset angle with the center point of the wafer as the rotation center, so that the probe can sample the next straight line. S5: After the probe completes data sampling for each straight line, the computer processing system performs interference removal processing on the collected data and calculates the warping value; S6: Determine the wafer orientation based on the warpage value.

2. The discriminative method according to claim 1 <110> Crystal orientation and <100> A method for measuring wafer warpage of crystal orientation, characterized in that, In step S3, the sampling path consists of four intersecting straight lines in a star shape at the center point of the wafer to be measured, with the included angle between any two adjacent straight lines being 45°. In step S4, the preset angle for rotating the wafer is 45°.

3. The discriminable method according to claim 1 <110> Crystal orientation and <100> A method for measuring wafer warpage of crystal orientation, characterized in that, Let the three supporting points be A, B and C, and the circumcenter of the isosceles triangle be O. The lengths of the hypotenuse AC and BC are equal, ∠AOB = 90°, and ∠AOC = ∠BOC = 135°.

4. The discriminative method according to claim 1 <110> Crystal orientation and <100> A method for measuring wafer warpage of crystal orientation, characterized in that, Step S3 involves planning a sampling path on the wafer to be measured, specifically including: assuming the crystal orientation of the wafer to be measured is... <110> Crystal orientation, planned and aligned on the wafer to be measured. <110> Sampling path adapted to crystal orientation; or, self-assume the crystal orientation of the wafer to be measured is... <100> Crystal orientation, planned and aligned on the wafer to be measured. <100> Crystal orientation-adaptive sampling path.

5. The discriminative method according to claim 4 <110> Crystal orientation and <100> A method for measuring wafer warpage of crystal orientation, characterized in that, In step S6, the criteria for determining the wafer orientation based on the warpage value are as follows: if the warpage value is less than or equal to 10, the wafer orientation to be measured is the same as the orientation corresponding to the planned sampling path; if the warpage value is greater than or equal to 30, the wafer orientation to be measured is different from the orientation corresponding to the planned sampling path; if the warpage value is between 10 and 30, the wafer orientation to be measured needs to be further checked.

6. The discriminative method according to claim 4 <110> Crystal orientation and <100> A method for measuring wafer warpage of crystal orientation, characterized in that, and <110> The method for planning sampling paths with crystal orientation adaptation is as follows: First, the wafer to be measured is placed in the initial position of the three-point support structure, so that the straight line formed by the notch on the wafer and the center of the wafer is used as the first sampling line for sampling by the probe. Then, using the first sampling line as a reference, the positions of the remaining sampling lines are determined: with the center point of the wafer to be measured as the rotation center, the first sampling line is rotated 45° counterclockwise to obtain the second sampling line; the first sampling line is rotated 90° counterclockwise to obtain the third sampling line; the first sampling line is rotated 135° counterclockwise to obtain the fourth sampling line; the four sampling lines form a star-shaped sampling path.

7. The discriminative method according to claim 4 <110> Crystal orientation and <100> A method for measuring wafer warpage of crystal orientation, characterized in that, and <100> The method for planning sampling paths with crystal orientation adaptation is as follows: First, place the wafer to be measured in the initial position of the three-point support structure, find the straight line formed by the notch on the wafer and the center of the wafer, and use it as the positioning line; Secondly, with the center point of the wafer to be measured as the rotation center, the positioning line is rotated 45° clockwise to obtain the first sampling line, which is the first line sampled by the probe. Next, using the first sampling line as a reference, determine the positions of the remaining sampling lines: with the center point of the wafer to be measured as the rotation center, rotate the first sampling line counterclockwise by 45° to obtain the second sampling line; rotate the first sampling line counterclockwise by 90° to obtain the third sampling line; rotate the first sampling line counterclockwise by 135° to obtain the fourth sampling line; the four sampling lines form a star-shaped sampling path.

8. The discriminative method according to claim 1 <110> Crystal orientation and <100> A method for measuring wafer warpage of crystal orientation, characterized in that, In step S5, the interference removal process includes gravity removal and interference removal filtering.

9. An apparatus for measuring wafer warpage, characterized in that, It can be determined in conjunction with any one of claims 1-8 <110> Crystal orientation and <100> A method for measuring wafer warpage by crystal orientation, which measures the warpage and determines the crystal orientation of the wafer to be measured.

10. The apparatus for measuring wafer warpage according to claim 9, characterized in that, The device includes a silicon wafer carrier stage, on which the three-point support structure is provided. The three-point support structure includes three support points for adsorbing or releasing wafers. The three support points are distributed in a tripod manner on a horizontal plane, forming an isosceles triangle with a vertex angle of 45°. A probe for sampling data on the top surface morphology of the wafer is provided above the silicon wafer carrier stage, and a probe for sampling data on the bottom surface morphology of the wafer is provided below the silicon wafer carrier stage.

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