Software loading method and device based on C6678 chip, electronic equipment and medium

Abstract

The disclosure provides a C6678 chip-based software loading method and device, electronic equipment and medium, which can be applied to the field of C6678 chip software development and testing. The method comprises the following steps: generating a first image file of the C6678 chip according to the number and type of a plurality of preset working modes; generating a plurality of second image files corresponding to the plurality of working modes; loading a target image file from the plurality of second image files by using the first image file; and loading a working mode program corresponding to the target image. The method can enable the C6678 chip to load a plurality of image files at a time, effectively reduce the complexity of C6678 chip software development, the difficulty of system debugging, and facilitate software version maintenance and control.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of radar information processing, in particular to a software loading method and device based on a C6678 chip, electronic equipment and medium. BACKGROUND

[0002] With the continuous progress of radar system technology and the continuous development of signal processing technology, users have more and more functional requirements for the radar. Therefore, the working mode of modern radar is more and more. Different working modes correspond to different parameters, and different working modes realize different functions, and their software architectures also have obvious differences. Therefore, in actual engineering, multiple software images are often designed to correspond to different radar working modes, and each mode loads the corresponding software image file when working.

[0003] The existing commonly used software image file loading method in the radar system includes software loading based on a C6678 chip. In the software loading based on the C6678 chip, the most widely used one is to send the software loading image to the C6678 chip through an external interface (such as a network port), and the second is to read the software image in the external FLASH storage through the SPI interface of the DSP to complete the automatic start loading. In the existing FLASH loading design, a single reading can only load one software image file. For a radar system with multiple modes, different processing architectures need to be implemented in the same software image, which multiplies the difficulty and complexity of software development and debugging, and is also not conducive to software version maintenance and control. SUMMARY

[0004] In view of the above problems, the present disclosure provides a software loading method, device, electronic equipment and medium based on a C6678 chip.

[0005] According to a first aspect of the present disclosure, a software loading method based on a C6678 chip is provided, comprising: generating a first image file of the C6678 chip according to a preset number and type of multiple working modes; generating multiple second image files corresponding to the multiple working modes; loading a target image file from the multiple second image files by using the first image file; and loading a working mode program corresponding to the target image file.

[0006] According to an embodiment of the present disclosure, loading the target image file from the multiple second image files by using the first image file comprises: burning the first image file and the multiple second image files into an external storage; self-loading the C6678 chip to load the first image file and the multiple second image files from the external storage into the C6678 chip; and loading the target image file from the multiple second image files by using a control program corresponding to the first image file in the C6678 chip.

[0007] According to an embodiment of the present disclosure, the loading of the target image file from the plurality of second image files by the control program corresponding to the first image file in the C6678 chip comprises: executing the control program corresponding to the first image file in the control core of the C6678 chip; obtaining a system instruction by the control program; obtaining the target image file corresponding to the system instruction from the plurality of second image files by the control program; and loading the target image file.

[0008] According to an embodiment of the present disclosure, the burning of the first image file and the plurality of second image files into the external memory comprises: dividing the external memory into intervals, and the number of intervals minus one is not less than the number of working modes; and burning the first image file and the plurality of second image files into the corresponding intervals in the external memory; wherein the starting address of the first image file in the external memory is address 0 of the external memory.

[0009] According to an embodiment of the present disclosure, the generation of the first image file of the C6678 chip according to the number and types of the plurality of working modes comprises: compiling the control program of the control core of the C6678 chip according to the number and types of the plurality of working modes; and generating the first image file by the hex6x tool chain according to the control program.

[0010] According to an embodiment of the present disclosure, the generation of the plurality of second image files corresponding to the plurality of working modes comprises: compiling a plurality of working mode program files corresponding to the plurality of working modes; loading the plurality of working mode program files into the C6678 chip in sequence in a development environment to obtain a plurality of static random access memory data corresponding to the plurality of working mode programs; and generating the plurality of second image files corresponding to the plurality of static random access memory data.

[0011] According to an embodiment of the present disclosure, the static random access memory data is data contained in the L2 SRAM of the core in the C6678 chip.

[0012] A second aspect of the present disclosure provides a software loading device based on a C6678 chip, comprising: a first generation module configured to generate a first image file of the C6678 chip according to a number and types of a plurality of working modes; a second generation module configured to generate a plurality of second image files corresponding to the plurality of working modes; a first loading module configured to load a target image file from the plurality of second image files by using the first image file; and a second loading module configured to load a working mode program corresponding to the target image.

[0013] A third aspect of the present disclosure provides an electronic device, comprising: one or more processors; a memory for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors execute the above-mentioned software loading method based on the C6678 chip.

[0014] The fourth aspect of the present disclosure also provides a computer readable storage medium, which stores executable instructions, and the instructions are executed by a processor to make the processor execute the above-mentioned software loading method based on the C6678 chip.

[0015] According to the embodiments of the present disclosure, the present disclosure adopts the multi-level loading method of the first image file and the second image file, so that the C6678 chip can load the image files corresponding to multiple working modes when completing self-loading. The problem that single FLASH read-write operation can only load a single software mapping is solved, and the actual demand that multiple radar working modes coexist can be realized. The complexity of software development is significantly reduced, the software development efficiency of each working mode in actual radar engineering projects is effectively improved, and the complexity in the debugging and testing process of radar engineering projects is reduced. In addition, the software loading method of the present disclosure can realize the method of single-core loading for secondary booting of multi-core, and the amount of data to be read is significantly reduced compared with multi-core loading, effectively reducing the multi-core loading time. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A flowchart of the software loading method based on the C6678 chip according to the embodiments of the present disclosure is schematically shown.

[0017] Figure 2 A flowchart of the target image file from the multiple second image files using the first image file according to the embodiments of the present disclosure is schematically shown.

[0018] Figure 3 A FLASH storage address segmentation diagram according to the embodiments of the present disclosure is schematically shown.

[0019] Figure 4 A flowchart of loading the target image file from the multiple second image files according to the embodiments of the present disclosure is schematically shown.

[0020] Figure 5 A block diagram of the software loading device based on the C6678 chip according to the embodiments of the present disclosure is schematically shown.

[0021] Figure 6 A block diagram of a computer system suitable for implementing the above-described method according to the embodiments of the present disclosure is schematically shown. DETAILED DESCRIPTION

[0022] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood, however, that the description is merely exemplary and is not intended to limit the scope of the present disclosure. In the following detailed description of the embodiments of the present disclosure, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the present disclosure. However, it would be apparent to those skilled in the art that the embodiments of the present disclosure can be practiced without these specific details. In other instances, well-known structures and methods are not described in detail in order to avoid obscuring the concepts of the present disclosure.

[0023] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used herein, the term "includes" and tautological expressions thereof, such as "including," means the inclusion of but not limited to, such that there can be additional items which are not also listed after such term. As used herein, the term "comprises" and tautological expressions thereof, such as "comprising," means the inclusion of but not limited to, such that there can be additional items which are not also listed after such term.

[0024] All of the terms used herein (including technical and scientific terms) have the same meanings as those generally understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having meanings consistent with the context of the present specification, and should not be interpreted in an idealized or excessively formal manner.

[0025] In the case of using an expression similar to "at least one of A, B, and C," it generally should be interpreted to include any of one, or two or more of A, B, and C, unless otherwise specifically defined. In the case of using the expression "or" in the description of the embodiments of the present disclosure, it should be interpreted as an inclusive, and not an exclusive or, unless otherwise specifically defined. In addition, in the case of using an expression "and / or" in the description of the embodiments of the present disclosure, it should be interpreted as an inclusive, and not an exclusive or, unless otherwise specifically defined.

[0026] Embodiments of the present disclosure provide a C6678 chip-based software loading method, the method comprising: generating a first image file of a C6678 chip according to a number and a type of a plurality of working modes; generating a plurality of second image files corresponding to the plurality of working modes; loading a target image file from the plurality of second image files by using the first image file; and loading a working mode program corresponding to the target image file.

[0027] Figure 1 A flowchart of a C6678 chip-based software loading method 100 according to an embodiment of the present disclosure is schematically shown.

[0028] As shown in FIG. 1, Figure 1 the method can include the following operation steps S110-S120.

[0029] At operation S110, a first image file of the C6678 chip is generated according to a preset number and type of working modes. In an actual radar system, different working modes correspond to different raw signal echoes, and different radar working modes implement different functions, and the software architectures are obviously different. Therefore, in actual engineering, multiple software images, such as a first working image, a second working image, and a fifteenth working image, are designed to correspond to different working modes, such as a first working mode, a second working mode, and a fifteenth working mode.

[0030] In the embodiment of the present disclosure, a control program of the control core of the C6678 chip is compiled according to the preset fifteen working modes and the types corresponding to the working modes.

[0031] In the embodiment of the present disclosure, the compiled control program is used to generate a software loading image file (that is, the first image file) of the working core (core 0) of the C6678 chip by using a hex6x tool chain provided by TI. The image file format is a.dat file. It can be understood that the way of generating the software loading image file by using the hex6x is only a schematic operation of the embodiment, and if other ways can generate the software loading image file, they also belong to the protection scope of the present disclosure.

[0032] At operation S120, multiple second image files corresponding to multiple working modes are generated.

[0033] In the embodiment of the present disclosure, the first working mode to the fifteenth working mode correspond to different working programs respectively. After the code of the working programs is written by the developer through the development software, preliminary black-box and white-box tests are performed in the development environment to verify the validity of the programs. After the preliminary tests are completed, corresponding.out files are generated. The.out files corresponding to the fifteen working programs of the fifteen working modes are loaded into the C6678 chip by using the development environment CCS software, and data contained in the L2 SRAM of the core (core 1) of the C6678 chip corresponding to each working mode is exported as a secondary boot software image (that is, the second image file). The data length is related to the operation resource configuration divided in the entire project file.cmd.

[0034] In the embodiment of the present disclosure, the second image file is a hexadecimal data file.

[0035] At operation S130, a target image file is loaded from the multiple second image files by using the first image file. The first image file contains target information of the fifteen second image files, and the target information includes a working mode name corresponding to each working mode, system instruction information corresponding to each working mode, address information of the second image file corresponding to each working mode, and a loading command of each second image file, but does not include the specific content of the second image file.

[0036] In the embodiments of the present disclosure, the function of the first image file is equivalent to a central control program and a working mode image file lookup table, and the first image file can perform lookup, replacement and loading operations on a plurality of second image files. Through the above operations of the first image file, the second image file corresponding to the target working mode (i.e., the target image file) required to be loaded is accurately found and loaded.

[0037] In operation S140, the working mode program corresponding to the target image file is loaded. The working mode program is sent to the signal processing module by the C6678 chip through the above step C6678. After loading, the correctness of the loaded program is verified in sequence. The standard test data source is generated through the front-end simulation radar input signal, and the correct processing result is obtained after the related processing software in the C6678 is processed. The result is compared with the MATLAB processing result of the standard test data source. The comparison result error order is 10 -13 .

[0038] The method shown in Figures 2-4 will be further described below with reference to specific embodiments. Figure 1

[0039] Figure 2 A flowchart for finding the target image file from a plurality of second image files by using the first image file is schematically shown.

[0040] According to the embodiments of the present disclosure, finding the target image file from a plurality of second image files by using the first image file includes steps S210-S230.

[0041] In operation S210, the first image file and the plurality of second image files are burned into the external memory;

[0042] Figure 3 A FLASH memory address segmentation diagram according to the embodiments of the present disclosure is schematically shown.

[0043] As shown in Figure 3 , there are 15 working modes in the present embodiment. The storage addresses of the external memory FLASH chip are first divided into 16 address segments of 1MB. The starting address segment occupied by core 0 is excluded, and the remaining space can also store the hexadecimal files of the software images of the 15 working modes. The first image file and the second image file are burned into the corresponding FLASH memory address segment by using the FLASH burning tool. The starting address of the image file (i.e., the first image file) of the control core (core 0) is address 0 of the FLASH memory address.

[0044] ​In operation S220, the C6678 chip is self-loaded, and the first image file and the plurality of second image files are loaded into the C6678 chip from the external memory. The self-loading of the C6678 chip is completed by reading the software image in the external FLASH memory through the SPI interface read-write function of the DSP (Digital Signal Processor) of the C6678 chip. In the self-loading operation of the C6678 chip, the data reading from the FLASH memory can only start from the address 0 of the FLASH memory, that is, the first image file is read, and after the first image file is read, the subsequent fifteen second image files are read in sequence.

[0045] In operation S230, the target image file is loaded from the plurality of second image files through the control program corresponding to the first image file in the C6678 chip.

[0046] Figure 4 The flowchart of loading the target image file from the plurality of second image files is schematically shown.

[0047] Loading the target image file from the plurality of second image files includes steps S410-S440.

[0048] In operation S410, the control program corresponding to the first image file is executed in the control core of the C6678 chip. The first image file corresponds to the control program of the C6678 chip, and after the self-loading is completed, the data read from the address 0 of the FLASH is the default image of the C6678 chip at this time, that is, the first image file for control. The control program of the control core is executed through the first image file.

[0049] In operation S420, the external instruction of the system is read through the control program. The external instruction is issued by the staff or the external test program, and different instructions correspond to different working modes.

[0050] In operation S430, the control program finds the address of the second image file corresponding to the system instruction through the information of the plurality of second image files recorded in the first image file, such as the working mode number, the working mode name, etc., to obtain the target image file (i.e. the second image file corresponding to the system instruction). At this time, the second image file has been loaded into the C6678 chip and does not need to be read again from the external FLASH.

[0051] In operation S440, the target image file is loaded.

[0052] According to the embodiment of the present disclosure, the first image file and the second image file multi-level loading method is adopted, so that the C6678 chip can load the image files corresponding to multiple working modes when self-loading is completed, the problem that single FLASH read-write operation can only load a single software mapping is solved, the actual demand that multiple radar working modes coexist can be realized, the complexity of software development is significantly reduced, the software development efficiency of each working mode in actual radar engineering projects is effectively improved, and the complexity in the debugging and testing process of radar engineering projects is reduced. In addition, the software loading method of the present disclosure can realize the method of single-core loading for secondary booting of multi-core starting, and the amount of data to be read is significantly reduced compared with multi-core loading, thereby effectively reducing the multi-core loading time.

[0053] Based on the above-mentioned software loading method based on the C6678 chip, the present disclosure further provides a software loading device based on the C6678 chip. The following will be described in detail in combination with Figure 5 The device is described in detail.

[0054] Figure 5 The structure block diagram of the software loading device based on the C6678 chip according to the embodiment of the present disclosure is schematically shown.

[0055] As Figure 5 shown, the software loading device based on the C6678 chip 500 of the embodiment includes a first generation module 510, a second generation module 520, a first loading module 530, and a second loading module 540.

[0056] The first generation module 510 is configured to generate a first image file of the C6678 chip according to a preset number and type of multiple working modes. In an embodiment, the first generation module 510 can be configured to perform the operation S110 described above, and details are not repeated here.

[0057] The second generation module 520 is configured to generate multiple second image files corresponding to multiple working modes. In an embodiment, the second generation module 520 can be configured to perform the operation S120 described above, and details are not repeated here.

[0058] The first loading module 530 is configured to load a target image file from the multiple second image files by using the first image file. In an embodiment, the first loading module 530 can be configured to perform the operation S130 described above, and details are not repeated here.

[0059] The second loading module 540 is configured to load a working mode program corresponding to the target image. In an embodiment, the second loading module 540 can be configured to perform the operation S140 described above, and details are not repeated here.

[0060] According to an embodiment of the present disclosure, any of the first generation module 510, the second generation module 520, the first loading module 530 and the second loading module 540 can be combined in one module, or any of them can be split into multiple modules. Alternatively, at least part of the function of one or more of these modules can be combined with at least part of the function of the other modules, and implemented in one module. According to an embodiment of the present disclosure, at least one of the first generation module 510, the second generation module 520, the first loading module 530 and the second loading module 540 can be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on chip, a system on substrate, a system on package, an application specific integrated circuit (ASIC), or any other reasonable way of integrating or packaging a circuit, etc. hardware or firmware, or in any one of software, hardware and firmware implementation or in any appropriate combination of any of them. Alternatively, at least one of the first generation module 510, the second generation module 520, the first loading module 530 and the second loading module 540 can be at least partially implemented as a computer program module which can perform the corresponding function when it is run.

[0061] Figure 6 The block diagram of the electronic device suitable for implementing the software loading method based on the C6678 chip according to an embodiment of the present disclosure is schematically shown.

[0062] Specifically, the processor 610 may, for example, include a general purpose microprocessor, an instruction set processor and / or a related chipset and / or a special purpose microprocessor (e.g., an application specific integrated circuit (ASIC)), etc. The processor 610 can also include an on-board memory for cache purposes. The processor 610 can be a single processing unit or a plurality of processing units for executing different actions of the method flow according to an embodiment of the present disclosure.

[0063] The computer readable storage medium 620 may, for example, be a non-volatile computer readable storage medium, and specific examples include but are not limited to: a magnetic storage device such as a magnetic tape or a hard disk drive (HDD); an optical storage device such as a compact disc (CD-ROM); a memory such as a random access memory (RAM) or a flash memory; etc.

[0064] The computer readable storage medium 620 can include a computer program 621, which can include code / computer executable instructions that, when executed by the processing 610, cause the processor 610 to perform the method according to an embodiment of the present disclosure or any variation thereof.

[0065] The computer program 621 can be configured to have computer program code, for example, including computer program modules. For example, in an example embodiment, the code in the computer program 621 can include one or more program modules, for example, including 621A, module 621B, …. It should be noted that the division and number of modules are not fixed, and a person skilled in the art can use appropriate program modules or combinations of program modules according to actual conditions, when these program modules or combinations of program modules are executed by the processor 610, so that the processor 610 can perform the method according to the embodiments of the present disclosure or any variations thereof.

[0066] According to embodiments of the present disclosure, at least one of the first generation module 510, the second generation module 520, the first loading module 530, and the second loading module 540 can be implemented as reference Figure 6 The computer program modules described above, when executed by the processor 610, can implement the corresponding operations described above. The present disclosure also provides a computer-readable storage medium, which can be included in the device / apparatus / system described in the above embodiments; or can exist separately without being assembled into the device / apparatus / system. The above computer-readable storage medium carries one or more programs, when the one or more programs are executed, the method according to the embodiments of the present disclosure is implemented.

[0067] According to embodiments of the present disclosure, the computer-readable storage medium can be a non-volatile computer-readable storage medium, for example, can include but is not limited to: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any appropriate combination of the above. In the present disclosure, the computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus or device.

[0068] The computer program product of the first aspect can include one or more non-transitory computer-readable media storing instructions that, when executed, cause a processor of a computer-based system to perform any of the methods of the first aspect. The computer program product of the first aspect can include one or more non-transitory computer-readable media storing instructions that, when executed, cause a processor of a computer-based system to perform any of the methods of the first aspect.

[0069] Those skilled in the art will understand that the features recited in the various embodiments and / or claims of the present disclosure can be combined or / and integrated in a variety of ways, even if such combinations or integrations are not expressly disclosed in the present disclosure. In particular, the features recited in the various embodiments and / or claims of the present disclosure can be combined and / or integrated in a variety of ways without departing from the spirit and teachings of the present disclosure. All such combinations and / or integrations are within the scope of the present disclosure.

[0070] The above describes the embodiments of the present disclosure. However, these embodiments are merely for illustrative purposes, and are not intended to limit the scope of the present disclosure. Although the above describes each embodiment separately, this does not mean that the measures in each embodiment cannot be used advantageously in combination. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art can make various substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. A software loading method based on a C6678 chip, characterized in that, include: The first image file of the C6678 chip is generated according to the number and type of preset multiple working modes; Generate multiple second image files corresponding to the multiple working modes; The target image file is loaded from the plurality of second image files using the first image file; Load the working mode program corresponding to the target image file; The step of loading the target image file from the plurality of second image files using the first image file includes: The first image file and the plurality of second image files are burned into external memory; The C6678 chip is self-loaded, so that the first image file and the plurality of second image files are loaded from the external memory into the C6678 chip; In the C6678 chip, the target image file is loaded from the plurality of second image files through the control program corresponding to the first image file; The step of loading the target image file from the plurality of second image files in the C6678 chip via the control program corresponding to the first image file includes: The control program corresponding to the first image file is executed in the control core of the C6678 chip. System instructions are obtained through the control program; The control program obtains the target image file corresponding to the system instruction from the plurality of second image files; Load the target image file.

2. The software loading method based on the C6678 chip according to claim 1, characterized in that, The step of burning the first image file and the plurality of second image files to external memory includes: The external memory is divided into intervals, and the number of intervals minus one is not less than the number of operating modes; The first image file and the plurality of second image files are burned into the corresponding intervals in the external memory; wherein The starting address of the first image file in the external memory is address 0 of the external memory.

3. The software loading method based on the C6678 chip according to claim 1, characterized in that, The process of generating the first image file of the C6678 chip according to the number and type of preset multiple operating modes includes: The control program for the control core of the C6678 chip is compiled and generated according to the number and type of preset multiple working modes; The first image file is generated using the hex6x toolchain according to the control program.

4. The software loading method based on the C6678 chip according to claim 1, characterized in that, The generation of multiple second image files corresponding to the multiple working modes includes: Compile and generate multiple working mode program files corresponding to the multiple working modes; In the development environment, the multiple working mode program files are sequentially loaded into the C6678 chip to obtain multiple static random access memory data corresponding to the multiple working mode programs; The plurality of second image files are generated based on the plurality of static random access memory data.

5. The software loading method based on the C6678 chip according to claim 4, characterized in that, The static random access memory data is the data contained in the L2 SRAM of the slave core in the C6678 chip.

6. A software loading device based on a C6678 chip, characterized in that, include: The first generation module is used to generate the first image file of the C6678 chip according to the number and type of multiple preset working modes; The second generation module is used to generate multiple second image files corresponding to the multiple working modes; A first loading module is used to load a target image file from the plurality of second image files using the first image file; as well as The second loading module is used to load the working mode program corresponding to the target image; The step of loading the target image file from the plurality of second image files using the first image file includes: The first image file and the plurality of second image files are burned into external memory; The C6678 chip is self-loaded, so that the first image file and the plurality of second image files are loaded from the external memory into the C6678 chip; In the C6678 chip, the target image file is loaded from the plurality of second image files through the control program corresponding to the first image file; The step of loading the target image file from the plurality of second image files in the C6678 chip via the control program corresponding to the first image file includes: The control program corresponding to the first image file is executed in the control core of the C6678 chip. System instructions are obtained through the control program; The control program obtains the target image file corresponding to the system instruction from the plurality of second image files; Load the target image file.

7. An electronic device, characterized in that, include: One or more processors; Storage device for storing one or more programs. Wherein, when the one or more programs are executed by the one or more processors, the one or more processors perform the method according to any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that, It stores executable instructions that, when executed by a processor, cause the processor to perform the method according to any one of claims 1 to 5.

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