High quality semiconductor thin films and methods of making and using the same

Abstract

This invention discloses a high-quality semiconductor thin film, its preparation method, and its applications. The preparation method includes: a first step, comprising micro-nano patterning of a silicon substrate surface to obtain a patterned substrate; and a second step, comprising growing a semiconductor material thin film on the patterned substrate. The semiconductor material thin film is formed of a hexagonal semiconductor material, and the first step includes: forming multiple polygonal patterns on the silicon substrate surface, such that the angle between any side of the polygonal pattern and either the <11-2> crystal orientation of the silicon substrate or the <10-10> crystal orientation of the semiconductor material is within 15°. The preparation method proposed in this invention can not only effectively reduce dislocation defect density and stress, but also has a simple and low-cost preparation process, good merging effect, low defect density, and good material crystal quality, making it particularly suitable for large-scale industrial production.

Description

Technical Field

[0001] This invention relates in particular to a high-quality semiconductor thin film, its preparation method and application, and belongs to the field of semiconductor material growth technology. Background Technology

[0002] AlN thin films possess excellent properties such as a large bandgap, direct bandgap structure, stable chemical bonds, high breakdown voltage, and strong piezoelectric effect, thus showing broad application prospects in optoelectronics, power electronics, and communications. AlGaN-based deep ultraviolet light-emitting devices and detectors, with AlN as the underlying layer, can be widely used in disinfection, sterilization, medical treatment, and communications, with a very large market potential. Simultaneously, the AlN nucleation layer is an essential buffer layer for the epitaxial growth of GaN-based optoelectronic devices on silicon substrates, and the quality of the AlN thin film material directly affects the performance of these optoelectronic devices. As an ultra-wide bandgap semiconductor, AlN can be used to fabricate high-voltage power electronic devices; the density of defects such as dislocations within the AlN film will affect the performance of these devices. Furthermore, the performance of surface acoustic wave (SAW) and bulk acoustic wave (BAW) devices based on AlN materials is also closely related to the quality of the AlN material.

[0003] First, high-quality silicon-based AlN thin films are the underlying material for growing various silicon-based GaN optoelectronic and power electronic devices, so the quality of the material greatly affects the performance of the final device. Second, since silicon substrates are easily peeled off by wet etching, substrate-free vertical high-power ultraviolet LED chips can be fabricated by growing AlGaN-based ultraviolet LED epitaxial layers on silicon substrates, but this requires the growth of high-quality AlN thin films on silicon substrates. Finally, because AlN thin film materials have high acoustic wave propagation speed, excellent piezoelectric properties, and high-temperature thermal stability, high-quality AlN thin films on silicon substrates can be used to fabricate surface acoustic wave (SAW) devices, bulk acoustic wave (BAW) devices, etc.

[0004] However, due to the high cost of AlN self-supporting substrates and their small wafer size, most AlN single-crystal thin films are currently obtained on substrates such as sapphire, silicon, and SiC through methods such as metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), and hydride vapor phase epitaxy (HVPE). Among these methods, growing AlN thin films on Si(111) substrates is particularly important. Epitaxial growth of high-quality AlN thin film materials on silicon substrates can not only significantly reduce the manufacturing costs of the aforementioned optoelectronic devices, power electronic devices, and filter communication devices, but also allow for the fabrication of vertical structure devices by peeling off the silicon substrate, thereby improving device performance.

[0005] Furthermore, growing AlN thin films on silicon substrates presents significant challenges. Firstly, the large lattice mismatch between silicon and AlN results in numerous through-dislocations during production, leading to poor material quality and limiting the performance of various devices. Additionally, the lattice mismatch causes substantial tensile stress in AlN during growth, ultimately resulting in cracks in the epitaxial film, rendering it unusable. Secondly, the significant thermal mismatch between AlN and silicon, namely the difference in their coefficients of thermal expansion, causes additional tensile stress during the cooling process of the high-temperature-grown AlN epitaxial film, further contributing to cracks and rendering it unusable. In short, the high dislocation density and cracking problems caused by tensile stress severely limit the application of heteroepitaxial AlN thin film materials in devices.

[0006] The growth of AlN thin films on silicon substrates can be broadly categorized into two types: conventional improvement and lateral epitaxy. Conventional methods directly grow crack-free AlN thin films on silicon substrates with a thickness not exceeding 500 nm and a dislocation density as high as 10⁻⁶. 10 cm -2 In terms of scale, patterned substrate lateral epitaxial growth (ELOG) can effectively relax tensile stress, suppress cracks, and reduce dislocation density. However, traditional lateral epitaxy has large pattern sizes (micrometer scale), while the lateral growth rate of AlN material is very slow. Therefore, a very thick AlN merging layer (>5μm) is often required to merge and achieve a flat surface. This results in traditional lateral epitaxy being not only time-consuming and costly, but also causing the tensile stress to increase with the thickness during epitaxial growth, ultimately leading to a series of problems such as cracks, making it impossible to achieve industrial commercialization. Summary of the Invention

[0007] The main objective of this invention is to provide a high-quality semiconductor thin film, its preparation method, and its application, in order to overcome the shortcomings of the prior art.

[0008] To achieve the aforementioned objectives, the technical solution adopted by this invention includes:

[0009] This invention provides a method for preparing a high-quality semiconductor material thin film, comprising:

[0010] The first step includes micro- and nano-patterning the surface of a silicon substrate to obtain a patterned substrate;

[0011] The second step includes growing a thin film of semiconductor material on the patterned substrate;

[0012] The semiconductor material thin film is formed from a hexagonal semiconductor material, and the first step includes:

[0013] Multiple polygonal patterns are formed on the surface of a silicon substrate, and the angle between any side of the polygonal pattern and either the <11-2> crystal orientation of the silicon substrate or the <10-10> crystal orientation of the semiconductor material is within 15°.

[0014] This invention also provides a semiconductor thin film, which is prepared by the aforementioned preparation method.

[0015] This invention also provides a semiconductor device comprising a semiconductor thin film prepared by the aforementioned preparation method.

[0016] Compared with the prior art, the method for preparing high-quality semiconductor thin films based on micro-nano patterned silicon substrates proposed in this invention can not only effectively reduce dislocation defect density and stress, but also has a simple preparation process, low cost, good merging effect, low defect density, and good material crystal quality, making it particularly suitable for large-scale industrial production. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the process flow for a method of preparing a high-quality semiconductor material thin film provided in a typical embodiment of the present invention;

[0018] Figure 2 This is an optical microscope image of a micro-nano patterned silicon substrate provided in Embodiment 1 of the present invention;

[0019] Figure 3 This is an atomic force microscope image of a silicon-based AlN thin film surface provided in Embodiment 1 of the present invention;

[0020] Figure 4 This is an X-ray bicrystalline diffraction rocking curve of a silicon-based AlN thin film provided in Embodiment 1 of the present invention;

[0021] Figure 5 This is an optical microscope photograph of the AlN thin film in Comparative Example 1 of the present invention, taken by observing the surface of the epitaxial layer under an optical microscope. Detailed Implementation

[0022] In view of the shortcomings of the prior art, the inventors of this invention, through long-term research and extensive practice, have proposed the technical solution of this invention. The following will further explain and illustrate the technical solution, its implementation process, and its principles.

[0023] The inventors of this case discovered that by improving pattern design and photolithography processes, the pattern size can be reduced to the hundred-nanometer level. By first preparing a nano-patterned silicon substrate and then laterally epitaxially growing an AlN thin film on it, the dislocation defect density can be effectively reduced, the AlN merging layer thickness can be significantly reduced, and cost, stress and defect control can be balanced, thereby producing a commercially viable, high-quality silicon-based AlN thin film that can be mass-produced.

[0024] The main objective of this invention is to address the problems existing in current nano-patterned silicon-based AlN growth schemes and propose an innovative solution as follows: First, the Si(111) substrate is directly patterned, and then a nucleation layer (or bottom layer, i.e., the aforementioned first semiconductor layer) and a merging layer (i.e., the aforementioned second semiconductor layer) are epitaxially grown on the patterned silicon substrate in one step. Thus, only one etching (silicon substrate etching) and one epitaxial growth are needed to obtain a high-quality silicon-based AlN film, thereby greatly simplifying the process, saving costs and improving yield.

[0025] Furthermore, the inventors of this invention discovered that during the growth of the AlN merging layer, the lateral growth rates differ significantly across different crystal orientations. The growth rate along the AlN<11-20> direction is very fast, while the growth rate along the AlN<10-10> direction is very slow and difficult to merge. Therefore, this invention proposes fabricating micro / nano patterns on the silicon substrate surface into polygons, such as triangles, rhombuses, and hexagons. Each side of these micro / nano patterns is substantially parallel to the Si<11-2> crystal orientation of the silicon substrate, and also substantially parallel to the AlN<10-10> crystal orientation. This allows the AlN merging layer to grow laterally along the AlN<11-20> direction, achieving the maximum lateral merging rate, significantly reducing the AlN merging layer thickness, and also significantly improving the crystal orientation alignment during merging. This results in a reduction in the merging layer thickness and a decrease in the dislocation density generated by merging, ultimately yielding a higher quality silicon-based AlN epitaxial film.

[0026] This invention provides a method for preparing a high-quality semiconductor thin film, comprising:

[0027] The first step includes micro- and nano-patterning the surface of a silicon substrate to obtain a patterned substrate;

[0028] The second step includes growing a thin film of semiconductor material on the patterned substrate;

[0029] The semiconductor material thin film is formed from a hexagonal semiconductor material, and the first step includes:

[0030] Multiple polygonal patterns are formed on the surface of a silicon substrate, and the angle between any side of the polygonal pattern and either the <11-2> crystal orientation of the silicon substrate or the <10-10> crystal orientation of the semiconductor material is within 15°.

[0031] In some more specific embodiments, any one side of the polygonal pattern is parallel to the <11-2> crystal orientation of the silicon substrate or the <10-10> crystal orientation of the semiconductor material.

[0032] In some more specific implementations, the polygonal shape includes any one of triangles, rhombuses, hexagons, and dodecagons, but is not limited to this.

[0033] In some more specific implementations, the side length of the polygonal shape is 50nm-2μm.

[0034] In some more specific implementations, the spacing between two adjacent polygonal shapes is 200nm-3μm.

[0035] In some more specific embodiments, the polygonal pattern is a recess and / or a protrusion formed on the surface of the silicon substrate, wherein the depth of the recess or the height of the protrusion is 0.3-20 μm.

[0036] In some more specific implementations, the multiple polygonal shapes are arranged in a periodic pattern.

[0037] In some more specific implementation schemes, the first step specifically includes:

[0038] A patterned mask is set on the surface of a silicon substrate;

[0039] The pattern on the patterned mask is transferred to the surface of the silicon substrate using a dry or wet etching process, thereby completing the micro-nano patterning process on the surface of the silicon substrate.

[0040] In some more specific embodiments, the second step specifically includes: growing a first semiconductor layer under a first temperature and a first V / III ratio, and growing a second semiconductor layer under a second temperature and a second V / III ratio, thereby obtaining the semiconductor material thin film; wherein the first temperature is lower than the second temperature, and the first V / III ratio is greater than the second V / III ratio.

[0041] In some more specific implementations, the first temperature is 600-1050°C, including the end value of 1050°C, and the first V / III ratio is 100-100000, including the end value of 100.

[0042] In some more specific implementations, the second temperature is 1050-1500°C, excluding the end value of 1050°C, and the second V / III ratio is 1-100, excluding the end value of 100.

[0043] In some more specific embodiments, the semiconductor material includes any one of AlN, GaN, InN, AlGaN, and AlInGaN, but is not limited thereto.

[0044] This invention also provides a semiconductor thin film, which is prepared by the aforementioned preparation method.

[0045] This invention also provides a semiconductor device comprising a semiconductor thin film prepared by the aforementioned preparation method.

[0046] In some more specific implementations, the semiconductor device includes any one of optoelectronic devices, power electronic devices, power electronic devices, and filter communication devices, but is not limited thereto.

[0047] The following will further explain the technical solution, its implementation process and principle in conjunction with the accompanying drawings and specific implementation examples. Unless otherwise specified, the etching and epitaxial growth equipment and processes, photoresists, photomasks, etc. used in the embodiments of the present invention are all known to those skilled in the art. In the epitaxial growth process of semiconductor thin films, the metal source and nitrogen source are known to those skilled in the art, and the flow rate and time of the metal source and nitrogen source can be selected according to specific needs.

[0048] Please see Figure 1 In a typical implementation example, a method for preparing a high-quality semiconductor thin film specifically includes the following steps:

[0049] 1) Spin-coat a layer of photoresist or nanoimprint adhesive onto the first surface of the silicon substrate;

[0050] 2) The pattern on the photomask is transferred to the photoresist or nanoimprint adhesive using standard processes such as nanoimprinting and photolithography. The pattern on the photomask is a polygon, such as a rhombus or a regular n-sided polygon, where n is an integer multiple of 3. The sides of the pattern are at an angle of 60° or 120° to each other, and the angle between each side and either the Si<11-2> crystal orientation of the silicon substrate or the <10-10> crystal orientation of the semiconductor material is within 15°. Preferably, each side is substantially parallel to the Si<11-2> crystal orientation of the silicon substrate and also substantially parallel to the <10-10> crystal orientation of the semiconductor material. The side length of the pattern is 50nm-2μm, and the distance between adjacent patterns is 200nm-3μm.

[0051] 3) The pattern (i.e. micro-nano pattern) on the photoresist or nanoimprint adhesive is transferred to the first surface of the silicon substrate by means of dry or wet etching, with an etching depth of 0.3-20μm, and finally a recess is formed on the first surface of the silicon substrate.

[0052] 4) Remove the photoresist or nanoimprint adhesive, and then clean and polish the silicon substrate to restore it to a clean surface state that can be directly used for epitaxial growth. This step completes the preparation of the nanopatterned silicon substrate, which has periodic nanopatterns. Depending on the selection of the positive and negative photoresist, the first surface morphology of the silicon substrate can be pore-like or columnar.

[0053] 5) Place the nano-patterned silicon substrate into the reaction chamber of the MOCVD growth equipment. First, set the temperature inside the reaction chamber to >1050 degrees Celsius to bake the nano-patterned silicon substrate at high temperature for more than 1 minute to completely burn off the residue on the surface of the nano-patterned silicon substrate.

[0054] 6) Then adjust the temperature in the reaction chamber to ≤1050℃, introduce a metal source and a nitrogen source into the reaction chamber, and control the V / III ratio in the reaction chamber to ≥100, so as to grow a first semiconductor layer on the first surface of the nano-patterned silicon substrate, the thickness of the first semiconductor layer being 10-500nm.

[0055] 7) On the AlN base layer, the temperature in the reaction chamber is adjusted to >1050℃, and a metal source and a nitrogen source are continued to be introduced into the reaction chamber. The V / III ratio in the reaction chamber is adjusted to <100. A second semiconductor layer is further grown on the first semiconductor layer. The thickness of the second semiconductor layer is >500nm. Finally, a high-quality semiconductor film with complete merging and flatness is obtained. The first semiconductor layer is used as the base layer, and the second semiconductor layer is used as the merging layer.

[0056] It should be noted that the first semiconductor layer and the second semiconductor layer are both made of hexagonal semiconductor materials, such as AlN, GaN, InN, or alloys of AlGaN and AlInGaN. Unless otherwise specified, the growth conditions of the first semiconductor layer and the second semiconductor layer can be those known to those skilled in the art or adjusted according to specific needs.

[0057] This invention provides a method for preparing high-quality semiconductor thin films. The method utilizes a micro / nano patterned silicon substrate formed according to this invention to grow semiconductor thin films such as AlN. During the growth process, voids are formed within the semiconductor thin film or between the semiconductor thin film and the substrate, as shown in the attached figure. Figure 1As shown, these voids can relax tensile stress and suppress crack formation. On the other hand, since a portion of the silicon substrate has been etched, the area for growing the first semiconductor layer (nucleation layer) is reduced, and the number of dislocations formed at the interface between the silicon substrate and the first semiconductor layer is also greatly reduced. Furthermore, during the growth of the second semiconductor layer, the dislocations will be further annihilated, ultimately resulting in a high-quality silicon-based semiconductor thin film with no cracks and low dislocation density.

[0058] The present invention provides a method for preparing high-quality semiconductor thin films, which directly performs micro-nano patterning on a silicon substrate and then grows the bottom layer and the merged layer in one step, greatly simplifying the process flow, reducing production costs, and making the nano-patterned lateral epitaxial growth technology more suitable for large-scale industrial production.

[0059] This invention provides a method for preparing a high-quality semiconductor thin film. It replaces traditional circular or bar-shaped patterns with specific polygonal shapes (such as triangles, rhombuses, hexagons, etc.), ensuring that adjacent sides of the polygonal shapes form angles of 60° or 120° with each other. Each side is substantially parallel to the Si<11-2> crystal orientation of the silicon substrate and also substantially parallel to the <10-10> crystal orientation of the semiconductor material. In this way, the second semiconductor layer will grow laterally along the <11-20> crystal orientation of the second semiconductor layer, achieving a maximum lateral merging rate. This accelerates the merging process and significantly improves the crystal orientation alignment during merging, thereby reducing the thickness of the merged layer and related stress, and lowering the dislocation density of new dislocations generated during merging. Ultimately, this results in a higher-quality silicon-based semiconductor epitaxial thin film.

[0060] The following will provide further explanation of the technical solution, its implementation process, and its principles, using specific implementation cases as examples.

[0061] Example 1

[0062] High-quality AlN thin films based on rhombic nanopatterned silicon substrates were prepared by photolithography, specifically including:

[0063] S1: Take a 2-inch silicon substrate, clean and dry it, and spin-coat a layer of photoresist on the surface of the silicon substrate; the material of the photoresist and the spin-coating process can be achieved using existing technologies, and its thickness can be adjusted according to specific needs;

[0064] S2: Using standard photolithography, the diamond pattern of the photomask is transferred onto the photoresist. The side length of the diamond pattern is 1μm, and the spacing between adjacent diamond patterns is 1μm. Each side of the diamond pattern is basically parallel to the Si<11-2> crystal orientation of the silicon substrate and also basically parallel to the AlN<10-10> crystal orientation that will be grown subsequently. After photolithography exposure, development, cleaning, and drying are performed. The photolithography process, development, cleaning, and drying can all be achieved using existing technologies.

[0065] S3: The silicon substrate is etched using a dry etching process such as deep silicon etching to transfer the diamond pattern on the photoresist onto the silicon substrate. The etching depth is 2μm. After etching, the photoresist is removed to obtain a nano-patterned silicon substrate.

[0066] S4: Thoroughly clean the surface of the nano-patterned silicon substrate to remove residues and restore it to a state suitable for epitaxial growth;

[0067] S5: Place the nano-patterned silicon substrate into the reaction chamber of the MOCVD equipment. First, raise the temperature of the reaction chamber to 1100℃ and perform surface heat treatment on the nano-patterned silicon substrate for 10 minutes to burn off the residue on the surface of the nano-patterned silicon substrate.

[0068] S6: Cool the temperature in the reaction chamber to 1020℃, and at the same time introduce TMAl source and NH3 into the reaction chamber, and set the V / III ratio to about 2000, so as to grow an AlN bottom layer with a thickness of 300nm on the surface of the nano-patterned silicon substrate.

[0069] S7: Increase the temperature in the reaction chamber to 1150℃ and reduce the V / III ratio to 20. Under high temperature and low V / III conditions, grow an AlN merging layer with a thickness of 1.7μm on the AlN substrate to obtain a high-quality AlN film (or AlN epitaxial layer) with a total thickness of 2μm on the silicon substrate.

[0070] Figure 2 Microscopic images of the nanopatterned silicon substrate obtained in step S4 of Example 1 are shown. Figure 2 As can be seen, the surface of the nanopatterned silicon substrate is clean and the pattern is uniform; the final microscopic image of the obtained AlN thin film is as follows. Figure 3 As shown, by Figure 3 As can be seen, the AlN film surface merging is complete as observed under an optical microscope, and the surface of the AlN film is smooth and the step flow is clear under an atomic force microscope (AFM). Transmission electron microscopy (TEM) of the sample cross-section reveals that the AlN thick layer completes merging at a thickness of 1.3 μm. X-ray diffraction (XRD) scans of the obtained AlN film show the following X-ray diffraction rocking curve: Figure 4 As shown, the half-width at half-maximum (WHM) of the rocking curve on the (002) surface of the AlN thin film is less than 300 arcs, and the half-width at half-maximum (WHM) of the (102) surface is less than 500 arcs. This demonstrates that the AlN epitaxial thin film obtained by the preparation method provided in this embodiment of the invention has a flat surface and good crystal quality.

[0071] Example 2

[0072] High-quality AlN thin films based on hexagonal nanopatterned silicon substrates were prepared by nanoimprint lithography, specifically including the following steps:

[0073] S1: Take a 4-inch silicon substrate, clean and dry it, and spin-coat a layer of nanoimprint adhesive on the surface of the silicon substrate.

[0074] S2: Using nanoimprint lithography, a regular hexagonal pattern on a nanoimprint template is transferred onto a nanoimprint adhesive. The side length of the regular hexagonal pattern is 2μm, and the spacing between adjacent regular hexagonal patterns is 3μm. Each side of the regular hexagonal pattern is parallel to the Si<11-2> crystal orientation of the silicon substrate and the AlN<10-10> crystal orientation grown subsequently.

[0075] S3: The residual adhesive at the bottom layer of the nanoimprint adhesive recess area is etched by means of plasma etching (ICP) and other methods;

[0076] S4: The silicon substrate is etched using a dry etching process such as deep silicon etching to transfer the regular hexagonal pattern on the nanoimprint adhesive onto the silicon substrate. The etching depth is 20μm. After etching, the nanoimprint adhesive is removed to obtain a nano-patterned silicon substrate.

[0077] S5: Thoroughly clean the surface of the nano-patterned silicon substrate to remove residues and restore it to a state suitable for epitaxial growth;

[0078] S6: Place the nano-patterned silicon substrate into the reaction chamber of the MOCVD equipment, adjust the temperature in the reaction chamber to 1100℃, and perform surface heat treatment on the nano-patterned silicon substrate for 15 minutes to burn off the residue on the surface of the nano-patterned silicon substrate.

[0079] S7: Cool the temperature of the reaction chamber to 1030℃, and simultaneously introduce TMAl source and NH3 into the reaction chamber, and set the V / III ratio to about 2000, so as to grow an AlN bottom layer with a thickness of 200nm on the surface of the nano-patterned silicon substrate.

[0080] S8: Increase the temperature of the reaction chamber to 1180℃ and reduce the V / III ratio to 50. Under high temperature and low V / III conditions, grow an AlN merging layer with a thickness of 4μm on the surface of the AlN substrate to obtain a high-quality AlN film (or AlN epitaxial layer) on the silicon substrate.

[0081] The total thickness of the AlN film obtained in Example 2 reached 4.2 μm. TEM observation of the sample cross-section revealed that the AlN thick layer was completely merged at a thickness of 3 μm. Furthermore, the half-width at half-maximum (WHM) of the rocking curve of the AlN film (002) surface obtained by XRD scanning was less than 200 arcs, and the half-width at half-maximum (WHM) of the AlN film (102) surface was less than 400 arcs. This demonstrates that high-quality AlN films can also be prepared by nanoimprinting in this embodiment of the invention.

[0082] Example 3

[0083] The process of producing a high-quality AlGaN thin film based on a silicon substrate with an equilateral triangular nanopattern includes the following steps:

[0084] S1: Take a 4-inch silicon substrate, clean and dry it, and spin-coat a layer of nanoimprint adhesive on the surface of the silicon substrate.

[0085] S2: Using nanoimprinting technology, the equilateral triangle pattern on the nanoimprinting template is transferred to the nanoimprinting adhesive. The side length of the equilateral triangle pattern is 1.5μm, and the spacing between adjacent equilateral triangle patterns is 500nm. The angle between each side of the equilateral triangle pattern and the Si<11-2> crystal orientation of the silicon substrate and the AlN<10-10> crystal orientation grown subsequently is 5°.

[0086] S3: The residual adhesive at the bottom layer of the nanoimprint adhesive recess area is etched by means of plasma etching (ICP) and other methods;

[0087] S4: The silicon substrate is etched using a dry etching process such as deep silicon etching to transfer the equilateral triangle pattern on the nanoimprint adhesive onto the silicon substrate. The etching depth is 10μm. After etching, the nanoimprint adhesive is removed to obtain a nano-patterned silicon substrate.

[0088] S5: Thoroughly clean the surface of the nano-patterned silicon substrate to remove residues and restore it to a state suitable for epitaxial growth;

[0089] S6: Place the nano-patterned silicon substrate into the reaction chamber of the MOCVD equipment, adjust the temperature in the reaction chamber to 1060℃, and perform surface heat treatment on the nano-patterned silicon substrate for 15 minutes to burn off the residue on the surface of the nano-patterned silicon substrate.

[0090] S7: Cool the temperature of the reaction chamber to 650°C, and simultaneously introduce TMAl source, Ga source and NH3 into the reaction chamber, and set the V / III ratio to about 200, so as to grow an AlN underlayer with a thickness of 500nm on the surface of the nano-patterned silicon substrate.

[0091] S8: Increase the temperature of the reaction chamber to 1060℃ and reduce the V / III ratio to 90. Under high temperature and low V / III conditions, grow an AlGaN merging layer with a thickness of 2μm on the surface of the AlGaN substrate to obtain a high-quality AlGaN thin film (or AlGaN epitaxial layer) on the silicon substrate.

[0092] The total thickness of the AlGaN film obtained in Example 3 reached 2.5 μm. When the cross-section of the sample was observed by transmission electron microscopy (TEM), it was found that the AlN thick layer was completely merged at a thickness of 1.5 μm. Furthermore, the half-width at half-maximum (WHM) of the rocking curve of the AlGaN film (002) obtained by XRD scanning was less than 400 arcsc, and the half-width at half-maximum (WHM) of the AlGaN film (102) was less than 500 arcsc.

[0093] Example 4

[0094] The process of producing a high-quality AlGaN thin film based on a silicon substrate with an equilateral triangular nanopattern includes the following steps:

[0095] S1: Take a 4-inch silicon substrate, clean and dry it, and spin-coat a layer of nanoimprint adhesive on the surface of the silicon substrate.

[0096] S2: Using nanoimprint lithography, the equilateral triangle pattern on the nanoimprint template is transferred onto the nanoimprint adhesive. The side length of the equilateral triangle pattern is 2μm, and the spacing between adjacent equilateral triangle patterns is 2μm. The angle between each side of the equilateral triangle pattern and the Si<11-2> crystal orientation of the silicon substrate is 15°, and the angle between each side and the AlN<10-10> crystal orientation grown subsequently is 15°.

[0097] S3: The residual adhesive at the bottom layer of the nanoimprint adhesive recess area is etched by means of plasma etching (ICP) and other methods;

[0098] S4: The silicon substrate is etched using a dry etching process such as deep silicon etching to transfer the equilateral triangle pattern on the nanoimprint adhesive onto the silicon substrate. The etching depth is 20μm. After etching, the nanoimprint adhesive is removed to obtain a nano-patterned silicon substrate.

[0099] S5: Thoroughly clean the surface of the nano-patterned silicon substrate to remove residues and restore it to a state suitable for epitaxial growth;

[0100] S6: Place the nano-patterned silicon substrate into the reaction chamber of the MOCVD equipment, adjust the temperature in the reaction chamber to 1060℃, and perform surface heat treatment on the nano-patterned silicon substrate for 15 minutes to burn off the residue on the surface of the nano-patterned silicon substrate.

[0101] S7: Cool the temperature of the reaction chamber to 1050℃, and simultaneously introduce TMAl source, Ga source and NH3 into the reaction chamber, and set the V / III ratio to about 200, so as to grow an AlN bottom layer with a thickness of 200nm on the surface of the nano-patterned silicon substrate.

[0102] S8: Increase the temperature of the reaction chamber to 1060℃ and reduce the V / III ratio to 90. Under high temperature and low V / III conditions, grow an AlN merging layer with a thickness of 4μm on the surface of the AlGaN substrate to obtain a high-quality AlN film on the silicon substrate.

[0103] The total thickness of the AlN film obtained in Example 4 is 4.2 μm. When the cross-section of the sample is observed by transmission electron microscopy (TEM), it can be found that the AlN thick layer is completely merged at a thickness of 4 μm. Furthermore, the half-width at half-maximum (WHM) of the rocking curve of the AlGaN film (002) obtained by XRD scanning is less than 400 arcsc, and the half-width at half-maximum (WHM) of the AlGaN film (102) is less than 500 arcsc.

[0104] Comparative Example 1

[0105] The preparation method of an AlN thin film provided in Comparative Example 1 is basically the same as that in Example 1, except that:

[0106] In step S2, the angle between each edge of the rhombic pattern and the Si<11-2> crystal orientation and the subsequently grown AlN<10-10> crystal orientation is approximately 30°. The final AlN film with a thickness of 2 μm was observed on the epitaxial layer surface using an optical microscope. Figure 5 As shown, the AlN film surface is not merged and still exhibits an isolated pattern distribution. The AlN film obtained by X-ray diffraction (XRD) is scanned. The half-width of the rocking curve of the (002) surface of the AlN film is greater than 500arscec, and the half-width of the (102) surface is greater than 700arscec. This proves that when the edge length of the pattern is greater than 15° from the Si<11-2> crystal orientation of the silicon substrate, it will seriously affect the epitaxial merging process and lead to a deterioration in the quality of the epitaxial film.

[0107] Comparative Example 2

[0108] The preparation method of the AlN thin film provided in Comparative Example 2 is basically the same as that in Example 1, except that:

[0109] In step S2, the rhomboid pattern was changed to a circular pattern with a diameter of 2 μm and a spacing of 1 μm. The final AlN film with a thickness of 2 μm was observed under an optical microscope. The epitaxial layer showed that some areas of the surface had merged, while others still had voids, indicating incomplete merging. X-ray diffraction (XRD) scanned the obtained AlN film. The half-width at half-maximum (WHM) of the rocking curve on the (002) plane was greater than 400 arcs, and the half-width at half-maximum (WHM) of the (102) plane was greater than 600 arcs. The quality of the epitaxial film was significantly worse than in Example 1.

[0110] The inventors of this case discovered that although the methods in Comparative Example 1 and Comparative Example 2 can also achieve lateral epitaxy, the lateral growth rate is very slow due to the mismatch between the pattern design and the crystal orientation. Therefore, it is impossible to achieve complete merging to obtain a flat surface, resulting in a series of problems such as poor epitaxial film quality, voids, and cracks, which prevents industrialization and commercialization.

[0111] This invention provides a method for preparing high-quality semiconductor thin films. Micro-nano patterns are directly fabricated on a silicon substrate. The patterned silicon substrate is then restored to an Epi-ready state through cleaning, polishing, and heat treatment. A semiconductor bottom layer and a semiconductor merging layer are then grown in a single process. The entire process requires only one etching operation (etching the silicon substrate) and one epitaxial growth operation to achieve the growth of high-quality AlN thin films based on nano-patterned silicon substrates. Furthermore, no additional deposition or removal of hard masks is required (because the etching ratio of the silicon substrate is high, photoresist can be used directly as a mask). The overall process is greatly simplified, resulting in lower costs, higher yields, and greater suitability for large-scale production.

[0112] This invention provides a method for preparing a high-quality semiconductor thin film, wherein the semiconductor crystal is hexagonal. The inventors discovered that during the growth of the AlN merging layer, the lateral growth rates differ significantly depending on the crystal orientation. Growth along the AlN<11-20> direction is rapid and easy to merge, while growth along the AlN<10-10> direction is slow and difficult to merge. Therefore, this invention uses specific polygons (triangles, rhombuses, hexagons, etc.) instead of traditional circular or strip-shaped patterns, and limits each side to an angle of 60° or 120° with each other. Simultaneously, each side is substantially parallel to the Si<11-2> crystal orientation of the silicon substrate, and also substantially parallel to the AlN<10-10> crystal orientation. In this way, the AlN merging layer will grow laterally along the AlN<11-20> direction, achieving the maximum lateral merging rate. This accelerates the merging process and significantly improves the crystal orientation alignment during merging, thereby reducing the thickness of the merging layer and related stress, and lowering the dislocation density of new dislocations generated during merging, ultimately resulting in a higher-quality AlN epitaxial thin film.

[0113] The present invention proposes a method for preparing high-quality semiconductor thin films based on the growth of micro-nano patterned silicon substrates. This method can not only effectively reduce dislocation defect density and stress, but also has a simple preparation process, low cost, good merging effect, low defect density, and good material crystal quality, making it particularly suitable for large-scale industrial production.

[0114] It should be understood that the above embodiments are merely illustrative of the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A method for preparing a high-quality semiconductor material thin film, comprising: The first step includes micro- and nano-patterning the surface of a silicon substrate to obtain a patterned substrate; The second step includes growing a thin film of semiconductor material on the patterned substrate; The semiconductor material thin film is characterized in that it is formed from a hexagonal semiconductor material, and the first step includes: Multiple polygonal patterns are formed on the surface of a silicon substrate, and the angle between any side of the polygonal pattern and either the <11-2> crystal orientation of the silicon substrate or the <10-10> crystal orientation of the semiconductor material is within 15°.

2. The preparation method according to claim 1, characterized in that: Any side of the polygonal shape is parallel to the <11-2> crystal orientation of the silicon substrate or the <10-10> crystal orientation of the semiconductor material.

3. The preparation method according to claim 1, characterized in that: The polygonal shape includes any one of triangle, rhombus, hexagon, and dodecagon.

4. The preparation method according to claim 1, characterized in that: The side length of the polygonal shape is 50nm-2μm.

5. The preparation method according to claim 1, characterized in that: The spacing between two adjacent polygonal shapes is 200nm-3μm.

6. The preparation method according to claim 1, characterized in that: The multiple polygonal shapes are arranged in a periodic pattern.

7. The preparation method according to claim 1, characterized in that: The polygonal pattern includes recesses and / or protrusions formed on the surface of the silicon substrate, wherein the depth of the recesses or the height of the protrusions is 0.3-20 μm.

8. The preparation method according to claim 1, characterized in that, The first step specifically includes: A patterned mask is set on the surface of a silicon substrate; The pattern on the patterned mask is transferred to the surface of the silicon substrate using a dry or wet etching process, thereby completing the micro-nano patterning process on the surface of the silicon substrate.

9. The preparation method according to claim 1, characterized in that, The second step specifically includes: A first semiconductor layer is grown and formed under first temperature and first V / III ratio conditions, and A second semiconductor layer is grown under a second temperature and a second V / III ratio to obtain the semiconductor material thin film; Wherein, the first temperature is lower than the second temperature, and the first V / III ratio is greater than the second V / III ratio.

10. The preparation method according to claim 9, characterized in that: The first temperature is 600-1050℃, and the first V / III ratio is 100-100000.

11. The preparation method according to claim 9, characterized in that: The second temperature is 1050-1500℃, and the second V / III ratio is 1-100.

12. The preparation method according to claim 1, characterized in that: The semiconductor material includes any one of AlN, GaN, InN, AlGaN, and AlInGaN.

13. A semiconductor thin film, characterized in that: The semiconductor thin film is prepared by the preparation method according to any one of claims 1-12.

14. A semiconductor device, characterized in that... This includes semiconductor thin films prepared by the preparation method according to any one of claims 1-12.

15. The semiconductor device according to claim 14, characterized in that: The semiconductor device includes any one of optoelectronic devices, power electronic devices, power electronic devices, and filter communication devices.

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