Display panel, driving method thereof, and display device

Abstract

An embodiment of the present invention provides a display panel, a driving method thereof, and a display device, which relate to the display field and are used to provide accurate data support for realizing brightness compensation of the display panel. The display panel includes a first sub-pixel, and the first sub-pixel includes a first pixel circuit and a first light-emitting element. Among them, the first pixel circuit includes a display control module and a detection module, and the display control module and the detection module are respectively electrically connected to a first pole of the first light-emitting element; the working process of the first pixel circuit includes a detection stage, and in the detection stage, the detection module is turned on to detect the voltage of the first pole of the first light-emitting element.

Description

Technical Field

[0001] The present invention relates to the field of display technologies, and in particular, to a display panel, a driving method thereof, and a display device.

Background Art

[0002] In a light-emitting diode display panel, the device characteristics of its light-emitting elements are greatly affected by temperature changes. Especially when the display panel displays an image for a long time, a large amount of heat is dissipated by the light-emitting elements, resulting in a relatively high temperature. The device characteristics will deviate significantly, and further, the performance of the display panel in terms of brightness or color will show deviations.

Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a display panel, a driving method thereof, and a display device, so as to provide accurate data support for realizing brightness compensation of the display panel.

[0004] On the one hand, an embodiment of the present invention provides a display panel, including a first sub-pixel. The first sub-pixel includes a first pixel circuit and a first light-emitting element. Among them, the first pixel circuit includes a display control module and a detection module, and the display control module and the detection module are respectively electrically connected to a first pole of the first light-emitting element;

[0005] The working process of the first pixel circuit includes a detection stage. In the detection stage, the detection module is turned on to detect the voltage of the first pole of the first light-emitting element.

[0006] On the other hand, an embodiment of the present invention provides a driving method for a display panel, which is applied to the above-mentioned display panel, and includes:

[0007] Controlling the detection module to be turned on in the detection stage to detect the voltage of the first pole of the first light-emitting element;

[0008] Judging the current temperature of the first light-emitting element according to the detected voltage of the first pole of the first light-emitting element;

[0009] Compensating the data voltage of the first sub-pixel according to the current temperature.

[0010] On yet another hand, an embodiment of the present invention provides a display device, including:

[0011] The above-mentioned display panel;

[0012] A driving chip, configured to judge the current temperature of the first light-emitting element according to the detected voltage of the first pole of the first light-emitting element, and compensate the data voltage of the first sub-pixel according to the current temperature.

[0013] One of the above technical solutions has the following beneficial effects:

[0014] When a light-emitting diode emits light under the action of a driving current, its forward voltage drop, that is, the voltage difference between the first pole and the second pole, will change with the change of temperature. Based on the above characteristics of the light-emitting diode, in the embodiment of the present invention, a detection module capable of detecting the voltage of the first pole of the first light-emitting element is provided in the first pixel circuit to collect the voltage of the first pole of the first light-emitting element. Since the second pole of the first light-emitting element in the display panel receives the same negative power supply voltage, therefore, according to the collected voltage of the first pole of the first light-emitting element, the forward voltage drop of the first light-emitting element can be accurately known, and then according to the mapping relationship between the temperature and the forward voltage drop, the current temperature of the first light-emitting element can be found. Then, subsequently, the brightness of the first sub-pixel can be compensated according to the current temperature of the first light-emitting element, and the emission brightness of the first sub-pixel can be adjusted to the standard brightness.

[0015] In this way, the first light-emitting element integrates the heat / temperature sensing function, and only the voltage collected by the detection module in the first pixel circuit is required to provide accurate data support for subsequent brightness compensation of the first sub-pixel.

[0016] Compared with the prior art, the detection module in the embodiment of the present invention directly collects the voltage of the first pole of the first light-emitting element, and this voltage can directly and accurately reflect the current temperature of the first light-emitting element, so the accuracy of subsequent brightness compensation for the first sub-pixel can be effectively improved. Moreover, in the embodiment of the present invention, only one or several transistors need to be added in the first pixel circuit to form the detection module to realize temperature detection. The area occupied by the transistors is very small, and the influence on the light transmittance is also very small. Therefore, the embodiment of the present invention is also helpful to improve the pixel density of the display panel or optimize the structural design of the transparent display panel.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0018] Figure 1 It is a schematic structural diagram of a display panel in the related art;

[0019] Figure 2 For Figure 1 A corresponding equivalent circuit schematic diagram;

[0020] Figure 3 It is a schematic structural diagram of a display panel provided by an embodiment of the present invention;

[0021] Figure 4A schematic structural diagram of the first sub-pixel provided by an embodiment of the present invention;

[0022] Figure 5 A schematic diagram showing the change of the forward voltage drop of the light-emitting diode provided by an embodiment of the present invention with temperature;

[0023] Figure 6 A schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0024] Figure 7 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0025] Figure 8 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0026] Figure 9 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0027] Figure 10 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0028] Figure 11 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0029] Figure 12 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0030] Figure 13 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0031] Figure 14 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0032] Figure 15 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention; [[ID=4^6]]

[0033] Figure 16 Another schematic diagram of the working timing of the first pixel circuit provided by an embodiment of the present invention;

[0034] Figure 17 Another schematic structural diagram of the first sub-pixel provided by an embodiment of the present invention;

[0035] Figure 18 Another schematic structural diagram of the first sub-pixel provided by an embodiment of the present invention;

[0036] Figure 19Another timing diagram of the first pixel circuit provided by the embodiments of the present invention;

[0037] Figure 20 Another timing diagram of the first pixel circuit provided by the embodiments of the present invention;

[0038] Figure 21 Another timing diagram of the first pixel circuit provided by the embodiments of the present invention;

[0039] Figure 22 Another timing diagram of the first pixel circuit provided by the embodiments of the present invention;

[0040] Figure 23 Another timing diagram of the first pixel circuit provided by the embodiments of the present invention;

[0041] Figure 24 Another timing diagram of the first pixel circuit provided by the embodiments of the present invention;

[0042] Figure 25 Another timing diagram of the first pixel circuit provided by the embodiments of the present invention;

[0043] Figure 26 Another structural diagram of the display panel provided by the embodiments of the present invention;

[0044] Figure 27 A structural diagram of the second sub-pixel provided by the embodiments of the present invention;

[0045] Figure 28 Another structural diagram of the display panel provided by the embodiments of the present invention;

[0046] Figure 29 Another structural diagram of the first sub-pixel provided by the embodiments of the present invention;

[0047] Figure 30 Another timing diagram of the first pixel circuit provided by the embodiments of the present invention;

[0048] Figure 31 A flowchart of the driving method provided by the embodiments of the present invention;

[0049] Figure 32 Another flowchart of the driving method provided by the embodiments of the present invention;

[0050] Figure 33 Another flowchart of the driving method provided by the embodiments of the present invention;

[0051] Figure 34A schematic structural diagram of a display device provided by an embodiment of the present invention.

Detailed implementation manners

[0052] To better understand the technical solution of the present invention, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0053] It should be clear that the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0054] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms "a", "the" and "said" used in the embodiments of the present invention and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0055] It should be understood that the term " / and" used herein is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0056] As described in the background art, the device characteristics of the light-emitting elements in the light-emitting diode display panel are greatly affected by temperature changes, which will cause deviations in the display effect of the display panel.

[0057] In this regard, in the related art, it is necessary to detect the temperature of the light-emitting elements, and then perform corresponding brightness compensation on the display panel according to the temperature change of the light-emitting elements. However, the inventors have found that the current method of detecting the temperature of the light-emitting elements is not only complex in structure, but also poor in detection accuracy.

[0058] For example, as Figure 1 shown, Figure 1 A schematic structural diagram of a display panel in the related art. The display panel includes a detection metal trace 101, and the detection metal trace 101 surrounds each light-emitting element 102 in the display area. One end of the detection metal trace 101 receives a voltage V a , and the other end is connected in series with a fixed resistor R0. One end of the fixed resistor R o receives a voltage V b .

[0059] In the above structure, as Figure 2 shown, Figure 2 is Figure 1A corresponding equivalent circuit schematic diagram. The detection metal trace 101 can be regarded as a structure in which n trace segments are connected in series, and the resistances of the n trace segments are represented by R1, R2, …, R n respectively. Since the resistance value of the trace changes with temperature, therefore, by measuring the node voltage V k corresponding to the k-th trace segment, where k = 1, 2, …, n, according to the formula the resistance value R k of the k-th trace segment can be obtained, and then the temperature change of the light-emitting element 102 surrounded by the k-th trace segment can be deduced according to the change of the resistance value of the k-th trace segment.

[0060] However, when using the above detection method, a very long detection metal trace 101 needs to be additionally provided in the display panel, and the detection metal trace 101 also needs to surround each light-emitting element 102, which not only has a complex structure but also a high cost. Moreover, when the detection metal trace 101 surrounds the light-emitting element 102, there is a certain distance between the detection metal trace 101 and the light-emitting element 102. Therefore, the change in the resistance value of the trace segment in the detection metal trace 101 cannot truly and accurately reflect the heat condition of the light-emitting element 102 it surrounds, resulting in poor detection accuracy.

[0061] In addition, the detection metal trace 101 also occupies a large area in the display area, which is not only not conducive to further improving the pixel density, but also affects the light transmittance of the display panel and is not conducive to the structural design of the transparent display panel.

[0062] In view of this, an embodiment of the present invention provides a display panel, which can accurately judge the temperature change of the light-emitting element without setting a complex detection structure, and thus can effectively improve the brightness compensation effect of the display panel.

[0063] As Figure 3 and Figure 4 shown, Figure 3 is a schematic structural diagram of a display panel provided by an embodiment of the present invention, Figure 4 is a schematic structural diagram of a first sub-pixel 1 provided by an embodiment of the present invention. The display panel includes a first sub-pixel 1, and the first sub-pixel 1 includes a first pixel circuit 2 and a first light-emitting element 3. Among them, the first pixel circuit 2 includes a display control module 4 and a detection module 5, and the display control module 4 and the detection module 5 are respectively electrically connected to the first pole of the first light-emitting element 3; the first light-emitting element 3 can be a light-emitting diode, specifically a sub-millimeter light-emitting diode (Mini Light Emitting Diode, Mini-LED) or a micro light-emitting diode (Micro Light Emitting Diode, Micro-LED), and the first pole of the first light-emitting element 3 is the positive electrode of the first light-emitting element 3.

[0064] Among them, the operation process of the first pixel circuit 2 includes a detection stage. In the detection stage, the detection module 5 is turned on to detect the voltage of the first pole of the first light-emitting element 3.

[0065] During the research process, the inventors found that when a light-emitting diode emits light under the action of a driving current, its forward voltage drop, that is, the voltage difference between the first pole and the second pole, will change with the change of temperature. Combining Table 1 and Figure 5 it can be seen that Figure 5 FIG. 9 is a schematic diagram showing the change of the forward voltage drop of the light-emitting diode provided by the embodiment of the present invention with temperature. As the temperature increases, the forward voltage drop of the light-emitting diode shows a downward trend.

[0066] Table 1

[0067]

[0068] Based on the above characteristics of the light-emitting diode, a detection module 5 capable of detecting the voltage of the first pole of the first light-emitting element 3 is provided in the first pixel circuit 2 of the embodiment of the present invention to realize the acquisition of the voltage of the first pole of the first light-emitting element 3. Since the second pole of the first light-emitting element 3 in the display panel receives the same negative power supply voltage, therefore, according to the acquired voltage of the first pole of the first light-emitting element 3, the forward voltage drop of the first light-emitting element 3 can be accurately known, and then the current temperature of the first light-emitting element 3 can be found according to the mapping relationship between the temperature and the forward voltage drop. Then, subsequently, the brightness of the first sub-pixel 1 can be compensated according to the current temperature of the first light-emitting element 3, and the emission brightness of the first sub-pixel 1 can be adjusted to the standard brightness.

[0069] In this way, the first light-emitting element 3 integrates a heat / temperature sensing function, and only the voltage collected by the detection module 5 in the first pixel circuit 2 is required to provide accurate data support for subsequent brightness compensation of the first sub-pixel 1.

[0070] Moreover, compared with the prior art, the detection module 5 in the embodiment of the present invention directly collects the voltage of the first pole of the first light-emitting element 3, and this voltage can directly and accurately reflect the current temperature of the first light-emitting element 3, which can effectively improve the accuracy of subsequent brightness compensation for the first sub-pixel 1. In addition, only one or several transistors need to be added to the first pixel circuit 2 in the embodiment of the present invention to form the detection module 5 to realize temperature detection. The area occupied by the transistors is very small, and the influence on the light transmittance is also very small. Therefore, compared with the prior art, the embodiment of the present invention also helps to improve the pixel density of the display panel or optimize the structural design of the transparent display panel.

[0071] In a feasible implementation manner, as Figure 6 shownFigure 6 It is a schematic diagram of the working timing of the first pixel circuit 2 provided by an embodiment of the present invention. During the time F of one frame of the display panel, the working process of the first pixel circuit 2 includes a pre-stage T1 and a light-emitting stage T2. In at least one frame, the light-emitting stage T2 includes a detection stage T3. During the detection stage T3, the display control module 4 provides a driving current for the first light-emitting element 3, and the detection module 5 is turned on to detect the voltage of the first pole of the first light-emitting element 3.

[0072] In the above setting method, during the detection stage T3, the driving current required by the first light-emitting element 3 is provided by the display control module 4, and the detection module 5 is only used to collect the voltage of the first pole of the first light-emitting element 3. In this way, the functions of the display control module 4 and the detection module 5 are independent of each other, and the detection module 5 only collects voltage, so it is simpler to design the detection module 5.

[0073] It should be noted that during different detection stages T3, the display control module 4 can provide the same driving current for the first light-emitting element 3, so that the voltages collected by the detection module 5 are all the voltages on the first pole when the first light-emitting element 3 receives the same driving current. In this case, only the temperature-forward voltage drop mapping relationship corresponding to this driving current needs to be pre-stored in the driving chip, and there is no need to store the corresponding temperature-forward voltage drop mapping relationship for each driving current, resulting in a smaller amount of stored data.

[0074] In addition, it should also be noted that when the first light-emitting element 3 receives the same driving current during different detection stages T3, if the display panel displays a static image and the driving current corresponding to this static image is equal to the driving current required for detection, then the light-emitting stage T2 of each frame can include the detection stage T3. However, if the driving current corresponding to the image to be displayed on the display panel is different from the driving current required for detection, for example, when the display panel needs to display a dynamic image, then only the light-emitting stage T2 of some frames can include the detection stage T3, and the light-emitting stage T2 of the remaining frames does not include the detection stage T3, which is equivalent to interspersing detection images between display images, thus ensuring normal display and realizing the detection function.

[0075] Further, referring to Figure 6 , the duration of the detection stage T3 can also be set to be equal to the duration of the light-emitting stage T2. In this way, during the entire time when the first light-emitting element 3 receives the driving current, the detection module 5 will continuously collect the voltage of the first pole of the first light-emitting element 3. The collection time is longer, so the collected voltage is more accurate.

[0076] Of course, in other optional embodiments of the present invention, as Figure 7 shown, Figure 7Another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. The duration of the detection stage T3 can also be less than the duration of the light-emitting stage T2.

[0077] As mentioned above, during the detection stage T3, the drive current required by the first light-emitting element 3 is provided by the display control module 4. Hereinafter, taking the structure of the display control module 4 shown in Figure 4 as an example, the working principle of the display control module 4 providing the drive current to the first light-emitting element 3 will be described:

[0078] Refer to Figure 4 , the display control module 4 may specifically include a driving unit 6, a gate reset unit 7, a charging unit 8, an anode reset unit 9, a light-emitting control unit 10, and a storage capacitor Cst.

[0079] Among them, the driving unit 6 may include a driving transistor M0.

[0080] The gate reset unit 7 may include a gate reset transistor M1. The gate of the gate reset transistor M1 is electrically connected to the first scan signal line Scan1. The first pole of the gate reset transistor M1 is electrically connected to the reset signal line Vref. The second pole of the gate reset transistor M1 is electrically connected to the gate of the driving transistor M0.

[0081] The charging unit 8 may include a data writing transistor M2 and a compensation transistor M3. Among them, the gates of the data writing transistor M2 and the compensation transistor M3 are respectively electrically connected to the second scan signal line Scan2. The first pole of the data writing transistor M2 is electrically connected to the data line Data. The second pole of the data writing transistor M2 is electrically connected to the first pole of the driving transistor M0. The first pole of the compensation transistor M3 is electrically connected to the second pole of the driving transistor M0. The second pole of the compensation transistor M3 is electrically connected to the gate of the driving transistor M0.

[0082] The anode reset unit 9 may include an anode reset transistor M4. The gate of the anode reset transistor M4 is electrically connected to the second scan signal line Scan2. The first pole of the anode reset transistor M4 is electrically connected to the reset signal line Vref. The second pole of the anode reset transistor M4 is electrically connected to the first pole of the first light-emitting element 3.

[0083] The light-emitting control unit 10 may include a first light-emitting control transistor M5 and a second light-emitting control transistor M6. Among them, the gates of the first light-emitting control transistor M5 and the second light-emitting control transistor M6 are respectively electrically connected to the light-emitting control signal line Emit. The first pole of the first light-emitting control transistor M5 is electrically connected to the power supply signal line PVDD. The second pole of the first light-emitting control transistor M5 is electrically connected to the first pole of the driving transistor M0. The first pole of the second light-emitting control transistor M6 is electrically connected to the second pole of the driving transistor M0. The second pole of the second light-emitting control transistor M6 is electrically connected to the first pole of the first light-emitting element 3.

[0084] One plate of the storage capacitor Cst is electrically connected to the power supply signal line PVDD, and the other plate is electrically connected to the gate of the driving transistor M0.

[0085] Based on the above structure, combined with Figure 6 , the pre-stage T1 may include a reset stage t11 and a data writing stage t12.

[0086] In the reset stage t11, the first scan signal line Scan1 provides an enabling level to control the gate reset unit 7 to turn on. The gate reset unit 7 resets the gate of the driving transistor M0. Specifically, the gate reset transistor M1 is turned on under the action of the enabling level provided by the first scan signal line Scan1, and writes the reset voltage provided by the reset signal line Vref into the gate of the driving transistor M0.

[0087] In the data writing stage t12, the second scan signal line Scan2 provides an enabling level to control the charging unit 8 and the anode reset unit 9 to turn on. The charging unit 8 charges the gate of the driving transistor M0, and the anode reset unit 9 resets the anode of the first light-emitting element 3. Specifically, the data writing transistor M2 and the compensation transistor M3 are turned on under the action of the enabling level provided by the second scan signal line Scan2, and write the data voltage provided by the data line into the gate of the driving transistor M0 and perform threshold compensation on the driving transistor M0; the anode reset transistor M4 is turned on under the action of the enabling level provided by the second scan signal line Scan2, and writes the reset voltage provided by the reset signal line Vref into the anode of the first light-emitting element 3.

[0088] In the light-emitting stage T2, the light-emitting control signal line Emit provides an enabling level to control the light-emitting control unit 10 to turn on. The light-emitting control unit 10 writes the driving current converted by the driving unit 6 into the first pole of the first light-emitting element 3 to drive the first light-emitting element 3 to emit light. Specifically, the first light-emitting control transistor M5 and the second light-emitting control transistor M6 are turned on under the action of the enabling level provided by the light-emitting control signal line Emit, and write the driving current converted by the driving transistor M0 into the first pole of the first light-emitting element 3.

[0089] During the detection stage T3 within the light-emitting stage T2, when the first pole of the first light-emitting element 3 receives a driving current, the detection module 5 is turned on to collect the voltage of the first pole of the first light-emitting element 3.

[0090] Among them, when each transistor in the first pixel circuit 2 is a P-type transistor, the enable level provided by the above-mentioned signal lines is a low level, and when each transistor in the first pixel circuit 2 is an N-type transistor, the above-mentioned signal lines provide a high level. The embodiments of the present invention are schematically illustrated by taking each transistor in the first pixel circuit 2 as a P-type transistor and the enable level as a low level as an example.

[0091] In a feasible implementation manner, referring to Figures 8 - 10 , within the frame time F of the display panel, the working process of the first pixel circuit 2 includes a pre-stage T1 and a light-emitting stage T2. In at least one frame of the picture, the pre-stage T1 includes a detection stage T3. During the detection stage T3, the detection module 5 is turned on to provide a driving current for the first light-emitting element 3 and detect the voltage of the first pole of the first light-emitting element 3.

[0092] In this manner, the driving current required by the first light-emitting element 3 in the detection stage T3 is provided by the detection module 5. In a feasible setting manner, one end of the detection module 5 is connected to the first pole of the first light-emitting element 3, and the other end is connected to both the port in the driving chip for providing the driving current and another port in the driving chip for receiving the detection voltage. During the detection stage T3, the detection module 5 is turned on, and the driving chip applies a driving current to the detection module 5. This driving current is transmitted to the first light-emitting element 3 via the detection module 5. At the same time, the detection module 5 also collects the voltage of the first pole of the first light-emitting element 3.

[0093] In the above manner, the detection is performed in the pre-stage T1, so the detection process can not affect the normal display. For example, as mentioned before, in different detection stages T3, the first light-emitting element 3 can receive the same driving current. By adopting the above manner, whether the display panel displays a static picture or a dynamic picture, the driving current required for display can be provided to the first light-emitting element 3 in the light-emitting stage T2 of each frame of the picture to enable normal display, and only the driving current required for detection needs to be provided to the first light-emitting element 3 by using the detection module 5 in the pre-stage T1 of some frames of the picture or each frame of the picture.

[0094] In a feasible implementation manner, the display control module 4 includes a gate reset unit 7, a charging unit 8, and a driving unit 6. The driving unit 6 includes a driving transistor M0. The pre-stage T1 further includes a reset stage t11 and a data writing stage t12 located after the reset stage t11. In the reset stage t11, the gate reset unit 7 is turned on to reset the gate of the driving transistor M0. In the data writing stage t12, the charging unit 8 is turned on to write a data voltage to the gate of the driving transistor M0.

[0095] Wherein, the specific structures of the gate reset unit 7 and the charging unit 8 and the working principles of the display control module 4 in the reset stage t11 and the data writing stage t12 have been described in the above embodiments, and will not be elaborated here.

[0096] In a feasible implementation manner, referring to Figures 8 - 10 , the detection stage T3 does not overlap with the reset stage t11 and the data writing stage t12.

[0097] In a setting manner, referring to Figure 4 , the detection module 5 includes a detection transistor Mt. The gate of the detection transistor Mt is electrically connected to the control signal line St. The first pole of the detection transistor Mt is electrically connected to the detection signal line Vt. The second pole of the detection transistor Mt is electrically connected to the first pole of the first light-emitting element 3. Taking each transistor as a P-type transistor as an example, the fact that the detection stage T3 does not overlap with the reset stage t11 and the data writing stage t12 specifically means that the low level provided by the control signal line St does not overlap with the low levels provided by the first scan signal line Scan1 and the second scan signal line Scan2.

[0098] In this setting manner, the detection stage T3, the reset stage t11, and the data writing stage t12 are independent of each other, and the working processes of the detection module 5 and the display control module 4 are staggered from each other. For example, the detection stage T3 can be located before the reset stage t11, or after the data writing stage t12, or can also be located between the reset stage t11 and the data writing stage t12.

[0099] Further, as Figure 8 shown, Figure 8 is another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. The detection stage T3 is located before the reset stage t11. When the detection stage T3 ends, the gate reset unit 7 is turned on to enter the reset stage t11.

[0100] Taking each transistor as a P-type transistor as an example, when the detection stage T3 ends, the gate reset unit 7 is turned on to enter the reset stage t11, which specifically means that when the control signal provided by the control signal line St changes from low to high, the first scan signal provided by the first scan signal line Scan1 changes from high to low, controlling the gate reset transistor M1 to conduct, and entering the reset stage t11.

[0101] Or, as Figure 9 shown, Figure 9 FIG. is another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. The detection stage T3 is located between the reset stage t11 and the data writing stage t12. When the reset stage t11 ends, the detection module 5 is turned on to enter the detection stage T3. When the detection stage T3 ends, the charging unit 8 is turned on to enter the data writing stage t12.

[0102] Still taking each transistor as a P-type transistor as an example, when the reset stage t11 ends, the detection module 5 is turned on to enter the detection stage T3. When the detection stage T3 ends, the charging unit 8 is turned on to enter the data writing stage t12, which specifically means that when the first scan signal provided by the first scan signal line Scan1 changes from low to high, the control signal provided by the control signal line St changes from high to low, controlling the detection transistor Mt to conduct, and entering the detection stage T3. When the subsequent control signal changes from low to high, the second scan signal provided by the second scan signal line Scan2 changes from high to low, and the data writing transistor M2 and the compensation transistor M3 conduct, entering the data writing stage t12.

[0103] Or again, as Figure 10 shown, Figure 10 FIG. is another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. The detection stage T3 is located after the data writing stage t12. When the data writing stage t12 ends, the detection module 5 is turned on to enter the detection stage T3.

[0104] Still taking each transistor as a P-type transistor as an example, when the data writing stage t12 ends, the detection module 5 is turned on to enter the detection stage T3, which specifically means that when the second scan signal provided by the second scan signal line Scan2 changes from low to high, the control signal provided by the control signal line St changes from high to low, controlling the detection transistor Mt to conduct, and entering the detection stage T3.

[0105] By adopting the above method, there is no interval between the detection stage T3 and the adjacent reset stage t11 and / or data writing stage t12, which can shorten the overall duration of the pre-stage, increase the time ratio of the light emitting stage T2, help to improve the light emitting brightness of the first light emitting element 3, and help to achieve high-frequency display.

[0106] Of course, in other optional embodiments of the present invention, such as Figures 11 - 13As shown Figure 11 This is another schematic diagram of the working timing of the first pixel circuit 2 provided by the embodiment of the present invention Figure 12 This is another schematic diagram of the working timing of the first pixel circuit 2 provided by the embodiment of the present invention Figure 13 This is another schematic diagram of the working timing of the first pixel circuit 2 provided by the embodiment of the present invention. There may also be a second interval stage t13 between the detection stage T3 and the adjacent reset stage t11 and / or data writing stage t12. During the second interval stage t13, the first scan signal line Scan1, the second scan signal line Scan2, and the control signal line St all provide a non-enabling level (high level).

[0107] Furthermore, since the second interval stage t13 only serves as a transition stage and has no actual function, the duration of the second interval stage t13 can be set to be less than the durations of the reset stage t11, the data writing stage t12, and the detection stage T3. One is to shorten the overall duration of the pre-stage T1, and the other is to allocate more time to the detection period T3 under the same duration of the pre-stage T1

[0108] In a feasible setting method, refer to Figures 14 - 16 , at least part of the time period of the detection stage T3 overlaps with the time period of the reset stage t11, and / or at least part of the time period of the detection stage T3 overlaps with the time period of the data writing stage t12

[0109] For example, as Figure 14 shown Figure 14 This is another schematic diagram of the working timing of the first pixel circuit 2 provided by the embodiment of the present invention. At least part of the time period of the detection stage T3 overlaps with the time period of the reset stage t11, and the detection stage T3 does not overlap with the data writing stage t12. That is, the enabling level (low level) provided by the control signal line St overlaps with the enabling level (low level) provided by the first scan signal line Scan1 and does not overlap with the enabling level (low level) provided by the second scan signal line Scan2

[0110] Or, as Figure 15 shown Figure 15 This is another schematic diagram of the working timing of the first pixel circuit 2 provided by the embodiment of the present invention. At least part of the time period of the detection stage T3 overlaps with the time period of the data writing stage t12, and the detection stage T3 does not overlap with the reset stage t11. That is, the enabling level (low level) provided by the control signal line St overlaps with the enabling level (low level) provided by the second scan signal line Scan2 and does not overlap with the enabling level (low level) provided by the first scan signal line Scan1

[0111] Or, as Figure 16 shown Figure 16Another timing diagram of the operation of the first pixel circuit 2 provided by the embodiment of the present invention. The time period of the detection stage T3 overlaps at least partially with the time period of the reset stage t11 and also overlaps at least partially with the time period of the data writing stage t12. That is, the enabling level (low level) provided by the control signal line St overlaps with the enabling levels (low levels) provided by the first scan signal line Scan1 and the second scan signal line Scan2.

[0112] In the above setting method, the detection stage T3 can overlap with the reset stage t11 and / or the data writing stage t12. At this time, the pre-stage T1 does not need to be lengthened additionally to cover the detection stage T3. Therefore, the overall duration of the pre-stage T2 can be shortened, and the time ratio of the light emitting stage T2 can be increased. First, it helps to improve the light emitting brightness of the first light emitting element 3. Second, it helps to achieve high-frequency display.

[0113] Furthermore, in combination with Figure 14 and Figure 17 , Figure 17 Another structural diagram of the first sub-pixel 1 provided by the embodiment of the present invention. The detection module 5 is electrically connected to the control signal line St, and the detection module 5 is turned on in response to the control signal provided by the control signal line St. The gate reset unit 7 is electrically connected to the first scan signal line Scan1, and the gate reset unit 7 is turned on in response to the first scan signal provided by the first scan signal line Scan1.

[0114] Among them, the detection stage T3 overlaps with the reset stage t11, and the control signal line St and the first scan signal line Scan1 are multiplexed. Such a setting can save the number of signal lines provided in the display panel. Therefore, more space can be released to set more sub-pixels, further improving the pixel density of the display panel, or more light-transmitting area can be released to increase the transmittance of the display panel.

[0115] Or, in combination with Figure 15 and Figure 18 , Figure 18 Another structural diagram of the first sub-pixel 1 provided by the embodiment of the present invention. The detection module 5 is electrically connected to the control signal line St, and the detection module 5 is turned on in response to the control signal provided by the control signal line St. The charging unit 8 is electrically connected to the second scan signal line Scan2, and the charging unit 8 is turned on in response to the second scan signal provided by the second scan signal line Scan2.

[0116] Among them, the detection stage T3 overlaps with the data writing stage t12, and the control signal line St and the second scan signal line Scan2 are multiplexed. Such a setting can also save the number of signal lines provided in the display panel to further improve the pixel density of the display panel or further increase the transmittance of the display panel.

[0117] In a feasible implementation, as Figure 19 shown, Figure 19 This is another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. After entering the detection stage T3, the gate reset unit 7 is turned on to enter the reset stage t11. Before the detection stage T3 ends, the charging unit 8 is turned on to enter the data writing stage t12.

[0118] Taking each transistor as a P-type transistor as an example, after entering the detection stage T3, the gate reset unit 7 is turned on to enter the reset stage t11. Before the detection stage T3 ends, the charging unit 8 is turned on to enter the data writing stage t12, which specifically means that after the control signal provided by the control signal line St jumps from high to low, the first scan signal provided by the first scan signal line Scan1 starts to jump from high to low, controlling the gate reset transistor M1 to conduct, entering the reset stage t11. After the first scan signal jumps from low to high, the second scan signal provided by the second scan signal line Scan2 jumps from high to low, and the data writing transistor M2 and the compensation transistor M3 conduct, entering the data writing stage t12. Finally, after the second scan signal jumps from low to high, the detection signal starts to jump from low to high, and the detection stage T3 ends.

[0119] In the above setting method, the detection stage T3 covers the reset stage t11 and the data writing stage t12. The duration of the detection stage T3 is longer, and the acquisition time of the detection module 5 is longer, which can make the collected voltage data more accurate.

[0120] In a feasible implementation, refer to Figures 8 - 13 、 Figure 16 and Figure 19 It is possible to set the duration of the detection stage T3 to be greater than the duration of the reset stage t11 and greater than the duration of the data writing stage t12, so that the detection module 5 has sufficient acquisition time and improves the accuracy of the collected voltage data.

[0121] In a feasible implementation, as Figure 20 shown, Figure 20 This is another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. The detection stage T3 includes at least two sub-stages T31, and there is a first interval stage T32 between adjacent sub-stages T31. In the sub-stage T31, the detection module 5 is turned on to provide a driving current for the first light-emitting element 3 and detect the voltage of the first pole of the first light-emitting element 3.

[0122] In this method, the detection stage T3 can be divided into multiple sub-stages T31. During the entire detection stage T3, the voltage of the first pole of the first light-emitting element 3 is collected multiple times. Then, it is determined whether the voltage changes according to the results of the multiple collections. If the results of the multiple collections are the same, it indicates that the current temperature of the first light-emitting element 3 is relatively stable. Subsequently, the current temperature of the first light-emitting element 3 can be directly obtained according to the same voltage. If the results of the multiple collections are different, it indicates that the current temperature of the first light-emitting element 3 is changing in real time. At this time, the current temperature of the first light-emitting element 3 can be obtained according to the voltage collected in the last sub-stage T31, so that the obtained temperature is closer to the temperature when compensating the first sub-pixel 1.

[0123] Furthermore, referring to Figure 20 , since the first interval stage T32 only serves as a transition stage and has no actual function, the duration of the first interval stage T32 can be set to be less than the duration of the sub-stage T31. On the one hand, more duration can be allocated to the sub-stage T31 to increase the acquisition time of the detection module 5. On the other hand, it can also prevent the overall time of the detection stage T3 from being too long, thereby preventing the pre-stage T1 from being additionally elongated to cover the detection stage T3.

[0124] In addition, it should be noted that in the embodiments of the present invention, the durations of different sub-stages T31 can be the same to improve the uniformity of the acquisition time of the detection module 5 under different sub-stages T31.

[0125] In a feasible implementation manner, in combination with Figure 4 and Figure 21 , Figure 21 is another working timing diagram of the first pixel circuit 2 provided by the embodiments of the present invention. The display control module 4 includes a charging unit 8 and a driving unit 6, and the driving unit 6 includes a driving transistor M0.

[0126] One data refresh cycle T_D of the display panel includes the time of S frames of pictures, S > 1. The data refresh cycle T_D includes a writing frame F1 and a holding frame F2. Among them, the writing frame F1 includes a data writing stage t12, and the holding frame F2 does not include the data writing stage t12. During the data writing stage t12, the charging unit 8 is turned on to write a data voltage to the gate of the driving transistor M0.

[0127] Among them, at least part of the writing frame F1 includes the detection stage T3. X

[0128] When the display panel is driven at a low frequency, in order to reduce the flicker phenomenon, a writing frame F1 and a holding frame F2 can be divided in a data refresh period T_D of the display panel. Among them, the writing frame F1 includes a data writing stage t12, and a data refresh operation is performed on the display panel. The holding frame F2 uses the data written in the writing frame F1 and does not write data again. In this driving method, the detection stage T3 can be set in at least part of the writing frame F1. At this time, the control signal line St can be designed more diversely. For example, in one design, the control signal line St is not multiplexed with the second scan signal line Scan2, and the detection stage T3 and the data writing stage t12 of the writing frame F1 can partially overlap or not overlap. Or, in another design, the control signal line St can be multiplexed with the second scan signal line Scan2. At this time, the detection stage T3 overlaps with the data writing stage t12 of the writing frame F1.

[0129] Further, as Figure 22 shown, Figure 22 is another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. At least one holding frame F2 includes a detection stage T3.

[0130] When the holding frame F2 also includes the detection stage T3, the frequency of the voltage collected by the detection module 5 can be flexibly adjusted. For example, the frequency of the voltage collected by the detection module 5 can be set to be greater than the data refresh frequency. Exemplarily, referring to Figure 22 , when a data refresh period T_D includes a writing frame F1 and three holding frames F2, assuming that the writing frame F1 of each data refresh period T_D includes a detection stage T3, and one holding frame F2 in each data refresh period T_D also includes a detection stage T3, at this time, the frequency of the voltage collected by the detection module 5 can be set to twice the data refresh frequency. This method is especially suitable for low-frequency driving with a low data refresh frequency. By increasing the detection frequency, the temperature change of the first light-emitting element 3 can be monitored in real time, and then more accurate brightness compensation can be performed on the first sub-pixel 1.

[0131] In a feasible implementation manner, as Figure 23 shown, Figure 23 is another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. The display panel has a first mode FM and a second mode SM. The first mode FM includes a first data refresh frequency, and the second mode SM includes a second data refresh frequency. The first data refresh frequency is less than or equal to the second data refresh frequency.

[0132] Among them, the frequency of the detection module 5 detecting the voltage of the first pole of the first light-emitting element 3 is greater than or equal to the first data refresh frequency and less than or equal to the second data refresh frequency.

[0133] It should be noted that the above-mentioned first mode FM can be understood as a low-frequency driving mode, and the second mode SM can be understood as a high-frequency driving mode. Among them, the second data refresh frequency in the second mode SM can be the maximum value of the data refresh frequency of the display panel, that is, it can be understood as the base frequency of the display panel. Exemplarily, the first data refresh frequency is 30 Hz, the second data refresh frequency is 240 Hz, and the frequency for the detection module 5 to detect the voltage of the first pole of the first light-emitting element 3 can be 30 Hz, 60 Hz, 120 Hz, 240 Hz, etc.

[0134] By setting the detection frequency to be greater than or equal to the first data refresh frequency and less than or equal to the second data refresh frequency, it is possible to avoid too low a detection frequency, and thus realize real-time acquisition of the voltage of the first pole of the first light-emitting element 3, and make a real-time judgment on the current temperature of the first light-emitting element 3, so as to accurately know the temperature change situation of the first light-emitting element 3.

[0135] In a feasible implementation manner, as Figure 24 shown, Figure 24 FIG. is another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. The display panel has a first mode FM and a second mode SM. The first mode FM includes a first data refresh frequency, and the second mode SM includes a second data refresh frequency. The first data refresh frequency is less than or equal to the second data refresh frequency.

[0136] Among them, the duration of the detection stage T3 in the first mode FM is greater than the duration of the detection stage T3 in the second mode SM.

[0137] When the first data refresh frequency is less than the second data refresh frequency, in a setting manner, referring to Figure 24 , the time of one frame of the picture in the first mode FM is longer, so the time of both the pre-stage T1 and the light-emitting stage T2 is relatively long. At this time, whether the detection stage T3 is included in the pre-stage T1 or the light-emitting stage T2, the duration of the detection stage T3 can be increased accordingly, thereby improving the detection accuracy in the first mode FM.

[0138] In a feasible implementation manner, as Figure 25 shown, Figure 25 FIG. is another working timing diagram of the first pixel circuit 2 provided by the embodiment of the present invention. The display panel has a third mode TM, and the third mode TM includes a third data refresh frequency. Among them, the frequency for the detection module 5 to detect the voltage of the first pole of the first light-emitting element 3 is less than or equal to the third data refresh frequency. At this time, the power consumption can be saved by reducing the detection frequency, and this method is more suitable for high-frequency driving.

[0139] It should be noted that the third mode TM can be the same as the above-mentioned first mode FM or third mode TM.

[0140] In a feasible implementation manner, referring to Figure 4 , the detection module 5 includes a detection transistor Mt. The gate of the detection transistor Mt is electrically connected to the control signal line St. The first pole of the detection transistor Mt is electrically connected to the first pole of the first light-emitting element 3. The second pole of the detection transistor Mt is electrically connected to the detection signal line Vt.

[0141] In the detection stage T3, the detection transistor Mt is turned on under the action of the enable level provided by the control signal line St, and the voltage of the first pole of the first light-emitting element 3 is transmitted to the detection signal line Vt for the subsequent driving chip to use the collected voltage to judge the current temperature of the first light-emitting element 3.

[0142] Furthermore, referring to Figure 4 , the display control module 4 includes a driving unit 6. The driving unit 6 includes a driving transistor M0. The channel width-to-length ratio of the detection transistor Mt is smaller than that of the driving transistor M0 to reduce the leakage current of the detection transistor Mt, so that the small signal collected by it is not distorted, which helps to improve the detection accuracy.

[0143] In a feasible implementation manner, as Figure 26 and Figure 27 shown, Figure 26 is another structural schematic diagram of the display panel provided by the embodiment of the present invention. Figure 27 is a structural schematic diagram of a second sub-pixel 11 provided by the embodiment of the present invention. The display panel further includes a second sub-pixel 11. The second sub-pixel 11 includes a second pixel circuit 12 and a second light-emitting element 13. Among them, the second pixel circuit 12 includes a display control module 4. The display control module 4 has the same structure as the display control module 4 in the above-mentioned first pixel circuit 2, and will not be elaborated here.

[0144] In this setting manner, only some sub-pixels in the display panel are the first sub-pixels 1 for temperature detection. Therefore, the number of detection modules 5 required to be set in the display panel can be reduced, and the pixel density or the transmittance of the display panel can be further improved.

[0145] When the display panel includes both the first sub-pixel 1 and the second sub-pixel 11 at the same time, as Figure 28 shown, Figure 28Another structural schematic diagram of the display panel provided by the embodiment of the present invention. The display panel includes a display area 14, the display area 14 includes a plurality of partitions 15, and each partition 15 includes a first sub-pixel 1 and a second sub-pixel 11. When judging the current temperature of the first light-emitting element 3 according to the voltage of the first pole of the first light-emitting element 3 detected by the detection module 5, the embodiment of the present invention can also perform brightness compensation on the second sub-pixel 11 in the partition 15 according to the current temperature of the first light-emitting element 3 in the partition 15, and the specific principle will be described in detail in the following content.

[0146] Of course, in other alternative embodiments of the embodiment of the present invention, referring to Figure 3 , the display panel may also only include the first sub-pixel 1. At this time, the voltage of the first pole of the light-emitting element in each sub-pixel in the display panel can be detected, and then the current temperature of each light-emitting element can be judged respectively, and targeted compensation can be performed on each sub-pixel. In this structure, the compensation accuracy for the sub-pixels is higher.

[0147] In addition, it should be noted that the display driving unit 6 in the embodiment of the present invention is not limited to Figure 4 the circuit structure shown, and can also be other circuit structures capable of driving the light-emitting element to emit light. For example, the display driving unit 6 can also be Figure 29 the "PAM+PWM" type circuit structure shown.

[0148] As Figure 29 and Figure 30 shown, Figure 29 Another structural schematic diagram of the first sub-pixel 1 provided by the embodiment of the present invention, Figure 30 Another working timing schematic diagram of the first pixel circuit 2 provided by the embodiment of the present invention. The display control module 4 includes an amplitude setting unit 16, a driving unit 17, a switching unit 18, a first data signal writing unit 19, a second data signal writing unit 20, a pulse width control writing unit 21, a turn-off voltage writing unit 22, a turn-off voltage transmission control unit 23, a reset unit 24, a light emission control unit 25, a first capacitor C1 and a second capacitor C2.

[0149] Among them, the driving unit 17 includes a driving transistor Tq.

[0150] The amplitude setting unit 16 includes a ninth transistor T9. The gate of the ninth transistor T9 is electrically connected to the third scanning signal line Scan3, the first pole of the ninth transistor T9 is electrically connected to the first data line Data1, and the second pole of the ninth transistor T9 is electrically connected to the gate of the driving transistor Tq.

[0151] The first data signal writing unit 19 includes a third transistor T3. The gate of the third transistor T3 is electrically connected to the second scan signal line Scan2, and the first pole of the third transistor T3 is electrically connected to the second data line Data2.

[0152] The turn-off voltage writing unit 22 includes a sixth transistor T6. The gate of the sixth transistor T6 is electrically connected to the light emission control signal line Emit, and the first pole of the sixth transistor T6 is electrically connected to the turn-off voltage signal line Voff.

[0153] The switching unit 18 includes a first transistor T1. The first pole of the first transistor T1 is electrically connected to the second pole of the third transistor T3 and the second pole of the sixth transistor T6.

[0154] The first data signal writing unit 19 includes a fourth transistor T4. The gate of the fourth transistor T4 is electrically connected to the second scan signal line Scan2, the first pole of the fourth transistor T4 is electrically connected to the gate of the first transistor T1, and the second pole of the fourth transistor T4 is electrically connected to the second pole of the first transistor T1.

[0155] The pulse width control writing unit 21 includes a fifth transistor T5. The first pole of the fifth transistor T5 is electrically connected to the pulse width control signal line Sweep, and the second pole of the fifth transistor T5 is electrically connected to the gate of the first transistor T1 through a first capacitor C1.

[0156] The reset unit 24 includes an eighth transistor T8. The gate of the eighth transistor T8 is electrically connected to the first scan signal line Scan1, the first pole of the eighth transistor T8 is electrically connected to the reset signal line Vref, and the second pole of the eighth transistor T8 is electrically connected to the gate of the first transistor T1.

[0157] The turn-off voltage transmission control unit 23 includes a seventh transistor T7. The gate of the seventh transistor T7 is electrically connected to the light emission control signal line Emit, the first pole of the seventh transistor T7 is electrically connected to the second pole of the first transistor T1, and the second pole of the seventh transistor T7 is electrically connected to the gate of the driving transistor Tq.

[0158] The light emission control unit 25 includes a tenth transistor T10. The gate of the tenth transistor T10 is electrically connected to the light emission control signal line Emit, the first pole of the tenth transistor T10 is electrically connected to the second pole of the driving transistor Tq, and the second pole of the tenth transistor T10 is electrically connected to the first pole of the first light emitting element.

[0159] A second capacitor C2 is electrically connected between the first fixed potential signal line V1 and the gate of the driving transistor Tq.

[0160] The operation process of the first pixel circuit includes a pre-stage T1 and a light-emitting stage T2. Among them, the pre-stage includes a first stage t1, a second stage t2, and a third stage t3.

[0161] In the first stage t1, the first scan signal line Scan1 provides an enabling level (low level), the eighth transistor T8 is turned on, and the reset voltage provided by the reset signal line Vref is transmitted to the gate of the first transistor T1.

[0162] In the second stage t2, the second scan signal line Scan2 provides an enabling level (low level), the third transistor T3 is turned on, and the second data voltage V of the second data line Data2 is D2 transmitted to the first pole of the first transistor T1. The fourth transistor T4 is synchronously turned on, so that a loop is formed between the second pole and the gate of the first transistor T1, and the gate voltage of the first transistor T1 becomes V D2 +Vth.

[0163] In the third stage t3, the third scan signal line Scan3 provides an enabling level (low level), the ninth transistor T9 is turned on, and the first data voltage of the first data line Data1 is transmitted to the gate of the driving transistor Tq and stored in the second capacitor C2. The second capacitor C2 is used to maintain the potential of the gate of the driving transistor Tq.

[0164] In the light-emitting stage T2, the light-emitting control signal line Emit provides an enabling level (low level), the tenth transistor T10 is turned on, and the driving transistor Tq transmits the driving current formed by converting through the first data voltage V D1 and the first fixed voltage V1 to the first pole of the first light-emitting element. The seventh transistor T7 and the sixth transistor T6 are turned on, and the sixth transistor T6 transmits the turn-off voltage provided by the turn-off voltage signal line Voff to the first pole of the first transistor T1.

[0165] Since the gate of the first transistor T is connected to one plate of the first capacitor C1, when the pulse width control signal provided by the pulse width control signal line Sweep is input to the other plate of the first capacitor C1, the gate voltage of the first transistor T1 will change from V D2 +Vth will jump to V D2 +Vth+Va, and then from V D2Starting from +Vth + Va, it changes with the same slope as the linear change slope of the pulse width control signal until it is lower than Vth, causing the first transistor T1 to change from the high impedance state to the conducting state, so that the turn-off voltage is transmitted to the gate of the driving transistor Tq through the first transistor T1, and under the action of the turn-off voltage, the driving transistor Tq changes from the conducting state to the high impedance state, stopping the output of the driving current to the first pole of the first light-emitting element of the pixel. Thus, the conduction duration of the driving transistor Tq is jointly determined by the second data signal and the pulse width control signal.

[0166] Based on the same inventive concept, an embodiment of the present invention further provides a driving method for a display panel. This driving method is applied to the above display panel, in combination with [[ID=11,6]]Figure 3 and Figure 4 , as Figure 31 shown, Figure 31 is a flowchart of a driving method provided by an embodiment of the present invention. This driving method includes:

[0167] Step S1: In the detection stage, T3 controls the detection module 5 to be turned on to detect the voltage of the first pole of the first light-emitting element 3.

[0168] Step S2: Determine the current temperature of the first light-emitting element 3 according to the detected voltage of the first pole of the first light-emitting element 3.

[0169] Step S3: Compensate the data voltage of the first sub-pixel 1 according to the current temperature.

[0170] Combined with the foregoing analysis, the embodiment of the present invention utilizes the characteristic that the forward voltage drop of the light-emitting diode changes with temperature. By using the detection module 5 to detect the voltage of the first pole of the first light-emitting element 3, the forward voltage drop of the first light-emitting element 3 can be accurately obtained according to the detected voltage, and then the current temperature of the first light-emitting element 3 can be known. Then, the brightness of the first sub-pixel 1 can be compensated according to the current temperature of the first light-emitting element 3, realizing the regulation of the light-emitting brightness of the first sub-pixel 1, and effectively reducing the influence of temperature change on the display effect.

[0171] In a feasible implementation manner, as Figure 32 shown, Figure 32 is another flowchart of the driving method provided by an embodiment of the present invention. Step S2 may specifically include:

[0172] Step S21: Obtain the forward voltage drop of the first light-emitting element 3 according to the voltage of the second pole of the first light-emitting element 3 and the detected voltage of the first pole of the first light-emitting element 3.

[0173] Step S22: Look up the temperature corresponding to the obtained forward voltage drop in the pre-stored temperature-forward voltage drop mapping relationship. The looked-up temperature is the current temperature of the first light-emitting element 3. For the mapping relationship between temperature and forward voltage drop, please refer to Table 1.

[0174] After detecting the voltage of the first pole of the first light-emitting element 3 by using the detection module 5, since the second pole of the first light-emitting element 3 in the display panel receives the same negative power supply voltage, the forward voltage drop of the first light-emitting element 3 can be calculated based on the voltage of the second pole of the first light-emitting element 3 and the detected voltage of the first pole of the first light-emitting element 3. Then, the temperature corresponding to the calculated forward voltage drop can be looked up according to the temperature-forward voltage drop mapping relationship.

[0175] In a feasible implementation manner, step S3 may specifically include: looking up the compensation data corresponding to the current temperature in the temperature-compensation data mapping relationship corresponding to the current brightness node, and using the looked-up compensation data to compensate the data voltage of the first sub-pixel 1. Among the temperature-compensation data mapping relationships corresponding to one brightness node, the compensation data corresponding to different gray-scale currents at the same temperature is the same.

[0176] In the above compensation method, for different gray-scale currents under one brightness node, the compensation data corresponding to different gray-scale currents at the same temperature is the same. That is, after knowing the current temperature of the first light-emitting element 3, regardless of what gray-scale current the first light-emitting element 3 receives under the current brightness node, the same compensation data is used to perform brightness compensation on the first sub-pixel 1. This method can reduce the number of temperature-compensation data mapping relationships pre-stored in the driving chip, and thus reduce the amount of data to be stored.

[0177] Or, in another feasible implementation manner, as Figure 33 shown, Figure 33 is another flowchart of the driving method provided by the embodiment of the present invention. Step S3 may specifically include:

[0178] Step S31: Obtain the gray-scale current corresponding to the first sub-pixel 1 according to the image data of the frame to be displayed.

[0179] Step S32: Call out the temperature-compensation data mapping relationship corresponding to the obtained gray-scale current from the multiple temperature-compensation data mapping relationships corresponding to the multiple gray-scale currents.

[0180] Step S33: Look up the compensation data corresponding to the first sub-pixel 1 at the current temperature in the called-out temperature-compensation data mapping relationship, and use the looked-up compensation data to compensate the data voltage of the first sub-pixel 1.

[0181] In the above compensation method, for different grayscale currents under a certain brightness node, the corresponding compensation data for different grayscale currents at the same temperature are different. After obtaining the grayscale current corresponding to the first sub-pixel 1 according to the image data of the frame to be displayed, the compensation data corresponding to the current temperature can be found in the temperature-compensation data mapping relationship corresponding to this grayscale current, so that the compensation for the first sub-pixel 1 is more accurate and the compensation effect is better.

[0182] In a feasible implementation manner, referring to Figure 26 ~and Figure 28 , the display panel further includes a second sub-pixel 11. The second sub-pixel 11 includes a second pixel circuit 12 and a second light-emitting element 13. The second pixel circuit 12 includes a display control module. The display panel includes a display area 14. The display area 14 includes a plurality of partitions 15. The partition 15 includes a first sub-pixel 1 and a second sub-pixel 11.

[0183] The driving method further includes: compensating the data voltage of the second sub-pixel 11 in the partition 15 according to the current temperature of the first light-emitting element 3 in the partition 15.

[0184] The above compensation adopts a partition compensation method. This method does not require all sub-pixels in the display panel to be set as the first sub-pixel 1, that is, it does not require temperature detection for each sub-pixel. On the one hand, it can reduce the number of detection modules 5 required in the display panel, and on the other hand, it can also reduce the amount of data calculation.

[0185] Further, the process of compensating the data voltage of the second sub-pixel 11 in the partition 15 according to the current temperature of the first light-emitting element 3 in the partition 15 includes: calculating the average temperature corresponding to the partition 15 according to the current temperature of each first light-emitting element 3 in the partition 15; compensating the data voltage of the second sub-pixel 11 according to the average temperature.

[0186] This method uses the average temperature of the partition 15 where the second light-emitting element 13 is located to perform brightness compensation on the second sub-pixel 11. The average temperature of the partition 15 and the current temperature of the second light-emitting element 13 will not differ too much, so the accuracy of the compensation for the second sub-pixel 11 can be improved, and the degree of brightness compensation is more matched with its actual current temperature.

[0187] Based on the same inventive concept, an embodiment of the present invention further provides a display device, as Figure 34 shown, Figure 34A schematic structural diagram of a display device provided by an embodiment of the present invention. The display device includes the above-mentioned display panel 100 and a driving chip 200. The driving chip 200 is configured to determine the current temperature of the first light-emitting element 3 according to the voltage of the first pole of the detected first light-emitting element 3, and compensate the data voltage of the first sub-pixel 1 according to the current temperature.

[0188] Among them, the specific structure of the display panel 100 has been described in detail in the above embodiments and will not be elaborated here. Of course, Figure 34 The shown display device is only for illustrative purposes. The display device can be any electronic device with a display function, such as a mobile phone, a tablet computer, a laptop computer, an e-book, or a television.

[0189] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the scope of protection of the present invention.

[0190] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display panel, characterized in that, Comprising a first sub-pixel, the first sub-pixel including a first pixel circuit and a first light-emitting element, wherein the first pixel circuit includes a display control module and a detection module, and the display control module and the detection module are respectively electrically connected to a first pole of the first light-emitting element; The working process of the first pixel circuit includes a detection stage, in which the detection module is turned on to detect the voltage of the first pole of the first light-emitting element during the detection stage; The display panel has a first mode and a second mode, the first mode includes a first data refresh frequency, the second mode includes a second data refresh frequency, and the first data refresh frequency is less than or equal to the second data refresh frequency; Wherein, the frequency at which the detection module detects the voltage of the first pole of the first light-emitting element is greater than or equal to the first data refresh frequency and less than or equal to the second data refresh frequency; and / or, the duration of the detection stage in the first mode is greater than the duration of the detection stage in the second mode.

2. The display panel according to claim 1, wherein, During the time of one frame of the display panel, the working process of the first pixel circuit includes a pre-stage and a light-emitting stage; In at least one frame, the light-emitting stage includes the detection stage, in which the display control module provides a driving current for the first light-emitting element and the detection module is turned on to detect the voltage of the first pole of the first light-emitting element during the detection stage.

3. The display panel according to claim 2, wherein, The duration of the detection stage is equal to the duration of the light-emitting stage.

4. The display panel according to claim 1, wherein, During the time of one frame of the display panel, the working process of the first pixel circuit includes a pre-stage and a light-emitting stage; In at least one frame, the pre-stage includes the detection stage, in which the detection module is turned on to provide a driving current for the first light-emitting element and detect the voltage of the first pole of the first light-emitting element during the detection stage.

5. The display panel according to claim 4, wherein, The display control module includes a gate reset unit, a charging unit and a driving unit, and the driving unit includes a driving transistor; The pre-stage further includes a reset stage and a data writing stage after the reset stage. In the reset stage, the gate reset unit is turned on to reset the gate of the driving transistor, and in the data writing stage, the charging unit is turned on to write a data voltage to the gate of the driving transistor.

6. The display panel according to claim 5, wherein, There is no overlap between the detection stage and the reset stage and the data writing stage.

7. The display panel according to claim 6, wherein, The detection stage is located before the reset stage, and when the detection stage ends, the gate reset unit is turned on to enter the reset stage; Alternatively, the detection stage is located between the reset stage and the data writing stage. When the reset stage ends, the detection module is turned on to enter the detection stage. When the detection stage ends, the charging unit is turned on to enter the data writing stage; Alternatively, the detection stage is located after the data writing stage. When the data writing stage ends, the detection module is turned on to enter the detection stage.

8. The display panel according to claim 5, wherein the time periods of the detection stage and the reset stage at least partially overlap, and / or the time periods of the detection stage and the data writing stage at least partially overlap.

9. The display panel according to claim 8, wherein the detection module is electrically connected to a control signal line, and the detection module is turned on in response to a control signal provided by the control signal line. The gate reset unit is electrically connected to a first scan signal line, and the gate reset unit is turned on in response to a first scan signal provided by the first scan signal line; wherein, the detection stage overlaps with the reset stage, and the control signal line and the first scan signal line are multiplexed.

10. The display panel according to claim 8, wherein the detection module is electrically connected to a control signal line, and the detection module is turned on in response to a control signal provided by the control signal line. The charging unit is electrically connected to a second scan signal line, and the charging unit is turned on in response to a second scan signal provided by the second scan signal line; wherein, the detection stage overlaps with the data writing stage, and the control signal line and the second scan signal line are multiplexed.

11. The display panel according to claim 8, wherein after entering the detection stage, the gate reset unit is turned on to enter the reset stage, and before the detection stage ends, the charging unit is turned on to enter the data writing stage.

12. The display panel according to claim 5, wherein the duration of the detection stage is longer than the duration of the reset stage, and the duration of the detection stage is longer than the duration of the data writing stage.

13. The display panel according to claim 4, wherein the detection stage includes at least two sub-stages, and there is a first interval stage between adjacent sub-stages. In the sub-stage, the detection module is turned on to provide a drive current for the first light-emitting element and detect the voltage of the first pole of the first light-emitting element.

14. The display panel according to claim 13, wherein the duration of the sub-stage is longer than the duration of the first interval stage.

15. The display panel according to claim 1, wherein the display control module includes a charging unit and a driving unit, and the driving unit includes a driving transistor; One data refresh cycle of the display panel includes S frame display times, where S > 1. The data refresh cycle includes a writing frame and a holding frame. Among them, the writing frame includes a data writing stage, and the holding frame does not include the data writing stage. In the data writing stage, the charging unit turns on to write a data voltage to the gate of the driving transistor; At least part of the writing frame includes the detection stage.

16. The display panel according to claim 15, wherein At least one of the holding frames includes the detection stage.

17. The display panel according to claim 1, wherein The display panel has a third mode, and the third mode includes a third data refresh frequency; Among them, the frequency at which the detection module detects the voltage of the first pole of the first light-emitting element is less than or equal to the third data refresh frequency.

18. The display panel according to claim 1, wherein The detection module includes a detection transistor. The gate of the detection transistor is electrically connected to a control signal line. The first pole of the detection transistor is electrically connected to the first pole of the first light-emitting element. The second pole of the detection transistor is electrically connected to a detection signal line.

19. The display panel according to claim 18, wherein The display control module includes a driving unit. The driving unit includes a driving transistor. The channel width-to-length ratio of the detection transistor is less than the channel width-to-length ratio of the driving transistor.

20. The display panel according to claim 1, wherein The display panel further includes a second sub-pixel. The second sub-pixel includes a second pixel circuit and a second light-emitting element. Among them, the second pixel circuit includes the display control module.

21. A driving method for a display panel, characterized in that, Applied to the display panel according to any one of claims 1 to 20, including: Controlling the detection module to turn on during the detection stage to detect the voltage of the first pole of the first light-emitting element; Judging the current temperature of the first light-emitting element according to the detected voltage of the first pole of the first light-emitting element; Compensating the data voltage of the first sub-pixel according to the current temperature; The display panel has a first mode and a second mode. The first mode includes a first data refresh frequency, and the second mode includes a second data refresh frequency. The first data refresh frequency is less than or equal to the second data refresh frequency; Among them, the frequency at which the detection module detects the voltage of the first pole of the first light-emitting element is greater than or equal to the first data refresh frequency and less than or equal to the second data refresh frequency; and / or, the duration of the detection stage in the first mode is greater than the duration of the detection stage in the second mode.

22. The driving method according to claim 21, wherein The process of judging the current temperature of the first light-emitting element according to the detected voltage of the first pole of the first light-emitting element includes: Obtaining the forward voltage drop of the first light-emitting element according to the voltage of the second pole of the first light-emitting element and the detected voltage of the first pole of the first light-emitting element; Look up the temperature corresponding to the obtained forward voltage drop in the pre-stored temperature-forward voltage drop mapping relationship, and the looked-up temperature is the current temperature of the first light-emitting element.

23. The driving method according to claim 21, wherein The process of compensating the data voltage of the first sub-pixel according to the current temperature includes: Look up the compensation data corresponding to the current temperature in the temperature-compensation data mapping relationship corresponding to the current brightness node, and use the looked-up compensation data to compensate the data voltage of the first sub-pixel. Among them, in the temperature-compensation data mapping relationship corresponding to one brightness node, the compensation data corresponding to different gray-scale currents at the same temperature is the same.

24. The driving method according to claim 21, wherein The process of compensating the data voltage of the first sub-pixel according to the current temperature includes: Obtain the gray-scale current corresponding to the first sub-pixel according to the image data of the frame to be displayed; Call out the temperature-compensation data mapping relationship corresponding to the obtained gray-scale current from the multiple temperature-compensation data mapping relationships corresponding to the multiple gray-scale currents; Look up the compensation data corresponding to the first sub-pixel at the current temperature in the called temperature-compensation data mapping relationship, and use the looked-up compensation data to compensate the data voltage of the first sub-pixel.

25. The driving method according to claim 21, wherein The display panel further includes a second sub-pixel, the second sub-pixel includes a second pixel circuit and a second light-emitting element, and the second pixel circuit includes the display control module; The display panel includes a display area, the display area includes a plurality of partitions, and the partitions include the first sub-pixel and the second sub-pixel; The driving method further includes: compensating the data voltage of the second sub-pixel in the partition according to the current temperature of the first light-emitting element in the partition.

26. The driving method according to claim 25, wherein The process of compensating the data voltage of the second sub-pixel in the partition according to the current temperature of the first light-emitting element in the partition includes: Calculate the average temperature corresponding to the partition according to the current temperatures of the first light-emitting elements in the partition; Compensate the data voltage of the second sub-pixel according to the average temperature.

27. A display device, characterized in that, Including: The display panel according to any one of claims 1 to 20; A driving chip for judging the current temperature of the first light-emitting element according to the voltage of the first pole of the detected first light-emitting element, and compensating the data voltage of the first sub-pixel according to the current temperature.

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