Disc device and control method of disc device

Abstract

This invention provides a disk device and a control method for the disk device that can avoid collisions with protrusions on the disk and suppress the degradation of continuous performance during data read / write operations, even when such protrusions exist. The disk device includes a disk, a head, and a controller. The controller does not assign logical addresses to sectors in a first region (defined by defects within a predetermined record region consisting of multiple adjacent cylinders on the disk), but uniquely assigns logical addresses to sectors in a second region (other than the first region) within the predetermined record region. The controller differentiates the allocation of logical addresses to sectors in the second region based on the number of defects present within the predetermined record region.

Description

[0001] This application claims priority to Japanese Patent Application No. 2022-013046 (Filing date: January 31, 2022). The entire contents of the base application are incorporated herein by reference. TECHNICAL FIELD

[0002] Embodiments of the present application relate to a magnetic disk device and a control method thereof. BACKGROUND

[0003] There are defects such as minute protrusions such as minute scratches (flaws) and / or spatter flake on the surface (recording surface) of a disk mounted on a magnetic disk device. These defects are a major cause of obstacles to normal writing and reading of data with respect to the disk, and are also a major cause of damage to the head (magnetic head). Therefore, in the magnetic disk device, the location of the defects is registered in advance as defect information. With respect to the area registered as having defects, for example, it is excluded from the recording area of the disk by not assigning a logical address to the area.

[0004] With an increase in recording density, the magnetic disk device needs to reduce the gap between the reproduction head (reader) and the recording head (writer) and the disk. Therefore, it is known that a magnetic disk device in which a heater is mounted beside the reader and the writer. The heater heats the reader and / or the writer so that they protrude toward the surface side of the disk. Thereby, the read / write characteristics margin of the head is ensured.

[0005] For example, in a case where the head needs to cross a protrusion (bump) of the disk when seeking to an object track, the reader and / or the writer are cooled, and the seeking is started after waiting until the protrusion is flattened. Also, after the head completely crosses the protrusion, control to apply the heater to protrude the reader and / or the writer is performed. Thereby, collision (conflict) of the reader and / or the writer with the protrusion is avoided.

[0006] On the other hand, a predetermined waiting time is required before and after the head crosses the protrusion. Therefore, the more the number of defects such as protrusions, the longer the waiting time, and the more time is required for the read processing and the write processing of data. Therefore, it is required to suppress the decrease in the read performance and the write performance, for example, the sequential performance of data caused by such defects. SUMMARY

[0007] Embodiments of the present application provide a magnetic disk device and a control method thereof, which can avoid collision with a protrusion or the like and suppress reduction in continuous performance at the time of reading and writing of data even when the protrusion or the like is present on a disk.

[0008] The magnetic disk device of the embodiment has a disk, a head, and a controller. The head writes data to the disk and reads the data from the disk. The controller does not assign a logical address to sectors of a first area in a predetermined recording area constituted by a plurality of cylinders adjacent to each other in the disk, the first area being defined in correspondence with a defect present in the predetermined recording area, but uniquely assigns the logical address to sectors of a second area in the predetermined recording area other than the first area. The controller makes the assignment of the logical address to the sectors of the second area different depending on the number of the defects present in the predetermined recording area. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 is a block diagram showing a schematic configuration of a magnetic disk device to which the embodiment relates.

[0010] Figure 2 is a flowchart of control performed by a management section at the time of LBA assignment processing in the magnetic disk device to which the embodiment relates.

[0011] Figure 3 is a flowchart of control performed by a management section at the time of second LBA assignment processing in the magnetic disk device to which the embodiment relates.

[0012] Figure 4 is a diagram schematically showing an assignment pattern of logical addresses by second LBA assignment processing in the magnetic disk device to which the embodiment relates.

[0013] Figure 5 is a flowchart of control performed by a management section at the time of third LBA assignment processing in the magnetic disk device to which the embodiment relates.

[0014] Figure 6 is a diagram schematically showing an assignment pattern of logical addresses by third LBA assignment processing in the magnetic disk device to which the embodiment relates.

[0015] REFERENCE NUMERALS

[0016] 1 magnetic disk device; 10 magnetic disk (disc); 10a user data area; 10b system area; 12 spindle motor (SPM); 13 arm; 14 voice coil motor (VCM); 15 head; 15W write head; 15R read head; 20 drive IC; 30 head amplifier IC; 40 read / write (R / W) channel; 50 hard disk controller (HDC); 60 microprocessor (MPU); 61 read / write control section; 62 management section; 70 volatile memory; 80 buffer memory; 90 non-volatile memory; 100 system controller; 200 host system (host). DETAILED DESCRIPTION

[0017] Hereinafter, a magnetic disk device related to the embodiment will be described with reference to the drawings. Figures 1 to 6

[0018] Figure 1 is a block diagram showing a schematic configuration of a magnetic disk device 1 related to the embodiment. As shown in Figure 1 , the magnetic disk device 1 is provided with a head disk assembly (HDA) to be described later, a drive IC 20, a head amplifier integrated circuit (hereinafter, referred to as a head amplifier IC) 30, a volatile memory 70, a buffer memory (cache) 80, a non-volatile memory 90, and a system controller 100. In addition, the magnetic disk device 1 is connected to a host system (hereinafter, simply referred to as a host) 200.

[0019] The HDA has a magnetic disk (hereinafter, referred to as a disc) 10, a spindle motor (hereinafter, referred to as a SPM) 12, an arm 13 on which a head 15 is mounted, and a voice coil motor (hereinafter, referred to as a VCM) 14. The disc 10 is mounted to the SPM 12 and rotates by driving of the SPM 12. The arm 13 and the VCM 14 constitute an actuator. The actuator controls movement (seek) of the head 15 mounted to the arm 13 to a target position on the disc 10 by driving of the VCM 14. The number of the disc 10 and the head 15 is not limited to one, but can be plural.

[0020] The disc 10 has a user data area 10a which can be used by a user and a system area 10b in which information required for system management is written. The user data area 10a and the system area 10b are respectively allocated to areas in which data can be written in the disc 10. Hereinafter, a direction parallel to the disc 10 and orthogonal to a radial direction of the disc 10 will be referred to as a circumferential direction.

[0021] The head 15 is constituted with a slider as a main body and has a write head 15W and a read head 15R mounted to the slider. The write head 15W writes (writes) data on the disc 10. The read head 15R reads (reads) data in a data track recorded on the disc 10.

[0022] ​The driver IC 20 controls driving of the SPM 12 and the VCM 14 in accordance with control of the system controller 100 (in detail, the MPU 60 described later).

[0023] The head amplifier IC 30 includes a read amplifier and a write driver. The read amplifier amplifies a read signal read from the disk 10 and outputs the read signal to the system controller 100 (in detail, a read / write (R / W) channel 40 described later). The write driver outputs a write current corresponding to a signal output from the R / W channel 40 to the head 15.

[0024] The volatile memory 70 is a semiconductor memory that loses stored data when power supply is turned off. The volatile memory 70 stores data and the like required for processing in each section of the disk device 1. The volatile memory 70 is, for example, a DRAM (Dynamic Random Access Memory) or a SDRAM (Synchronous Dynamic Random Access Memory).

[0025] The buffer memory 80 is a semiconductor memory that temporarily records data and the like transmitted and received (transmitted and received) between the disk device 1 and the host 200. Further, the buffer memory 80 can be integrally configured with the volatile memory 70. The buffer memory 80 is, for example, a DRAM, a SRAM (Static Random Access Memory), a SDRAM, a FeRAM (Ferroelectric Random Access memory), or a MRAM (Magnetoresistive Random Access Memory), or the like.

[0026] The nonvolatile memory 90 is a semiconductor memory that retains stored data even when power supply is turned off. The nonvolatile memory 90 is, for example, a flash memory (Flash Read Only Memory: FROM) of a NOR type or a NAND type.

[0027] In the nonvolatile memory 90, defect information (hereinafter, referred to as Plist) is stored. The Plist is a collection of information indicating the positions where defects exist on the surface (recording surface) of the disc 10. The presence or absence of defects is detected, for example, in a quality check of the disc 10 before the product (the disc device 1) is shipped. For example, each of the information of the cylinder position, the track position, the sector position, the number of sectors, the head position, and the like where defects exist is registered in the Plist in association with each other. The cylinder position, the track position, the sector position are, for example, each position (physical address) of the cylinder, the track, the sector on the disc 10 where the corresponding defect exists. The number of sectors is, for example, the number of sectors where the corresponding defect exists. The head position is, for example, the position (head number) of the head 15 that reads and writes data from and to the disc 10 where the corresponding defect exists, and determines the recording surface of the disc 10 where the defect exists.

[0028] In the Plist, in addition to the sector where the defect actually exists, as a margin, the number of predetermined sectors (proximity sectors) close to the sector is registered. The proximity sector is a sector where, although no defect is detected, a defect smaller than the defect, such as a minute scratch and / or a protrusion, and the like actually exists, or a sector where the protrusion and the like can exist. In the present embodiment, as an example, the proximity sectors are set in front of and behind the sector in the arrangement direction of the sectors, in other words, on the upstream side and the downstream side in the rotation direction of the disc 10, with the sector where the defect exists as a boundary. Therefore, the number of sectors (margin sector number) set in front of and behind the sector where the defect exists is registered in the Plist.

[0029] That is, the recording surface of the disc 10 can include a region (first region, hereinafter referred to as a track skip region) corresponding to the defect. The track skip region is a region including a track having a sector where a defect exists and a track close to the track, and is excluded from the recording region of the disc 10 by not assigning a logical address to the sectors of the region. Information about the track included in the track skip region, such as the track number and the like, is stored in the nonvolatile memory 90 as one of the defect information, that is, the Plist. The sectors in the region (second region, hereinafter referred to as a normal recording region) of the recording surface of the disc 10 other than the track skip region are uniquely assigned a logical address, and are used as the recording region of the disc 10.

[0030] In addition, management information of the disk 10 is stored in the nonvolatile memory 90. In the case where a plurality of disks 10 are present, the management information is stored for each disk 10. The management information of the disk 10 is, for example, an LBA (Logical Block Addressing) start sector position, a sector number, a seek sector number, a skew value, and the like. The LBA start sector position is a position (for example, a physical address) of a sector at the beginning of a logical address allocated in the disk 10. The sector number is the number of sectors per track. The seek sector number is the number of sectors set in accordance with the time required for the head 15 to seek the number of tracks contained in the track jump area. For example, the seek sector number is tabulated (tabulated in a table) in association with the number of tracks (track jump width) contained in the track jump area. The seek sector number is read from such a table as a parameter at the time of performing the LBA allocation process described later. The skew value is a value of a skew angle of the head with respect to the track, and is the number of sectors equivalent to the deviation of the start position (or the end position) of the LBA in the adjacent track.

[0031] The system controller (controller) 100 is implemented, for example, using a large-scale integrated circuit (LSI) called a system-on-a-chip (Soc) in which a plurality of elements are integrated in a single chip. The system controller 100 includes a read / write (R / W) channel 40, a hard disk controller (HDC) 50, and a microprocessor (MPU) 60. The system controller 100 is electrically connected to the drive IC 20, the head amplifier IC 30, the volatile memory 70, the buffer memory 80, the nonvolatile memory 90, and the host 200.

[0032] The R / W channel 40 performs signal processing of read data transmitted from the disk 10 to the host 200 and write data transmitted from the host 200 in accordance with an instruction from the MPU 60 described later. The R / W channel 40 has a circuit or a function that measures the signal quality of the write data. The R / W channel 40 is electrically connected to, for example, the head amplifier IC 30, the HDC 50, the MPU 60, and the like.

[0033] The HDC 50 controls the transmission of data between the host 200 and the R / W channel 40 in accordance with an instruction from the MPU 60 described later. The HDC 50 is electrically connected to, for example, the R / W channel 40, the MPU 60, the volatile memory 70, the buffer memory 80, the nonvolatile memory 90, and the like.

[0034] The MPU 60 is a main controller that controls the various parts of the disk device 1. The MPU 60 controls the VCM 14 via the driver IC 20, and performs servo control that performs positioning (seek) of the head 15. The MPU 60 controls a write operation (work) that writes data to the disk 10, and selects a storage destination of the write data. In addition, the MPU 60 controls a read operation that reads data from the disk 10, and controls processing of the read data. The MPU 60 is connected to the various parts of the disk device 1. The MPU 60 is electrically connected to, for example, the driver IC 20, the R / W channel 40, the HDC 50, the nonvolatile memory 90, and the like.

[0035] The MPU 60 has a read / write control section 61 and a management section 62. The MPU 60, for example, executes the processing of the read / write control section 61 and the management section 62 on firmware. Alternatively, the MPU 60 can have the above-described read / write control section 61 and the management section 62 as a circuit.

[0036] The read / write control section 61 controls the read processing and the write processing of data in accordance with an instruction from the host 200. The read / write control section 61 controls the VCM 14 via the driver IC 20 to position (address) the head 15 at a target position on the disk 10, and performs reading or writing of data.

[0037] The management section 62 divides the recording area of the disk 10 into a normal recording area and a track-skip area, and manages the recording surface. In addition, the management section 62 performs processing of assigning a logical address to the disk 10 (hereinafter, referred to as LBA assignment processing). The LBA assignment processing is processing of assigning a logical address to the disk 10 in accordance with a Plist, that is, in accordance with whether there is a defect on the surface (recording surface) of the disk 10. The management section 62, for example, detects whether there is a defect in the quality inspection of the disk 10 before the product (disk device 1) is shipped, and stores the Plist in the nonvolatile memory 90. In the LBA assignment processing, the management section 62 assigns a logical address to the normal recording area, but not to the track-skip area, in accordance with the content stored in the Plist. Thus, the management section 62 excludes the track-skip area from the recording area of the disk 10. As described later, the management section 62 makes the assignment of logical addresses to sectors of the normal recording area different in accordance with the predetermined recording area, that is, in accordance with the number of defects present in the predetermined recording area in this embodiment.

[0038] Hereinafter, the control performed by the system controller 100, specifically the management section 62 of the MPU 60, when performing the LBA assignment processing in the disk device 1 will be described in accordance with a flowchart. Figure 2 is a flowchart of the control performed by the management section 62 when performing the LBA assignment processing.

[0039] As Figure 2As shown, the management section 62 acquires the total number of defects (hereinafter referred to as the total number of defects) in the predetermined recording area at the time of the LBA allocation processing (S01). In the present embodiment, as an example, the predetermined recording area is a region in units of cells. A cell is a region including a plurality of adjacent tracks. Therefore, a cell is a region corresponding to the tracks of all of the disks 10 corresponding to each of the plurality of tracks, in other words, a region corresponding to the tracks read and written by all of the heads 15. However, the predetermined recording area is not limited to such a region in units of cells, and can be set to an arbitrary region. That is, as described later, the management section 62 allocates logical addresses per cell, and in each cell, allocates logical addresses to regions in which the tracks of the cell are accessed by each of the plurality of heads 15 in turn.

[0040] The management section 62, for example, reads the positions of the defects as defect information from the Plist stored in the nonvolatile memory 90, and accumulates the number of defects of all of the disks 10 in the cell (hereinafter referred to as the target cell) that is the target of the LBA allocation processing. The management section 62 holds the number of defects accumulated as the total number of defects in the target cell.

[0041] The management section 62 performs predetermined LBA allocation processing on the sectors of the target cell in accordance with the total number of defects. In the present embodiment, the management section 62 performs one of three different LBA allocation processes, that is, the first to third LBA allocation processes, on the target cell. These LBA allocation processes are performed, for example, using two thresholds as follows. The first LBA allocation process is a first allocation process for allocating logical addresses, and is performed on a target cell in which the total number of defects is less than a first threshold. The second LBA allocation process is a second allocation process for allocating logical addresses, and is performed on a target cell in which the total number of defects is greater than or equal to the first threshold and less than a second threshold. The third LBA allocation process is a third allocation process for allocating logical addresses, and is performed on a target cell in which the total number of defects is greater than or equal to the second threshold.

[0042] The first threshold and the second threshold are thresholds for determining which one of the first to third LBA allocation processes is performed on the target cell in accordance with the total number of defects. Hereinafter, the condition at the time of such determination is referred to as a process selection condition. The first threshold and the second threshold are stored in the nonvolatile memory 90, for example, and are read out as parameters at the time of determining the process selection condition. These thresholds can be set arbitrarily, but the first threshold is set to a value greater than the second threshold. In the present embodiment, as an example, the first threshold is set to 1, and the second threshold is set to 2.

[0043] As the processing selection condition, the management section 62 determines a first processing selection condition in which the total number of defects is compared with a first threshold value, and a second processing selection condition in which the total number of defects is compared with a second threshold value. For example, the management section 62 compares the total number of defects with the first threshold value, and if the total number of defects is equal to or greater than the first threshold value, determines that the first processing selection condition is established, and if the total number of defects is less than the first threshold value, determines that the first processing selection condition is not established (S02). In addition, the management section 62 compares the total number of defects with the second threshold value, and if the total number of defects is equal to or greater than the second threshold value, determines that the second processing selection condition is established, and if the total number of defects is less than the second threshold value, determines that the second processing selection condition is not established (S03). In the present embodiment, the management section 62 determines the first processing selection condition, and in the case where the first processing selection condition is established, determines the second processing selection condition. However, the management section 62 can determine the second processing selection condition, and in the case where the second processing selection condition is not established, determine the first processing selection condition.

[0044] In the case where the first processing selection condition is not established (S02: No), that is, in the case where the total number of defects in the target unit is less than the first threshold value, the management section 62 executes the first LBA allocation processing (S04). In this case, the total number of defects in the target unit is 0 (zero), and the target unit does not have a defect. Therefore, the management section 62 allocates logical addresses in the target unit in such a manner that all of the heads 15 sequentially access the sectors of the target unit. At this time, the management section 62 offsets the LBA start sector positions by the skew value in adjacent tracks. Thereby, it is possible to access the adjacent tracks without rotational latency.

[0045] In the case where the first processing selection condition is established (S02: Yes), that is, in the case where the total number of defects in the target unit is equal to or greater than the first threshold value, the management section 62 determines the second processing selection condition (S03).

[0046] In the case where the second processing selection condition is not established (S03: No), the management section 62 executes the second LBA allocation processing (S05). In this case, it corresponds to the case where the total number of defects in the target unit is equal to or greater than the first threshold value and less than the second threshold value, that is, the case where the total number of defects in the target unit is 1. The second LBA allocation processing will be described later.

[0047] In the case where the second processing selection condition is established (S03: Yes), the management section 62 executes the third LBA allocation processing (S06). In this case, it corresponds to the case where the total number of defects in the target unit is equal to or greater than the second threshold value, that is, the case where the total number of defects in the target unit is equal to or greater than 2. The third LBA allocation processing will be described later.

[0048] The management section 62 repeats the processes of S01 to S06 based on the total number of defects in the target unit until a logical address is assigned to the normal recording area other than the track skip area in all units (S07). Therefore, in the case where there is a unit to which no logical address is assigned (S07: No), the management section 62 changes the next unit, for example, the unit adjacent to the current target unit, to a new target unit (S08), acquires the total number of defects in the new target unit (S01). Thereafter, one of the first to third LBA assignment processes (S04, S05, S06) is performed based on the acquired total number of defects to assign a logical address to the new target unit. On the other hand, in the case where a logical address is assigned to all units, there is no unit to which no logical address is assigned (S07: Yes), the management section 62 ends the LBA assignment process.

[0049] Next, the second LBA assignment process (S05) will be described. The second LBA assignment process is a process of assigning a logical address in such a manner that data is read and written so as to change the head 15 after the data has been read and written up to the track preceding the track skip area to other head 15. Figure 3 is a flowchart of the control performed by the management section 62 when the second LBA assignment process is performed. Figure 4 is a diagram schematically showing the assignment of a logical address by the second LBA assignment process. In Figure 4 , the horizontal direction is the arrangement direction of the tracks, and the vertical direction is the arrangement direction of the heads (discs). In this case, the left side in the horizontal direction corresponds to the outer side in the radial direction of the disc, and the right side corresponds to the inner side in the radial direction of the disc.

[0050] In Figure 4 , there are a plurality of target heads, and the logical head number is from 0 (zero) to n. In Figure 4 , one mass divided by the horizontal and vertical directions corresponding to each logical head represents a region (block) formed of a plurality of tracks. In addition, the unit is divided into a unit Cl and a unit C2 between a collective region Cy10 and a collective region Cyll of the blocks of the tracks corresponding to all the logical heads. A solid line L4 is a boundary line of the unit Cl and the unit C2. An asterisk B4 is a bump as a defect. That is, one bump B4 exists as a defect in the unit Cl, specifically, the tracks (T106, T107) of the unit Cl accessed by the head (Headl) of which the logical head number is 1. Therefore, the second LBA assignment process is performed on the unit Cl. In addition, the tracks T106, T107 are set to the track skip area. On the other hand, there is no defect such as a bump, and there is no track skip area in the unit C2. Therefore, the first LBA assignment process is performed on the unit C2.

[0051] As Figure 3As shown, at the time of the 2nd LBA allocation processing, the management section 62 acquires predetermined parameters (S501). The management section 62 reads, for example, the LBA start sector position, the sector number, the skew value, and the seek sector number from the management information of the disk 10 stored in the nonvolatile memory 90, and holds them as parameters. Here, the disk 10 from which the parameters are acquired is a predetermined disk 10 to which a logical address is to be allocated in the target unit. For example, it is a disk 10 from which data is read and written by the head 15 whose logical head number is the start. Hereinafter, the head 15 that reads and writes data with respect to such a predetermined disk 10 will be referred to as a target head. The target head is set in order from the start of the logical head number, for example.

[0052] In addition, the management section 62 sets a track from which a logical address is to be allocated (hereinafter, referred to as a target track) (S502). The target track is a track from which data is read and written by the target head. In the present embodiment, as an example, the management section 62 sets the smallest track of the target unit as the target track. The smallest track is a track that is located at the outermost side in the radial direction of the disk 10 among the tracks included in the target unit. However, the smallest track is merely an example of the target track, and the target track is not limited to the smallest track. For example, the target track can be the largest track of the target unit, that is, a track that is located at the innermost side in the radial direction of the disk 10 among the tracks included in the target unit.

[0053] Next, the management section 62 determines whether the target track is included in the track skip area (S503). At the time of the determination, the management section 62 reads, for example, the Plist (defect information) stored in the nonvolatile memory 90, and determines whether the target track coincides with the track of the track skip area on the basis of the track number or the like. For example, Figure 4 The tracks T106 and T107 shown coincide with the track skip area.

[0054] In the case where the target track is included in the track skip area (S503: YES), the management section 62 changes the next track, for example, a track that is adjacent to the current target track on the inner side in the radial direction of the disk 10, to a new target track (S504), and determines whether the new target track is included in the track skip area (S503). In this case, since the target track is included in the track skip area, the management section 62 does not allocate a logical address to the target track, and excludes it from the recording area of the disk 10. For example, Figure 4 The tracks T106 and T107 shown are included in the track skip area, and thus are not allocated a logical address.

[0055] On the other hand, in the case where the target track is not included in the track skip area (S503: NO), the management section 62 allocates a logical address to the sectors of the target track (S505: LBA allocation). At this time, the management section 62 uniquely (for example, in ascending order) allocates a logical address from the sector of the target track that coincides with the LBA start sector position. For example,Figure 4 Tracks T000 to T010 and T100 to T105 shown are not included in the track skipping area, and therefore are assigned logical addresses.

[0056] Then, the management unit 62 determines whether the next track of the target track (hereinafter referred to as the next target track), for example, the track adjacent to the target track on the inner side of the disk 10 in the radial direction, is included in the track skip region (S506). The next target track is the track for reading and writing data from the target header, and is the track of the allocation object that becomes the logical address next to the target track. During the determination, the management unit 62 reads, for example, the Plist stored in the non-volatile memory 90, and compares the next target track with the track in the track skip region based on the track number, etc.

[0057] If the next target track is not included in the track skipping area (S506: No), the management unit 62 changes the LBA start sector (S507). For example, if the next target track is Figure 4 In the case of track T105 shown, the determination is "No" in S506. In this case, the management unit 62 shifts the LBA start sector position according to the skew value and changes the LBA start sector position. For example, the management unit 62 calculates the remainder by dividing the value of adding the skew value to the LBA start sector position by the number of sectors. Furthermore, the management unit 62 takes the remainder calculated by shifting the LBA start sector position and keeps this position as the LBA start sector position for the next target track. The skew value and the number of sectors are read from the management information of disk 10 and kept as parameters (S501).

[0058] The management unit 62 selectively repeats the processes S503 to S507 based on whether the target track is included in the track skipping area, until it is determined whether logical addresses need to be allocated to all tracks of the target unit (S508). Therefore, if there is a track for which it is not determined whether logical addresses need to be allocated (S508: No), the management unit 62 takes the next target track, such as the track adjacent to the current target track on the inner side of the disk 10 in the radial direction, as a new target track (S504), and determines whether the new target track is included in the track skipping area (S503). Then, based on whether this determination is true or false, a logical address is allocated to the new target track.

[0059] On the other hand, in a case where it is determined whether to assign a logical address to all the tracks, and there is no track for which determination is not made (S508: Yes), a track in which assignment of a logical address is to be started in the next object unit is set (S509). The next object unit is a next unit of the object unit, for example, a unit adjacent to the current object unit on the inner side in the radial direction of the disc 10. In this case, the management section 62 sets a next track of the current object track, for example, a track adjacent to the current object track on the inner side in the radial direction of the disc 10, as a track in which assignment of a logical address is to be started in the next object unit. That is, a track of a track number obtained by adding 1 to the track number of the current object track is set as a track in which assignment of a logical address is to be started in the next object unit. Thereby, the track in which assignment of a logical address is to be started in the next object unit accessed by the object header (the new object track) becomes the track set here. As an example, in a case where the object header is header 0 and the object unit is unit Cl, the next object unit is unit C2. If the current object track in the object unit (unit Cl) is T010, the track in which assignment of a logical address is to be started in the next object unit (unit C2) becomes T011. Figure 4

[0060] In addition, in a case where the next object track is included in the track skip area (S506: Yes), the management section 62 sets a track in which assignment of a logical address is to be started in the next object unit (object track) (S510). For example, in a case where the next object track is track T106 shown in FIG. 10, it is determined as "Yes" in S506. Figure 4

[0061] In setting the object track of the next object unit, the management section 62 acquires a track skip width corresponding to the seek sector number held as a parameter (S501). The track skip width is, for example, tabulated in association with the seek sector number, and is stored in the nonvolatile memory 90. The management section 62 reads the table with the seek sector number as a key, and holds the value of the track skip width associated with the seek sector number. The management section 62 sets a track of a track number obtained by adding 1 to the value of the track skip width added to the track number of the object track as the track number of the object track of the next object unit. The management section 62, for example, holds the track number of the object track of the next object unit set here. Thereby, the track in which assignment of a logical address is to be started in the next object unit accessed by the object header (the new object track) becomes the track set here. Therefore, when assigning a logical address to the next object unit, assignment of a logical address is restarted from the new object track set here, and assignment of a logical address is continued from the minimum track of the next object unit. As an example, in a case where the object header is header 0 and the object unit is unit Cl, the next object unit is unit C2. If the current object track in the object unit (unit Cl) is T010, the track in which assignment of a logical address is to be started in the next object unit (unit C2) becomes T011. Figure 4 ​​In this case, when the object head is head 1 and the object unit is unit Cl, a logical address is allocated from the minimum track T100 of the object unit Cl to the track T105 preceding the track skip area. Thereafter, when a logical address is allocated to the unit C2 which is the next object unit, the allocation of the logical address is restarted from the track T108, and the allocation of the logical address is continued from the track Tlll which is the minimum track.

[0062] The management section 62 selectively repeats the processes of S501 to S510 until it determines whether to allocate a logical address to all the disks 10 of the object unit (S511). Therefore, in the case where there is a disk 10 (in other words, a head 15) for which it has not been determined whether to allocate a logical address (S511: No), the management section 62 changes the next head 15 of the object head, for example, the head 15 having the next logical head number of the current object head, to a new object head (S512). As an example, in the case where the object head is head 0 (HeadO of logical head number 0) and the object unit is unit Cl, the object head is changed to head 1 (Headl of logical head number 1) after a logical address is allocated up to the track T010 of the object unit Cl. Figure 4 In this case, when the object head is head 1 and the object unit is unit Cl, a logical address is allocated from the minimum track T100 of the object unit Cl to the track T105 preceding the track skip area. Thereafter, when a logical address is allocated to the unit C2 which is the next object unit, the allocation of the logical address is restarted from the track T108, and the allocation of the logical address is continued from the track Tlll which is the minimum track.

[0063] Then, the management section 62 acquires predetermined parameters regarding the disk 10 corresponding to the new object head (S501). The management section 62 reads, for example, the LBA start sector position, the number of sectors, and the skew value from the management information of the disk 10 stored in the nonvolatile memory 90, and holds them as parameters. Thereafter, the disk 10 corresponding to the new object head is allocated a logical address using the acquired parameters.

[0064] On the other hand, in the case where the parameters are acquired for the disks 10 corresponding to all the heads 15, and there is no head 15 for which the parameters are not acquired (S511: Yes), the management section 62 ends the second LBA allocation processing. After ending the second LBA allocation processing, the management section 62 returns to the above-described processing step S07 Figure 2 ), and determines whether a logical address is allocated to all the units.

[0065] Next, the third LBA allocation processing (S06) will be described. The third LBA allocation processing is processing in which a logical address is allocated while changing the position of the sector from which the allocation of the logical address is started in accordance with the position of a defect. Figure 5is a flowchart of the control performed by the management section 62 at the time of the 3rd LBA allocation processing. Further, some of the processing steps in the 3rd LBA allocation processing contain the same or similar contents as those of the processing steps of the 2nd LBA allocation processing. Therefore, the above description is appropriately applied to the description of the same or similar contents as those of the 2nd LBA allocation processing.

[0066] Figure 6 is a diagram schematically showing the allocation pattern of the logical addresses by the 3rd LBA allocation processing. Figure 6 The region of n tracks (TO to Tn) included in the predetermined unit C6 in which the 3rd LBA allocation processing is performed is shown. In Figure 6 , the horizontal direction is the arrangement direction of the tracks, the vertical direction is the arrangement direction of the sectors, and one block divided by the horizontal and vertical directions is a region of one sector amount of one track. In this case, the left side in the horizontal direction corresponds to the outer side in the radial direction of the disk, and the right side corresponds to the inner side in the radial direction of the disk. Further, the direction from the lower side toward the upper side in the vertical direction corresponds to the rotation direction of the disk. The "start" indicates the sector in each track to which the logical address of the beginning is allocated, and the "end" indicates the sector in each track to which the logical address of the end is allocated. The asterisk B6 is a bump as a defect. Therefore, the region TSA of the unit C6 (the region between the track Tx+1 and the track Ty-1) is skipped as a track skip region.

[0067] As shown in Figure 5 , at the time of the 3rd LBA allocation processing, the management section 62 acquires predetermined parameters (S601). The management section 62 reads, for example, the LBA start sector position, the sector number, the skew value, the seek sector number, and the edge sector number from the management information of the disk 10 stored in the nonvolatile memory 90, and holds them as the parameters. Here, the disk 10 from which the parameters are acquired is a predetermined disk 10 to which the logical addresses are allocated, and the head 15 that reads and writes data with respect to the disk 10 is the object head. The object head is set, for example, in order from the beginning of the logical head number.

[0068] Further, the management section 62 sets the track (the object track) from which the logical address is to be allocated (S602). The object track is the track in which data is read and written by the object head, and is the minimum track of the object unit. However, the minimum track is only an example of the object track, and the object track can be, for example, the maximum track instead of the minimum track.

[0069] Next, the management section 62 determines whether the object track is included in the track skip region (S603). At the time of the determination, the management section 62 reads, for example, the Plist (defect information) stored in the nonvolatile memory 90, and checks whether the object track coincides with the track of the track skip region on the basis of the track number or the like.

[0070] If the target track is contained within a track skipping region (S603: Yes), the management unit 62 designates the next track, for example, the track adjacent to the current target track in the radial direction inside the disk 10, as a new target track (S604), and determines whether the new target track is contained within a track skipping region (S603). In this case, since the target track is contained within a track skipping region, the management unit 62 does not allocate a logical address to the target track and excludes it from the recording area of ​​the disk 10. For example, Figure 6 Tracks Tx+1 to Ty-1 shown are contained in the track skip region and therefore have not been assigned logical addresses.

[0071] On the other hand, if the target track is not included in the track skipping region (S603: No), the management unit 62 determines whether the next target track is included in the track skipping region (S605). During this determination, the management unit 62, for example, reads the Plist stored in the non-volatile memory 90 and compares the track number with the track in the track skipping region to see if the next target track matches the track in the track skipping region. For example, Figure 6 Tracks T1 to Tx and Ty to Tn shown are not included in the track skipping region, and therefore are assigned logical addresses.

[0072] If the next target track is included in the track skipping area (S605: Yes), the management unit 62 corrects the seek sector number and calculates the defect area (S606). For example, if the next target track is Figure 6 In the case of track Tx+1, it is determined as "yes" in S605. When correcting the seek sector number, the management unit 62 calculates the value obtained by adding the skew value to the seek sector number, and keeps the calculated value as the corrected seek sector number. The skew value and the seek sector number before correction are read from the management information of disk 10 and kept as parameters (S601). As an example, the skew value is Figure 6 The number of sectors in sector region S1 is shown. Additionally, as an example, the number of seek sectors is... Figure 6 The number of sectors in sector region S2 is shown. A defective region is a region containing the defective sector and the number of edge sectors adjacent to it. For example, it is... Figure 6 The area DA is shown. The management unit 62, for example, reads the Plist stored in the non-volatile memory 90 to obtain the location of the defective sector. Based on the obtained sector location, sector number, and edge sector number, the management unit 62 calculates the defective region. For example, the management unit 62 calculates the remainder by dividing the value of the sector location plus the edge sector number by the sector number. Furthermore, the management unit 62 retains the region obtained by appending the calculated remainder number of sectors before and after the defective sector location as the defective region. The sector number and edge sector number are read from the management information of disk 10 and retained as parameters (S601).

[0073] Next, the management section 62 calculates the position of the sector preceding the defect and the position of the sector following the defect, respectively (S607). The sector preceding the defect is a sector in which the last logical address is allocated in the track preceding the track jump area, that is, in the target track. The sector following the defect is a sector in which the first logical address is allocated in the track (corresponding to the next target track) adjacent to the track jump area on the opposite side of the target track with the track jump area interposed therebetween, for example, on the inner side in the radial direction of the disc 10. The management section 62 calculates a remainder obtained by dividing a value obtained by subtracting 1 from the LBA start sector position by the number of sectors, and holds the value as the position of the sector preceding the defect. The LBA start sector position and the number of sectors are read from the management information of the disc 10, and held as parameters (S601). Further, the management section 62 calculates a remainder obtained by dividing a value obtained by adding the seek sector number to the position of the sector preceding the defect by the number of sectors, and holds the position as the position of the sector following the defect. The seek sector number is held as the seek sector number corrected in S606.

[0074] Next, the management section 62 determines the presence / absence condition for the defect area with respect to the sector preceding the defect and the sector following the defect (S608). The presence / absence condition is a condition for determining whether the sector preceding the defect and the sector following the defect are present within the defect area. Here, the management section 62 determines that the presence / absence condition is satisfied if at least one of the sector preceding the defect and the sector following the defect is present within the defect area. In contrast, if neither of the sector preceding the defect and the sector following the defect is present within the defect area, the management section 62 determines that the presence / absence condition is not satisfied.

[0075] In the case where the presence / absence condition is satisfied (S608: Yes), the management section 62 advances the LBA start sector position by one (S609), and re-calculates the position of the sector preceding the defect and the position of the sector following the defect, respectively (S607). Advancing the LBA start sector position by one (increment) corresponds to increasing the physical address of the sector corresponding to the LBA start sector position by 1. Then, the management section 62 determines the presence / absence condition again (S608). That is, the management section 62 repeatedly performs the increment of the LBA start sector position (S609), the calculation of the position of the sector preceding the defect and the position of the sector following the defect (S607), and the determination of the presence / absence condition (S608) until the presence / absence condition is not satisfied.

[0076] In contrast, in the case where the presence / absence condition is not satisfied (S608: No), that is, in the case where neither of the sector preceding the defect and the sector following the defect is present within the defect area, the management section 62 allocates logical addresses to the sectors of the target track (S610: LBA allocation). For example, Figure 6The sector Sx of the track Tx shown coincides with the pre-defect sector, and the sector Sy of the track Ty coincides with the post-defect sector. At this time, the management unit 62 uniquely (for example, in ascending order) allocates logical addresses from the sector of the target track coinciding with the LBA start sector position. The LBA start sector position here is a value read from the management information of the disc 10 and held as a parameter (S601) or a value obtained by adding a predetermined value to the parameter value (S609).

[0077] Then, the management unit 62 corrects the LBA start sector position (S611). In this case, the management unit 62 changes and holds the LBA start sector position as the sector position of the post-defect sector. Thereby, the LBA start sector of the next target track is changed to the post-defect sector. Further, the next target track here is a track on the opposite side of the target track across the track skip area, for example, adjacent to the track skip area on the inner side in the radial direction of the disc 10. For example, as shown by an arrow A6 in FIG. 6, the LBA start sector position is changed to the sector Sy of the track Ty. Figure 6

[0078] Further, in a case where the next target track is not included in the track skip area (S605: No), the management unit 62 allocates logical addresses to the sectors of the target track (S612). For example, in a case where the next target track is the track Tx shown, the determination is "No" in S605. At this time, the management unit 62 uniquely (for example, in ascending order) allocates logical addresses from the sector of the target track coinciding with the LBA start sector position. The LBA start sector position here is a value read from the management information of the disc 10 and held as a parameter (S601). Figure 2

[0079] Next, the management unit 62 changes the LBA start sector (S613). In this case, the management unit 62 changes the position of the LBA start sector in accordance with the skew value. For example, the management unit 62 calculates a remainder obtained by dividing a value obtained by adding the skew value to the LBA start sector position by the number of sectors. Further, the management unit 62 changes the LBA start sector position by the amount of the calculated remainder, and holds the position as the LBA start sector position of the next target track. The skew value and the number of sectors are read from the management information of the disc 10 and held as parameters (S601).

[0080] ​​After the LBA start sector position is corrected in S611 or S613, the management section 62 selectively repeats the processing of S603 to S613 until it determines whether to allocate a logical address to all the tracks of the target unit, depending on whether the target track is included in the track skip area (S614). Therefore, in a case where there is a track for which it is not determined whether to allocate a logical address (S614: No), the management section 62 sets the next target track, for example, a track adjacent to the current target track on the inner side in the radial direction of the disc 10, as a new target track (S604), determines whether the new target track is included in the track skip area (S603). Thereafter, a logical address is allocated to the new target track depending on whether this determination is satisfied or not.

[0081] On the other hand, in a case where it is determined whether to allocate a logical address to all the tracks, and there is no track for which it is not determined (S614: Yes), the management section 62 selectively repeats the processing of S601 to S614 until a logical address is allocated to all the discs 10 of the target unit (S615). Therefore, in a case where there is a disc 10 for which it is not determined whether to allocate a logical address (in other words, a head 15) (S615: No), the management section 62 sets the next head 15 of the target head, for example, a head 15 having the next logical head number of the current target head, as a new target head (S616). Then, the management section 62 acquires predetermined parameters regarding the disc 10 corresponding to the new target head (S601). The management section 62 reads the LBA start sector position, the number of sectors, the skew value, the seek sector number, and the edge sector number, for example, from the management information of the disc 10 stored in the nonvolatile memory 90, and holds them as parameters. Thereafter, a logical address is allocated to the disc 10 corresponding to the new target head using the acquired parameters.

[0082] On the other hand, in a case where the parameters are acquired regarding the discs 10 corresponding to all the heads 15, and there is no head 15 for which the parameters are not acquired (S615: Yes), the management section 62 ends the third LBA allocation processing. After ending the third LBA allocation processing, the management section 62 returns to the processing step S07 Figure 2 ) described above, and determines whether a logical address is allocated to all the units.

[0083] As shown in Figure 3 , Figure 5 , ​ , the management section 62 selectively executes the first LBA allocation processing, the second LBA allocation processing, and the third LBA allocation processing depending on whether the processing selection conditions (the first processing selection condition and the second processing selection condition) are satisfied or not, and allocates a logical address to the normal recording area other than the track skip area in all the units. Thus, the series of controls for the LBA allocation processing ends.

[0084] Thus, according to the disk device 1 involved in the embodiment, even in the case where a protrusion or the like is present on the disk 10, it is possible to assign a logical address without crossing the protrusion or the like. Thereby, it is possible to avoid collision with the protrusion or the like and to suppress reduction in continuous performance at the time of reading and writing of data. Further, for example, even in the case of random access including data length that crosses a protrusion by one write, since it is possible to access while avoiding the protrusion, it is possible to suppress reduction in write performance.

[0085] Specifically, at the time of assigning a logical address, it is possible to selectively perform the 1st LBA assignment processing, the 2nd LBA assignment processing, and the 3rd LBA assignment processing in accordance with the total number of defects of each unit. For example, in the case where the total number of defects is less than the 1st threshold value, as an example, in the case where the total number of defects is 0, the 1st LBA assignment processing is performed. Thereby, a logical address is assigned in such a manner that all of the first 15 sectors of the target unit are sequentially accessed. At this time, by skewing the LBA start sector position by the skew value in adjacent tracks, it is possible to access the adjacent tracks without rotational latency.

[0086] Further, for example, in the case where the total number of defects is equal to or greater than the 1st threshold value and less than the 2nd threshold value, as an example, in the case where it is 1, the 2nd LBA assignment processing is performed. Thereby, it is possible to change the target head of logical address assignment to the next head of the current head after assigning a logical address up to the track preceding the track skip area of the target unit. That is, it is possible to assign a logical address in such a manner that the head is changed immediately before the track skip area. Therefore, it is possible to access the disk 10 without crossing a protrusion or the like.

[0087] Further, for example, in the case where the total number of defects is equal to or greater than the 2nd threshold value, as an example, in the case where it is equal to or greater than 2, the 3rd LBA assignment processing is performed. Specifically, a defect area including the sector in which a defect is present and the number of edge sectors close to the sector is set. In the case where neither the defect front sector nor the defect rear sector is located within the defect area, a logical address is uniquely assigned (for example, in ascending order) from the sector of the target track that corresponds to the LBA start sector position. Then, the LBA start sector position is changed to the sector position of the defect rear sector, and a logical address is assigned to the next target track. Thereby, it is possible to avoid a situation where the head is repeatedly changed a plurality of times and the write performance is reduced in the case where only the 2nd LBA assignment processing is performed. That is, it is possible to assign a logical address in accordance with the position of a defect without repeatedly changing the head.

[0088] Therefore, it is possible to selectively perform logical address assignment in which the head is changed immediately before the track skip area and logical address assignment in accordance with the position of a defect for each unit. Thus, according to the present embodiment, it is possible to effectively avoid collision with a protrusion or the like and to suppress reduction in continuous performance at the time of reading and writing of data.

[0089] The above describes embodiments of the present application, but the above-described embodiments are presented as examples and are not intended to limit the scope of the application. These new embodiments can be implemented in other various ways, and various omissions, substitutions, and changes can be made within the scope of the gist of the application. These embodiments and / or modifications thereof are included in the scope and / or gist of the application, and are included in the scope of the application recited in the technical solution and the equivalent thereof.

Claims

1. A disk device, comprising: a disk; a head that writes data to the disk and reads the data from the disk; and a controller that uniquely assigns a logical address to sectors in a second region in a predetermined recording area constituted by a plurality of cylinders adjacent to each other in the disk other than a first region defined in correspondence with defects present in the predetermined recording area, the controller causing the assignment of the logical address to the sectors in the second region to differ depending on the number of the defects present in the predetermined recording area.

2. The disk device according to claim 1, wherein the controller, in a case where the number of the defects is smaller than a first threshold value, performs a first assignment process that assigns the logical address in the second region in a manner that causes the head to sequentially access the sectors of the second region, in a case where the number of the defects is greater than or equal to the first threshold value and smaller than a second threshold value larger than the first threshold value, performs a second assignment process that assigns the logical address in a manner that causes the head to read and write the data after changing to another head after reading and writing the data up to a track preceding the first region, and in a case where the number of the defects is greater than or equal to the second threshold value, performs a third assignment process that assigns the logical address in a manner that changes a position of the sectors in the second region from which the logical address is to be assigned depending on positions of the defects.

3. The disk device according to claim 2, wherein in the second assignment process, the controller, in a case where a next target track is not included in the first region, changes a position of an assignment start sector from which the logical address is to be assigned in the next target track that is a track in which the logical address is to be assigned next to a target track that includes the sectors to which the logical address is assigned, depending on a skew value of the head with respect to the next target track, and in a case where the next target track is included in the first region, sets a track in which the logical address is to be assigned next to the target track depending on the number of tracks included in the first region.

4. The disk device according to claim 2, wherein in the third assignment process, the controller, in a case where a next target track is not included in the first region, assigns the logical address to the sectors of a target track that includes the sectors to which the logical address is assigned, the next target track being a track in which the logical address is to be assigned next to the target track, and in a case where the next target track is included in the first region, sets a track in which the logical address is to be assigned next to the target track depending on the number of tracks included in the first region. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ In a case where the next object track is included in the first area, positions of a sector preceding the defect and a sector following the defect are calculated based on a skew value of the head with respect to the next object track, a number of seek sectors set in accordance with a time required for the head to seek a number of tracks included in the first area, and a defect area including the sector in which the defect exists and a predetermined number of sectors close to the sector.

5. The disk device according to claim 4, the controller, in a case where neither the sector preceding the defect nor the sector following the defect is located in the defect area, assigns the logical addresses to the sectors of the object track and sets a position of a sector in which the assignment of the logical addresses is started in the next object track as the position of the sector following the defect.

6. The disk device according to any one of claims 1 to 5, the first area is an area including a track having the sector in which the defect exists and a track adjacent to the track and not having the defect.

7. A control method of a disk device, comprising: dividing a predetermined recording area constituted by a plurality of cylinders adjacent to each other in a disk into a first area and a second area, the first area being an area not assigned a logical address defined in correspondence with defects existing in the predetermined recording area, the second area being an area other than the first area and uniquely assigned the logical address, in a case where the number of defects is smaller than a first threshold value, assigning the logical addresses in the second area in a manner that a head reading and writing data sequentially accesses sectors of the second area, in a case where the number of defects is greater than or equal to the first threshold value and smaller than a second threshold value larger than the first threshold value, assigning the logical addresses in a manner that the head reading and writing the data is changed to another head to read and write the data after the data is read and written up to a track preceding the first area, in a case where the number of defects is greater than or equal to the second threshold value, assigning the logical addresses in accordance with a position of the defect to change a position of a sector in which the assignment of the logical addresses is started in the second area.

Images