Detector calibration circuit, method, control unit, storage medium, program product

Abstract

A power calibration circuit, method, control unit, storage medium and program product of a differential detector. The power calibration circuit comprises: a differential-to-single-ended unit electrically connected with an output end of a transimpedance amplifier, configured to convert a differential signal output by the differential detector into a single-ended signal; a comparison unit connected with the differential-to-single-ended unit, configured to determine whether the single-ended signal is a set calibration value; a calibration power input unit electrically connected with the differential detector to be calibrated, configured to output a calibration power signal with a stable calibration value to the differential detector to be calibrated; and a control unit and a power calibration unit, the control unit being connected with the comparison unit and the power calibration unit, and configured to output a control signal to the power calibration unit when the single-ended signal is not the set calibration value, so as to calibrate the power of the differential detector until the single-ended signal is the set calibration value. The differential detector circuit of the application improves the performance of the differential detector in use by calibrating the differential detector.

Description

Technical Field

[0001] This application relates to the field of radio frequency technology, and in particular to a calibration circuit and calibration method for a differential detector, a control unit, a storage medium, and a program product. Background Technology

[0002] A radio frequency (RF) detector, also known as an RF power detector or RF response detector, is a device that detects, measures, and converts RF signals in a certain way. A differential detector is a circuit that converts an RF power signal into a differential current output.

[0003] Figure 1 The figure shows a schematic diagram of the application circuit of a differential detector. In practical applications, the differential detector 50 is often connected to a transimpedance amplifier 60 to convert the differential current into a differential voltage. Therefore, the performance of the differential detector is often measured by the characteristic curve between the differential voltage output of the differential detector 50 and the input power of the differential detector. The two important indicators affecting the detection performance of the differential detector are detection accuracy and detection dynamic range.

[0004] Figure 2 The figure shows the characteristic curve of a differential detector. In the characteristic curve, the part where the differential voltage and input power are linearly related is the detection range of the detector. The range between the minimum and maximum input power detected by the differential detector is the dynamic range of the differential detector. The difference between the linear relationships of the characteristic curves obtained by measuring the same differential detector under different conditions is the detection accuracy.

[0005] In practical applications, the detection accuracy of differential detectors is low due to the influence of factors such as process, temperature and voltage deviation on the electronic components inside differential detectors and transimpedance amplifiers. Summary of the Invention

[0006] To address the shortcomings of existing technologies, the purpose of this application is to provide a calibration circuit and calibration method for a differential detector, which can improve the detection accuracy of the differential detector.

[0007] To achieve the above objectives, this application provides a power calibration circuit for a differential detector, used to calibrate the power of the differential detector, wherein the differential detector is electrically connected to a transimpedance amplifier;

[0008] The power calibration circuit includes:

[0009] The differential-to-single-ended unit is used to be electrically connected to the output terminal of the transimpedance amplifier to convert the differential signal output by the differential detector into a single-ended signal.

[0010] A comparison unit, connected to the differential-to-single-ended unit, is used to determine whether the single-ended signal is a set calibration value;

[0011] The calibration power input unit is used to electrically connect with the differential detector to be calibrated and output a stable calibration power signal to the differential detector to be calibrated.

[0012] The control unit is connected to the comparison unit and the power calibration unit. When the single-ended signal is not at the set calibration value, the control unit outputs a control signal to the power calibration unit to calibrate the power of the differential detector until the single-ended signal is at the set calibration value.

[0013] The present invention provides a differential detector system, comprising: a differential detector, a transimpedance amplifier electrically connected to the differential detector, and the power calibration circuit.

[0014] This invention discloses a power calibration method for a differential detector, wherein the output terminal of the differential detector is electrically connected to a transimpedance amplifier; comprising,

[0015] Provide the differential detector to be calibrated;

[0016] The differential signal output by the differential detector is converted into a single-ended signal;

[0017] A signal with a calibration value is input to the differential detector;

[0018] Compare the single-ended signal with the set calibration value to determine whether the two are the same;

[0019] Based on the comparison result, a control signal is output to calibrate the power of the differential detector until the single-ended signal reaches the set calibration value, thus completing the power calibration.

[0020] To achieve the above objectives, this application provides a control unit that stores a processor and a memory with executable instructions, the processor being configured to execute the instructions to implement the power calibration method described above.

[0021] To achieve the above objectives, this application provides a computer-readable storage medium storing at least one computer instruction, which is loaded and executed by a processor to implement the power calibration method described above.

[0022] To achieve the above objectives, this application provides a computer program product, characterized in that the computer program product includes computer instructions, which, when executed, implement the power calibration method as described above.

[0023] This application discloses a power calibration circuit and calibration method for a differential detector. By adjusting the bias voltage output by the differential detector when the calibration signal is input and / or the transimpedance gain of the transimpedance amplifier, the low detection accuracy of the differential detector caused by temperature, process and voltage difference within the differential detector and transimpedance amplifier is avoided, and the detection accuracy of the differential detector is greatly improved. Attached Figure Description

[0024] The accompanying drawings are provided to further illustrate the present application and form part of the specification. Together with the embodiments of the present application, they serve to explain the present application but do not constitute a limitation thereof. In the drawings:

[0025] Figure 1 This is a schematic diagram of the application circuit of a differential detector;

[0026] Figure 2 The characteristic curve of the differential detector;

[0027] Figure 3 This is a schematic diagram of the differential detector.

[0028] Figure 4 This is a schematic diagram of the calibration circuit of the differential detector provided in Embodiment 1 of this application;

[0029] Figure 5 This is a schematic diagram of the control unit in Embodiment 1 of this application;

[0030] Figure 6 This is a schematic diagram of the characteristic curves before and after power calibration in Embodiment 1 of this application;

[0031] Figure 7 This is a schematic diagram of the bias adjustment unit in Embodiment 1 of this application;

[0032] Figure 8 This is a schematic diagram of the calibration power input unit in Embodiment 1 of this application;

[0033] Figure 9 This is a flowchart illustrating the calibration circuit of the differential detector in Embodiment 1 of this application. Detailed Implementation

[0034] Embodiments of this application will now be described in more detail with reference to the accompanying drawings. While some embodiments of this application are shown in the drawings, it should be understood that this application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this application. It should be understood that the drawings and embodiments of this application are for illustrative purposes only and are not intended to limit the scope of protection of this application.

[0035] It should be understood that the steps described in the method embodiments of this application may be performed in different orders and / or in parallel. Furthermore, the method embodiments may include additional steps and / or omit the steps shown. The scope of this application is not limited in this respect.

[0036] The term "comprising" and its variations as used herein are open-ended inclusions, meaning "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Definitions of other terms will be given in the description below.

[0037] It should be noted that the terms "one" and "multiple" used in this application are illustrative rather than restrictive, and those skilled in the art should understand that, unless explicitly stated otherwise in the context, they should be understood as "one or more". "Multiple" should be understood as two or more.

[0038] Through long-term research and analysis, the inventors discovered that existing chip-integrated differential detectors are limited by the process / voltage / temperature (PVT) deviations of the on-chip MOSFETs, resulting in low detection accuracy.

[0039] Figure 3 This is a schematic diagram of the circuit structure of a differential detector, where the differential current I is shown. DS1 I DS2 Input signal V rf、 Differential voltage V diff They are respectively:

[0040]

[0041]

[0042] V rf =V i cos(ωt);

[0043]

[0044] Differential voltage V diff V is obtained by RC low-pass filtering of the transimpedance amplifier. diff_Ipf :

[0045]

[0046] Taking the logarithm, we get:

[0047] The average power of the input signal.

[0048] Where, μ n For electron mobility, C ox The gate oxide capacitance per unit area, μ n C ox Where W / L is the process constant, W / L is the width-to-length ratio of the MOSFET, and V is the process constant. th Rs is the threshold voltage of the MOSFET, and V is the internal resistance of the signal source. rf This is the input signal. μ n C ox The output voltage error introduced by parameter changes with process / temperature will reduce the accuracy of the detector.

[0049] To address the above problems, the inventors have proposed the following solutions, and the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0050] Example 1

[0051] One embodiment of this application provides a power calibration circuit for a differential detector, which calibrates the power to improve detection accuracy and thus improve the performance of the differential detector.

[0052] Figure 4 This is a schematic diagram of the power calibration circuit of the differential detector provided in Embodiment 1 of this application. The following will refer to... Figure 4 The calibration circuit of the differential detector in this application is described in detail. A calibration circuit for a differential detector 100 is used to calibrate the differential detector 100, the output terminal of the differential detector 100 being connected to the input terminal of the transimpedance amplifier 101.

[0053] refer to Figure 4 In this embodiment of the invention, the differential detector calibration circuit includes:

[0054] The differential-to-single-ended unit 103 is used to be electrically connected to the output terminal of the transimpedance amplifier 101 to convert the differential signal output by the differential detector into a single-ended signal.

[0055] The comparison unit 209 is connected to the differential-to-single-ended unit and is used to determine whether the single-ended signal is a set calibration value;

[0056] The calibration power input unit 107 is used to be electrically connected to the differential detector 100 to be calibrated, and outputs a stable calibration power signal to the differential detector 100 to be calibrated.

[0057] The control unit 106 and the power calibration unit, the power calibration unit may be a bias adjustment unit 108 or a variable resistor unit including resistors R4 and R5.

[0058] The control unit 106 is connected to the comparison unit 209 and the power calibration unit. When the single-ended signal is not at the set calibration value, it outputs a control signal to the power calibration unit to calibrate the power of the differential detector until the single-ended signal is at the set calibration value.

[0059] The calibration power input unit 107 is used to be electrically connected to the differential detector 100 to be calibrated. The output terminal of the calibration power input unit 107 is provided with a first switch S1. When the first switch S1 is closed, a stable calibration value signal is output to the differential detector 100 to be calibrated. The calibration value can be a calibration power value or a calibration voltage value.

[0060] Continue to refer to Figure 4 In this embodiment, the differential-to-single-ended unit includes: an operational amplifier T2, whose positive input terminal and negative input terminal are respectively connected to the two differential output terminals of the transimpedance amplifier unit;

[0061] The first resistor R1 is connected at both ends to the non-inverting input terminal and one of the differential output terminals, respectively.

[0062] The second resistor R2 is connected at its two ends to the negative phase input terminal and another differential output terminal, respectively.

[0063] The third resistor R3 is connected at both ends to the output terminal and the negative input terminal of the operational amplifier, respectively.

[0064] It should be noted that the implementation of the differential-to-single-ended unit in this invention is not limited to... Figure 4 The embodiments shown can be implemented using any circuit structure that can convert differential signals to single-ended signals. For example, resistors R1, R2, and R3 can be omitted, or other components can be added to the circuit as needed. Amplifier T2 can be a rail-to-rail amplifier (OPA).

[0065] Continue to refer to Figure 4 The comparison unit 200 is used to compare the output single-ended signal with the set calibration value to determine whether the two are the same. The control unit 106 is connected to the power calibration unit and the comparison unit 200. According to the comparison result of the comparison unit, the control unit outputs a second control signal to the power calibration unit to adjust the bias voltage of the input detector, and / or outputs a third control signal to adjust the value of the parallel resistor of the transimpedance amplifier until the single-ended signal is the set calibration value, which can be a calibration voltage value or a calibration power value.

[0066] For power calibration, in the comparison unit 200, the analog-to-digital converter 104 is connected to the output of the differential-to-single-ended converter 103 to convert the single-ended signal into a digital signal; the register 105 is used to confirm whether the single-ended signal is a preset calibration value and output a feedback signal to the control unit. Since the single-ended signal is converted to a digital signal, the calibration value here corresponds to the digital signal of the calibrated power value or calibrated voltage value; of course, analog-to-digital conversion can be omitted, in which case the calibration value corresponds to the calibrated power value or calibrated voltage value. The register 105 confirms whether the single-ended signal is a preset calibration value by: storing the preset calibration value in the register; comparing the power value or voltage value corresponding to the single-ended signal converted to a digital signal from the analog-to-digital converter (read from the converter or sent by the converter) with the preset calibration value (which can be a power calibration value or a voltage calibration value) to confirm whether they are the same.

[0067] Reference Figure 9 The calibration power signal emitted by the calibration power input unit 107 is a square wave signal with fixed frequency, fixed amplitude and unaffected by PVT (i.e., process, differential pressure and temperature) generated by the combination of low dropout linear regulator (LDO) 1071 and square wave oscillator 1072. The square wave signal is amplified by the drive unit 1073 and then output.

[0068] Continue to refer to Figure 4 and Figure 6 , Figure 9 During power calibration, logic unit 1061, electrically connected to comparison unit 200, determines the corresponding control bit to be output to the drive unit based on the result output by the comparison unit. The comparison result here is the result of comparing the single-ended signal output by the comparison unit with a preset calibration value; the two may be the same or different. When adjusting the bias voltage, a second control bit is output; when adjusting the variable resistor unit, a third control bit is output.

[0069] The driving unit 1062 converts the second control bit into a second driving level and outputs it to the bias adjustment unit, where the second driving level serves as a second control signal; or converts the third control bit into a third driving level and outputs it to the variable resistor unit, where the second driving level serves as a second control signal.

[0070] The first driving level and the third driving level are driving voltages of different magnitudes, and the second driving level is a gate driving voltage of different magnitudes.

[0071] Continue to refer to Figure 4In this embodiment of the invention, the calibration circuit further includes a first switch S1 and a second switch S2. The first switch S1 is connected to the input terminal of the differential detector 100. When the first switch S1 is closed, the calibration power input unit outputs a stable calibration power signal to the differential detector at different calibration temperatures. The second switch is used to connect the radio frequency input signal and the detector.

[0072] Continue to refer to Figure 4 and Figure 6 The control unit 106 is also used to control the opening or closing of the first switch S1 and the second switch S2. At this time, the control unit 106 outputs high and low levels to control the opening or closing of the switches.

[0073] In this embodiment, due to μ n C ox The parameters change continuously with process / temperature variations, leading to a decrease in detector accuracy. To eliminate μ... n C ox The effect of parameter changes is that a calibration signal is input to the differential detector. By adjusting the bias voltage of the differential detector and the amplification factor of the transimpedance amplifier, the single-ended signal is made to have a calibration value. That is, the voltage or power value of the single-ended signal is the same as the calibration value, thus eliminating the situation where the single-ended signal is not the voltage calibration value due to process / temperature changes.

[0074] Figure 7 This is a schematic diagram of the characteristic curves before and after power calibration in Embodiment 1 of this application; as shown Figure 7 As shown, after power calibration of the differential detector 100, the operating accuracy of the differential detector 100 is significantly improved.

[0075] Reference Figure 8 In this embodiment of the invention, the bias adjustment unit 108 includes two integrators 109. The input terminals of the two integrators 109 are connected to the control unit 106, and the output terminals of the integrators 109 are respectively connected to the two voltage bias terminals V of the differential detector 100. bias1 and V bias2 Connect the two voltage bias terminals V bias1 and V bias2 Independently configured, the integrator 109 receives the second control signal output by the control unit for adjusting the bias voltage, converts it into an analog signal, applies it to the two voltage bias terminals, and thus adjusts the voltage magnitude of the two bias voltage terminals.

[0076] It should be noted that in the classic circuit structure of a differential detector, V bias1 and V bias2 They are connected together, and in this embodiment, V bias1 and Vbias2 As two independent voltage bias terminals, they do not need to be connected together, and the voltages of the two voltage bias terminals are independently controlled by the control unit 106. However, this application does not exclude the possibility that the two bias terminals are simultaneously controlled by the control unit 106, and the two bias terminals can be connected together or set independently.

[0077] In embodiments of the present invention, power calibration can also be performed by adjusting the gain of the transimpedance amplifier. Based on this, further references are made. Figure 4 and Figure 6 In an embodiment of the present invention, the power calibration unit further includes:

[0078] A variable resistor unit, including variable resistors R4 / R5, is connected in parallel between the input and output terminals of the transimpedance amplifier to adjust the amplification factor of the transimpedance amplifier. The variable resistor unit is also electrically connected to the control unit 106 and receives a third control signal fed back by the control unit 106 to adjust the amplification factor until the single-ended signal is the set calibration value.

[0079] In this embodiment, the variable resistor unit includes the existing variable resistors R4 / R5 at both ends of the transimpedance amplifier. In other embodiments of the present invention, the variable resistor unit may also be a newly added unit outside the transimpedance amplifier, which may include one or more variable resistors connected in parallel between the input and output terminals of the transimpedance amplifier.

[0080] Figure 9 This is a flowchart illustrating the calibration circuit of the differential detector in an embodiment of this application. (Refer to...) Figure 9 In this circuit, path 1 involves the control unit selecting the input RF signal RFIN / calibration power signal / no power signal to enter the differential detector 100 by controlling the opening or closing of the first switch S1 and the second switch S2; path 2 involves the control unit 106 adjusting the output voltage of the bias adjustment unit 108 according to the value of the digital signal read from the register 105; path 3 involves the control unit 106 adjusting the calibration current of the current unit 102 according to the value of the digital signal read from the register 105; path 4 involves the control unit 106 adjusting the transimpedance gain of the transimpedance amplifier 101 according to the value of the digital signal read from the register 105; path 5 involves the control unit 106 debugging and powering on the analog-to-digital converter (ADC) 104; and path 6 involves the control unit 106 debugging and powering on the output register 105 and reading the digital signal from the register 105.

[0081] refer to Figure 9During the period of debugging and powering on the ADC (Analog-to-Digital Converter) and REG (Register), Path 1 is in a state where both switches S1 and S2 are open and no power signal is input to the detector. Paths 2 and 3 are in a state of no control input. Path 4 completes the power-on and self-calibration check of the ADC during this period. Path 5 completes the power-on and self-calibration check of the REG during this period.

[0082] During the power calibration period, path 1 is in the state where switch S1 is on and switch S2 is off, and a signal with the calibration value is input to the detector; path 2 is in the state where the bit of the detector bias voltage is adjusted at different temperatures and with different chips, that is, the bias voltage is adjusted, until the digital signal reaches the calibration value, that is, the single-ended signal reaches the calibration value; path 3 is in the state where the bit of the transimpedance value is adjusted at different temperatures and with different chips, the amplification factor of the transimpedance amplifier is adjusted, until the single-ended signal reaches the calibration value; path 4 is in the state of ADC sampling (normal operation); path 5 is in the state of REG outputting digital signal (normal operation).

[0083] Once calibration is complete, during the detection period, path 1 is in a state where switch S1 is off and switch S2 is on, and the RF signal is input to the detector; paths 2 and 3 are both in a state where the current bit is input; path 4 is in a state where the ADC is sampling (normal operation); and path 5 is in a state where the REG outputs a digital signal (normal operation).

[0084] In this flowchart, the amplification factor of the transimpedance amplifier and the bias voltage of the differential detector are adjusted simultaneously. In other examples, the amplification factor of the transimpedance amplifier and the bias voltage of the differential detector can be adjusted separately, or only one of them can be adjusted.

[0085] Example 2

[0086] Embodiment 2 of the present invention is a power calibration method for a differential detector, wherein the output terminal of the differential detector is electrically connected to a transimpedance amplifier; the calibration method includes:

[0087] Provide the differential detector to be calibrated;

[0088] The differential signal output by the differential detector is converted into a single-ended signal;

[0089] A signal with a calibration value is input to the differential detector;

[0090] Compare the single-ended signal with the set calibration value to determine whether the two are the same;

[0091] Based on the comparison result, a control signal is output to calibrate the power of the differential detector until the single-ended signal reaches the set calibration value, thus completing the power calibration.

[0092] The power calibration of the differential detector includes adjusting the bias voltage input to the differential detector and / or adjusting the amplification factor of the transimpedance amplifier. That is, power calibration can be performed by adjusting the bias voltage input to the differential detector alone, or by adjusting the amplification factor of the transimpedance amplifier alone, or by performing both adjustments simultaneously or sequentially. Specifically, adjusting the transimpedance amplifier amplification factor...

[0093] The process of comparing the single-ended signal and the preset calibration value to determine if they are the same includes: storing the preset calibration value; and comparing the single-ended signal with the preset calibration value. The single-ended signal can be a digital signal that has undergone analog-to-digital conversion, or it can be a signal that has not undergone analog-to-digital conversion. Depending on the signal type, the type of the preset calibration value needs to be changed accordingly.

[0094] The power calibration method in Example 2 can be implemented using the components of Example 1, but is not limited to the components of Example 1. It can be other components that can implement the method of this example.

[0095] Example 3

[0096] A control unit, the control unit having a processor and a memory storing executable instructions, the processor being configured to execute the instructions to implement the method described in Embodiment 2.

[0097] Example 4

[0098] A computer-readable storage medium storing at least one computer instruction, which is loaded and executed by a processor to implement the method described in Embodiment 2.

[0099] Example 5

[0100] A computer program product, the computer program product including computer instructions, which, when executed, implement the method described in Embodiment 2.

[0101] Example 6

[0102] A differential detector system includes: a differential detector, a transimpedance amplifier electrically connected to the differential detector, and the calibration circuit described in Example 1.

[0103] The above description is merely a partial embodiment of this application and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of disclosure in this application is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features with similar functions disclosed in this application.

[0104] Furthermore, while the operations are described in a specific order, this should not be construed as requiring these operations to be performed in the specific order shown or in sequential order. Multitasking and parallel processing may be advantageous in certain environments. Similarly, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of this application. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.

[0105] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.

Claims

1. A power calibration circuit for a differential detector, used to calibrate the power of the differential detector, wherein the differential detector is electrically connected to a transimpedance amplifier; Its features are, The power calibration circuit includes: The differential-to-single-ended unit is used to be electrically connected to the output terminal of the transimpedance amplifier to convert the differential signal output by the differential detector into a single-ended signal. A comparison unit, connected to the differential-to-single-ended unit, is used to determine whether the single-ended signal is a set calibration value; The calibration power input unit is used to electrically connect with the differential detector to be calibrated and output a stable calibration power signal to the differential detector to be calibrated. The control unit is connected to the comparison unit and the power calibration unit. When the single-ended signal is not at the set calibration value, the control unit outputs a control signal to the power calibration unit to calibrate the power of the differential detector until the single-ended signal is at the set calibration value.

2. The power calibration circuit of the differential detector as described in claim 1, characterized in that, The power calibration unit includes a bias voltage adjustment unit for receiving the control signal to adjust the bias voltage.

3. The power calibration circuit of the differential detector as described in claim 2, characterized in that, The bias voltage adjustment unit includes two integrators, the input terminals of which are connected to the control unit, and the output terminals of which are respectively connected to the two voltage bias terminals of the differential detector, wherein the two voltage bias terminals are independently configured.

4. The power calibration circuit of the differential detector as described in claim 1, characterized in that, The power calibration unit includes a variable resistor unit, which is connected in parallel between the input and output terminals of the transimpedance amplifier to adjust the amplification factor of the transimpedance amplifier. The variable resistor unit is electrically connected to the control unit and receives control signals from the control unit to adjust the amplification factor.

5. The power calibration circuit of the differential detector as described in claim 4, characterized in that, The variable resistor unit includes existing variable resistors at both ends of the transimpedance amplifier or includes newly added variable resistors.

6. The power calibration circuit of the differential detector as described in claim 1, characterized in that, The comparison unit includes: An analog-to-digital converter unit is connected to the output terminal of the differential-to-single-ended unit and is used to convert the single-ended voltage into a digital signal. The register stores the set calibration value and is used to confirm whether the single-ended signal is the set calibration value.

7. The power calibration circuit of the differential detector as described in claim 1, characterized in that, The control unit includes: a logic unit and a drive unit; The logic unit is electrically connected to the comparison unit and determines the control bit to be output to the drive unit based on the result output by the comparison unit. The driving unit converts the control bit into a driving level and outputs it to the power calibration unit.

8. The power calibration circuit of the differential detector as described in claim 1, characterized in that, The calibration power input unit includes an electrically connected low-dropout linear regulator and a square wave oscillator.

9. The power calibration circuit of the differential detector as described in claim 1, characterized in that, Also includes: A first switch is used to connect between the calibration power input unit and the differential detector.

10. The power calibration circuit of the differential detector as described in claim 1, characterized in that, It also includes a second switch for connecting the radio frequency input signal and the differential detector.

11. The power calibration circuit of the differential detector as described in claim 1, characterized in that, The differential-to-single-ended unit includes: The operational amplifier has its positive and negative input terminals connected to the two differential output terminals of the transimpedance amplifier unit, respectively. The first resistor has its two ends connected to the non-inverting input terminal and one of the differential output terminals, respectively. The second resistor is connected at both ends to the negative phase input terminal and another differential output terminal, respectively. The third resistor is connected at both ends to the output terminal and the negative input terminal of the operational amplifier, respectively.

12. A differential detector system, characterized in that, include: Differential detector, and transimpedance amplifier electrically connected to the differential detector; The power calibration circuit according to any one of claims 1-11.

13. A power calibration method for a differential detector, wherein the output terminal of the differential detector is electrically connected to a transimpedance amplifier; characterized in that, include, Provide the differential detector to be calibrated; The differential signal output by the differential detector is converted into a single-ended signal; A signal with a calibration value is input to the differential detector; Compare the single-ended signal with the set calibration value to determine whether the two are the same; Based on the comparison result, a control signal is output to calibrate the power of the differential detector until the single-ended signal reaches the set calibration value, thus completing the power calibration.

14. The power calibration method as described in claim 13, characterized in that, The power of the differential detector is calibrated, including: Adjust the bias voltage of the input differential detector, and / or adjust the amplification factor of the transimpedance amplifier.

15. The power calibration method as described in claim 13, characterized in that, Comparing the single-ended signal with the set calibration value to determine whether the two are the same includes: Store preset calibration values; The single-ended signal is compared with the preset calibration value.

16. A control unit, characterized in that, The control unit stores a processor and a memory with executable instructions, the processor being configured to execute the instructions to implement the power calibration method as described in any one of claims 13-15.

17. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores at least one computer instruction, which is loaded and executed by a processor to implement the power calibration method as described in any one of claims 13-15.

18. A computer program product, characterized in that, The computer program product includes computer instructions that, when executed, implement the power calibration method as described in any one of claims 13-15.

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