High density pixel array for free viewing 3D display

Abstract

Micro light emitting diode (microLED) based display devices include a plurality of small chips. Each small chip includes one or more clusters of zones, each cluster of zones including a plurality of microLEDs supported on a substrate. The small chip also includes a micro integrated circuit (microIC) electrically connected with the one or more clusters of zones. The microIC includes a plurality of interconnects supported on a backplane such that, when connected with the clusters of zones, the microIC can be used to electrically drive each microLED of the clusters of zones. In embodiments, a plurality of small chips are disposed on a display substrate for free viewing pure horizontal parallax 3D displays.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 128,686, filed December 21, 2020, the entire contents of which are incorporated herein by reference. Background Technology

[0003] Various types of displays have been proposed to provide auto-viewing (i.e., viewing without glasses or near-eye optics, or "auto-viewed") three-dimensional (3D) displays. One class of such auto-viewing 3D displays, referred to as pure horizontal parallax (HPO) displays, lenticular displays, grating barrier displays, or parallax barrier displays, incorporates various means of separating different parallax views in one dimension (e.g., horizontally). Such displays include apertures or lenses to multiplex a two-dimensional (2D) pixel array to a specific and limited viewing angle, thereby enabling the presentation of different parallax or animated sequence scene views to each eye. For example, the number of discrete parallax view channels is determined by the field of view of the lenticular lens used within the display, the spacing between pixels and the lens or aperture, the width of the lens or aperture, and the size of the pixels. Examples of existing auto-viewing 3D displays are described in U.S. Patent Publications Kroon et al. No. 2016 / 0234487A1 and Kim et al. No. 2017 / 0208319A1.

[0004] When the view distribution is confined to the horizontal direction, the number of different samples in the horizontal direction within a pixel layer is at least twice as large, and can be as much as a hundred times or more, larger than the number of different samples in the vertical direction. Standard display technologies, such as those based on organic light-emitting diodes (OLEDs) or transmissive liquid crystals (LCs), are limited in the minimum size of pixels, and therefore also in the size of lens sizes or aperture spacing, as pixel size is constrained by the required display brightness and the actual size of the pixel driving circuitry. By using tilted lenticular lenses (see Kroon et al., cited above) and pixels from several vertical rows (see Kim et al., cited above), some trade-offs have been employed to increase the number of horizontal angles and the distribution span, while potentially reducing crosstalk, albeit at the expense of the display's vertical resolution.

[0005] Solutions to overcome such problems in existing display systems would be desirable. Summary of the Invention

[0006] The following is a simplified overview of one or more aspects to provide a basic understanding of them. This overview is not a comprehensive summary of all conceived aspects, nor is it intended to identify key or extremely important elements of all aspects, nor to describe the scope of any or all aspects. Its purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed descriptions that follow.

[0007] In one embodiment, the microLED-based display device includes a plurality of chiplets. Each chiplet includes one or more raxels, and each raxel includes a plurality of microLEDs supported on a substrate. The chiplet also includes a microintegrated circuit (microIC) electrically connected to the one or more raxels. The microIC includes a plurality of interconnects supported on a backplane, such that when connected to a raxel, the microIC can be used to electrically drive each microLED in the raxel. In another embodiment, the plurality of chiplets are disposed on a display substrate for free viewing of a pure horizontal parallax 3D display. Attached Figure Description

[0008] The attached figures only illustrate some implementation methods and should not be considered as a limitation on the scope.

[0009] Figure 1 The illustration shows a display system configuration according to an embodiment.

[0010] Figure 2 The illustration shows a pixel configuration of a display system including an alternative architecture according to an embodiment.

[0011] Figure 3 and Figure 4 The illustration shows the configuration of an alternative display system according to an embodiment.

[0012] Figure 5 and Figure 6 The illustration shows yet another variation of the pixel configuration of the display system according to an embodiment.

[0013] Figures 7 to 10 An additional variation of the pixel configuration of a display system according to another embodiment is illustrated.

[0014] Figure 11 The illustration shows another alternative embodiment of the display system pixel configuration.

[0015] Figures 12 to 14 Another exemplary display system configuration according to an embodiment is illustrated.

[0016] Figures 15 to 17 The illustration shows an additional display system configuration according to another embodiment.

[0017] Figures 18 to 20The illustration shows yet another display system configuration according to an embodiment. Detailed Implementation

[0018] The invention is described more fully below with reference to the accompanying drawings, in which embodiments of the invention are illustrated. However, the invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to make this disclosure thorough and complete, and to fully convey the scope of the invention to those skilled in the art. In the drawings, the sizes and relative dimensions of layers and regions may be enlarged for clarity.

[0019] It should be understood that while the terms first, second, third, etc., may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or portion from another. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, or portion discussed below may be referred to as the second element, component, region, layer, or portion.

[0020] Spatial terms, such as “below,” “under,” “lower,” “below,” “above,” and “upper,” are used herein for descriptive purposes to describe the relationship between one element or feature illustrated in a figure and another element or feature. It should be understood that, in addition to the orientation depicted in the figure, spatial terms are intended to cover different orientations of the device in use or operation. For example, if the device in the figure is flipped, the element would be described as being “below,” “under,” or “below” other elements or features. Thus, the exemplary terms “below” and “below” can cover orientations above and below. The device may be oriented in other ways (rotated 90 degrees or otherwise), and the spatial descriptors used herein shall be interpreted accordingly. Furthermore, it should be understood that when a layer is referred to as being “between” two layers, it may be the only layer between those two layers, or there may be one or more intermediate layers.

[0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular forms “a,” “an,” and “the,” and “the,” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including” as used in this specification designate the presence of stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. As used herein, the term “and / or” includes any and all combinations of one or more associated listed items and may be abbreviated to “ / .”

[0022] It should be understood that when a component or layer is referred to as being "on," "connected to," "coupled to," or "adjacent to" another component or layer, it can be directly on, connected to, coupled to, or adjacent to that other component or layer, or there may be intermediate components or layers. Conversely, when a component is referred to as being "directly on," "directly connected to," "directly coupled to," or "immediately adjacent to" another component or layer, there are no intermediate components or layers. Similarly, when light is received or supplied "from" a component, it can be received or supplied directly from that component or from an intermediate component. On the other hand, when light is received or supplied "directly" from a component, there are no intermediate components.

[0023] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of idealized embodiments (and intermediate structures). Therefore, variations in shape as illustrated are expected due to factors such as manufacturing techniques and / or tolerances. Consequently, embodiments of the invention should not be construed as limited to the specific shapes of the regions illustrated herein, but rather include shape deviations, for example, caused by manufacturing processes. Therefore, the regions illustrated are schematic in nature, and their shapes are not intended to illustrate actual shapes of device areas, nor are they intended to limit the scope of the invention.

[0024] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in common dictionaries shall be interpreted as having the same meaning as they have in the context of the relevant technology and / or this specification, and shall not be interpreted as having an idealized or overly formal meaning unless expressly defined herein.

[0025] To produce high-brightness, free-viewing 3D HPO displays (e.g., based on lenticular lenses or grating barriers), the pixel density should be relatively high compared to the lens size and / or aperture spacing. Furthermore, the luminous flux of the display should be equal to or greater than that of its 2D counterpart. For organic light-emitting diode (“OLED”) and liquid crystal-based (“LCD”) displays, such requirements are inherently impractical and contradictory, as the minimum pixel size of such displays is limited by brightness requirements, the physical properties of the pixel layer, the practical circuit density of the necessary thin-film transistor (“TFT”) or low-temperature polysilicon (“LTPS”) backplane circuitry, and, in the case of LCDs, the basic backlight requirements per pixel. For example, for existing displays, these limitations, along with TFT and LTPS scale limitations, restrict the size of red-green-blue (“RGB”) pixels to approximately 30 micrometers by 30 micrometers (e.g., the Premium OLED display on the Sony Xperia Z5 phone), approximately 50 micrometers by 50 micrometers (e.g., the Liquid Retina display on the Apple iPhone 11), down to approximately 110 by 110 square micrometers (e.g., the Retina display on the Apple MacBook).

[0026] While using complementary metal-oxide-semiconductor (“CMOS”) backplanes can provide much higher density pixel driving circuitry, exceeding 10,000 pixels per square inch, silicon-based CMOS backplanes are more expensive than TFT or LTPS backplanes. Laying out large LC or OLED display panels with CMOS backplanes is not cost-effective. Furthermore, the mechanical tolerances for the alignment of high-density display pixels with respect to small lenses or apertures can be problematic. Small lenses or apertures are typically formed separately from display pixels in large sheets using techniques such as injection molding, extrusion, or printing, and are applied to the display pixels using, for example, pressure-sensitive adhesives. All of these processes are inherently limited by mechanical tolerances on the order of tens of micrometers. If the number of pixels behind each lens / aperture is limited, and the ratio between the lens / aperture size and the pixel size is in the single digits, undesirable artifacts associated with misalignment between lenses / apertures and pixels cannot be compensated for by calibration or by software. The typically large area of ​​the display exacerbates these problems compared to pixel and lens / aperture sizes, as tolerance errors accumulate from one side of the display to the other or from the center to the edges during manufacturing. Given these limitations in manufacturability, brightness, and driving circuitry, it is difficult to produce high surface resolution, high angular resolution, and high brightness HPO free-viewing 3D displays using existing technologies.

[0027] In contrast, inorganic microLEDs can produce high brightness from small emission areas and have proven to be a viable source of display pixels. See, for example, International Patent Publications Nos. WO2019 / 209945A1, WO2019 / 209957A1, and WO2019 / 209961 by He et al., all of which are incorporated herein by reference in their entirety. The emission flux from a single microLED emitter has been shown to be several orders of magnitude higher than that of larger-area OLED devices, and also significantly higher than that practically achievable with transmissive LC and backlighting. Thus, the emergence of smaller, higher-density, brighter, and more efficient light-emitting pixels offers a unique solution to the aforementioned problems.

[0028] The size limit for visually discernible pixels at a typical arm's length working distance is considered to be approximately 150 micrometers (i.e., approximately 1 arcminute / pixel), while microLEDs offer extremely bright light emission at a fraction of that size. For example, a 10-micrometer by 10-micrometer square microLED can emit up to 1000 times the luminous flux of a 10,000-square-micrometer OLED or LC pixel (e.g., 500,000 nits compared to 500 nits). That is, emitters within a microLED display can be spaced apart such that full-color red-green-blue (RGB) pixel units can be located within a spacing of less than 3 micrometers, where all three colors can be emitted simultaneously and essentially. Therefore, while maintaining an overall pixel size of 10,000 square micrometers, the required microLED emitting area is significantly smaller than that of OLED or LC pixels, while providing retina-level resolution and even higher luminous flux.

[0029] Utilizing the characteristics of microLEDs as described above, a new configuration for freely viewing an HPO 3D display is disclosed. Figure 1 The illustration depicts a concept related to a display system incorporating microLEDs according to an embodiment. For example... Figure 1As shown, the microLED emitter array 100 includes a plurality of microLEDs supported on a wafer 104. As illustrated in Figure 108, microLEDs 110A, 110B, and 110C are arranged in an array, with the spacing between each microLED ranging from approximately ten micrometers down to the submicrometer level. For example, microLEDs with emitter spacing on the order of several micrometers that provide light emission in the visible wavelength range at high brightness (i.e., on the order of hundreds of thousands of nits) have been illustrated. MicroLEDs 110A, 110B, and 110C can each emit light energy at wavelengths different from each other. For example, microLED 110A can emit in the red wavelength range, microLED 110B can emit in the blue wavelength range, and microLED 110C can emit in the green wavelength range. It should be noted that although microLEDs of similar colors are shown arranged in rows in Figure 108, microLEDs can be arranged in other configurations, such as in pairs, clusters, and other suitable forms for specific applications, without departing from the scope of this document.

[0030] Continue to refer to Figure 1 A portion of the microLED emitter array 100 is isolated into clusters or "regional clusters" 120. Regional clusters 120 can be created, for example, by dividing the microLED array 100 into multiple regional clusters. Figure 1 As shown, cluster 120 includes one microLED 110A and one microLED 110B, and two microLEDs 110C, which are supported on substrate portion 122 of wafer 104. Cluster 120 is then electrically connected to microintegrated circuit (microIC) 130. MicroIC 130 includes multiple interconnects 132 supported on backplane portion 134, such that when connected to cluster 120, microIC 130 can be used to electrically drive each of microLEDs 110A, 110B, and 110C. When cluster 120 is electrically connected to microIC 130, they together form a “chiplet” 135 with an overall pitch on the order of 10 micrometers or less.

[0031] Finally, multiple small chips 135 can be transferred to the display backplane to form a microLED display 140, a portion of which is in Figure 1As shown in the diagram, the microLED display 140 correspondingly includes multiple horizontal bus lines 142 and vertical bus lines 144, supported on a display backplane 146. For example, since each chiplet 135 has a spacing on the order of ten micrometers or less, the distance between the chiplets 135 can be 50 to 100 micrometers to keep the pixel size below the size limit of 150 micrometers discussed above, while providing high brightness emission at one or more wavelengths, requiring simplified electronic connections, and leaving space on the display backplane 146 for additional components, such as sensor elements and other small electronic or optical components. Furthermore, microlenses or other optical elements optically coupled to the light-emitting pixels in the display for guiding light from the light-emitting pixels to desired locations have a size on the order of one hundred micrometers. Therefore, the optical alignment of such optical elements with respect to the chiplets 135 is simplified compared to conventional displays where the light-emitting elements occupy most of the pixel footprint. Similarly, artifacts caused by shadows or edge effects due to the edges of microlenses or optical elements partially obscuring microLED 110 are eliminated, since microlenses or optical elements can easily cover chip 135.

[0032] Although Figure 1 A cluster 120 cut out from a dense array 100 of microLEDs is shown, but the cluster 120 may alternatively be formed by transferring each or a group of microLEDs from the microLED array 100 onto a substrate portion 120. In the example, the microLED array 100 may include microLEDs emitting different wavelengths, such as... Figure 1 As shown, or all emitted at a single wavelength.

[0033] The concept of chiplets, for example, chiplet 135 in Figure 2 The illustrated embodiment is an extension. For example... Figure 2 As shown, a portion of the display 200 includes chiplets 202. Each chiplet 202 includes a cluster 210, which in turn includes a plurality of microLEDs 212A, 212B, and 212C supported on a substrate portion 214. Note that, unlike... Figure 1 As shown, there are four microLEDs, each cluster 210 comprising multiple microLEDs arranged in rows, which will be shown below. Figure 3 Further details are provided below. MicroLEDs 212A, 212B, and 212C are corresponding examples of microLEDs 110A, 110B, and 110C. Cluster 210 is an example of cluster 120.

[0034] Continue to refer to Figure 2Each of the microLEDs 212A, 212B, and 212C emits light, which can be collected and redirected by a structure such as a light cone 216. Each of the microLEDs 212A, 212B, and 212C includes an electrical connector 218 for electrical connection to the microIC 220 via an interconnect 222. The interconnect 222 is supported on a backplane portion 224. The chiplet 202 is then connected to the display backplane 230 via a connector 232. For example, the connector 232 can be a conductive or non-conductive connection. Each chiplet 202 is covered with a multi-view optics 240, which is configured to cooperate with the chiplet to direct light emission from the chiplet to a desired location. The combination of the chiplet 202 and the multi-view optics 240 forms a pixel 250, such as... Figure 2 As shown.

[0035] Figure 3 Further details are shown of an example of a small chip for use in combination with a microlens array, according to an embodiment. Figure 3 As shown, the chiplet 300 includes a cluster 320, which includes a plurality of microLEDs (such as...) supported on a substrate portion 322. Figure 1 (microLEDs 110A, 110B, and 110C). Figure 3 In the example shown, two rows of seventeen microLEDs are arranged in cluster 320, forming multiple sub-clusters 324. Cluster 320 is configured for electrical connection with microIC 330, which in turn includes multiple interconnects 332 supported on a backplane portion 334. Cluster 320 is an example of cluster 210.

[0036] In addition, such as Figure 3 The illustrated chiplet 300 includes a microlens array 350 configured for optical alignment with cluster 320. The microlens array 350 includes a plurality of microlenses 352. In this example, each of the microlenses 352 can be configured for optical alignment with one microLED in cluster 320. Alternatively, each of the microlenses 352 can be sized and aligned to cover each of sub-clusters 324. For example, the microlens array 350 can be incorporated into cluster 320 such that the chiplet 300 includes integrated microlenses thereon. Note that the microlenses 352 can be physically and functionally different from conventional microlenses or optical guidance elements used to separate light from different sub-clusters 324 to form different views. That is, the microlenses 352 can be considered as part of the chiplet 300 while providing a set of individual microlenses to form multiple views formed by the overall 3D display.

[0037] Now for reference Figure 4 A portion of the display 400 includes a plurality of small chips 300 supported on a display backplate 410. The display backplate 410 includes a plurality of horizontal bus lines 412 and vertical bus lines 414, such that the portion of the display 400 shown includes a 4x4 pixel array, with each pixel including a small chip 300. Each of the small chips 300 is driven by the horizontal bus lines 412 and vertical bus lines 414, respectively, to contribute one of a plurality of views generated by the display 400, such as a first view 422 and a second view 424, which are displayed at the right eye 432 and left eye 434, respectively, using, for example, additional lenses or optical guiding elements (not shown).

[0038] In one embodiment, each microLED emitter has a pixel pitch on the order of several micrometers (e.g., less than 10 micrometers, less than 5 micrometers, or less than 3 micrometers), and cluster 320 is supported on a similarly small CMOS backplane for addressing each microLED, with each chiplet having an area as small as 10 micrometers by 60 micrometers. The resulting chiplet 300 may include circuitry that interfaces with an addressing array on the display backplane (e.g., horizontal bus line 412 and vertical bus line 414, respectively) using a specific communication protocol. Alternatively, each chiplet 300 may be configured to be addressable via simpler TFT or LTPS display driving circuitry, thereby significantly reducing the cost and complexity of the resulting display compared to comparable OLED or LC displays. In some embodiments, the driving circuitry may include one or more of decompression circuitry, interpolation circuitry, parallax sorting circuitry, or other circuitry configured to provide processing functionality. Furthermore, the remaining area of ​​the display backplane 410 not covered by the chiplets 300 may be filled with additional electronic or optical components, such as sensors or transistors.

[0039] exist Figure 5 The diagram illustrates an alternative layout for the chiplet according to an embodiment. For example... Figure 5 As shown, the pixel cell 500 includes a chiplet 510 supported on a display backplane 512. The chiplet 510 includes a cluster 520, which in turn includes a substrate portion 522 on which a plurality of microLEDs 524A, 524B, and 524C are supported. Cluster 520 is an example of cluster 320. Although each of the microLEDs 524A, 524B, and 524C is in... Figure 5The microLEDs are shown emitting different colors of light, but other configurations are possible, such as all microLEDs emitting a single color, only two colors, or them emitting specific colors, using a color converter arrangement (not shown) to convert these colors to other wavelengths. Cluster 520 is electrically coupled to microIC 530 (the interconnects of microIC 530 and other components are in...). Figure 5 (Not visible in the middle).

[0040] Figure 6 The illustration shows an embodiment. Figure 5 The application of 500 pixels. Figure 6 The magnified portion of the display 600 is shown. Figure 6 The portion of the display 600 shown includes a 4x4 array of pixel primitives 500. Figure 6 In the illustrated embodiment, the display 600 further includes an array of cylindrical microlenses 620 covering each column of pixel primitives of the display 600, thereby providing a purely horizontal parallax viewing experience by uniquely mapping cluster light to different angles radiating in the horizontal direction. Alternatively, the cylindrical microlenses 620 may be replaced by or combined with a parallax barrier that functions similarly to the cylindrical microlenses. Thus, each pixel primitive 500 contributes to the view seen by the viewer 630 and represented by the light rays 632.

[0041] In this embodiment, each pixel primitive 500 has a size of 150 micrometers by 150 micrometers or smaller, such that when viewed from a working distance of more than 500 millimeters, the pixel primitive spans approximately one arcminute or less. Because the width of each microlens 620 is below the perceptual limit of the viewer 630, and the microLED emitter on each microchip 510 is even smaller than the width of each microlens 620, the display 600 is capable of generating different output fields in multiple directions. Therefore, the display 600 operates to provide a surface resolution perception equivalent to that of a state-of-the-art 2D display, with the ability to depict high-quality, freely viewable 3D images.

[0042] refer to Figures 7 to 10 Discuss the use of similar Figure 5 and Figure 6 The pixel configuration is an alternative to the linear chiplet described in the text. Figure 7Pixel 700 is shown, which includes a backplate 710 on which circuitry 712 is supported. It should be noted that while circuitry 712 is intended to represent a general concept of electronic components supported on the backplate 710, it does not represent a specific circuit diagram in terms of component or size. Pixel 700 also includes a first monochrome chip 722, a second chip 724, and a third chip 726, respectively. Each of the first chip 722, the second chip 724, and the third chip 726 can be formed individually and coupled to the backplate 710. As an example, the first chip 722 includes two rows of microLEDs emitting in the red wavelength range. The second chip 724 includes a row of microLEDs emitting in the green wavelength range, and the third chip 726 includes a row of microLEDs emitting in the blue wavelength range. For example, the first chip 722 includes an additional row of red-emitting microLEDs to compensate for the generally lower efficiency and brightness of red microLEDs compared to currently available green or blue-emitting microLEDs. Pixel 700 overlaps with a portion of cylindrical microlens 730 to guide light from pixel 700 to a desired location to contribute to a portion of the multiple views provided by the overall display including pixel 700.

[0043] Figure 8 This illustrates another variation of the pixel using linear chiplets. For example... Figure 8 As shown, pixel 800 includes many... Figure 7 The same components as pixel 700, where circuitry 712 again represents, but does not specifically indicate, aspects of the electronic components that can be supported on the backplate 710. However, pixel 800 includes a tri-color microchip 820 comprising three rows of microLEDs, each row emitting light in a specific wavelength range, such that each vertical column of microLEDs provides three different colors of light emission. This columnar arrangement is similar to... Figure 5 The hexagonal fill structure shown in the middle diagram is different and allows for higher density packaging of the emitters, as well as optional variable spacing between colors. In this case, all three rows of microLED emitters are driven as a single chip.

[0044] Figure 9 The illustration shows another variation of the linear chiplet pixel, configured to increase the density of different parallax output fields. Again, Figure 9 The circuit 712 shown is intended to illustrate a general concept of electronic components supported on the backplate 710, but is not intended to indicate a specific circuit diagram in terms of components or size. Figure 9 As shown, pixel 900 includes a first small chip 922, which comprises two rows of tri-color microLEDs forming a sub-cluster 924. The sub-cluster 924 is... Figure 3Example of sub-cluster 324. In Figure 9 In the example shown, each sub-cluster 924 includes at least one microLED emitting light in the red wavelength range, at least one microLED emitting light in the green wavelength range, and at least one microLED emitting light in the blue wavelength range. Although Figure 9 A 2x2 microLED array is shown, but other layouts and light emission combinations are also possible.

[0045] Continue to combine Figure 10 refer to Figure 9 Pixel 900 further includes a second chip 932, and two rows of tri-color microLEDs forming a row of sub-pixels 934. The second chip 932 is offset from the first chip 922 by half a sub-pixel, as shown below. Figure 9 As shown in the example. In the example, the leftmost subpixel of the first chip 922 is configured to provide the leftmost portion of the view, the leftmost subpixel of the second chip 932 is configured to provide the second leftmost portion of the view, and so on, as... Figure 10 As shown. That is, if the display device 1010 is formed by a plurality of pixels 900, then the view 1020 seen by the viewer 1030 is as provided by sub-pixels 1, 2, 3, 4... (displayed as numbers adjacent to sub-pixels 924 and 934 respectively corresponding to the first chip 922 and the second chip 932). Figure 1 , 2 Combinations of 1, 3, 4... Figure 10 As shown in the diagram, view 1020 is formed. Thus, the resulting parallax views provided by each of the first chiplet 922 and the second chiplet 932 can be interleaved, increasing the horizontal parallax sampling beyond the pixel pitch limit, thereby producing a higher angular resolution for a given pixel pitch by two chiplets compared to the angular resolution achievable by a single chiplet. A similar method can be applied to parallax barrier-based display systems that incorporate chiplets.

[0046] Another variation of the chiplet concept is... Figure 11 As shown in the image. Figure 11 As shown, pixel 1100 includes a first small chip 1110A and a second small chip 1110B. The first small chip 1110A is horizontally oriented along the top edge of pixel 1100 and includes a cluster 1120. The cluster 1120 is... Figure 1 Example of cluster 120. As described above, cluster 1120 is related to microIC ( Figure 11(Not visible in the image) Electrically coupled. Cluster 1120 includes a substrate portion 1122 on which a row of sub-clusters 1124 are supported. Each sub-cluster 1124 includes a first microLED 1126A, a second microLED 1126B, and a third microLED 1126C. Figure 11 In the example shown, the first microLED 1126A, the second microLED 1126B, and the third microLED 1126C emit light in different wavelength ranges, such as red, green, and blue wavelength ranges. The first chip 1110A is covered by a lens 1130. Alternatively, a parallax barrier may be provided in place of the lens 1130, or a parallax barrier may be provided in addition to the lens 1130. The second chip 1110B includes substantially the same components as the first chip 1110A and is vertically oriented along the left edge of the pixel 1100, as shown... Figure 11 As shown in the exemplary embodiment.

[0047] The orthogonal orientation of the first chip 1110A and the second chip 1110B enables pixel 1100 to provide a pure horizontal parallax 3D view, even when the display is rotated. For example, if the display device including pixel array 1100 also includes a gyroscope, then when the display device is held in a first position, the display device can use only the first chip 1110A, while when the display device senses that it has been rotated 90 degrees into a second position, the display device deactivates the first chip 1110A and activates the second chip 1110B. Such a feature is applicable, for example, to mobile phones or tablets, enabling a free-viewing pure horizontal parallax view when the device is held in portrait or landscape mode.

[0048] The additional footprint available in pixel 1100 can be used in a variety of ways. In an embodiment, Figure 11Pixel 1100 further includes a single RGB emitter 1140. The single RGB emitter 1140 includes a substrate portion 1142 supporting subpixel 1144. While the substrate portion 1142 is shown as a square, other shapes (e.g., hexagons) may be used for specific applications. Subpixel 1144 includes a first microLED 1146A emitting light in the red wavelength range, a second microLED 1146B emitting light in the green wavelength range, and a third microLED 1146C emitting light in the blue wavelength range. For example, the single RGB emitter 1140 can be used to display standard (i.e., parallax-free) 2D images, thus eliminating the need for integrated multi-view optics. When the display device containing pixel 1100 is not used to display 3D images, the single RGB emitter 1140 can be used to display 2D images. Alternatively, 3D and 2D modes can be activated simultaneously, allowing 2D images to be presented on the surface of the display device, while 3D images or specific portions of 2D images can be presented as 3D objects floating above or below the surface of the display device. In addition, additional electronic or optical components can be incorporated into the available area of ​​pixel 1100. For example, one or more sensors can be incorporated into pixel 1100 to perform functions such as brightness sensing, motion sensing, depth sensing, and head / eye / gaze tracking.

[0049] Figures 12 to 14 The diagram illustrates an alternative display architecture incorporating the chiplet concept. For example... Figure 12 As shown, a portion of the display 1200 includes a plurality of microlenses 1210 arranged in adjacent columns. A plurality of microchips 1220 are not supported on a display backplane, but are directly attached to each microlens 1210. The microlens array 1210 also includes signal conduction bus lines 1230 embedded between the optically active areas of the microlenses 1210 and connected to each microchip 1220 via branch conductors 1232. The bus lines 1230 and branch conductors 1232 can be embedded, for example, within the microlenses 1210 or printed on the surface of the microlens array 1210 using screen printing, metal deposition, or other suitable methods. Laterally adjacent microchips can be offset from each other, such as... Figure 12 As shown, or aligned, as Figure 6 As shown.

[0050] Figure 13 A side cross-sectional view of a portion of a small lens 1210 containing a small chip 1220 is shown. Figure 13As shown, by way of example, the chip 1220 can be held in place by mounting feature 1310. Mounting feature 1310 may be a clip-like feature configured to securely accommodate at least a portion of the chip 1220 therein, and may be molded during the manufacturing process of the microlens 1210 or added after the manufacturing of the microlens 1210. Mounting feature 1310 may also include electronic wiring for connecting the chip 1220 to the branch conductor 1232.

[0051] Figure 14 A top cross-sectional view of different portions of the array of small lenses 1210 is shown. (See diagram.) Figure 14 As shown, the small chip 1220 is attached to the small lens 1210 and electrically connected via the conductive bus line 1230. As an illustrative example, such as... Figure 14 As shown, the first portion of the upper chip 1220 emits light, indicated by the solid arrow 1410, which is directed downwards by the curvature of the microlens 1210 in the diagram. Similarly, a different second portion of the same upper chip 1220 emits light, indicated by the dashed arrow 1412, which is directed upwards by the curvature of the microlens 1210 in the diagram, thus providing a different view from the first portion of the upper chip 1220 and producing a purely horizontal parallax view.

[0052] exist Figures 12 to 14 In the illustrated arrangement, the array of microlenses 1210 (i.e., the optical layer) becomes a structural element of the display device, eliminating the need for a display backplane and thus enabling a thinner display. Furthermore, this architecture facilitates more precise alignment of the chiplets 1220 with their associated optical elements, thereby reducing optical aberrations and image artifacts. Additionally, light emission fields can be more effectively isolated from pixel to pixel, reducing display crosstalk and further improving image quality. Moreover, the manufacturability of the display device can be improved, for example, by constructing each row of microlenses as a strip in which the chiplets and branch conductors are integrated, and then assembling the display device column by column from the strips. Those skilled in the art will understand that the same approach can be used for the integration of parallax barriers, rather than microlenses, or a combination of both.

[0053] Figure 15 and Figure 16 The illustration shows another arrangement where this small chip is directly integrated with a small lens. For example... Figure 15As shown, the flat panel display 1500 provides a purely horizontal parallax view to the viewer 1510. The flat panel display 1500 includes a small chip 1530 supported by a column of small lenses 1540. At the center of the flat panel display 1500, with the viewer 1510's eyebox vertically aligned with the display 1500, the small chip 1530A reliably provides a low-aberration parallax view. However, near the edges of the flat panel display 1500, extreme off-axis operation of the display can cause visual artifacts and optical aberrations in the view presented to the viewer 1510, for example, when the small chip 1530B and small lenses 1540B are still aligned with the plane of the flat panel display 1500.

[0054] In contrast, if a flat panel display is formed from strips of small lenses assembled column by column as described above, in which small chips are integrated, the orientation angle of each column of small lenses (and the corresponding orientation angle of the small chips integrated therein) can be adjusted from the center to the edge of the display in order to mitigate the effects of [the following text is incomplete and requires further context: "to reduce the [the following text is incomplete and requires further context: "to reduce the effects of ... Figure 15 The aberrations caused by the display architecture illustrated. For example, as shown... Figure 16 As shown, the microchip 1630B and microlens 1640B near the center of the display can be rotated a certain amount toward the central axis, and the microchip 1630C integrated into the microlens 1640C near the edge of the flat panel display can be further rotated toward the central axis of the display (e.g., 31 degrees), and so on. By rotating the microlens array and its associated microchips, so that each microlens faces the center of the desired viewing area, edge effects and other optical aberrations can be reduced.

[0055] Another alternative is to assemble small lens strips with integrated chips into a curved display. For example... Figure 17 As shown, the curved display 1700 is configured to provide a purely horizontal parallax view to the viewer 1710. Within the curved display 1700, the curvature of the display causes the small lenses and thus the small chips integrated therein to bend toward the viewing area of ​​the viewer 1710, as illustrated.

[0056] Figures 18 to 20 Another display architecture is illustrated here, showing alternative types of small lenses and conformally curved emitter strips. For example, a Luneburg lens with a gradient refractive index varying from the center to the periphery is designed to have a conjugate focus at infinity and produce high-quality transformations at the lens surface. Figure 18 As shown, the small lens portion 1800 includes a Luneburg-type cylindrical small lens 1810 with a gradient refractive index on which a curved small chip 1820 is integrated.

[0057] Figure 19 A top cross-sectional view of the small lens section 180° is shown. (See diagram.) Figure 19 As shown, the microlens 1810 is supported by a pre-formed bed 1910, which also includes conductive bus lines 1920 for electrical coupling with the bent chiplet 1820. Due to the refractive properties of the Luneburg lens, light from different portions of the bent chiplet 1820 produces collimated outputs exiting from opposing surfaces, as indicated by rays 1950 and 1955. Alternatively, the bent chiplet 1820 can be integrated into the pre-formed bed 1910 to conformally contact the microlens 1810, as shown in the diagram. Figure 19 As shown. Furthermore, as Figure 20 As shown, multiple small lenses 1810 can be arranged in a column to form a display. Each curved chip 1820 can be addressed, for example, via bus line 2010. Due to the high-quality optical performance achieved by the Luneburg lens over a wide angle, this Luneburg method has the advantage of providing a much larger field of view. This method also has the potential to offer relative simplicity in terms of optical components in the manufacturing process.

[0058] While the above discussion focuses on displays based on microlenses or lenticular lenses, it is recognized that these discussions are also readily applicable to parallax / grating barrier-based and aperture-based displays. The microLED chiplet approach for providing free-viewing 3D displays fundamentally separates the large pixel bed of the display from the optical sheet that generates parallax by discretely decentralizing the individual pixel emitters into their own modules. This approach, combined with high-speed, high-resolution pick-and-place assembly systems or monolithically integrated microLED fabrication, enables display structures and system architectures previously unattainable. The ratio between pixel size and spacing, microlens size and spacing, microlens field of view (or distribution angle), and microlens focal length can be tuned and optimized for each display application, ranging from small wearable displays to ultra-high-resolution and large displays. Furthermore, the positioning of the emitters within the chiplet can be varied to meet the needs of a specific display system. For example, non-linear spacing of the parallax view or compensation for optical distortion caused by microlenses can be achieved through appropriate microLED layout schemes.

[0059] Various alternative or additional configurations or components can be implemented in one or more of the optical systems described above. Therefore, many different embodiments are derived from the above description and drawings. It should be understood that it would be excessively repetitive and confusing to describe and illustrate each combination and sub-combination of these embodiments literally. Therefore, this specification (including the drawings) should be construed as constituting a complete written description of all combinations and sub-combinations of the embodiments described herein, as well as the manner and process of making and using them, and should support the claims for any such combinations or sub-combinations.

Claims

1. A display system, comprising: The chiplet array comprises multiple chiplets, each chiplet consisting of: Multiple miniature light-emitting diodes, wherein the multiple miniature light-emitting diodes are disposed on a substrate; and Micro-integrated circuits The substrate and the plurality of micro light-emitting diodes are electrically coupled to the micro integrated circuit. Each chiplet has a width dimension greater than its height, and In this configuration, at least a portion of the plurality of chips in the chip array are oriented such that the width dimension of the chip is parallel to the horizontal direction for alignment. Display back panel, which is subdivided into pixel primitives; Each pixel element of the display backplane supports a first chip and a second chip among the plurality of chiplets. The first chip includes a first row of micro-light-emitting diodes along a first direction, and the second chip includes a second row of micro-light-emitting diodes along a second direction, wherein the second direction is orthogonal to the first direction. The control element array includes multiple control elements. Each small chip is electrically coupled to the display backplane via electrical interconnects, and The small chip array is disposed between the display back panel and the control element array.

2. The system according to claim 1, wherein, The plurality of micro LEDs are arranged in a micro LED array, wherein the micro LED array has a spacing of less than ten micrometers between adjacent micro LEDs.

3. The system according to claim 1, wherein, The chip array is a two-dimensional grid of chips, with a chip spacing of less than 150 micrometers between adjacent chips.

4. The system according to claim 3, wherein, The spacing between the small chips is between 50 micrometers and 100 micrometers.

5. The system of claim 1, further comprising a sensor disposed on a portion of the display back panel between adjacent chips among the plurality of chips, wherein the sensor comprises at least one of: a brightness sensor, a motion sensor, a depth sensor, an eye sensor, and a gaze-tracking sensor.

6. The system according to claim 1, wherein, The control element array has a control element spacing of less than 150 micrometers between adjacent control elements.

7. The system according to claim 6, wherein, Each control element is a small lens.

8. The system according to claim 7, wherein, Each microlens is a cylindrical microlens with refractive power along the horizontal direction.

9. The system according to claim 7, wherein, Each microlens has a microlens width dimension equal to the width of the pixel primitive, and each microlens is aligned with one of the plurality of microchips.

10. The system according to claim 9, wherein, The microlens has a width of 100 micrometers.

11. The system according to claim 9, wherein, The width of the small lens is greater than the width of the small chip, so that the small lens covers one of the multiple small chips.

12. The system according to claim 1, wherein, The display backplane includes multiple bus lines configured to drive the multiple chips within the chiplet array.

13. The system according to claim 1, wherein, The display backplane includes a driving circuit having at least one circuit, the at least one circuit including at least one of the following: a decompression circuit, an interpolator circuit, and a parallax sorting circuit.

14. The system according to claim 1, wherein, The chip has a width of 60 micrometers and a height of 10 micrometers.

15. The system according to claim 1, wherein, One of the first chip and the second chip is configured to be activated according to the orientation of the display system relative to gravity.

16. The system according to claim 1, wherein, The plurality of micro-LEDs within each chip are subdivided into sub-clusters comprising groups of micro-LEDs, wherein the second chip is shifted relative to the first chip along the horizontal direction by half the sub-cluster spacing.

17. The system of claim 1, further comprising a single red-green-blue emitter located at the center of each pixel primitive of the display backplane.

18. The system according to claim 1, wherein, The microintegrated circuit is a complementary metal-oxide-semiconductor backplane configured to electrically address each micro light-emitting diode within the chip.

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