Systems and methods for low latency network switching

Abstract

A network switch and associated methods for establishing operations for a low latency transport path through a network that bypasses packet queues and schedulers of a switch fabric are provided. If each of a plurality of data packets is identified for transport from an ingress port to a destination egress port through the low latency transport path, the network switch transports the data packets to the identified destination egress port through the low latency transport, and if the data packets are not identified for transport from the ingress port to the destination egress port through the low latency transport path, the network switch transports the data packets to the destination egress port through the packet queues and schedulers.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 126,482, filed December 16, 2020, and U.S. Non-Provisional Patent Application No. 17 / 383,755, filed July 23, 2021, the full text of which is incorporated herein by reference. Background Technology

[0003] Network switches are critical components of any network infrastructure. A network switch inspects data packets arriving at its inbound port, determines the appropriate outbound port for the intended destination device, and then transmits the data packets to the correct destination via the outbound port. Improvements in the data packet processing performed by network switches are desired to reduce latency in delivering data packets to one or more destination devices.

[0004] Therefore, there is a need for a method and apparatus that provide a low-latency transmission path via a network switch that can be used to transmit time-sensitive data packets. Summary of the Invention

[0005] In various embodiments, an improved network switch and a method for operating the network switch are provided, wherein low-latency transmission is established through the network switch for data packet transmission requiring low latency. The network switch and the associated method do not require coupling a separate dedicated switching circuit to the network switch to provide the low-latency transmission path. Therefore, the disclosed network switch provides both a low-latency transmission path for traffic requiring low latency and a standard transmission path for traffic not requiring low latency.

[0006] In a first embodiment, a method for operating a network switch is provided. The method includes establishing a low latency transport path through a network switch, where the network switch includes a plurality of inbound ports, a plurality of outbound ports, and a switch fabric including a packet queue and a scheduler, the plurality of inbound ports being in communication with the plurality of outbound ports through the packet queue and scheduler, and where the low latency transport path bypasses the packet queue and scheduler of the switch fabric. The method further includes receiving a plurality of data packets at one or more of the plurality of inbound ports, collecting a first portion of one or more of the plurality of data packets at a collection module, and for each of the one or more of the plurality of data packets, analyzing the first portion of the data packet to identify one of the plurality of outbound ports as a destination outbound port for the data packet and to identify whether the data packet is to be transported from the inbound port to the destination outbound port through the low latency transport path. The method additionally includes transporting the data packet to the identified destination outbound port through a low latency transport if the data packet is identified to be transported from the inbound port to the destination outbound port through the low latency transport path, and transporting the data packet to the destination outbound port in response to the packet queue and scheduler if the data packet is not identified to be transported from the inbound port to the destination outbound port through the low latency transport path.

[0007] According to the present disclosure, each of the one or more of the plurality of data packets includes a plurality of words, each of the plurality of words including a number of bytes, and the number of bytes of the first portion of each of the plurality of data packets collected at the collection module is less than the number of bytes of each of the plurality of words of each of the one or more of the plurality of data packets.

[0008] In particular embodiments, a flag can be set for the data packet if the data packet is identified to be transported from the inbound port to the destination outbound port through the low latency transport path. Subsequently, the data packet can be transported to the destination outbound port through the low latency transport path in response to the flag being set.

[0009] In a particular embodiment, the network switch can be a time sensitive (TS) network switch. In this embodiment, analyzing the first portion of the data packet to identify whether the data packet is to be transmitted from the ingress port to the destination egress port over the low latency transmission path can be performed during a specified time window as determined by the TS network switch. Additionally, the destination egress port can be further configured to be available to receive one or more data packets over the low latency transmission path during the specified time window, and the one or more data packets can be transmitted to the destination egress port over the low latency transmission path during the specified time window.

[0010] In another embodiment, a network switch is provided, the network switch comprising: a plurality of ingress ports; a plurality of egress ports; a switch fabric comprising a packet queue and a scheduler, the plurality of ingress ports in communication with the plurality of egress ports through the packet queue and the scheduler; and a low latency transmission path for bypassing the packet queue and the scheduler of the switch fabric. In this embodiment, the switch fabric is configured to: receive a plurality of data packets at one or more of the plurality of ingress ports; and for each data packet of the received plurality of data packets, analyze a first portion of the data packet to: identify one of the plurality of egress ports as a destination egress port for the data packet and identify whether the data packet is to be transmitted from the ingress port to the destination egress port over the low latency transmission path. The switch fabric is further configured to: transmit the data packet to the identified destination egress port over the low latency transmission if the data packet is identified to be transmitted from the ingress port to the destination egress port over the low latency transmission path; and transmit the data packet to the destination egress port in response to the packet queue and the scheduler if the data packet is not identified to be transmitted from the ingress port to the destination egress port over the low latency transmission path.

[0011] In an additional embodiment, a switch fabric is provided that includes a packet queue and scheduler, a plurality of inbound ports coupled to the packet queue and scheduler that communicate with a plurality of outbound ports coupled to the packet queue and scheduler through the packet queue and scheduler, and a low latency transport path for bypassing the packet queue and scheduler. The switch fabric further includes a collection module for collecting a first portion of one or more data packets of a plurality of data packets received at one or more of the plurality of inbound ports, and a packet analyzer for, for each of the one or more data packets of the plurality of data packets, analyzing the first portion of the data packet to identify one of the plurality of outbound ports as a destination outbound port for the data packet and to identify whether the data packet is to be transported from the inbound port to the destination outbound port through the low latency transport path. In this embodiment, the switch fabric is configured to transport the data packet to the identified destination outbound port through low latency transport if the data packet is identified to be transported from the inbound port to the destination outbound port through the low latency transport path, and to transport the data packet to the destination outbound port in response to the packet queue and scheduler if the data packet is not identified to be transported from the inbound port to the destination outbound port through the low latency transport path.

[0012] Accordingly, in various embodiments, a system and method for implementing both a low latency transport path for traffic requiring low latency transport and a standard transport path for traffic not requiring low latency transport in a public network switch is provided. BRIEF DESCRIPTION OF DRAWINGS

[0013] For a more complete understanding of the present application, reference is made to the following detailed description taken in conjunction with the accompanying drawings in which:

[0014] Figure 1 is a block diagram illustrating a network switch including a low latency transport path according to an embodiment of the present application.

[0015] Figure 2 is a flowchart illustrating a method for operating a network switch having a low latency transport path according to an embodiment of the present application.

[0016] Figure 3 is a flowchart illustrating a method for setting a flag for one or more data packets identified to be transported through a low latency transport path according to an embodiment of the present application.

[0017] Figure 4is a flowchart showing a method for operating a network switch with a low latency transport path as a Time-Sensitive Network (TS) network switch in accordance with an embodiment of the present invention. DETAILED DESCRIPTION

[0018] Reference will now be made in detail to various embodiments, examples of which are illustrated in the accompanying drawings. While various embodiments are discussed herein, it should be understood that they are not intended to be limiting. Rather, the presented embodiments are intended to encompass alternatives, modifications, and equivalents, which can comprise various embodiments within the spirit and scope of the appended claims. Furthermore, in the detailed description of embodiments, numerous specific details are set forth in order to provide a thorough understanding. However, embodiments can be practiced without one or more of these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the embodiments.

[0019] It should be understood that, although the terms first, second, third (not limited to this) can be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another region, layer or part. Therefore, the first element, component, region, layer or part discussed below can be called the second element, component, region, layer or part without departing from the teachings of the present invention.

[0020] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0021] Reference Figure 1FIG. 1 illustrates a network switch 100, such as a network switch that switches data packets from one or more inbound ports 105, 110, 115 to one or more outbound ports 160, 165, 170 through a switch fabric 180. The network switch 100 can be part of a network that can include various network devices, including but not limited to one or more servers, computers, and sensors. Each of the network devices can be associated with one or more of the inbound ports and the outbound ports, and the network devices can be connected or otherwise communicate packet-based communications with each other through or using the network switch. While three inbound ports 105, 110, 115 and three outbound ports 160, 165, 170 are illustrated, this is not meant to be limiting in any way. The number of inbound ports can be any amount and the number of outbound ports can be any amount without constraining the number of inbound ports to be equal to the number of outbound ports.

[0022] The network switch 100 can receive network data in the form of data packets, and the network switch 100 can transmit the data packets between the inbound ports 105, 110, 115 and the outbound ports 160, 165, 170 through the switch fabric 180 of the network switch 100 to establish communications between various network devices. The switch fabric 180 provides a communication path for the data packets between the inbound ports 105, 110, 115 and the outbound ports 160, 165, 170, such that any of the inbound ports 105, 110, 115 can communicate with any of the outbound ports 160, 165, 170.

[0023] The network switch 100 and the switch fabric 180 can include programmable circuitry for performing the functions of the network switch 100 and the switch fabric 180.

[0024] During data packet reception, analysis, queuing, scheduling, forwarding, and transmission of data packets through the switch fabric 180, latency is introduced by the network switch. In various applications, including but not limited to automotive and industrial applications, the network switch is typically responsible for the transmission of time-sensitive and best-effort network traffic. In networks where a mix of best-effort and highly time-sensitive traffic is interleaved in the same infrastructure, the disclosed network switch 100 provides low-latency switching for time-sensitive traffic, thereby reducing the latency of such traffic.

[0025] In Figure 1In example embodiments, the switch fabric 180 of the network switch 100 includes a packet queue and scheduler 145 that schedules transmission of packets received at the inbound ports 105, 110, 115 through the respective outbound ports 160, 165, 170. Data packets of network traffic that are identified as requiring best effort transmission through the network switch 100 are scheduled by the packet queue and scheduler 145. The network switch 100 also includes a low latency transmission path 185 that is used to bypass the packet queue and scheduler 145 of the switch fabric 180. Thus, the low latency transmission path 185 of the switch fabric 180 can be used to transmit time sensitive traffic between the inbound ports 105, 110, 115 and the outbound ports 160, 165, 170, while the packet queue and scheduler 145 can be used to schedule transmission of best effort traffic, as described in detail below.

[0026] In addition to the packet queue and scheduler 145, the switch fabric 180 also includes a collection module 120 coupled to the inbound ports 105, 110, 115, a packet analyzer 125 coupled between the collection module 120 and the packet queue and scheduler 145, a packet reader 150 coupled to the output of the packet queue and scheduler 145, a shunt module 155 coupled to the output of the packet reader 150, and a packet buffer 135 coupled between the output of the collection module and the packet reader 150. As shown, the low latency transmission path 185 shares the collection module 120, the packet analyzer 125, the packet buffer 135, the packet reader 150, and the shunt module 155 of the switch fabric 180. Also, as shown, the low latency transmission path 185 does not include the packet queue and scheduler 145 of the switch fabric 180. Figure 1 Figure 1

[0027] ​​The collection module 120 of the switch chassis 180 includes circuitry configured to collect a first portion of one or more of the plurality of data packets received from the inbound ports 105, 110, 115. Additionally, the collection module 120 collects data of the received data packets into a predetermined word width according to the configuration of the switch chassis 180. The first portion of each of the data packets is selected to be a number of bytes less than the data packet. Not all of the first portions of the data packets are collected by the collection module 120, and in one example, only the first portion of each of the data packets of a particular ETYPE is collected by the collection module 120 in addition to collecting data of all of the received data packets into a predetermined word width according to the configuration of the switch chassis 180. In particular, each of the data packets received at the inbound ports 105, 110, 115 includes a plurality of words, each of the plurality of words includes a number of bytes, and the number of bytes of the first portion of each of the plurality of data packets collected at the collection module is less than the number of bytes of each of the plurality of words of each of the plurality of data packets. In a particular non-limiting example, 64-byte data packets can be transmitted in parallel from the inbound ports 105, 110, 115 and collected at the collection module 120. The collection module 120 can then collect the first portion of one or more data packets, which can include only 32 bytes of the 64-byte data packets. As such, the collection module 120 of the switch chassis 180 is configured to collect bytes of a smaller portion of the data packets, which allows for faster access to the packet analyzer 125 of the switch chassis 180 regardless of the contents of the data packets. For packets that are greater than 64-byte data packets, the first portion of the data packets can still include only 32 bytes of the data packets.

[0028] The packet analyzer 125 of the switch chassis 180 is coupled to receive the first portion of each data packet from the collection module 120, and the packet buffer 135 of the switch chassis 180 is coupled to the output of the collection module 120 and is configured to store data packets received at the inbound ports 105, 115, 115. The packet analyzer 125 analyzes the first portion of each of the plurality of data packets to identify one of the plurality of outbound ports 160, 165, 170 as a destination outbound port for the data packet, and to determine whether the data packet is to be transmitted from the inbound port to the destination outbound port through the low latency transmission path 185 or whether the data packet is to be transmitted from the inbound port to the destination outbound port through the switch chassis 180. The packet analyzer 125 includes a pattern matching table 190 for identifying whether a data packet is to be transmitted through the low latency transmission path 185. Generally, the pattern matching table 190 can be implemented in a memory device, and in particular, the pattern matching table 190 can be implemented in a ternary content addressable memory (TCAM). In addition to the above, the packet analyzer 125 is also used to provide other functionality for the network switch 100 known to those skilled in the art, such as quality of service and MAC address functionality. Thus, the packet analyzer 125 can receive more portions of each data packet in addition to the first portion in order to provide the other functionality for the network switch 100.

[0029] The pattern matching table 190 stores known byte patterns of data packets that are deemed to be time sensitive and, therefore, should be transmitted through the low latency transmission path 185. In particular, the packet analyzer 125 is configured to analyze one or more bytes of the first portion of each data packet to identify the destination outbound port for the data packet. The packet analyzer 125 also causes the one or more bytes of the first portion of each data packet to be matched against the pattern matching table 190 to determine whether the data packet should be transmitted through the low latency transmission path 185. If the pattern of the one or more bytes of the first portion of the data packet matches a pattern stored in the pattern matching table 190, then the data packet is identified as being to be transmitted through the low latency transmission path 185. In the alternative, if there is no match between the pattern of the first portion of the data packet and the pattern matching table 190, then the data packet is transmitted through the packet queue and scheduler 145 instead of through the low latency transmission path 185.

[0030] In a specific implementation of the example protocol, the packet analyzer 125 extracts from the first portion of the data packet at least one byte pattern that includes a destination MAC address (DMAC), an Ether Type field (ETYPE), and an identifier (ID). The packet analyzer 125 then attempts to match the extracted pattern to patterns stored in the pattern matching table 190. If a match is identified, the packet analyzer 125 sets a flag for the data packet that indicates the data packet is to be transmitted through the low latency transport path 185.

[0031] In a non-limiting example implementation, assume that the low latency transport path 185 is to be used for time sensitive data packets identified by the following values: DMAC = 0011222334455, ETYPE = 88F6, and bytes 16-18 containing a 3 byte ID = 010203. By programming these values into the pattern matching table 190 of the packet analyzer 125, when a match exists between a received data packet and the pattern matching table 190, the packet analyzer 125 sets a flag that indicates the data packet is time sensitive and is to be transmitted through the low latency transport path 185.

[0032] When the first portion of the data packet is analyzed by the packet analyzer 125, the packet buffer 135 of the switch chassis 180 stores the data packet collected by the collection module 120. When a marker is set for one or more data packets upon analyzing the first portion of the data packet, the marker is communicated to the packet reader 150 through the bypass path 175 of the low latency transport path 185. In addition to the address of the data packet in the packet buffer 135, the identifier of the egress port is communicated to the packet reader 150 through the bypass path 175 of the low latency transport path 185. No specific separate marker needs to be set, and in one example, instead of a specific marker, the packet reader 150 responds to receiving the address of the data packet in the packet buffer 135, and the identifier of the egress port through the bypass path 175. In response to receiving the communication through the bypass path 175 at the packet reader 150, such as the marker, or the address of the data packet in the packet buffer 135, and the identifier of the egress port, the packet reader 150 promptly begins to read out the corresponding data packet from the packet buffer 135. Thus, in response to the communication through the bypass path 175, the data packet is not scheduled to the packet reader 150 by the packet queue and scheduler 145, but is promptly read out from the packet buffer 135 by the packet reader 150 in response to the communication through the bypass path 175 of the low latency transport path 185, thereby avoiding any latency caused by the packet queue and scheduler 145. The packet reader 150 then provides the data packet read from the packet buffer 135 to the shunt module 150. The shunt module 150 is configured to distribute the data packet to the identified destination egress port of the plurality of egress ports 160, 165, 170 for the data packet, where the identified destination egress port is provided by the packet analyzer 125. Thus, if the data packet is identified to be transported through the low latency transport 185 from the ingress port to the destination egress port, the network switch 100 transports each of the data packets in the data packet to the identified destination egress port through the low latency transport 185, and if the data packet is not identified to be transported through the low latency transport path 185 from the ingress port to the destination egress port, the switch chassis 180 transports the data packet to the destination egress port in response to scheduling by the packet queue and scheduler 145.

[0033] The packet queue and scheduler 145 of the switch fabric 180 operates in a similar manner to known standard switching techniques in which data packets received at the inbound ports 105, 110, 115 are processed in a round robin manner or other manner in which only one input station port has access to the packet queue and scheduler 145 during each clock cycle of the switch fabric 180. The packet buffer 135 enqueues data packets and the packet reader 150 reads packets from the packet buffer 135 according to the packet queue and scheduler 145. As previously discussed, the process of queuing and round robin processing by the packet queue and scheduler 145 adds undesirable latency into the network switch 100. While the added latency is acceptable for best effort network traffic, it can be unacceptable for time sensitive network traffic. The low latency transport path 185 as disclosed provides a solution for transporting both best effort network traffic and time sensitive network traffic in a common network switch 100.

[0034] In addition to identifying data packets for transport through the low latency transport path 185, the switch fabric 180 is further configured to operate under the Time Sensitive Networking (TSN) standard. IEEE standards for TSN enable deterministic real-time communication over Ethernet by using time synchronization and time slots shared between network devices. By defining time slots or windows for data packet transmission, TSN ensures a bounded maximum latency for scheduled traffic through the network switch 100. If all devices operating in TSN have a common understanding of the time window in which low latency transport can occur, the low latency transport path 185 in each network switch 100 will contribute to an end-to-end low transport latency. By implementing TSN in the network switch 100, it is guaranteed that the destination egress port is available for receiving data packets through the low latency transport path 185 during a predetermined time window.

[0035] In the case where the network switch 100 operates as a TS network switch in a Time Sensitive (TS) network, time sensitive data packets are received at the plurality of inbound ports 105, 110, 115 during a specified time window, the destination egress port is configured by the packet queue and scheduler 145 to be available during the specified time window, and the time sensitive data packets are transported through the low latency transport path 185 during the specified time window.

[0036] In a non-limiting example of a network switch 100 operating in a TSN environment, a cycle having a one second duration can be divided into a plurality of time windows. The time windows are known to the inbound ports 105, 110, 115, the outbound ports 160, 165, 170, and the network switch 100 and are aligned with a common clock signal. In this example, a first time window between 0 ms and 850 ms in each cycle can be used for transmission of best effort traffic in response to scheduling by the packet queues and scheduler 145 of the switch fabric 180. A second time window between 850 ms and 860 ms in each cycle can be reserved for transmission of time sensitive data packets to a destination outbound port identified for time sensitive data packets over the low latency transmission path 185. During this second time window, best effort traffic to the identified destination outbound port is blocked. A third time window between 860 ms and 1000 ms can then be used for sending best effort traffic again. There can be multiple such destination outbound ports in the network switch 100 that are identified for time sensitive data packets.

[0037] Thus, by the common network time understanding provided by TSN, the network switch 100 can ensure that only data packets requiring low latency transmission are received in the 850 ms to 860 ms time window during which the network switch 180 can ensure that the identified destination outbound port for time sensitive data packets is available during the time that low latency transmission path 185 is needed for transmission of time sensitive data packets.

[0038] Referring to Figure 2 there is provided a flowchart showing a method 200 for operating a network switch 100 having a low latency transmission path 185.

[0039] At 205, the method begins with establishing a low latency transmission path by a network switch, where the network switch includes a plurality of inbound ports, a plurality of outbound ports, and a switch fabric including packet queues and a scheduler, the plurality of inbound ports are in communication with the plurality of outbound ports through the packet queues and the scheduler, and where the low latency transmission path bypasses the packet queues and the scheduler of the switch fabric. Referring to Figure 1 A low latency transmission path 185 is established by a network switch 100 including a plurality of inbound ports 105, 110, 115, a plurality of outbound ports 160, 165, 170, and a switch fabric 180. The switch fabric 180 includes packet queues and a scheduler 145, the plurality of inbound ports 105, 110, 115 are in communication with the plurality of outbound ports 160, 165, 170 through the packet queues and the scheduler, and the low latency transmission path 185 bypasses the packet queues and the scheduler 145 of the switch fabric 180.

[0040] At 210, the method continues with receiving a plurality of data packets at one or more of a plurality of inbound ports, and collecting a first portion of one or more of the plurality of data packets at a collection module, at 215. As Figure 1 shown, data packets received at one or more of a plurality of inbound ports 105, 110, 115 are provided to a collection module 120, and the collection module 120 is configured to collect a first portion of one or more of the plurality of data packets. In some examples, the first portion of only some of the plurality of data packets is collected in response to the ETYPE name.

[0041] At 220, the method continues with, for each of the plurality of data packets, analyzing the first portion of the plurality of data packets to identify one of a plurality of egress ports as a destination egress port for the data packet and to identify whether the data packet is to be transmitted from the inbound port to the destination egress port through a low latency transmission path. As Figure 1 shown, a packet analyzer 125 including a pattern matching table 190 is used to analyze the first portion of the data packets to identify one of a plurality of egress ports as a destination egress port for the data packet and to identify whether the data packet is to be transmitted from the inbound port to the destination egress port through a low latency transmission path 185.

[0042] At 225, the method ends with, if the data packet is identified as being transmitted from the inbound port to the destination egress port through the low latency transmission path, transmitting the data packet to the identified destination egress port through the low latency transmission, and if the data packet is not identified as being transmitted from the inbound port to the destination egress port through the low latency transmission path, transmitting the data packet to the destination egress port in response to a packet queue and scheduler. Reference is made to Figure 1 data packets identified by the packet analyzer 125 as being to be transmitted through the low latency transmission path 185 are transmitted through the low latency transmission path 185 to the destination egress port for the data packet. Alternatively, data packets not identified as being to be transmitted through the low latency transmission path 185 are transmitted to the destination egress port in response to scheduling by the packet queue and scheduler 145.

[0043] Figure 3 is a flowchart 300 illustrating an example method for setting a flag for one or more data packets identified as being to be transmitted through a low latency transmission path.

[0044] At 305, the method begins with setting the flag if the data packet is identified as being transmitted from the inbound port to the destination egress port through the low latency transmission path. Reference is made to Figure 1The packet analyzer 125, in combination with the pattern matching table 190, is used to identify whether a data packet is to be transmitted from an inbound port to a destination outbound port through the low latency transmission path 185 as determined by the packet analyzer 125.

[0045] At 310, the method ends with transmitting the data packet through the low latency transmission path to the destination outbound port in response to the set flag. Reference is made to Figure 1 The packet analyzer 125 provides the flag to the packet reader 150, and the packet reader 150 reads the data packet from the packet buffer 135 in response to the set flag, thereby transmitting the data packet through the low latency transmission path to the destination outbound port.

[0046] Figure 4 is a flowchart 400 illustrating an example method for operating a network switch having a low latency transmission path as a Time-Sensitive Network (TS) network switch.

[0047] At 405, the method begins with identifying a designated time window for transmitting a data packet through a low latency transmission path of a Time-Sensitive (TS) network switch. Figure 1 The illustrated network switch 100 can be a TS network switch having a low latency transmission path 185, and the designated time window for transmitting a data packet through the low latency transmission path 185 can be identified by the switch fabric 180 of the network switch 100.

[0048] At 410, the method continues with configuring a destination outbound port as available for receiving one or more data packets through the low latency transmission path during the designated time window. Reference is made to Figure 1 One or more of the outbound ports 160, 165, 170 can be configured as a destination outbound port available for receiving one or more data packets through the low latency transmission path 185 during the designated time window identified by the TS network switch 100.

[0049] At 415, the method continues with analyzing a first portion of one or more data packets of a plurality of data packets during the designated time window to identify whether the data packet is to be transmitted from an inbound port to the destination outbound port through the low latency transmission path. Figure 1 The packet analyzer 125 and the pattern matching table 190 of the illustrated network switch 100 are configured to analyze a first portion of one or more data packets of a plurality of data packets received during the designated time window to identify whether the data packet is to be transmitted from an inbound port to the destination outbound port through the low latency transmission path 185.

[0050] At 420, the method ends with transmitting the data packet to the destination egress port through the low latency transport path 185 during the specified time window if, as a result of the analysis of 415, it is determined that the data packet is to be transmitted from the ingress port to the destination egress port through the low latency transport path 185. If, as a result of the analysis of 415, it is not determined that the data packet is to be transmitted from the ingress port to the destination egress port through the low latency transport path, the data packet is transmitted through the switch fabric. As Figure 1 shown, the low latency transport path 185 is used to transmit data packets that are identified as being transmitted through the low latency transport path during the specified time window, and the switch fabric 180 is used to transmit data packets that are not identified as being transmitted through the low latency transport path during the specified time window.

[0051] In various embodiments, the disclosed network switch 100 provides more fixed and lower latency switching capabilities than prior art solutions. The low latency transport 185 is implemented in an integrated circuit (IC) device that includes the network switch 100, rather than in a dedicated external fast path device (such as a fast path FPGA) that is implemented in a separate IC device, where time sensitive packets are not received at the input ingress ports of the network switch. In this way, the methods and devices of the present invention add the low latency transport path 185 to the existing switch fabric 180. The network switch 100 can be implemented in any network application, but can be most feasible when TSN features are controlling network traffic flow.

[0052] In one embodiment, the network switch can be implemented as a single semiconductor die in an integrated circuit, with the ingress ports, the plurality of egress ports, the switch fabric, the packet queues and scheduler, and the low latency transport path all within the single semiconductor die.

[0053] In various embodiments, portions of the system of the present invention can be implemented in a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). Those skilled in the art will understand that various functions of the circuit elements can also be implemented as processing steps in a software program. Such software can be employed in, for example, a digital signal processor, a network processor, a microcontroller, or a general purpose computer.

Claims

1. A method for operating a network switch, the method comprising: A low-latency transmission path is established through a network switch, wherein the network switch includes multiple inbound ports, multiple outbound ports, and a switch architecture, wherein the switch architecture includes a packet queue and a scheduler, the multiple inbound ports communicate with the multiple outbound ports through the packet queue and scheduler, and wherein the low-latency transmission path bypasses the packet queue and scheduler of the switch architecture; Receive multiple data packets at one or more of the plurality of inbound ports; The first portion of one or more of the plurality of data packets is collected at the collection module; For a corresponding data packet in one or more of the plurality of data packets, the first portion of the corresponding data packet is analyzed to: identify one of the plurality of outbound ports as the destination outbound port of the corresponding data packet, and identify whether the corresponding data packet should be transmitted from the inbound port to the destination outbound port through the low-latency transmission path; If the corresponding data packet is not identified as being transmitted from the inbound port to the destination outbound port via the low-latency transmission path, then, in response to the packet queue and the scheduler's scheduling, the corresponding data packet is transmitted to the identified destination outbound port. The corresponding cycle of the network switch includes a first time window and a second time window, the second time window being shorter than the first time window and out of sync with the first time window, and during the second time window, traffic to the identified destination outbound port in response to the scheduling of the packet queue and the scheduler is blocked; as well as If the corresponding data packet is identified as being transmitted from the inbound port to the destination outbound port via the low-latency transmission path, then the corresponding data packet is transmitted to the identified destination outbound port via the low-latency transmission path during the second time window in the corresponding cycle.

2. The method of claim 1, further comprising setting a flag if the corresponding data packet is identified as being transmitted from the inbound port to the identified destination outbound port via the low-latency transmission path, the corresponding data packet being transmitted to the identified destination outbound port via the low-latency transmission path in response to the set flag.

3. The method of claim 1, wherein the corresponding cycle of the network switch includes a third time window, the third time window being asynchronous with the first time window and the second time window, wherein transmitting the corresponding data packet to the identified destination outbound port in response to the scheduling of the packet queue and the scheduler occurs during either the first time window or the third time window.

4. The method of claim 3, wherein the corresponding cycle of the network switch has a duration of one second, and the first time window is between 0 ms and 850 ms, the second time window is between 850 ms and 860 ms, and the third time window is between 860 ms and 1000 ms.

5. The method of claim 1, further comprising configuring the destination outbound port to receive one or more corresponding data packets via the low-latency transmission path during the second time window in the corresponding cycle.

6. The method of claim 1, wherein the plurality of data packets are received in parallel at the one or more inbound ports.

7. The method of claim 1, wherein analyzing the first portion of the corresponding data packet to identify whether the corresponding data packet should be transmitted from the inbound port to the destination outbound port via the low-latency transmission path comprises matching the first portion of the corresponding data packet against a pattern matching table.

8. The method according to claim 7, wherein the pattern matching table is a tri-state content-addressable memory.

9. The method of claim 1, further comprising storing the corresponding data packet in a packet buffer of the low-latency transmission path before transmitting the corresponding data packet to the destination outbound port via the low-latency transmission path.

10. The method of claim 1, wherein a corresponding data packet in the plurality of data packets comprises a plurality of words, a corresponding word in the plurality of words comprises a certain number of bytes, and the number of bytes of the first portion of the corresponding data packet in the one or more data packets in the plurality of data packets collected at the collection module is less than the number of bytes of the corresponding word in the plurality of words of each data packet in the one or more data packets in the plurality of data packets.

11. A network switch, the network switch comprising: Multiple inbound ports; Multiple outbound ports; A switch architecture, comprising a packet queue and a scheduler, wherein the plurality of inbound ports communicate with the plurality of outbound ports through the packet queue and the scheduler; and A low-latency transmission path, wherein the low-latency transmission path is used to bypass the packet queues and scheduler of the switch architecture. The corresponding cycle of the network switch includes a first time window and a second time window, wherein the second time window is shorter than the first time window and is not synchronized with the first time window. The switch architecture described herein is used for: Receive multiple data packets at one or more of the plurality of inbound ports; For a given data packet among the plurality of data packets, the first part of the given data packet is analyzed to: identify one of the plurality of outbound ports as the destination outbound port of the data packet, and identify whether the given data packet should be transmitted from the inbound port to the destination outbound port through the low-latency transmission path; If the corresponding data packet is identified as being transmitted from the inbound port to the destination outbound port via the low-latency transmission path, then the corresponding data packet is transmitted to the identified destination outbound port via the low-latency transmission path during the second time window in the corresponding cycle. as well as If the corresponding data packet is not identified as being transmitted from the inbound port to the destination outbound port via the low-latency transmission path, the corresponding data packet is transmitted to the destination outbound port in response to the packet queue and scheduler, wherein during the second time window, traffic to the identified destination outbound port is blocked in response to the packet queue and scheduler.

12. The network switch of claim 11, wherein the network switch comprises: A collection module, configured to collect the first portion of a corresponding data group from the plurality of data groups; and a group analyzer, the group analyzer being used to analyze the first portion of the corresponding data group.

13. The network switch of claim 11, wherein the corresponding cycle of the network switch includes a third time window, the third time window being asynchronous with the first time window and the second time window, and traffic scheduled in response to the packet queue and the scheduler being transmitted to the identified destination outbound port during the first time window and the third time window.

14. The network switch of claim 13, wherein the switch architecture is configured to configure the destination outbound port to receive one or more data packets of the corresponding data packets via the low-latency transmission path during the second time window in the corresponding cycle.

15. The network switch of claim 12, wherein the packet analyzer includes a pattern matching table, wherein the packet analyzer is configured to match the first portion of the corresponding data packet against the pattern matching table to identify whether the corresponding data packet should be transmitted from the inbound port to the destination outbound port via the low-latency transmission path.

16. The network switch of claim 15, wherein the pattern matching table is a tri-state content-addressable memory.

17. The network switch of claim 11, wherein the low-latency transmission path includes a packet buffer for storing the data packets before transmitting the corresponding data packets to the destination outbound port via the low-latency transmission path.

18. The network switch of claim 12, wherein a corresponding data packet in the plurality of data packets comprises a plurality of words, a corresponding word in the plurality of words comprises a certain number of bytes, and the number of bytes of the first portion of the corresponding data packet in the plurality of data packets collected at the collection module is less than the number of bytes of the corresponding word in the plurality of words of the corresponding data packet in the plurality of data packets.

19. A switch architecture, the switch architecture comprising: A group queue and a scheduler, wherein multiple inbound ports communicating with the group queue and the scheduler communicate with multiple outbound ports communicating with the group queue and the scheduler through the group queue and the scheduler; A low-latency transmission path, wherein the low-latency transmission path is used to bypass the packet queue and the scheduler; The collection module is configured to collect a first portion of one or more data packets received at one or more inbound ports among the plurality of inbound ports; A packet analyzer, configured to analyze a first portion of a corresponding data packet from one or more of the plurality of data packets to: identify one of the plurality of outbound ports as the destination outbound port of the corresponding data packet, and determine whether the corresponding data packet should be transmitted from the inbound port to the destination outbound port via the low-latency transmission path. The corresponding cycle includes a first time window and a second time window, the second time window being shorter than the first time window and asynchronous with the first time window, and during the second time window, traffic to the identified destination outbound port, in response to the scheduling of the packet queue and the scheduler, is blocked. The switch architecture is configured to: if the corresponding data packet is identified as being transmitted from the inbound port to the destination outbound port via the low-latency transmission path, then transmit the corresponding data packet to the identified destination outbound port via the low-latency transmission path during the second time window in the corresponding cycle. And if the corresponding data packet is not identified as being transmitted from the inbound port to the destination outbound port via the low-latency transmission path, the corresponding data packet is transmitted to the destination outbound port in response to the scheduling of the packet queue and the scheduler.

20. The switch architecture of claim 19, wherein the corresponding cycle includes a third time window, the third time window being asynchronous with the first time window and the second time window, the switch architecture being configured to: if the corresponding data packet is not identified as being transmitted from the inbound port to the destination outbound port via the low-latency transmission path, then, in response to the packet queue and scheduler, transmit the corresponding data packet to the destination outbound port during the first time window or the third time window.

21. The switch architecture of claim 20, wherein the corresponding cycle has a duration of one second, and the first time window is between 0 ms and 850 ms, the second time window is between 850 ms and 860 ms, and the third time window is between 860 ms and 1000 ms.

22. The switch architecture of claim 21, wherein the switch architecture is a time-sensitive network switch architecture, and wherein the switch architecture further configures the destination outbound port to be able to receive one or more data packets through the low-latency transmission path during the second time window in the corresponding cycle.

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