A surfactant wastewater treatment system

Abstract

The present application belongs to sewage treatment technical field, disclose a kind of surfactant sewage treatment system, including MCU chip and multiple control modules, each control module corresponds to the aeration port of 1 aeration branch;1 control module includes operational amplifier U1, operational amplifier U2, operational amplifier U3, resistance R14, resistance R15, triode Q5, resistance R18, resistance R17, light emitting diode U4, triode U5, NMOS tube Q2, triode Q6, resistance R16, NMOS tube Q3, triode Q4, resistance R9, triode Q1.The present application is balanced according to actual liquid level quantity inside and outside pressure of pipeline and each branch aeration flow is automatically regulated according to liquid level quantity, avoid the problem that the aeration flow distribution is uneven before and after node caused by pipeline pressure loss and the problem of high occupancy of certain branch, improve the solubility and transfer efficiency of oxygen, avoid certain branch high occupancy and air pump long-term high load work.

Description

Technical Field

[0001] This invention belongs to the field of wastewater treatment technology, and particularly relates to a surfactant wastewater treatment system. Background Technology

[0002] The function of a surfactant-containing wastewater treatment system is to treat wastewater containing surfactants, remove pollutants, meet national discharge standards, and protect the environment. A surfactant-containing wastewater treatment system typically includes the following modules: a filter tank (for pre-treatment of wastewater, removing larger suspended solids and sediments); a biological reactor (using biological methods to treat wastewater, degrading organic matter into inorganic matter through microorganisms, and removing nutrients such as nitrogen and phosphorus); a sedimentation tank (for settling and separating the sludge degraded by microorganisms); an aeration tank (providing oxygen to promote the metabolic activity of microorganisms in the biological reactor); and a mixing tank (for regulating the quality and quantity of wastewater entering the biological reactor, maintaining the balance of the microbial community within the reactor).

[0003] Aeration branches are an important component of surfactant-based wastewater treatment systems, primarily providing oxygen to promote microbial metabolic activity. Problems with existing technologies include uneven aeration flow distribution before and after nodes due to pipeline pressure loss, and high occupancy in certain branches, leading to the following issues in aeration branches:

[0004] Uneven aeration flow distribution can cause bubbles in a certain branch to be too large or too small. Bubbles that are too large will prevent oxygen from being evenly distributed in the biochemical reaction tank, while bubbles that are too small will affect the solubility and transfer efficiency of oxygen.

[0005] If a branch circuit is heavily occupied, the air pump will work under high load for a long time, which can easily lead to failure. As a result, it will not be able to provide enough oxygen, causing the metabolic activities of microorganisms to slow down or stop. Summary of the Invention

[0006] In view of this, the present invention proposes a surfactant wastewater treatment system, including an MCU chip and multiple control modules, each control module corresponding to the aeration port of one aeration branch; one control module includes operational amplifier U1, operational amplifier U2, operational amplifier U3, resistor R14, resistor R15, transistor Q5, resistor R18, resistor R17, light-emitting diode U4, transistor U5, NMOS transistor Q2, transistor Q6, resistor R16, NMOS transistor Q3, transistor Q4, resistor R9, and transistor Q1;

[0007] One end of resistor R14 is connected to the drainage signal interface A2, one end of resistor R15, and one end of resistor R18. The other end is connected to the base of transistor Q5. The emitter of transistor Q5 is connected to the water inlet signal interface A1, and the base is connected to the anode of LED U4. The cathode of LED U4 is connected to the drain of NMOS transistor Q2, and the gate of NMOS transistor Q2 is connected to the output of operational amplifier U1. The other end of resistor R15 is connected to one end of resistor R17 and ground. The other end of resistor R17 is connected to one end of resistor R16 and the drain of NMOS transistor Q3. The other end of resistor R16 is connected to... The collector and base of transistor Q6 are connected to the other end of resistor R18, and the emitter is connected to the power supply. The non-inverting input of operational amplifier U1 is connected to the non-inverting input of operational amplifier U2. The output of operational amplifier U2 is connected to the base of transistor Q1, and the collector of transistor Q1 is connected to the power supply. The non-inverting input of operational amplifier U3 is connected to aeration pressure signal interface A3 and the collector of transistor Q4. The base of transistor Q4 is connected to the source of NMOS transistor Q3, and the emitter is grounded. The output of operational amplifier U3 is connected to valve opening signal interface A4. LED U4 and transistor U5 are in a coupled package.

[0008] Furthermore, the control module also includes resistors R10 and R11; one end of resistor R10 is connected to the inverting input of operational amplifier U3 and one end of resistor R11, respectively, and the other end of resistor R10 is connected to the output terminal of operational amplifier U3 and the output valve opening signal interface A4, respectively; the other end of resistor R11 is grounded.

[0009] Furthermore, the control module also includes resistors R7 and R8; one end of resistor R8 is connected to the emitter of transistor Q1 and the pressure balance signal interface A5, respectively; the other end of resistor R8 is connected to the collector of transistor Q4, one end of resistor R7, and the non-inverting input of operational amplifier U3, respectively; and the other end of resistor R7 is grounded.

[0010] Furthermore, the control module also includes resistors R3 and R6; one end of resistor R3 is connected to the output terminal of operational amplifier U3 and the base of transistor Q1, respectively, and the other end of resistor R3 is connected to the inverting input of operational amplifier U3 and one end of resistor R6, and the other end of resistor R6 is grounded.

[0011] Furthermore, the control module also includes resistors R1 and R2; one end of resistor R1 is connected to the power supply, and the other end is connected to the inverting input of operational amplifier U1 and one end of resistor R2, respectively, while the other end of resistor R2 is grounded.

[0012] Furthermore, the control module also includes resistor R4 and adjustable resistor R5; the moving pin of adjustable resistor R5 is connected to the non-inverting input of operational amplifier U2 and the non-inverting input of operational amplifier U1 respectively; the first fixed pin of adjustable resistor R5 is connected to the power supply; the second fixed pin is connected to the non-inverting input of operational amplifier U1, the non-inverting input of operational amplifier U2, and one end of resistor R4 respectively; and the other end of resistor R4 is grounded.

[0013] Furthermore, the control module also includes a resistor R12 and an adjustable resistor R13; one end of the resistor R12 is connected to the power supply, and the other end is connected to the aeration pressure signal interface A3, the collector of the transistor Q4, the non-inverting input of the operational amplifier U3, and the first fixed pin of the adjustable resistor R13. The moving pin of the adjustable resistor R13 is connected to the other end of the resistor R11 and ground, respectively, and the second fixed pin of the adjustable resistor R13 is grounded.

[0014] Furthermore, in each control module, the aeration pressure signal interface A3 is connected separately to another I / O port of the MCU chip, and the valve opening signal interface A4 is connected to the valve; only the first control module has a pressure balance signal interface A5.

[0015] The beneficial effects of this invention are as follows:

[0016] By balancing the pressure inside and outside the pipeline based on the actual liquid level and automatically adjusting the aeration flow rate of each branch according to the liquid level, the problem of uneven aeration flow rate distribution before and after the node caused by pipeline pressure loss and the problem of high occupancy of a certain branch is avoided. This improves the solubility and transfer efficiency of oxygen, and avoids high occupancy of a certain branch and long-term high-load operation of the air pump. Attached Figure Description

[0017] Figure 1 Structure diagram of a surfactant wastewater treatment system;

[0018] Figure 2 Circuit diagram of the surfactant wastewater treatment system of the present invention;

[0019] Figure 3 The coupling diagram of U4 and U5 of the present invention. Detailed Implementation

[0020] The present invention will be further described below with reference to the accompanying drawings, but this is not intended to limit the present invention in any way. Any modifications or substitutions made based on the teachings of the present invention shall fall within the protection scope of the present invention.

[0021] The surfactant wastewater treatment system of the present invention includes an MCU chip and multiple control modules, each control module corresponding to the aeration port of one aeration branch. Each control module includes operational amplifier U1, operational amplifier U2, operational amplifier U3, resistor R14, resistor R15, transistor Q5, resistor R18, resistor R17, light-emitting diode U4, transistor U5, NMOS transistor Q2, transistor Q6, resistor R16, NMOS transistor Q3, transistor Q4, resistor R9, and transistor Q1.

[0022] One end of resistor R14 is connected to the drainage signal interface A2, one end of resistor R15, and one end of resistor R18. The other end is connected to the base of transistor Q5. The emitter of transistor Q5 is connected to the water inlet signal interface A1, and the base is connected to the anode of LED U4. The cathode of LED U4 is connected to the drain of NMOS transistor Q2, and the gate of NMOS transistor Q2 is connected to the output of operational amplifier U1. The other end of resistor R15 is connected to one end of resistor R17 and ground. The other end of resistor R17 is connected to one end of resistor R16 and the drain of NMOS transistor Q3. The other end of R16 is connected to the collector of transistor Q6, the base of transistor Q6 is connected to the other end of resistor R18, and the emitter is connected to the power supply. The non-inverting input of operational amplifier U1 is connected to the non-inverting input of operational amplifier U2, the output of operational amplifier U2 is connected to the base of transistor Q1, and the collector of transistor Q1 is connected to the power supply. The non-inverting input of operational amplifier U3 is connected to aeration pressure signal interface A3 and the collector of transistor Q4, respectively. The base of transistor Q4 is connected to the source of NMOS transistor Q3, and the emitter is grounded. The output of operational amplifier U3 is connected to valve opening signal interface A4. LED U4 and transistor U5 are in a coupled package.

[0023] The control module also includes resistors R10 and R11; one end of resistor R10 is connected to the inverting input of operational amplifier U3 and one end of resistor R11, respectively; the other end of resistor R10 is connected to the output terminal of operational amplifier U3 and the output valve opening signal interface A4, respectively; the other end of resistor R11 is grounded.

[0024] The control module also includes resistors R7 and R8; one end of resistor R8 is connected to the emitter of transistor Q1 and the pressure balance signal interface A5, respectively; the other end of resistor R8 is connected to the collector of transistor Q4, one end of resistor R7, and the non-inverting input of operational amplifier U3, respectively; and the other end of resistor R7 is grounded.

[0025] The control module also includes resistors R3 and R6; one end of resistor R3 is connected to the output terminal of operational amplifier U3 and the base of transistor Q1, respectively, and the other end of resistor R3 is connected to the inverting input of operational amplifier U3 and one end of resistor R6, and the other end of resistor R6 is grounded.

[0026] The control module also includes resistors R1 and R2; one end of resistor R1 is connected to the power supply, and the other end is connected to the inverting input of operational amplifier U1 and one end of resistor R2, respectively. The other end of resistor R2 is grounded.

[0027] The control module also includes resistor R4 and adjustable resistor R5. The moving pin of adjustable resistor R5 is connected to the non-inverting input of operational amplifier U2 and the non-inverting input of operational amplifier U1, respectively. The first fixed pin of adjustable resistor R5 is connected to the power supply, and the second fixed pin is connected to the non-inverting input of operational amplifier U1, the non-inverting input of operational amplifier U2, and one end of resistor R4, respectively. The other end of resistor R4 is grounded.

[0028] The control module also includes resistor R12 and adjustable resistor R13. One end of resistor R12 is connected to the power supply, and the other end is connected to the aeration pressure signal interface A3, the collector of transistor Q4, the non-inverting input of operational amplifier U3, and the first fixed pin of adjustable resistor R13. The moving pin of adjustable resistor R13 is connected to the other end of resistor R11 and ground, respectively, and the second fixed pin of adjustable resistor R13 is grounded.

[0029] In this invention, interface A1 acquires the inlet water signal, interface A2 acquires the drainage signal, interface A3 acquires the aeration pressure signal, interface A4 outputs the valve opening signal, and interface A5 acquires the pressure balance signal corresponding to the liquid level.

[0030] During the water intake phase, LED U4 and transistor U5 are coupled in a package (one module is coupled, and the others are replaced with ordinary diodes). Transistor U5 outputs the water pump control signal, and resistors R12 and R4 are force-sensitive resistors.

[0031] During the water inlet stage, adjustable resistors R5 and R4 sample the liquid level signal and feed it back to operational amplifiers U1 and U2; resistors R1 and R2 feed back the liquid level threshold signal to operational amplifier U1, and when the threshold is reached, the water inlet is shut off and aeration begins; resistors R3 and R6 feed back to the output of operational amplifier U2 for gain; Q1 amplifies the signal and feeds it back to the pressure balance signal interface A5, so that the aeration main pipeline can be pre-pressure balanced.

[0032] During the water level rise phase, operational amplifier U1 has no output, NMOS transistor Q3 is turned on, and the power signal passes through transistor Q6, resistor R16, NMOS transistor Q3, and transistor Q4, causing the pressure balance signal interface A5 to rise via resistor R8, transistor Q4, and ground. When the water level reaches the liquid level threshold, operational amplifier U1 outputs, and NMOS transistors Q2 and Q3 are turned off. The turn-off of NMOS transistor Q2 causes LED U4 to stop coupling, and the turn-off of NMOS transistor Q3 causes the pressure balance signal interface A5 to feed back the pressure balance signal through resistor R8 to operational amplifier U3 and aeration pressure signal interface A3. Operational amplifier U3 outputs to valve opening signal interface A4 to control... The valve opening is controlled by resistors R10 and R11, which are used to feed back the output of operational amplifier U3. Resistors R12 and R13 are used to adjust the pressure distribution between multiple branches. For example, the signal from aeration pressure signal interface A3 is collected for every 5 aeration branches, or the connection point between each branch uses aeration pressure signal interface A3 to increase or decrease the aeration flow. Aeration pressure signal interface A3 is directly connected to the MCU chip and feeds the signal back to the MCU chip. The signal from aeration pressure signal interface A3 in one of the control modules is used as a reference to compare with the signals from aeration pressure signal interface A3 in the other control modules. The signal is then fed back to digital potentiometer R13 to compensate the output of operational amplifier U3 and complete the equalization.

[0033] In some embodiments, the adjustable resistor R13 is a digital potentiometer. The H pin of the digital potentiometer R13 is connected to resistor R12, the W and L pins are connected to ground, the CLK pin is connected to the power supply and the CLK pin of the digital potentiometer R13 in each module, and the CS and DIN pins are connected to the MCU. During drainage, the drainage signal is also input to the drainage signal interface A2, and NMOS transistor Q5 and transistor Q6 are cut off, in a cycle. The signal from the external circuit to start the drainage pump is fed back to the drainage signal interface A2, causing the control module to stop compensation and stop the inlet pump, but the valve does not close, and the liquid level in the tank automatically decreases. The control module is connected to the MCU chip pins to achieve pressure balance inside and outside the pipeline according to the actual liquid level and to automatically adjust the aeration flow rate according to the liquid level. The specific connection is as follows:

[0034] The number of control modules corresponds to the number of aeration ports in the aeration branch. Except for the first control module's A1 and A2 interfaces, which connect to the MCU chip, the remaining control modules are connected in parallel with the first module's A1 and A2 interfaces, sharing a single signal interface and connecting to one I / O port of the MCU chip (not shown in the diagram). Interface A4 directly compensates for valve opening. The aeration pressure signal interface A3 connects separately to another I / O port of the MCU chip, and the valve opening signal interface A4 connects to the valve. Only the first control module has a pressure balance signal interface A5, which connects to the MCU chip's I / O interface.

[0035] Each control module's A3 interface connects to an I / O port of the MCU chip for initial settings, such as a preset opening degree of 15 degrees to reach a preset pressure. Then, the valve opening is compensated via the A4 interface to ensure the actual sampled pressure matches the preset value. To achieve pressure balance between nodes in the branch, if node A in the AF node has the highest pressure and node F has the lowest pressure, the AF node adjusts the opening degrees of different valves to decrease the pressure at node A and increase the pressure at node F, thus achieving flow balance.

[0036] Preferably, the microprocessor chip (MCU) can be a mainstream chip series, such as the STM32 series chip.

[0037] The beneficial effects of this invention are as follows:

[0038] By balancing the pressure inside and outside the pipeline based on the actual liquid level and automatically adjusting the aeration flow rate of each branch according to the liquid level, the problem of uneven aeration flow rate distribution before and after the node caused by pipeline pressure loss and the problem of high occupancy of a certain branch is avoided. This improves the solubility and transfer efficiency of oxygen, and avoids high occupancy of a certain branch and long-term high-load operation of the air pump.

[0039] As used herein, the term "preferred" is meant as an example, illustration, or illustration. Any aspect or design described herein as "preferred" need not be construed as being more advantageous than other aspects or designs. Rather, the use of the term "preferred" is intended to present the concept in a specific manner. As used in this application, the term "or" is intended to mean an inclusive "or" rather than an exclusionary "or." That is, unless otherwise specified or clear from the context, "X uses A or B" naturally includes either of the permutations. That is, if X uses A; X uses B; or X uses both A and B, then "X uses A or B" is satisfied in any of the foregoing examples.

[0040] Furthermore, although this disclosure has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on a reading and understanding of this specification and the accompanying drawings. This disclosure includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the aforementioned components (e.g., elements, etc.), the terminology used to describe such components is intended to correspond to any component (unless otherwise indicated) that performs the specified function of said component (e.g., is functionally equivalent to it), even if structurally not equivalent to the disclosed structure performing the functions in the exemplary implementations of this disclosure shown herein. Moreover, although specific features of this disclosure have been disclosed with respect to only one of several implementations, such features may be combined with one or more features of other implementations that may be desirable and advantageous for a given or particular application. Furthermore, with regard to the use of the terms “comprising,” “having,” “containing,” or variations thereof in the Detailed Description or claims, such terms are intended to be included in a manner similar to the term “including.”

[0041] The functional units in this invention embodiment can be integrated into a processing module, or each unit can exist physically separately, or multiple units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. The aforementioned devices or systems can execute the storage methods in the corresponding method embodiments.

[0042] In summary, the above embodiments are one implementation of the present invention, but the implementation of the present invention is not limited to the embodiments described above. Any changes, modifications, substitutions, combinations, or simplifications made that deviate from the spirit and principle of the present invention should be considered equivalent substitutions and are included within the protection scope of the present invention.

Claims

1. A surfactant-based wastewater treatment system, characterized in that, It includes an MCU chip and multiple control modules, each control module corresponding to the aeration port of one aeration branch; each control module includes operational amplifier U1, operational amplifier U2, operational amplifier U3, resistor R14, resistor R15, transistor Q5, resistor R18, resistor R17, light-emitting diode U4, transistor U5, NMOS transistor Q2, transistor Q6, resistor R16, NMOS transistor Q3, transistor Q4, resistor R9, transistor Q1, resistor R3, resistor R6, resistor R7, resistor R8, R10, resistor R11, and resistor R12; One end of resistor R14 is connected to the drainage signal interface A2, one end of resistor R15, and one end of resistor R18, respectively. The other end is connected to the base of transistor Q5. The emitter of transistor Q5 is connected to the water inlet signal interface A1, and the base is connected to the anode of LED U4. The cathode of LED U4 is connected to the drain of NMOS transistor Q2, and the gate of NMOS transistor Q2 is connected to the output of operational amplifier U1. The other end of resistor R15 is connected to one end of resistor R17 and ground, and the other end of resistor R17 is connected to resistor R... One end of resistor R16 is connected to the drain of NMOS transistor Q3. The other end of resistor R16 is connected to the collector of transistor Q6. The base of transistor Q6 is connected to the other end of resistor R18, and the emitter is connected to the power supply. The non-inverting input of operational amplifier U1 is connected to the non-inverting input of operational amplifier U2. The output of operational amplifier U2 is connected to the base of transistor Q1, and the collector of transistor Q1 is connected to the power supply. The non-inverting input of operational amplifier U3 is connected to aeration pressure signal interface A3 and the collector of transistor Q4. The base of transistor Q4 is connected to the NMOS transistor. The source and emitter of S-transistor Q3 are grounded; the output of operational amplifier U3 is connected to valve opening signal interface A4; LED U4 and transistor U5 are in a coupled package; one end of resistor R3 is connected to the output of operational amplifier U3 and the base of transistor Q1, respectively; the other end of resistor R3 is connected to the inverting input of operational amplifier U3 and one end of resistor R6, the other end of resistor R6 is grounded; one end of resistor R10 is connected to the inverting input of operational amplifier U3 and one end of resistor R11, the other end of resistor R10 is connected to... Connect the output terminal of operational amplifier U3 and the output valve opening signal interface A4; the other end of resistor R11 is grounded; one end of resistor R12 is connected to the power supply, and the other end is connected to the aeration pressure signal interface A3, the collector of transistor Q4, and the non-inverting input of operational amplifier U3 respectively; one end of resistor R8 is connected to the emitter of transistor Q1 and the pressure balance signal interface A5 respectively; the other end of resistor R8 is connected to the collector of transistor Q4, one end of resistor R7, and the non-inverting input of operational amplifier U3 respectively; the other end of resistor R7 is grounded. The control module also includes resistors R1 and R2; one end of resistor R1 is connected to the power supply, and the other end is connected to the inverting input of operational amplifier U1 and one end of resistor R2, respectively. The other end of resistor R2 is grounded. The control module also includes resistor R4 and adjustable resistor R5; the moving pin of adjustable resistor R5 is connected to the non-inverting input of operational amplifier U2 and the non-inverting input of operational amplifier U1, respectively. The first fixed pin of adjustable resistor R5 is connected to the power supply, and the second fixed pin is connected to the non-inverting input of operational amplifier U1, the non-inverting input of operational amplifier U2, and one end of resistor R4, respectively. The other end of resistor R4 is grounded. Adjustable resistor R5 and resistor R4 sample the liquid level signal. The control module also includes an adjustable resistor R13; the first fixed pin of the adjustable resistor R13 is connected to the other end of the resistor R12, the moving pin of the adjustable resistor R13 is connected to the other end of the resistor R11 and ground respectively, the second fixed pin of the adjustable resistor R13 is grounded, and the resistors R12 and R4 are force-sensitive resistors. In each control module, the aeration pressure signal interface A3 is connected to another I / O port of the MCU chip, and the valve opening signal interface A4 is connected to the valve. Only the first control module has a pressure balance signal interface A5. Interface A1 obtains the inlet water signal, interface A2 obtains the drainage signal, interface A3 obtains the aeration pressure signal, interface A4 outputs the valve opening signal, and interface A5 obtains the pressure balance signal corresponding to the liquid level.

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