Ultrasonic transducer device and display device

Abstract

The embodiments of the present disclosure disclose an ultrasonic transducer device and a display device. By combining a thin-film transistor circuit and an ultrasonic transducer, a large-area, arrayed ultrasonic fingerprint recognition structure is formed, which can perform fingerprint recognition, has a simple structure and high recognition accuracy.

Description

Technical Field

[0001] The present disclosure relates to the field of ultrasonic transducer technology, and in particular to an ultrasonic transducer device and a display device. Background Art

[0002] Fingerprints are unique and invariable features that distinguish a person from another. They are composed of a series of ridges and valleys on the surface of the fingertip skin. The details of these ridges and valleys determine the uniqueness of the fingerprint pattern. Display panels with fingerprint recognition capabilities have been developed for personal authentication, increasing the information security of display devices. Currently, a variety of fingerprint recognition technologies have been developed, and ultrasonic fingerprint recognition is one of them.

[0003] Existing fingerprint recognition technologies can be primarily categorized by their working principles into optical, capacitive, and ultrasonic fingerprint recognition. Optical fingerprint recognition is highly susceptible to the effects of external light, and its speed and accuracy decrease under strong exposure. Capacitive fingerprint recognition, on the other hand, cannot accurately determine the dielectric constants of oil and water when the user's finger is greasy or dirty, resulting in reduced speed and accuracy. Compared to optical and capacitive fingerprint recognition, ultrasonic fingerprint recognition leverages the advantages of ultrasonic waves' excellent penetration, short wavelength, and high energy, achieving higher recognition speeds and accuracy in a variety of scenarios (including strong light conditions and situations with greasy or dirty fingers). Summary of the Invention

[0004] The present disclosure provides an ultrasonic transducer device and a display device, and the specific solutions are as follows:

[0005] An ultrasonic transducer device provided by an embodiment of the present disclosure includes a substrate, wherein the substrate includes a plurality of ultrasonic units distributed in an array, each of the ultrasonic units including:

[0006] A thin film transistor circuit is provided on the base substrate;

[0007] At least one first ultrasonic transducer is arranged on the side of the thin film transistor circuit facing away from the base substrate, the first ultrasonic transducer includes a first electrode, a first vibration membrane layer, and a second electrode stacked and arranged on the side of the thin film transistor circuit facing away from the base substrate, a cavity is defined between the first electrode and the first vibration membrane layer, the first electrode is electrically connected to the thin film transistor circuit, and the second electrode is electrically connected to the driving voltage line.

[0008] In one possible implementation, the ultrasonic transducer device provided in the embodiment of the present disclosure further includes a plurality of drive signal lines for loading drive signals to the thin-film transistor circuit, and at least two adjacent rows of ultrasonic units share the same drive signal line, or at least two adjacent columns of ultrasonic units share the same drive signal line.

[0009] In a possible implementation, in the ultrasonic transducer device provided in an embodiment of the present disclosure, the thin film transistor circuit includes: a first transistor, a second transistor, a third transistor, a fourth transistor, and a storage capacitor; the drive signal line includes: a first gate line, a second gate line, a third gate line, a first voltage line, a second voltage line, the drive voltage line, and a signal reading line; wherein,

[0010] The gate of the first transistor is electrically connected to the first gate line, the first electrode of the first transistor is electrically connected to the first voltage line, and the second electrode of the first transistor is electrically connected to the first electrode of the second transistor;

[0011] The gate of the second transistor is electrically connected to the second gate line, and the second electrode of the second transistor is electrically connected to the gate of the third transistor;

[0012] A first electrode of the third transistor is electrically connected to the second voltage line, and a second electrode of the third transistor is electrically connected to a first electrode of the fourth transistor;

[0013] The gate of the fourth transistor is electrically connected to the third gate line, and the second electrode of the fourth transistor is electrically connected to the signal reading line;

[0014] A first end of the storage capacitor is electrically connected to the second voltage line, and a second end of the storage capacitor is electrically connected to the gate of the third transistor;

[0015] The first electrode of the first ultrasonic transducer is electrically connected to the first electrode of the second transistor.

[0016] In a possible implementation, in the ultrasonic transducer device provided in an embodiment of the present disclosure, every two adjacent columns of ultrasonic units constitute a first group, a driving voltage line is provided at the first gap between the two columns of ultrasonic units in the first group, and the second electrodes of the first ultrasonic transducers in the two columns of ultrasonic units in the same first group are electrically connected to the driving voltage line at the first gap.

[0017] In a possible implementation, in the above-mentioned ultrasonic transducer device provided in an embodiment of the present disclosure, the first gate line spaced apart from the driving voltage line is further provided at the first gap, and the gates of the first transistors in the two columns of the ultrasonic units in the same first group are electrically connected to the first gate line at the first gap.

[0018] In a possible implementation, in the ultrasonic transducer device provided in an embodiment of the present disclosure, a second voltage line is provided at the second gap between each two adjacent ultrasonic units of the first group, and the second voltage line is electrically connected to the first electrodes of all the third transistors in the two columns of ultrasonic units on both sides thereof.

[0019] In a possible implementation, in the ultrasonic transducer device provided in the embodiment of the present disclosure, two adjacent columns of ultrasonic units in the same first group are symmetrically arranged about the first gap, and two adjacent ultrasonic units in the first group are symmetrically arranged about the second gap.

[0020] In one possible implementation, in the ultrasonic transducer device provided in an embodiment of the present disclosure, every two adjacent rows of ultrasonic units constitute a second group, a first voltage line is provided at a third gap between two rows of ultrasonic units in the second group, and the first electrodes of all the first transistors in the two rows of ultrasonic units in the same second group are electrically connected to the first voltage line at the third gap.

[0021] In a possible implementation, in the above-mentioned ultrasonic transducer device provided in an embodiment of the present disclosure, a second gate line is provided at the fourth gap between each two adjacent second groups of ultrasonic units, and the second gate line is electrically connected to the gates of all the second transistors in the two rows of ultrasonic units on both sides thereof.

[0022] In a possible implementation, in the ultrasonic transducer device provided in an embodiment of the present disclosure, two adjacent columns of ultrasonic units in the same second group are symmetrically arranged about the third gap, and two adjacent columns of ultrasonic units in the second group are symmetrically arranged about the fourth gap.

[0023] In a possible implementation, in the ultrasonic transducer device provided in an embodiment of the present disclosure, the number of the first ultrasonic transducers in each ultrasonic unit is 1 or 2, and the orthographic projection of each first ultrasonic transducer on the base substrate does not overlap with the orthographic projection of the thin-film transistor circuit and each signal line on the base substrate.

[0024] In a possible implementation, in the ultrasonic transducer device provided in an embodiment of the present disclosure, the number of the first ultrasonic transducers in each ultrasonic unit is 3, and the orthographic projection of each of the first ultrasonic transducers on the substrate overlaps with the orthographic projection of the thin film transistor circuit and other signal lines on the substrate.

[0025] In a possible implementation, in the above-mentioned ultrasonic transducer device provided in an embodiment of the present disclosure, when the number of the first ultrasonic transducers in the ultrasonic unit is greater than or equal to 2, the first electrodes of each of the first ultrasonic transducers in the same ultrasonic unit are an integral structure, the second electrodes of each of the first ultrasonic transducers in the same ultrasonic unit are an integral structure, and the cavities of each of the first ultrasonic transducers in the same ultrasonic unit are separated from each other by the first vibration membrane layer.

[0026] In a possible implementation, in the ultrasonic transducer device provided in the embodiment of the present disclosure, the width-to-length ratio of the third transistor is greater than or equal to the width-to-length ratio of the fourth transistor.

[0027] In a possible implementation, in the ultrasonic transducer device provided in the embodiment of the present disclosure, at least one of the first transistor, the second transistor, the third transistor, and the fourth transistor is a dual-gate transistor.

[0028] In a possible implementation, in the above-mentioned ultrasonic transducer device provided in an embodiment of the present disclosure, the active layer of the third transistor and the active layer of the fourth transistor are an integrated structure, the second electrode of the third transistor and the first electrode of the fourth transistor are an integrated structure, and the second electrode of the third transistor is electrically connected to the active layer of the third transistor.

[0029] In one possible implementation, in the ultrasonic transducer device provided in an embodiment of the present disclosure, the base substrate further includes a virtual ultrasonic unit located outside the plurality of ultrasonic units distributed in the array, the virtual ultrasonic unit includes the thin-film transistor circuit and a second ultrasonic transducer, the second ultrasonic transducer includes a third electrode, a second vibration membrane layer, and a fourth electrode stacked on a side of the thin-film transistor circuit facing away from the base substrate, a sacrificial layer is provided between the third electrode and the second vibration membrane layer, the third electrode is electrically connected to the thin-film transistor circuit, and the fourth electrode is electrically connected to the driving voltage line.

[0030] Correspondingly, an embodiment of the present disclosure further provides a display device, comprising a display panel and the above-mentioned ultrasonic transducer device provided by an embodiment of the present disclosure.

[0031] In a possible implementation, in the display device provided in the embodiment of the present disclosure, the display panel is a liquid crystal display panel, and each of the ultrasonic units in the ultrasonic transducer device is arranged in a non-luminous area within the liquid crystal display panel.

[0032] In a possible implementation, in the above-mentioned display device provided in an embodiment of the present disclosure, the display panel is an organic light-emitting display panel, and the ultrasonic transducer device is disposed on the back side of the organic light-emitting display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A schematic diagram of a planar structure of an ultrasonic transducer device provided in an embodiment of the present disclosure;

[0034] Figure 2 for Figure 1 A schematic cross-sectional view of an ultrasonic unit;

[0035] Figure 3 is a specific circuit diagram of a thin film transistor circuit;

[0036] Figure 4 for Figure 3 The working timing diagram of the thin film transistor circuit shown;

[0037] Figure 5 for Figure 1 A schematic diagram of a layout corresponding to several ultrasonic units;

[0038] Figure 6 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0039] Figure 7 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0040] Figure 8 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0041] Figure 9 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0042] Figure 10 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0043] Figure 11 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0044] Figure 12 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0045] Figure 13 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0046] Figure 14 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0047] Figure 15 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0048] Figure 16 A schematic diagram of another planar structure of the ultrasonic transducer device provided in an embodiment of the present disclosure;

[0049] Figure 17 for Figure 1 Another layout diagram corresponding to several ultrasonic units;

[0050] Figure 18 A schematic structural diagram of a display device provided in an embodiment of the present disclosure;

[0051] Figure 19 A schematic structural diagram of another display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. And in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0053] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words “include” or “comprise” and the like used in this disclosure mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The words “connect” or “connected” and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Inside”, “outside”, “upper”, “lower”, etc. are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0054] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only for the purpose of illustrating the present disclosure. The same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions.

[0055] Among the related technologies, the most commonly used ultrasonic fingerprint recognition is PVDF ultrasonic fingerprint recognition, which is not affected by external light interference, does not require a display screen to provide a light source, can realize 3D fingerprint and deep skin information detection, and has strong anti-counterfeiting capabilities. However, the technology is monopolized by Qualcomm and requires special PVDF materials and special polarization equipment, which is relatively expensive.

[0056] In view of this, the present disclosure provides an ultrasonic transducer device, such as Figure 1 As shown, it includes a substrate 1, which includes a plurality of ultrasonic units P distributed in an array; Figure 2 As shown, Figure 2 for Figure 1 A schematic cross-sectional view of an ultrasonic unit P, wherein each ultrasonic unit P comprises:

[0057] A thin film transistor circuit 2 is provided on the base substrate 1;

[0058] At least one first ultrasonic transducer 3 is arranged on the side of the thin film transistor circuit 2 facing away from the substrate 1. The first ultrasonic transducer 3 includes a first electrode 31, a first vibration membrane layer 32, and a second electrode 33 stacked on the side of the thin film transistor circuit 2 facing away from the substrate 1. There is a cavity 34 between the first electrode 31 and the first vibration membrane layer 32. The first electrode 31 is electrically connected to the thin film transistor circuit 2, and the second electrode 33 is electrically connected to the driving voltage line.

[0059] The ultrasonic transducer (CMUT) device provided in the embodiment of the present disclosure combines a thin-film transistor circuit and an ultrasonic transducer to form a large-area, arrayed ultrasonic fingerprint recognition structure, which is capable of fingerprint recognition and has a simple structure and high recognition accuracy.

[0060] Specifically, the main functions of the CMUT are: in the transmission phase, the transducer converts the input electrical energy into mechanical energy under the action of the excitation signal and transmits it, thereby transmitting ultrasonic waves; in the reception phase, the transducer converts the sound waves into electrical signals to receive ultrasonic waves. Therefore, the ultrasonic unit in the ultrasonic transducer (CMUT) device provided in the embodiment of the present disclosure can be combined with a display panel. When a user touches the display panel, ultrasonic waves are transmitted to the person's finger. Because the ridges and valleys on the finger surface have different reflection intensities for the ultrasonic signal, the ultrasonic energy reflected by the ridges and valleys of the finger is different. By converting this energy difference into a difference in electrical signals, the ridges and valleys of the fingerprint can be imaged, thereby performing fingerprint recognition.

[0061] Optionally, the material of the first vibration membrane layer may be PI or PET.

[0062] Optionally, the base substrate may be a rigid substrate, such as a glass substrate; or a flexible substrate, such as PI.

[0063] The ultrasonic transducer provided in the embodiments of the present disclosure is manufactured using a glass-based or flexible PI-based substrate, which can have a larger area and can flexibly conform to the surface of the human body and objects, with advantages far exceeding those of silicon-based CMUT devices.

[0064] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 2 and Figure 3 As shown, the thin film transistor circuit includes: a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, and a storage capacitor C B ;in,

[0065] The gate of the first transistor T1 is electrically connected to the first gate line G1, the first electrode of the first transistor T1 is electrically connected to the first voltage line Vbias, and the second electrode of the first transistor T1 is electrically connected to the first electrode of the second transistor T2;

[0066] The gate of the second transistor T2 is electrically connected to the second gate line G2, and the second electrode of the second transistor T2 is electrically connected to the gate of the third transistor T3;

[0067] A first electrode of the third transistor T3 is electrically connected to the second voltage line Vdd, and a second electrode of the third transistor T3 is electrically connected to a first electrode of the fourth transistor T4;

[0068] A gate of the fourth transistor T4 is electrically connected to the third gate line G3, and a second electrode of the fourth transistor T4 is electrically connected to the signal read line Vread;

[0069] Storage capacitor C B The first end of the storage capacitor C is electrically connected to the second voltage line Vdd. BThe second end is electrically connected to the gate of the third transistor T3;

[0070] The first electrode of the first ultrasonic transducer 3 is electrically connected to the first electrode of the second transistor T2, and the second electrode 33 of the first ultrasonic transducer 3 is electrically connected to the driving voltage line Vda; wherein Vda is used to input a DC voltage Vdc and an AC voltage Vda to the second electrode 33.

[0071] It should be noted that Figure 3 The thin film transistor circuit shown is only one of the circuit structures listed in the embodiment of the present disclosure. The thin film transistor circuit in the embodiment of the present disclosure is not limited to Figure 3 The structure shown, and other circuits that can be combined with the first ultrasonic transducer to implement ultrasonic fingerprint recognition all fall within the scope of protection of the embodiments of the present disclosure.

[0072] like Figure 2 As shown, the first transistor T1 includes a first active layer 11, a first gate 12, a first source 13 and a first drain 14 sequentially stacked between the base substrate 1 and the first ultrasonic transducer 3. The second transistor T2 includes a second active layer 21, a second gate 22, a second source 23 and a second drain 24 sequentially stacked between the base substrate 1 and the first ultrasonic transducer 3. The third transistor T3 includes a third active layer 41, a third gate 42, a third source 43 and a third drain 44 sequentially stacked between the base substrate 1 and the first ultrasonic transducer 3. The fourth transistor T4 includes a third active layer 41, a fourth gate 51, a third source 43 and a third drain 44 sequentially stacked between the base substrate 1 and the first ultrasonic transducer 3. That is, the fourth transistor T4 can share an active layer, a source and a drain with the third transistor T4. The first active layer 11, the second active layer 21 and the third active layer 41 are located in the same film layer (active layer), the first gate 12, the second gate 22, the third gate 42 and the fourth gate 51 are located in the same film layer (Gate1 layer), and the storage capacitor C B The first plate C1 is located at the Gate1 layer, and the storage capacitor C B The second electrode C2 is located in the Gate2 layer, and the first source 1, the first drain 14, the second source 23, the second drain 24, the third source 43 and the third drain 44 are located in the same film layer (SD layer).

[0073] Specifically, Figure 3 The first electrode of each transistor can be a source electrode, and the second electrode can be a drain electrode; of course, the first electrode can also be a drain electrode, and the second electrode can be a source electrode.

[0074] like Figure 2As shown, a light shielding layer LS is further provided between the substrate 1 and the active layer. The light shielding layer LS can be used to shield the active layer, and can also be used to replace the Gate1 layer and the Gate2 layer to form a storage capacitor C B (This is illustrated in the present disclosure); a first buffer layer 6 is further provided between the light-shielding layer LS and the active layer, a first gate insulating layer 7 is further provided between the active layer and the Gate1 layer, a second gate insulating layer 8 is further provided between the Gate1 layer and the Gate2 layer, an interlayer insulating layer 9 is further provided between the Gate2 layer and the SD layer, a flat layer 10 is further provided between the SD layer and the first ultrasonic transducer 3, a first passivation layer 20 is further provided between the flat layer 10 and the first ultrasonic transducer 3, the first electrode 31 of the first ultrasonic transducer 3 is electrically connected to the first electrode (second drain 24) of the second transistor T2 through a via hole penetrating the first passivation layer 20 and the flat layer 10, a second passivation layer 30 is further provided between the first electrode 31 and the cavity 34, a second buffer layer 40 is further provided above the second electrode 33, and a third buffer layer 50 is further provided above the second buffer layer 40.

[0075] Of course, other essential components of the ultrasonic transducer device should be understood by those skilled in the art and will not be described in detail here.

[0076] Specifically, if Figure 2 As shown, the cavity 34 can be made by using a sacrificial layer, and the sacrificial layer is etched with a hole 35. The manufacturing method of the sacrificial layer is the same as that of the prior art and will not be described in detail here.

[0077] The following combination Figure 3 The thin film transistor circuit shown and Figure 4 The timing sequence shown here illustrates the principle of fingerprint recognition implemented by the ultrasonic transducer device provided in the embodiment of the present disclosure, as follows:

[0078] During stage t1 (ultrasound emission stage), both a DC voltage Vdc and an AC voltage Vac are applied to the second electrode of the CMUT. The first transistor T1 and the second transistor T2 are turned on, the first voltage line Vbias is at a constant potential, and the first diaphragm layer of the CMUT vibrates at a high frequency, emitting sound waves.

[0079] In the t2 stage (collection stage), only the DC voltage Vdc is applied to the left end of the CMUT, and no AC voltage Vac is applied. The first transistor T1 is turned off and the second transistor T2 is turned on. The external sound wave signal is reflected by the finger and reaches the CMUT, pressing the first vibration membrane layer to vibrate, generating AC current (charge). The AC amplitude within half a cycle is collected and the charge is stored in the storage capacitor C. B middle.

[0080] In the t3 phase (reading phase), the third transistor T3 and the fourth transistor T4 are turned on, and the storage capacitor CB The charge stored in the sensor is converted into current by the third transistor T3 and finally outputted by the fourth transistor T4. The outputted current is read through the signal reading line Vread to realize fingerprint recognition.

[0081] In a specific implementation, after the charge is collected in the t2 stage, the reading in the t3 stage may not be performed directly, that is, there may be a buffer stage t3' between the t2 stage and the t3 stage, and the t3 stage may be performed when reading is needed. In the t3' stage, the voltage on the first voltage line Vbias may be lowered to reduce power consumption.

[0082] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 3 、 Figure 5-Figure 8 As shown, Figure 5-Figure 8 They are Figure 1 Figure 1 shows a schematic layout diagram corresponding to several ultrasonic units P in FIG. The ultrasonic transducer device includes multiple drive signal lines for applying drive signals to the thin-film transistor circuit. The drive signal lines include a first gate line G1, a second gate line G2, a third gate line G3, a first voltage line Vbias, a second voltage line Vdd, a drive voltage line Vda, and a signal read line Vread. At least two adjacent rows of ultrasonic units P share the same drive signal line (e.g., Vbias is shared), or at least two adjacent columns of ultrasonic units P share the same drive signal line (e.g., Vbias is shared). This saves space, simplifies design, and facilitates high-resolution design.

[0083] Specifically, if Figure 2 and Figure 3 As shown, the first gate line G1, the second voltage line Vdd and the signal reading line Vread can be located in the SD layer, the second gate line G2 and the third gate line G3 can be located in the Gate1 layer, the first voltage line Vbias can be located in the Gate2 layer, and the driving voltage line Vda and the second electrode 33 are located in the same layer.

[0084] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 5 As shown, every two adjacent rows of ultrasonic units P form a first group A1. A driving voltage line Vda is provided at a first gap B1 between the two rows of ultrasonic units P in the first group A1. The second electrodes 33 of the first ultrasonic transducers 3 in the two rows of ultrasonic units P in the same first group A1 are both electrically connected to the driving voltage line Vda at the first gap B1. This allows two adjacent rows of ultrasonic units P to share a driving voltage line Vda, saving space, simplifying the design, and facilitating high-resolution design.

[0085] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 6As shown, a first gate line G1 is provided at the first gap B1, spaced apart from the drive voltage line Vda. The gates of the first transistors T1 in the two columns of ultrasonic units P in the same first group A1 are electrically connected to the first gate line G1 at the first gap B1. This allows two adjacent columns of ultrasonic units P to share a single first gate line G1, further saving space and simplifying the design, facilitating a higher-resolution design.

[0086] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 5 As shown, a second voltage line Vdd is provided at the second gap B2 between each two adjacent first groups (A1) of ultrasonic units P. The second voltage line Vdd is electrically connected to the first electrodes of all third transistors T3 in the two columns of ultrasonic units P on either side of it. This allows two adjacent columns of ultrasonic units P to share a single second voltage line Vdd, further saving space, simplifying the design, and facilitating higher-resolution designs.

[0087] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 5 and Figure 6 As shown, two adjacent rows of ultrasonic units P within the same first group A1 are symmetrically arranged about the first gap B1, and two adjacent first groups (A1) of ultrasonic units P are symmetrically arranged about the second gap B2. Thus, the adjacent left and right ultrasonic units P have a mirror-symmetrical structure. The dimensions of each ultrasonic unit P can be 75 microns by 75 microns, but are of course not limited thereto.

[0088] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 7 As shown, every two adjacent rows of ultrasonic units P form a second group A2. A first voltage line Vbias is provided at the third gap B3 between the two rows of ultrasonic units P in the second group A2. The first electrodes of all first transistors T1 within the two rows of ultrasonic units P in the same second group A2 are electrically connected to the first voltage line Vbias at the third gap B3. This allows two adjacent rows of ultrasonic units P to share a single first voltage line Vbias, further saving space, simplifying the design, and facilitating higher-resolution designs.

[0089] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 8 As shown, a second gate line G2 is provided at the fourth gap B4 between each two adjacent second groups (A2) of ultrasonic units P. The second gate line G2 is electrically connected to the gates of all second transistors T2 in the two rows of ultrasonic units P on either side of it. This allows two adjacent rows of ultrasonic units P to share a single second gate line G2, further saving space, simplifying the design, and facilitating higher-resolution designs.

[0090] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 7 and Figure 8 As shown, two adjacent rows of ultrasonic units P within the same second group A2 are symmetrically arranged about the third gap B3, and two adjacent second groups (A2) of ultrasonic units P are symmetrically arranged about the fourth gap B4. Thus, the four adjacent ultrasonic units P, vertically, horizontally, and vertically, form a mirror-symmetrical structure. The dimensions of each ultrasonic unit P can be, but are not limited to, 75 microns by 75 microns.

[0091] Specifically, if Figure 5-Figure 8 As shown, Figure 5 Taking two adjacent columns of ultrasonic units P sharing a driving voltage line Vda and two adjacent columns of ultrasonic units P sharing a second voltage line Vdd as an example, Figure 6 is Figure 5 Based on the example of two adjacent columns of ultrasonic units P sharing a first gate line G1, Figure 7 is Figure 5 Based on the example of two adjacent rows of ultrasonic units P sharing a first voltage line Vbias, Figure 8 is Figure 5 Based on the above, it is taken as an example that two adjacent rows of ultrasonic units P share a first voltage line Vbias and two adjacent rows of ultrasonic units P share a second gate line G2. In specific implementation, the ultrasonic transducer device provided by the embodiment of the present disclosure can simultaneously adopt Vda sharing, Vdd sharing, G1 sharing, Vbias sharing, and G2 sharing. Of course, it is also possible to choose to adopt one or more signal line sharing methods.

[0092] In specific implementation, in the ultrasonic transducer device provided in the embodiment of the present disclosure, if there is sufficient wiring space, the above-mentioned common signal lines may not be shared, such as Figure 9 As shown, the gap between the ultrasonic units contains all the complete signal lines.

[0093] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 2 、 Figure 5-Figure 8 As shown, there is one first ultrasonic transducer 3 in each ultrasonic unit P, and the orthographic projection of each first ultrasonic transducer 3 on the substrate 1 does not overlap with the orthographic projections of the thin-film transistor circuit 2 and each signal line (e.g., Vda, Vdd, G1, Vbias, G2) on the substrate 1. This reduces overlap capacitance (parasitic capacitance), thereby improving the mechanical energy-to-electrical energy conversion performance of the first ultrasonic transducer 3.

[0094] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 10As shown, each ultrasonic unit P contains two first ultrasonic transducers 3, and the orthographic projections of each first ultrasonic transducer 3 on the substrate 1 do not overlap with the orthographic projections of the thin-film transistor circuit 2 and the signal lines (e.g., Vda, Vdd, G1, Vbias, G2) on the substrate 1. This reduces overlap capacitance (parasitic capacitance) and improves the mechanical-to-electrical energy conversion performance of the first ultrasonic transducers 3. Furthermore, the two first ultrasonic transducers 3 help increase the transmitted sound pressure and signal reception sensitivity.

[0095] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 11 As shown, there are three first ultrasonic transducers 3 in each ultrasonic unit P. The orthographic projections of each first ultrasonic transducer 3 on the substrate 1 overlap with the orthographic projections of the thin-film transistor circuit 2 and other signal lines (such as G3) on the substrate 1. This ensures that the overlap capacitance is within an acceptable range. Providing three first ultrasonic transducers 3 is beneficial for further improving the transmitted sound pressure and signal reception sensitivity. Therefore, one, two, or three first ultrasonic transducers 3 can be designed as needed.

[0096] In a specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, Figure 10 and Figure 11 The structure shown can simultaneously adopt the above-mentioned solution of sharing the signal lines.

[0097] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 10 and Figure 11 As shown, when the number of first ultrasonic transducers 3 in the ultrasonic unit P is greater than or equal to two, the first electrodes 31 of each first ultrasonic transducer 3 in the same ultrasonic unit P are an integral structure, the second electrodes 33 of each first ultrasonic transducer 3 in the same ultrasonic unit P are an integral structure, and the cavities 34 of each first ultrasonic transducer 3 in the same ultrasonic unit P are separated from each other by the first vibration membrane layer 32. Thus, during manufacturing, the integrally formed first electrode 31 can be first manufactured, the second passivation layer 30 can be formed on the first electrode 31, a sacrificial layer can be formed on the second passivation layer 30, the sacrificial layer can be patterned so that the sacrificial layer corresponds to two or three cavity patterns to be formed, the first vibration membrane layer 32 can be formed on the sacrificial layer, sacrificial layer etching holes 35 can be made at the connection points of the first vibration membrane layer 32 corresponding to the three cavity structures, and the sacrificial layer can be removed from the sacrificial layer etching holes 35.

[0098] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 2 、 Figure 5-Figure 11As shown, the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 can adopt different TFT structures and sizes according to actual needs; for example, the LTPO process is adopted, wherein the second transistor T2 can adopt an oxide TFT to reduce the leakage current I off , reduce the storage capacitor C B The stored charge is lost to stabilize the gate potential of the third transistor T3.

[0099] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 12 As shown, the width-to-length ratio of the third transistor T3 is equal to the width-to-length ratio of the fourth transistor T4. Of course, the width-to-length ratio of the third transistor T3 can also be greater than the width-to-length ratio of the fourth transistor T4, which can improve the efficiency of converting voltage into current.

[0100] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 13 As shown, at least one of the first transistor T1 , the second transistor T2 , the third transistor T3 and the fourth transistor T4 is a dual-gate transistor. Figure 13 Taking the third transistor T3 as a dual-gate transistor as an example, this can reduce leakage current on the one hand, and improve the uniformity of the film layer between each transistor on the other hand to reduce the difference between each transistor.

[0101] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 14 As shown, the active layer of the third transistor T3 and the active layer of the fourth transistor T4 are an integrated structure (both 41), the second electrode of the third transistor T3 and the first electrode of the fourth transistor T4 are an integrated structure (referred to as the fourth drain electrode 52), and the second electrode 52 of the third transistor T3 is electrically connected to the active layer of the third transistor T3. Thus, the third transistor T3 includes a third active layer 41, a third gate electrode 42, a third source electrode 43, and a fourth drain electrode 52. The fourth transistor T4 includes a third active layer 41, a fourth gate electrode 51, a third drain electrode 44 (which in this case serves as the source electrode of the fourth transistor), and a fourth drain electrode 52. By adding the fourth drain electrode 52 connected to the third active layer 41 through a via, the resistance of the transistor can be reduced, thereby improving signal transmission performance.

[0102] In specific implementation, the storage capacitor CB in the thin film transistor circuit 2 can also be omitted, and the storage capacitor CB can be replaced by a capacitor formed by Vdd and the gate of the third transistor T3, which can simplify the thin film transistor circuit.

[0103] In specific implementation, in order to reduce the noise during ultrasonic fingerprint recognition, in the above ultrasonic transducer device provided in the embodiment of the present disclosure, as Figure 15 As shown, Figure 15FIG. 1 is another plan view of an ultrasonic transducer device, wherein the substrate 1 further includes a virtual ultrasonic unit P' located outside the plurality of ultrasonic units P distributed in an array; Figure 16 As shown, Figure 16 for Figure 15 The figure shows a layout diagram of an ultrasonic unit P and a virtual ultrasonic unit P'. The virtual ultrasonic unit P' includes the above-mentioned thin film transistor circuit 2 and the second ultrasonic transducer 3'. The second ultrasonic transducer 3' includes a third electrode 31', a second vibration membrane layer 32' and a fourth electrode 33' stacked on the side of the thin film transistor circuit 2 away from the substrate 1. A sacrificial layer 36 is provided between the third electrode 31' and the second vibration membrane layer 32'. The third electrode 31' is electrically connected to the thin film transistor circuit 2, and the fourth electrode 33' is electrically connected to the driving voltage line Vda. Specifically, since the virtual ultrasonic unit P' retains the sacrificial layer 36, that is, there is no sacrificial layer etching hole 35, it can neither transmit nor receive sound wave signals. It is equivalent to a dymmy unit. The dummy unit can be arranged in a variety of ways. Generally, multiple units are required, and they can be arranged in multiple rows, columns, or dispersed. Figure 16 For example, the system uses the left and right sides of the array's ultrasonic units P as an example. By setting up dummy ultrasonic units P', which only output the basic signal (including noise) generated by factors such as transistors and signal lines, the signal received by the normal ultrasonic unit P is subtracted from the basic signal of the dummy unit to obtain a pure acoustic signal. This significantly reduces noise and improves fingerprint recognition accuracy.

[0104] In specific implementation, in the ultrasonic transducer device provided in the embodiment of the present disclosure, the above-mentioned signal lines are shared, two or three first ultrasonic transducers are designed for one ultrasonic unit, T3 and T4 are designed with different width-to-length ratios, dual-gate structure transistors are designed, and source-drain solutions of T3 and T4 are added can be flexibly combined as needed. For example, Figure 17The figure shows four ultrasonic units P. The ultrasonic unit P in the upper left corner has a structure with different width-to-length ratios of T3 and T4. The ultrasonic unit P in the upper right corner includes two first ultrasonic transducers 3. The ultrasonic unit P in the lower left corner has a third transistor T3 with a dual-gate structure. The ultrasonic unit P in the lower right corner includes three first ultrasonic transducers 3. The number of first ultrasonic transducers 3 can vary the transmission intensity and receiving sensitivity. The different sizes of the first ultrasonic transducers 3 can differentiate the frequency of the transmitted sound wave and the frequency of the received signal, potentially meeting certain specific requirements. While the first ultrasonic transducers 3 have the same design, different transistor designs can also differentiate the signal receiving sensitivity. Thus, different ultrasonic units P in the same ultrasonic transducer device can be designed with different structures, each ultrasonic unit P can read different signals and perform different functions. Therefore, those skilled in the art can design the structures of different ultrasonic units P in the same ultrasonic transducer device according to actual needs.

[0105] In specific implementation, in the above-mentioned ultrasonic transducer device provided in the embodiment of the present disclosure, if Figure 5-Figure 15 and Figure 17 As shown, the shape of the cavity 35 may be, but is not limited to, circular, and may also be, for example, square.

[0106] In specific implementation, the materials of each film layer in the first ultrasonic transducer, the materials of each film layer in the thin film transistor circuit, and the materials of some other insulating layers are the same as those in the prior art and are not described in detail here.

[0107] Based on the same inventive concept, the present disclosure also provides a display device, such as Figure 18 and Figure 19 As shown, it includes a display panel and the ultrasonic transducer device provided by the embodiment of the present disclosure. Since the principle of solving the problem of the display device is similar to that of the aforementioned ultrasonic transducer device, the implementation of the display device can refer to the implementation of the aforementioned ultrasonic transducer device, and the repeated parts will not be repeated.

[0108] In specific implementation, in the above-mentioned display device provided in the embodiment of the present disclosure, if Figure 18 As shown, the display panel can be a liquid crystal display panel 100, and each ultrasonic unit P in the ultrasonic transducer device is disposed in a non-luminous area BB within the liquid crystal display panel 100. This allows the array of ultrasonic units P to be evenly distributed within the non-luminous area BB of the liquid crystal display panel 100, enabling large-area fingerprint recognition. The principle of fingerprint recognition can be found in the description of the aforementioned ultrasonic transducer device.

[0109] Specifically, if Figure 18As shown, the liquid crystal display panel 100 includes an array substrate and a color filter substrate arranged opposite to each other, and a liquid crystal layer 101 arranged therebetween; wherein, the array substrate includes: a substrate 102, a pixel circuit 103 arranged on the substrate 102, a pixel electrode 104 electrically connected to the pixel circuit 103, a common electrode 105 insulated from the pixel electrode 104, and a first orientation layer 106 located between the common electrode 105 and the negative liquid crystal layer 101; the color filter substrate includes: a cover plate 107, a color filter layer 108 and a black matrix layer 109 arranged on the side of the cover plate 107 facing the array substrate, a planar layer 110 arranged on the side of the color filter layer 108 and the black matrix layer 109 facing the array substrate, and a second orientation layer 111 arranged on the side of the planar layer 110 facing the array substrate, etc.

[0110] Specifically, the liquid crystal display panel 100 also includes other necessary structures well known to those skilled in the art, which will not be described in detail here.

[0111] In specific implementation, in the above-mentioned display device provided in the embodiment of the present disclosure, if Figure 19 As shown, the display panel can be an organic light-emitting display panel 200, and the ultrasonic transducer device 300 is disposed on the back of the organic light-emitting display panel 200. This allows multiple ultrasonic units P to be evenly distributed on the back of the organic light-emitting display panel 200, enabling large-area fingerprint recognition. The principle of fingerprint recognition can be found in the description of the ultrasonic transducer device described above.

[0112] In specific implementation, in the above-mentioned display device provided in the embodiment of the present disclosure, if Figure 19 As shown, a transmission layer 400 that is beneficial to the transmission of sound waves can be provided between the organic light emitting display panel 200 and the ultrasonic transducer device 300 . The transmission layer 400 can be made of epoxy adhesive material or other materials that can effectively transmit sound waves.

[0113] It should be noted that the structure of the organic light emitting display panel is the same as that in the prior art and will not be described in detail here.

[0114] In specific implementation, the above-mentioned display device provided in the embodiment of the present disclosure can also be an acoustic wave pen, which can emit sound waves (one frequency or multiple frequencies). A corresponding transistor + CMUT structure is set in the screen of the display device to receive sound waves. The acoustic wave pen can be used for writing, drawing, etc.

[0115] In specific implementation, the above-mentioned display device provided in the embodiment of the present disclosure can also be a flat-panel speaker or microphone, used as a sound-emitting product or sound collection (voice recognition) and other aspects.

[0116] In specific implementation, the display device provided by the embodiment of the present disclosure and manufactured with an ultrasonic transducer can also be used in the field of ultrasonic imaging, such as B-ultrasound in the field of medical imaging.

[0117] The embodiments of the present disclosure provide an ultrasonic transducer device and a display device. By combining a thin-film transistor circuit and an ultrasonic transducer, a large-area, arrayed ultrasonic fingerprint recognition structure is formed, which can perform fingerprint recognition, has a simple structure and high recognition accuracy.

[0118] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0119] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if such changes and modifications of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include such changes and modifications.

Claims

1. An ultrasonic transducer device, wherein: The invention comprises a substrate, wherein the substrate comprises a plurality of ultrasonic units distributed in an array, and each of the ultrasonic units comprises: A thin film transistor circuit is provided on the base substrate; at least one first ultrasonic transducer, disposed on a side of the thin-film transistor circuit facing away from the base substrate, the first ultrasonic transducer comprising a first electrode, a first vibration membrane layer, and a second electrode stacked and disposed on a side of the thin-film transistor circuit facing away from the base substrate, a cavity being defined between the first electrode and the first vibration membrane layer, the first electrode being electrically connected to the thin-film transistor circuit, and the second electrode being electrically connected to a driving voltage line; The device further comprises a plurality of drive signal lines for applying drive signals to the thin film transistor circuit, wherein at least two adjacent rows of the ultrasonic units share the same drive signal line, or at least two adjacent columns of the ultrasonic units share the same drive signal line; The thin film transistor circuit includes: a first transistor, a second transistor, a third transistor, a fourth transistor, and a storage capacitor; the driving signal line includes: a first gate line, a second gate line, a third gate line, a first voltage line, a second voltage line, the driving voltage line and a signal reading line; wherein, The gate of the first transistor is electrically connected to the first gate line, the first electrode of the first transistor is electrically connected to the first voltage line, and the second electrode of the first transistor is electrically connected to the first electrode of the second transistor; The gate of the second transistor is electrically connected to the second gate line, and the second electrode of the second transistor is electrically connected to the gate of the third transistor; A first electrode of the third transistor is electrically connected to the second voltage line, and a second electrode of the third transistor is electrically connected to a first electrode of the fourth transistor; The gate of the fourth transistor is electrically connected to the third gate line, and the second electrode of the fourth transistor is electrically connected to the signal reading line; A first end of the storage capacitor is electrically connected to the second voltage line, and a second end of the storage capacitor is electrically connected to the gate of the third transistor; The first electrode of the first ultrasonic transducer is electrically connected to the first electrode of the second transistor.

2. The ultrasonic transducer device according to claim 1, wherein Every two adjacent columns of the ultrasonic units constitute a first group, and a driving voltage line is provided at the first gap between the two columns of the ultrasonic units in the first group, and the second electrodes of the first ultrasonic transducers in the two columns of the ultrasonic units in the same first group are electrically connected to the driving voltage line at the first gap.

3. The ultrasonic transducer device according to claim 2, wherein: The first gap is also provided with a first gate line spaced apart from the driving voltage line, and the gates of the first transistors in the two columns of the ultrasound units in the same first group are electrically connected to the first gate line at the first gap.

4. The ultrasonic transducer device according to claim 2 or 3, wherein: A second voltage line is provided at the second gap between each two adjacent ultrasonic units of the first group, and the second voltage line is electrically connected to the first electrodes of all the third transistors in the two columns of ultrasonic units on both sides thereof.

5. The ultrasonic transducer device according to claim 4, wherein Two adjacent columns of ultrasonic units in the same first group are symmetrically arranged about the first gap, and two adjacent groups of ultrasonic units in the same first group are symmetrically arranged about the second gap.

6. The ultrasonic transducer device according to any one of claims 1 to 3, wherein: Every two adjacent rows of ultrasonic units form a second group, and a first voltage line is provided at the third gap between the two rows of ultrasonic units in the second group, and the first electrodes of all the first transistors in the two rows of ultrasonic units in the same second group are electrically connected to the first voltage line at the third gap.

7. The ultrasonic transducer device according to claim 6, wherein: A second gate line is provided at the fourth gap between every two adjacent ultrasonic units of the second group. The second gate line is electrically connected to the gates of all the second transistors in the two rows of ultrasonic units on both sides of the second gate line.

8. The ultrasonic transducer device according to claim 7, wherein: Two adjacent columns of ultrasonic units in the same second group are symmetrically arranged about the third gap, and two adjacent columns of ultrasonic units in the second group are symmetrically arranged about the fourth gap.

9. The ultrasonic transducer device according to claim 1, wherein: The number of the first ultrasonic transducers in each ultrasonic unit is 1 or 2, and the orthographic projection of each first ultrasonic transducer on the base substrate does not overlap with the orthographic projection of the thin film transistor circuit and each signal line on the base substrate.

10. The ultrasonic transducer device according to claim 1, wherein The number of the first ultrasonic transducers in each of the ultrasonic units is three, and the orthographic projection of each of the first ultrasonic transducers on the base substrate overlaps with the orthographic projection of the thin film transistor circuit and other signal lines on the base substrate.

11. The ultrasonic transducer device according to claim 9 or 10, wherein: When the number of the first ultrasonic transducers in the ultrasonic unit is greater than or equal to 2, the first electrodes of the first ultrasonic transducers in the same ultrasonic unit are an integral structure, the second electrodes of the first ultrasonic transducers in the same ultrasonic unit are an integral structure, and the cavities of the first ultrasonic transducers in the same ultrasonic unit are separated from each other by the first vibration membrane layer.

12. The ultrasonic transducer device according to any one of claims 1 to 3, wherein: The width-to-length ratio of the third transistor is greater than or equal to the width-to-length ratio of the fourth transistor.

13. The ultrasonic transducer device according to any one of claims 1 to 3, wherein: At least one of the first transistor, the second transistor, the third transistor, and the fourth transistor is a dual-gate transistor.

14. The ultrasonic transducer device according to any one of claims 1 to 3, wherein: The active layer of the third transistor and the active layer of the fourth transistor are an integrated structure, the second electrode of the third transistor and the first electrode of the fourth transistor are an integrated structure, and the second electrode of the third transistor is electrically connected to the active layer of the third transistor.

15. The ultrasonic transducer device according to any one of claims 1 to 3, wherein: The base substrate also includes a virtual ultrasonic unit located outside the multiple ultrasonic units distributed in the array, the virtual ultrasonic unit includes the thin-film transistor circuit and a second ultrasonic transducer, the second ultrasonic transducer includes a third electrode, a second vibration membrane layer and a fourth electrode stacked on the side of the thin-film transistor circuit facing away from the base substrate, a sacrificial layer is provided between the third electrode and the second vibration membrane layer, the third electrode is electrically connected to the thin-film transistor circuit, and the fourth electrode is electrically connected to the driving voltage line.

16. A display device, wherein: The ultrasonic transducer device comprises a display panel and the ultrasonic transducer device according to any one of claims 1 to 15.

17. The display device according to claim 16, wherein: The display panel is a liquid crystal display panel, and each of the ultrasonic units in the ultrasonic transducer device is arranged in a non-luminous area within the liquid crystal display panel.

18. The display device according to claim 16, wherein: The display panel is an organic light emitting display panel, and the ultrasonic transducer device is arranged on the back side of the organic light emitting display panel.

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