System for identifying causes of manufacturing defects and non-transitory computer readable medium
By capturing images on semiconductor wafers, calculating the geometric center, and performing coordinate transformations, the problem of optical inspection equipment being unable to identify the cause of hole pattern offset in cross-shaped self-aligned dual patterning technology was solved. This enabled accurate identification of the offset and determination of the manufacturing process, thereby improving the yield of semiconductor manufacturing.
Patent Information
- Application Number
- CN202211740855.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2022-02-23
- Filing Date
- 2022-12-30
- Publication Date
- 2026-01-02
- Estimated Expiration
- 2042-12-30
AI Technical Summary
Existing optical inspection equipment cannot effectively distinguish the causes of unexpected offsets in hole patterns formed by cross-shaped self-aligned dual patterning technology, resulting in the inability to accurately identify manufacturing defects.
By capturing multiple images on a semiconductor wafer, calculating the geometric center and average geometric center of each geometric feature, performing coordinate transformation to identify offsets, and determining the cause of the offset by comparing coordinate values, defects in the manufacturing process can be identified.
It enables accurate identification of unexpected offset hole patterns, identifies the manufacturing process causing the offset, and improves the yield of semiconductor manufacturing.
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Figure CN116645313B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] This application claims priority to U.S. Patent Application Nos. 17 / 678,200 and 17 / 678,184 (i.e., priority date of “February 23, 2022”), the contents of which are incorporated herein in their entirety.
[0002] The present disclosure relates to a semiconductor manufacturing system and a non-transitory computer readable medium. In particular, the present disclosure relates to a semiconductor manufacturing defect cause identification system and a non-transitory computer readable medium. BACKGROUND
[0003] Self-aligned double patterning (SADP) is a technique that doubles the pitch of multiple line patterns, which can also be used to form multiple hole patterns. Cross-shaped SADP (X-SADP) is a hole formation method in which an orthogonal gap sub-pattern is formed on the first line pattern formed by SADP. X-SADP can be used to form the hole patterns in a regular arrangement. However, due to variations in manufacturing procedures, unexpected shifts can be observed from the hole patterns formed by X-SADP. Conventionally, the hole patterns formed by X-SADP can be checked by optical inspection equipment to see if there are unexpected shifts. However, this conventional mechanism cannot distinguish the root cause of the unexpected shifts. Therefore, a new inspection method and system are proposed.
[0004] The foregoing “background” description is for the purpose of generally presenting the context of the disclosure. The subject matter of the foregoing background description is not, however, admitted prior art to the present disclosure, and is not necessarily considered to be relevant to the prior art of the present disclosure, and any consideration of the foregoing background description should in no way be deemed to limit the scope of the present disclosure, nor should any admission be deemed to have been made that the foregoing background description was prior art to the present disclosure. SUMMARY
[0005] One embodiment of the present disclosure provides a semiconductor manufacturing defect cause identification system. The identification system includes a processing unit; and an image capturing unit electrically coupled to the processing unit. The identification system is configured to capture N images via the image capturing unit to cover different portions of a semiconductor wafer, wherein each of the N images includes M geometric features. The identification system is further configured to assign M serial numbers, each of the M serial numbers being associated with one of the M geometric features. The identification system is further configured to calculate, by the processing unit, a geometric center of each geometric feature of the N images. The identification system is further configured to calculate, from the N images, MN average geometric centers associated with the M serial numbers. The identification system is further configured to calculate a shift amount of each geometric feature of the N images.
[0006] One embodiment of this disclosure provides a non-transitory computer readable medium. The non-transitory computer readable medium stores an inspection program comprising a plurality of instructions which, when executed by a processing unit, cause an inspection apparatus to: capture, by an image capturing unit, N images from a semiconductor wafer, wherein each of the N images comprises M geometric features; calculate, by the processing unit, a geometric center of each geometric feature of the N images; calculate, from the N images, M average geometric centers associated with the M geometric features; perform a first coordinate transformation on a first set of geometric features associated with a particular geometric feature; and perform a second coordinate transformation on a second set of geometric features associated with the particular geometric feature.
[0007] One embodiment of this disclosure provides a method of identifying a cause of a manufacturing defect. The method comprises capturing, by an image capturing unit, N images from a semiconductor wafer, wherein each of the N images comprises M geometric features; calculating, by a processing unit, a geometric center of each geometric feature of the N images; calculating, from the N images, M average geometric centers associated with the M geometric features; and calculating an offset of each geometric feature of the N images.
[0008] In some embodiments, each of the N images covers a different portion of the semiconductor wafer.
[0009] In some embodiments, the method further comprises performing a first coordinate transformation on a first set of geometric features associated with a first manufacturing process in response to an offset of a particular geometric feature exceeding a first threshold value.
[0010] In some embodiments, the method further comprises performing a second coordinate transformation on a second set of geometric features associated with a second manufacturing process.
[0011] In some embodiments, the particular geometric feature belongs to the first set of geometric features and the second set of geometric features.
[0012] In some embodiments, the method further comprises comparing a y-coordinate value of the particular geometric feature obtained after the first coordinate transformation with a second threshold value; and comparing a y-coordinate value of the particular geometric feature obtained after the second coordinate transformation with the second threshold value.
[0013] In some embodiments, the identifying method further comprises determining whether the offset of the particular geometric feature is caused by the first manufacturing process or the second manufacturing process according to whether the y-coordinate value of the particular geometric feature obtained after the first coordinate transformation exceeds the second threshold value and whether the y-coordinate value of the particular geometric feature obtained after the second coordinate transformation exceeds the second threshold value.
[0014] In some embodiments, the identifying method further comprises constructing a coordinate system of the N images, wherein the coordinate system comprises a coordinate origin disposed at a center of each of the N images, and each of the geometric features comprises a coordinate value on an x-axis and a coordinate value on a y-axis.
[0015] In some embodiments, the identifying method performs the first coordinate transformation according to the following equations:
[0016] x T = x x cos θ1- y x sin θ1; and
[0017] y T = y x cos θ1+ x x sin θ1;
[0018] wherein x represents a coordinate value on an x-axis; y represents a coordinate value on a y-axis; x T represents a transformed coordinate value on the x-axis; y T represents a transformed coordinate value on the y-axis; and θ1 represents an angle between the first set of geometric features and the x-axis.
[0019] In some embodiments, the identifying method performs the second coordinate transformation according to the following equations:
[0020] x T = x x cos θ2+ y x sin θ2; and
[0021] y T = y x cos θ2- x x sin θ2;
[0022] wherein x represents a coordinate value on an x-axis; y represents a coordinate value on a y-axis; x T represents a transformed coordinate value on the x-axis; y T represents a transformed coordinate value on the y-axis; and θ2 represents an angle between the second set of geometric features and the x-axis.
[0023] Embodiments of the present disclosure disclose a system, method, and non-transitory computer readable medium for identifying a cause of a manufacturing defect. The identification method of the present disclosure can identify a location of a particular hole pattern having an unexpected shift. The identification method of the present disclosure can provide an accurate amount of shift of the particular hole pattern. Furthermore, the identification method of the present disclosure can also identify a manufacturing procedure that caused the unexpected shift.
[0024] The foregoing has outlined rather broadly the technical features of the present disclosure in order that the detailed description of the present disclosure that follows can be better understood. Additional technical features and advantages of the present disclosure will be described hereinafter. The present disclosure is to be considered as not limited to the embodiments of the present disclosure set forth herein as further described and claimed, and that the present disclosure can admit to other differentably constructed embodiments falling within the scope of the present disclosure. BRIEF DESCRIPTION OF DRAWINGS
[0025] A more complete understanding of the present disclosure can be obtained by reference to the following detailed description when considered in connection with the accompanying drawings, wherein like reference numerals designate similar items in the figures, and:
[0026] Figure 1 is a block schematic diagram illustrating a semiconductor manufacturing system in accordance with some embodiments of the present disclosure.
[0027] Figure 2A , Figure 2B , Figure 2C , Figure 2D , Figure 2E , Figure 2F , Figure 2G , Figure 2H and Figure 2I are exemplary schematic diagrams illustrating different steps in the manufacture of a plurality of container holes in accordance with some embodiments of the present disclosure.
[0028] Figure 3A is a top view schematic diagram illustrating a wafer in accordance with some embodiments of the present disclosure.
[0029] Figure 3B is an enlarged schematic diagram illustrating a region of a wafer in accordance with some embodiments of the present disclosure. Figure 3A
[0030] Figure 3C is an enlarged schematic diagram illustrating a region of a wafer in accordance with some embodiments of the present disclosure.
[0031] Figure 3D is a cross-sectional schematic diagram illustrating a semiconductor structure in accordance with some embodiments of the present disclosure.
[0032] Figure 4A and Figure 4B is a flowchart illustrating a method of identifying a cause of a manufacturing defect according to some embodiments of the present disclosure.
[0033] Figure 5A is an exemplary diagram illustrating one of the steps of identifying a cause of a manufacturing defect according to some embodiments of the present disclosure.
[0034] Figure 5B is an exemplary diagram illustrating one of the steps of identifying a cause of a manufacturing defect according to some embodiments of the present disclosure.
[0035] Figure 5C is an exemplary diagram illustrating one of the steps of identifying a cause of a manufacturing defect according to some embodiments of the present disclosure.
[0036] Figure 5D is an exemplary diagram illustrating one of the steps of identifying a cause of a manufacturing defect according to some embodiments of the present disclosure.
[0037] Figure 5E is an exemplary diagram illustrating one of the steps of identifying a cause of a manufacturing defect according to some embodiments of the present disclosure.
[0038] Figure 5F is an exemplary diagram illustrating one of the steps of identifying a cause of a manufacturing defect according to some embodiments of the present disclosure.
[0039] Figure 5G is an exemplary coordinate conversion diagram illustrating an exemplary result according to some embodiments of the present disclosure.
[0040] Figure 5H is an exemplary diagram illustrating one of the steps of identifying a cause of a manufacturing defect according to some embodiments of the present disclosure.
[0041] Figure 5I is an exemplary coordinate conversion diagram illustrating an exemplary result according to some embodiments of the present disclosure.
[0042] In the drawings:
[0043] 10: processing unit
[0044] 12: storage unit
[0045] 14: non-transitory computer readable medium
[0046] 16: inspection program
[0047] 18: image capturing unit
[0048] 30: die
[0049] 40: semiconductor structure
[0050] 41: insulating layer
[0051] 42: dielectric layer
[0052] 43: polysilicon layer
[0053] 44: insulating layer
[0054] 45: polysilicon layer
[0055] 46: insulating layer
[0056] 47: conductive contact
[0057] 50: coordinate origin
[0058] 52: quadrant
[0059] 54: quadrant
[0060] 56: quadrant
[0061] 58: quadrant
[0062] 100: semiconductor manufacturing system
[0063] 101: wafer
[0064] 120: inspection apparatus
[0065] 130: controller
[0066] 140: network
[0067] 400: method
[0068] 110-1 to 110-N: manufacturing apparatus
[0069] avg1: average geometric feature
[0070] C1 to C16: photoresist
[0071] D1 to D16: gap sub
[0072] g1_P1 to g1_P3: geometric center
[0073] h_a1 to h_a4: geometric feature
[0074] h_b1 to h_b4: geometric feature
[0075] h_n: geometric feature
[0076] h_s: geometric feature
[0077] h1: geometric feature
[0078] h1_P1 - h1_P3: geometric features
[0079] h1 - h16: geometric features
[0080] P1 - Pn: images
[0081] PR1 - PR4: photoresist
[0082] S1 - S8: spacers
[0083] S402: step
[0084] S404: step
[0085] S406: step
[0086] S408: step
[0087] S410: step
[0088] S412: step
[0089] S414: step
[0090] S416: step
[0091] S418: step
[0092] S420: step
[0093] SA: program
[0094] SB: program
[0095] X1 - X16: intersection regions DETAILED DESCRIPTION
[0096] Embodiments or examples of the present disclosure shown in the drawings are now described using specific language. It is to be understood that the scope of the present disclosure is not intended to be limited thereto by the specific language. Any modifications or improvements of the described embodiments, and any further applications of the principles described in this document, are contemplated by those skilled in the art to which this document pertains. Element numbers can be repeated throughout the embodiments, but this does not necessarily mean that a feature of one embodiment is applicable to another embodiment, even if they share the same element number.
[0097] It should be understood that although the terms "first", "second", "third", etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a "first element", "component", "region", "layer" or "section" discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.
[0098] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0099] Figure 1 is a block diagram illustrating a semiconductor manufacturing system 100 according to some embodiments of the present disclosure.
[0100] The semiconductor manufacturing system 100 includes a plurality of manufacturing devices 110-1, 110-2,... 110-N and an inspection apparatus 120. The manufacturing devices 110-1, 110-2,... 110-N can be coupled to a controller 130 via a network 140.
[0101] A wafer 101 can be provided to the semiconductor manufacturing system 100. A plurality of manufacturing procedures such as lithography, deposition, etching, chemical mechanical polishing (CMP), resist coating, baking, alignment or other processes can be performed on the wafer 101 by one or more of the manufacturing devices 110-1, 110-2,... 110-N. Inspection of the wafer 101 can be performed by the inspection apparatus 120.
[0102] Each of the manufacturing devices 110-1, 110-2,... 110-N can be configured to form a plurality of structures on the wafer 101. The structures formed on the wafer 101 include a pattern, a via, a recess, an insulating structure, a gate structure, a conductive via, an intermediate structure or any other semiconductor structure, without limitation.
[0103] The network 140 can be an Internet network or an intranet network implementing a network protocol, such as a Transmission Control Protocol (TCP). Via the network 140, each of the manufacturing devices 110-1, 110-2,... 110-N and the inspection apparatus 120 can download or upload information regarding the wafer 101 or work-in-process (WIP) of the manufacturing devices to or from the controller 130. Via the network 140, each of the manufacturing devices 110-1, 110-2,... 110-N and the inspection apparatus 120 can communicate with each other.
[0104] The controller 130 can include a processor, such as a central processing unit (CPU), to provide a plurality of instructions to one or more of the manufacturing devices 110-1, 110-2,... 110-N and the inspection apparatus 120. Information or data can be exchanged between the manufacturing devices 110-1, 110-2,... 110-N and the inspection apparatus 120 via the network 140.
[0105] The inspection apparatus 120 can include a processing unit 10, a storage unit 12, and an image capturing unit 18. The storage unit 12 and the image capturing unit 18 can be electrically connected. The storage unit 12 and the image capturing unit 18 can be electrically connected to the processing unit 10. Data and / or information can be exchanged between the processing unit 10, the storage unit 12, and the image capturing unit 18.
[0106] The storage unit 12 can include a non-transitory computer readable medium 14 storing an inspection program 16. The inspection program 16 can include a plurality of instructions executable by the processing unit 10. The instructions of the inspection program 16 executed by the processing unit 10 can cause the inspection apparatus 120 to perform one or more steps as described in the following paragraphs of the present disclosure.
[0107] The image capturing unit 18 can be configured to capture images of the wafer 101. The image capturing unit 18 can be adapted to capture the images covering different portions of the wafer 101. In some embodiments, the image capturing unit 18 can be mechanically movable on the wafer 101 so as to capture the images covering the portions of the wafer 101. The image capturing unit 18 can be configured to capture dynamic or static images of the wafer 101. In some embodiments, the image capturing unit 18 can be a camera or a video recorder. The images captured by the image capturing unit 18 can be stored in the storage unit 12.
[0108] The images captured by the image capturing unit 18 can be processed and / or analyzed by the processing unit 10. The inspection apparatus 120 can identify one or more defects on the wafer 101. The inspection apparatus 120 can confirm that the one or more defects on the wafer 101 originated from one or more of the manufacturing devices 110-1, 110-2,... 110-N.
[0109] Although Figure 1 Any other manufacturing devices following the inspection apparatus 120 are not shown, but as an example embodiment, it is not meant to be limiting. In other example embodiments, various manufacturing devices can be arranged following the inspection apparatus 120 and used to perform various processes depending on design requirements.
[0110] Figure 2A , Figure 2B , Figure 2C , Figure 2D , Figure 2E , Figure 2F , Figure 2G , Figure 2H and Figure 2I are example schematic diagrams illustrating different steps of manufacturing a plurality of container holes according to some embodiments of the present disclosure.
[0111] Multiple patterning techniques can be broadly classified into the pattern splitting and self-alignment types. A typical type of the former is the litho-etch-litho-etch (LELE) technique. As the name implies, LELE aims to narrow the pitch by repeating the existing lithography and etching processes. The pattern splitting type has the ability to split into the desired pattern even in the case of random patterns like metal lines. However, since it involves several cycles of exposure processes, it raises concerns about overlay accuracy.
[0112] On the contrary, the self-alignment type, commonly denoted as self-aligned double patterning (SADP) or self-aligned multiple patterning (SAMP), has the great advantage of narrowing the pitch with only one exposure process, thereby eliminating overlay accuracy as a concern. SADP is a robust technique that doubles the pitch of line patterns, but can also be used to form hole patterns. The simplified flow of forming a plurality of container holes on a semiconductor wafer is illustrated according to Figure 2A , Figure 2B , Figure 2C , Figure 2D , Figure 2E , Figure 2F , Figure 2G , Figure 2H and Figure 2I . Figure 2A ,Figure 2B 、 Figure 2C 、 Figure 2D 、 Figure 2E 、 Figure 2F 、 Figure 2F 、 Figure 2G and Figure 2H are each a top view of a portion of a semiconductor wafer.
[0113] Referring to Figure 2I , photoresists PR1 and PR2 can be formed on a semiconductor substrate. Photoresists PR1 and PR2 can be parallel to each other. Photoresists PR1 and PR2 can be collectively referred to as a mandrel.
[0114] Referring to Figure 2A , gap spacers S1 and S2 can be formed adjacent to photoresist PR1, and gap spacers S3 and S4 can be formed adjacent to photoresist PR2. Gap spacers S1 and S2 can be formed on opposite sides of photoresist PR1. Gap spacers S3 and S4 can be formed on opposite sides of photoresist PR2. In some embodiments, formation of gap spacers S1, S2, S3, S4 includes a suitable film formation method, such as chemical vapor deposition (CVD), atomic layer deposition (ALD), or physical vapor deposition (PVD). Formation of gap spacers S1, S2, S3, S4 can also include etching, such as dry or wet etching.
[0115] Referring to Figure 2B , photoresists PR1 and PR2 are removed, and gap spacers S1, S2, S3, S4 are retained. Removal of photoresists PR1 and PR2 can include etching, such as dry or wet etching.
[0116] Referring to Figure 2C , photoresists PR3 and PR4 can be formed on gap spacers S1, S2, S3, S4. Photoresists PR3 and PR4 can be parallel. Photoresists PR3 and PR4 can be disposed at a different level than gap spacers S1, S2, S3, S4. In some embodiments, intermediate layers can be formed between photoresists PR3, PR4 and gap spacers S1, S2, S3, S4. An angle Θ can exist between photoresist PR3 and gap spacers S1, S2, S3, S4. An angle Θ can exist between photoresist PR4 and gap spacers S1, S2, S3, S4.
[0117] While in the illustrated embodiment Θ is approximately 90°, it is contemplated that Θ can be adjusted as desired for a particular design, and thus can range from 1° to 180°.
[0118] Referring to Figure 2DGaps S5 and S6 can be formed adjacent to photoresist PR3, and gaps S7 and S8 can be formed adjacent to photoresist PR4. Gaps S5 and S6 can be formed on opposite sides of photoresist PR3. Gaps S7 and S8 can be formed on opposite sides of photoresist PR4. In some embodiments, formation of gaps S5, S6, S7, S8 includes a suitable film formation method, such as CVD, ALD, or PVD. Formation of gaps S5, S6, S7, S8 can also include etching, such as dry or wet etching.
[0119] Referring to Figure 2E , photoresists PR3 and PR4 are removed, leaving gaps S5, S6, S7, S8. Removal of photoresists PR3 and PR4 can include etching, such as dry or wet etching. After photoresists PR3 and PR4 are removed, a grid structure can be formed, as shown in Figure 2F . The grid structure includes a number of intersection regions. For example, gap S1 can intersect gap S5 at intersection region X1, and gap S2 can intersect gap S5 at intersection region X2. Further, gap S4 can intersect gap S8 at intersection region X16.
[0120] Referring to Figure 2A , a plurality of photoresists C1, C2,... C16 can be formed at locations corresponding to intersection regions X1, X2,... X16.
[0121] Referring to Figure 2B , gaps D1, D2,... D16 can be formed around each of photoresists C1, C2,... C16. Gaps D1, D2,... D16 can surround photoresists C1, C2,... C16, respectively. In some embodiments, gaps D1, D2,... D16 include a suitable film formation method, such as CVD, ALD, or PVD.
[0122] Referring to Figure 2C , photoresists C1, C2,... C16 can be removed, leaving gaps D1, D2,... D16. Cavities can then be formed within each of gaps D1, D2,... D16. By suitable etching processes, the profiles of photoresists C1, C2,... C16 can be converted into geometric features h1, h2,... h16 on the semiconductor substrate. Each of geometric features h1, h2,... h16 can have a circular profile from a top view. A conductive material can be filled within each of geometric features h1, h2,... h16 to form a plurality of connection structures. Each of geometric features h1, h2,... h16 can be considered as a container hole.
[0123] The steps shown in Figure 2D , Figure 2E , Figure 2F may be considered as a first fabrication procedure in the present disclosure, and the steps shown in Figure 3A ,Figure 3A , Figure 1 The steps shown can be considered as a second manufacturing process in this disclosure. In some embodiments, such as Figure 3B , Figure 3A , Figure 2A to Figure 2I The steps shown can be considered as procedure SA, and as Figure 3C , Figure 3C , Figure 3D The steps shown can be considered as procedure SB.
[0124] Figure 3D This is a top view schematic diagram illustrating a wafer of some embodiments of the present disclosure.
[0125] Figure 3D This is a top view schematic diagram of a wafer 101, which may include multiple dies 30. Each die 30 may include multiple semiconductor elements, which may include multiple active elements and / or multiple passive elements. Active elements may include a memory die (e.g., a dynamic random access memory (DRAM) die, a static random access memory (SRAM) die, etc.), a power management die (e.g., a power management integrated circuit (PMIC) die), a logic die (e.g., a system-on-a-chip (SoC)), or other active elements. Passive elements may include a capacitor, a resistor, an inductor, a fuse, or other passive elements.
[0126] During manufacturing, multiple checks can be performed on wafer 101 to confirm that the semiconductor structures on each die are formed as desired. In some embodiments, for example, by means of... Figure 3C The inspection device 120 shown inspects wafer 101. It can capture and analyze images of portions of wafer 101. In some embodiments, for example, multiple images P1 can be captured by image capturing unit 18 and then stored in storage unit 12. Each image P1 can cover a portion of wafer 101. Different images can cover different portions of wafer 101.
[0127] Figure 3D This is an enlarged schematic diagram illustrating some embodiments of this disclosure, for example. Figure 3D The image P1 shows a region. Image P1 includes multiple geometric features h1. The multiple geometric features h1 may include a common contour. In some embodiments, each of the multiple geometric features h1 may include a circular contour. In other embodiments, each of the multiple geometric features h1 may include a rectangular contour or an elliptical contour. In still other embodiments, the multiple geometric features h1 may include different contours.
[0128] For example, the fabrication technique for multiple geometric features h1 may include, based on... Figure 4AThe steps are described above. Generally, the geometric features h1 are expected to be regularly arranged along the horizontal and vertical directions. However, due to variations introduced by various manufacturing processes, a shift in the position of the geometric features h1 can occur.
[0129] Figure 4B is a magnified schematic diagram illustrating a region including a plurality of potential defects on a semiconductor wafer, according to some embodiments of the present disclosure.
[0130] Referring to Figure 4A , the reference symbol h_s indicates a particular geometric feature that is not properly set. The geometric feature h_s is shifted to the left and is close to its neighboring geometric feature h_s. The shift of the geometric feature h_s can adversely affect the yield of manufacturing semiconductor products. A shift of a geometric feature can be referred to as a "hole shift" or a "feature shift" in the present disclosure.
[0131] Further details are described in accordance with Figure 4B .
[0132] Figure 1 is a cross-sectional schematic diagram illustrating a semiconductor structure including the potential defects, according to some embodiments of the present disclosure.
[0133] Figure 3B is a cross-sectional view of the semiconductor structure 40 along the dashed line A-A' of Figure 4B . The semiconductor structure 40 includes insulating layers 41, 44, 46. The semiconductor structure 40 also includes polysilicon layers 43, 45. The semiconductor structure 40 also includes a dielectric layer 42 disposed on the insulating layer 41. A plurality of conductive contacts 47 can be embedded within the insulating layer 41. The conductive contacts 47 can be considered landing pads in the present disclosure.
[0134] In some embodiments, for example, the insulating layers 41, 44, 46 can include a shallow trench isolation (STI), a field oxide (FOX), a local oxidation of silicon (LOCOS) feature, and / or other suitable insulating elements. The insulating layers 41, 44, 46 can include a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, fluorine-doped silicate glass (FSG), a low-k dielectric material, combinations thereof, and / or other suitable materials.
[0135] In some embodiments, the dielectric layer 42 can include a dielectric material, such as a high-k dielectric material. The high-k dielectric material can have a dielectric constant greater than 4. The high-k dielectric material can include hafnium oxide (Hf02), zirconium oxide (Zr02), lanthanum oxide (La203), yttrium oxide (Y203), aluminum oxide (Al203), titanium oxide (Ti02), or other applicable materials.
[0136] In some embodiments, the polysilicon layers 43 and 45 can comprise silicon oxide (SiO x ), silicon nitride (Si x N y ), silicon oxynitride (SiON), or a combination thereof. Other suitable materials are within the intended scope of the present disclosure.
[0137] Referring to Figure 5A each of the geometric features h_s and h_n can be configured to fill with a conductive material. The conductive material filled within the geometric features h_s and h_n can be in contact with the conductive contacts 47, respectively. The conductive contacts 47 are electrically connected to memory elements (not shown) underneath the semiconductor structure 40. Each of the conductive material filled within the geometric features h_s and h_n can be configured as a conductive line to connect electronic elements to the memory elements (not shown) underneath the semiconductor structure 40.
[0138] For example, as shown in Figure 5A if a hole offset occurs during fabrication, the geometric feature h_s can be very close to its neighboring geometric feature h_n, thus a short circuit can be formed after the conductive material is filled within the geometric features h_s and h_n. The short circuit formed by a hole offset can adversely affect the functionality of the fabricated semiconductor elements.
[0139] Figure 5A and Figure 5B is a flowchart illustrating a method of identifying a cause of a fabrication defect according to some embodiments of the present disclosure.
[0140] Figure 5B and Figure 4A illustrates a method 400 of identifying a cause of a fabrication defect according to some embodiments of the present disclosure. The method 400 includes steps S402, S404, S406, S408, S410, S412, S414, S416, S418, S420. For example, the method 400 can be performed by the inspection apparatus 120 as shown in Figure 5B .
[0141] In step S402, a plurality of images of a wafer are captured. In some embodiments, for example, N images covering different portions of a wafer can be captured by the image capturing unit 18 of the inspection apparatus 120. The N images can include a plurality of geometric features as shown in Figure 5C . In some embodiments, each of the N images includes M geometric features. The numbers N and M are positive integers. In some embodiments, each of the M geometric features can have a round or spherical (round) profile.
[0142] In step S404, a coordinate system is constructed for each of the images during step S402. In some embodiments, the coordinate system is a two-dimensional system including an x-axis and a y-axis. In some embodiments, an origin of the coordinate (e.g., (0,0)) is designated at the center of each of the N images. In some embodiments, the coordinate system can include four quadrants.
[0143] In step S406, each of the M geometric features is assigned a serial number for each of the captured images. In some embodiments, the M geometric features in an image can be assigned serial numbers 1, 2, 3... M. In some embodiments, for each of the N images, the geometric feature on the upper left corner of an image can be assigned serial number "1". In some embodiments, for each of the N images, the geometric features on the same row number will be assigned sequential serial numbers. All geometric features with the same serial number in the N images will have similar x and y coordinate values.
[0144] In step S408, a geometric center is calculated for each geometric feature in the N images. In some embodiments, the calculations can be performed by the processing unit 10 of the inspection device 120, for example. In a single image, M geometric centers can be obtained.
[0145] In step S410, an average geometric center associated with each serial number can be calculated. In some embodiments, M average geometric centers associated with the M geometric features can be calculated. The average geometric center associated with serial number "1" can be calculated from all geometric centers with serial number "1" in the captured images. Similarly, the average geometric center associated with serial number "2" can be calculated from all geometric centers with serial number "2" in the captured images, and so on.
[0146] In some embodiments, the calculations can be performed by the processing unit 10 of the inspection device 120, for example. In some embodiments, M average geometric centers will be obtained. The M average geometric centers can be calculated from the N images.
[0147] In step S412, a displacement can be calculated for each geometric feature. In some embodiments, the displacement of a geometric feature can be calculated from the geometric center of the geometric feature and its associated average geometric center. In some embodiments, the displacement of a geometric feature with serial number "1" can be calculated from its geometric center and the average geometric center associated with serial number "1". Similarly, the displacement of a geometric feature with serial number "2" can be calculated from its geometric center and the average geometric center associated with serial number "2", and so on.
[0148] In step S414, it is determined whether any of the offsets obtained in step S412 exceeds a predetermined threshold (e.g., a first threshold). This determination step is performed, for example, by the processing unit 10 of the inspection apparatus 120.
[0149] An offset of a particular geometric feature exceeding a predetermined threshold implies that the manufacturing setup procedure of the particular geometric feature contains defects. If none of the offsets of the geometric features in the captured images exceeds a predetermined threshold, the method 400 proceeds with step S416. Otherwise, the method 400 ends.
[0150] Referring to Figure 5C In step S416, a first coordinate transformation is performed on a first set of geometric features associated with a first manufacturing procedure. The particular geometric feature having an offset exceeding the predetermined threshold (e.g., a first threshold) and the manufacturing technique of the first set of geometric features includes the first manufacturing procedure. In step S416, the particular geometric feature is one of the first set of geometric features.
[0151] In step S418, a second coordinate transformation is performed on a second set of geometric features associated with a second manufacturing procedure. The particular geometric feature having an offset exceeding the predetermined threshold (e.g., a first threshold) and the manufacturing technique of the second set of geometric features includes the second manufacturing procedure. In step S418, the particular geometric feature is one of the second set of geometric features.
[0152] Referring to steps S416 and S418, if an offset of a particular geometric feature exceeds a predetermined threshold, the first coordinate transformation and the second coordinate transformation are both implemented on the particular geometric feature.
[0153] In step S420, based on the results of the first coordinate transformation and the second coordinate transformation, it can be determined whether the offset of the particular geometric feature is caused by the first coordinate transformation or the second coordinate transformation.
[0154] In some embodiments, step S420 includes comparing a y-coordinate value of the particular geometric feature obtained after the first coordinate transformation with a predetermined threshold (e.g., a second threshold). In some embodiments, step S420 includes comparing a y-coordinate value of the particular geometric feature obtained after the second coordinate transformation with the predetermined threshold (e.g., a second threshold).
[0155] For example, the determining step can be performed by the processing unit 10 of the inspection apparatus 120. In some embodiments, the abnormal shift can be caused only by the first manufacturing process. In some embodiments, the abnormal shift can be caused only by the second manufacturing process. In some embodiments, the abnormal shift can be caused by both the first manufacturing process and the second manufacturing process.
[0156] Figure 4A is an illustrative diagram illustrating one of the steps of identifying the cause of the manufacturing defect according to some embodiments of the present disclosure.
[0157] Figure 5C The plurality of images P1, P2, P3...Pn that can be captured during step S402 are shown. Please refer to Figure 5C Each of the captured images can include a plurality of geometric features. In the illustrative embodiment, each of the captured images can include M geometric features. In the illustrative embodiment, each of the geometric features includes a circular or spherical profile.
[0158] Figure 5D is an illustrative diagram illustrating one of the steps of identifying the cause of the manufacturing defect according to some embodiments of the present disclosure. In conjunction with Figure 5D the illustrative diagram of Figure 4A steps S404 and S406 can be better understood.
[0159] Please refer to Figure 5D A coordinate system is constructed for each of the images captured during step S402. The coordinate system includes a coordinate origin 50 and four quadrants 52, 54, 56, 58. In addition, for each of the captured images, each of the M geometric features is assigned a serial number. In the illustrative embodiment, the left- upper geometric feature h1 can be assigned a serial number "1", and the left- upper geometric feature h2 can be assigned a serial number "2", and so on. The geometric features belonging to the same row number (e.g. row number 60) will be assigned serial numbers in sequence. In the illustrative embodiment, the first two geometric features h11 and h12 belonging to row number 62 can be assigned serial numbers "11" and "12", respectively.
[0160] Figure 5E is an illustrative diagram illustrating one of the steps of identifying the cause of the manufacturing defect according to some embodiments of the present disclosure. In conjunction with Figure 5E the illustrative diagram of Figure 4B steps S408 and S410 can be better understood.
[0161] Figure 5EThe geometric features h1_P1, h1_P2, h1_P3 are shown. In this illustrated embodiment, the geometric features h1_P1, h1_P2, h1_P3 can correspond to respective geometric features of different images having a same index "1". The geometric feature h1_P1 includes a geometric center g1_P1. The geometric feature h1_P2 includes a geometric center g1_P2. The geometric feature h1_P3 includes a geometric center g1_P3. For example, the geometric centers g1_P1, g1_P2, g1_P3 can be computed by the processing unit 10 of the inspection apparatus 120.
[0162] After obtaining the geometric centers g1_P1, g1_P2, g1_P3, an average geometric center associated with the index "1" can be obtained. For example, the average geometric center can be computed by the processing unit 10 of the inspection apparatus 120. Each of the geometric centers g1_P1, g1_P2, g1_P3 and the average geometric center includes an x coordinate value and a y coordinate value.
[0163] Figure 5F A simplified embodiment is shown, in which only three images P1, P2, P3 are used in the computation of the average geometric centers. It is contemplated that in some embodiments, all the obtained images (e.g. M) can be used in the computation of the average geometric centers.
[0164] Figure 5F An illustrated schematic diagram is shown, illustrating one of the steps of identifying the cause of the manufacturing defect, according to some embodiments of the disclosure. In conjunction with Figure 4B The illustrated schematic diagram of Figure 5F Step S412.
[0165] Figure 5F A geometric center g1_P1 and an average geometric center avg1 are shown. The geometric center g1_P1 can be the geometric center of the geometric feature having an index "1" of the image P1. The average geometric center avg1 can be obtained by averaging all the geometric centers of the geometric features having an index "1". In this illustrated embodiment, the geometric center g1_P1 includes coordinate values (1, 4) and the average geometric center avg1 includes coordinate values (3, 6).
[0166] An offset of the particular geometric feature (e.g. the geometric feature having an index "1") can be computed in accordance with the average geometric center (e.g. avg1) associated with the particular geometric feature and the geometric center (e.g. g1_P1) of the particular geometric feature. In this illustrated embodiment, an offset of the geometric feature having an index "1" of the image P1 can be obtained by computing the distance between the coordinate values (1, 4) and (3, 6).
[0167] Figure 5G is an illustrative diagram illustrating one of the steps of identifying the cause of the manufacturing defect according to some embodiments of the present disclosure. In conjunction with Figure 5G the illustrative diagram of FIG. 4B can better understand Figure 5G steps S416 and S418 of FIG. 4A.
[0168] In Figure 5H for example, a geometric feature h_s has been identified as an offset that exceeds a predetermined threshold in step S414. The manufacturing techniques of the geometric feature h_s include manufacturing procedures "SA" and "SB". Then, a first set of geometric features associated with the manufacturing procedure "SA" is selected, and a second set of geometric features associated with the manufacturing procedure "SB" is selected. A first type of coordinate transformation will be performed on the first set of geometric features, and a second type of coordinate transformation will be performed on the second set of geometric features.
[0169] Figure 5H is an illustrative diagram illustrating one of the steps of identifying the cause of the manufacturing defect according to some embodiments of the present disclosure. In conjunction with Figure 4B the illustrative diagram of FIG. 4B can better understand Figure 5H step S416 of FIG. 4A.
[0170] Figure 5H The geometric center of the geometric feature h_s and the geometric centers of the geometric features h_a1, h_a2, h_a3, h_a4 are shown. The geometric features h_s, h_a1, h_a2, h_a3, h_a4 are associated with the manufacturing procedure "SA". A coordinate transformation is performed on the geometric centers of the geometric features h_s, h_a1, h_a2, h_a3, h_a4. The coordinate transformation can be performed according to the following equations.
[0171] x T = x x cos θ1 - y x sin θ1 (Equation 1)
[0172] y T = y x cos θ1 + x x sin θ1 (Equation 2)
[0173] In Equation 1 and Equation 2, x represents a coordinate value on an x-axis, y represents a coordinate value on a y-axis, x T represents a transformed coordinate value on the x-axis, y T represents a transformed coordinate value on the y-axis, and θ1 represents an angle between the first set of geometric features and the x-axis. As Figure 5I the coordinate transformation of FIG. 4B can be considered as a clockwise transformation.
[0174] Figure 5I is an illustrative coordinate transformation diagram illustrating an illustrative result according to some embodiments of the present disclosure.
[0175] Figure 5I The converted y coordinate values of the geometric features h_s, h_a1, h_a2, h_a3, h_a4 are shown. As shown, the y coordinate value of the geometric feature h_s is significantly higher than the others. In an embodiment, the converted y coordinate value of the geometric feature h_s can be compared with a predetermined threshold value (e.g., a second threshold value). If the converted y coordinate value of the geometric feature h_s exceeds the predetermined threshold value, it is determined that the abnormal shift is caused by the manufacturing process "SA".
[0176] is an illustrative diagram illustrating one of the steps of identifying the cause of the manufacturing defect according to some embodiments of the present disclosure. In conjunction with the illustrative diagram of step S418 can be better understood.
[0177] The geometric center of the geometric feature h_s and a number of geometric centers of the geometric features h_b1, h_b2, h_b3, h_b4 are shown. The geometric features h_s, h_b1, h_b2, h_b3, h_b4 are associated with the manufacturing process "SB". A coordinate conversion is performed on each of the geometric centers of the geometric features h_s, h_b1, h_b2, h_b3, h_b4. The coordinate conversion can be performed according to the following equations.
[0178] x T = x x cos θ2+ y x sin θ2 (Equation 3)
[0179] y T = y x cos θ2- x x sin θ2 (Equation 4)
[0180] In Equations 3 and 4, x represents a coordinate value on an x axis, y represents a coordinate value on a y axis, x T represents a converted coordinate value on the x axis, y T represents a converted coordinate value on the y axis, and θ2 represents an angle between the second set of geometric features and the x axis. As shown in the coordinate conversion can be considered as a counterclockwise direction conversion.
[0181] is an illustrative coordinate conversion diagram illustrating an illustrative result according to some embodiments of the present disclosure.
[0182] The converted y coordinate values of the geometric features h_s, h_b1, h_b2, h_b3, h_b4 are shown. As shown, the y coordinate value of the geometric feature h_s is significantly higher than the others. In an embodiment, the converted y coordinate value of the geometric feature h_s can be compared with a predetermined threshold value (e.g., a second threshold value). If the converted y coordinate value of the geometric feature h_s exceeds the predetermined threshold value, it is determined that the abnormal shift is caused by the manufacturing process "SA". As shown, the y-coordinate value of the geometric feature h_s is within a range similar to other geometric features.
[0183] In one embodiment, the transformed y-coordinate value of the geometric feature h_s can be compared to a predetermined threshold value (e.g., a second threshold value). If the transformed y-coordinate value of the geometric feature h_s exceeds the predetermined threshold value, it is determined that the abnormal shift is caused by the manufacturing process "SB". In the illustrated embodiment, it can be determined that the abnormal shift is not caused by the manufacturing process "SB".
[0184] In some embodiments, the abnormal shift can be caused only by the manufacturing process "SA". In some embodiments, the abnormal shift can be caused only by the manufacturing process "SB". In some embodiments, the abnormal shift can be caused by both the manufacturing process "SA" and the manufacturing process "SB".
[0185] One embodiment of the present disclosure provides a system for identifying a cause of a manufacturing defect. The system includes a processing unit; and an image capturing unit electrically coupled to the processing unit. The system is configured to capture N images via the image capturing unit to cover different portions of a semiconductor wafer, wherein each of the N images includes M geometric features. The system is further configured to assign M serial numbers, each of which is associated with one of the M geometric features. The system is further configured to calculate, by the processing unit, a geometric center of each geometric feature of the N images. The system is further configured to calculate, from the N images, M average geometric centers associated with the M serial numbers. The system is further configured to calculate a shift amount of each geometric feature of the N images.
[0186] One embodiment of the present disclosure provides a method for identifying a cause of a manufacturing defect. The method includes capturing, by an image capturing unit, N images from a semiconductor wafer, wherein each of the N images includes M geometric features; calculating, by a processing unit, a geometric center of each geometric feature of the N images; calculating, from the N images, M average geometric centers associated with the M geometric features; and calculating a shift amount of each geometric feature of the N images.
[0187] One embodiment of the present disclosure provides a non-transitory computer readable medium. The non-transitory computer readable medium stores an inspection program including a plurality of instructions which, when executed by a processing unit, cause an inspection apparatus to: capture N images from a semiconductor wafer by an image capturing unit, wherein each of the N images includes M geometric features; calculate a geometric center of each geometric feature of the N images by the processing unit; calculate M average geometric centers associated with the M geometric features according to the N images; perform a first coordinate transformation on a first set of geometric features associated with a particular geometric feature; and perform a second coordinate transformation on a second set of geometric features associated with the particular geometric feature.
[0188] The disclosed identification method can identify a location of a particular hole pattern having an unexpected shift. The disclosed identification method can provide an accurate shift amount of the particular hole pattern. Furthermore, the disclosed identification method can also identify a manufacturing procedure that causes the unexpected shift. While the present disclosure and its advantages have been illustrated by description of various embodiments, it is understood that changes, substitutions, and alterations can be made by one skilled in the art without departing from the spirit and scope of the disclosure defined by the appended claims. For example, many of the steps recited can be performed in a different order and / or omitted. The steps recited can be implemented by different items of hardware and / or software, and / or combinations thereof.
[0189] Furthermore, the scope of the application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein can be utilized. Accordingly, the present claims are intended to cover and embrace all such processes, machines, manufacture, compositions of matter, means, methods, or steps.
Claims
1. A system for identifying causes of manufacturing defects, comprising: a processing unit; an image capturing unit electrically coupled to the processing unit, wherein the system is configured to perform a plurality of steps, including: capturing N images by the image capturing unit to cover different portions of a semiconductor wafer, wherein each of the N images includes M geometric features; assigning M serial numbers to each of the N images, each of the M serial numbers being associated with one of the M geometric features of the corresponding image; calculating, by the processing unit, a geometric center of each geometric feature of the N images; calculating M average geometric centers associated with the M serial numbers based on geometric centers of N geometric features having the same serial number in the N images; and calculating a displacement of each geometric feature of the N images.
2. The identification system of claim 1, wherein the identification system is further configured to perform a plurality of steps, including: performing a first coordinate transformation on a first set of geometric features associated with a first manufacturing process in response to a displacement of a particular geometric feature exceeding a first threshold, wherein the particular geometric feature belongs to the first set of geometric features.
3. The identification system of claim 2, wherein the identification system is further configured to perform a plurality of steps, including: performing a second coordinate transformation on a second set of geometric features associated with a second manufacturing process in response to a displacement of a particular geometric feature exceeding a first threshold, wherein the particular geometric feature belongs to the second set of geometric features.
4. The identification system of claim 3, wherein the identification system is further configured to perform a plurality of steps, including: determining whether the displacement of the particular geometric feature is caused by the first manufacturing process or the second manufacturing process based on results of the first coordinate transformation and the second coordinate transformation.
5. The system of claim 1, further comprising constructing a coordinate system of the N images, wherein the coordinate system includes a coordinate origin disposed at a center of each of the N images, and each of the geometric features includes a coordinate value on an x-axis and a coordinate value on a y-axis.
6. The system of claim 3, wherein the first coordinate transformation is performed based on the following equation: x T = x x cos θ1- y x sin θ1; and y T = y x cos θ1+ x x sin θ1; where x represents a coordinate value of the first set of geometric features on an x-axis; y represents a coordinate value of the first set of geometric features on a y-axis; x T represents a transformed coordinate value of the first set of geometric features on the x-axis; y T a transformed coordinate value representing the first set of geometric features in the y-axis; and θ1 represents an angle between the first set of geometric features and the x-axis.
7. The system of claim 3, wherein the second coordinate transformation is performed based on the following equation: x T = x x cos θ2+ y x sin θ2; and y T = y x cos θ2- x x sin θ2; where x represents a coordinate value of the second set of geometric features on an x-axis; y represents a coordinate value of the second set of geometric features on a y-axis; x T represents a transformed coordinate value of the second set of geometric features on the x-axis; y T a transformed coordinate value representing the second set of geometric features in the y-axis; and θ2 represents an angle between the second set of geometric features and the x-axis.
8. The system of claim 2, wherein the displacement of the particular geometric feature is calculated based on the average geometric center associated with the particular geometric feature and the geometric center of the particular geometric feature.
9. The system of claim 1, further comprising a storage unit electrically coupled to the processing unit and the image capturing unit, wherein the storage unit is configured to store the N images.
10. The system of claim 4, wherein the system determines that the displacement of the particular geometric feature is caused by the first manufacturing process in response to: a y-coordinate value of the particular geometric feature obtained after the second coordinate transformation does not exceed the second threshold value. a y-coordinate value of the particular geometric feature obtained after the second coordinate transformation does not exceed the second threshold value.
11. The identification system of claim 4, wherein the identification system determines the amount of shift of the particular geometric feature caused by the second manufacturing procedure in response to: a y-coordinate value of the particular geometric feature obtained after the second coordinate transformation does not exceed the second threshold value. a y-coordinate value of the particular geometric feature obtained after the second coordinate transformation does not exceed the second threshold value.
12. A non-transitory computer readable medium storing an inspection procedure comprising instructions which, when executed by a processing unit, cause an inspection apparatus to: capture N images from a semiconductor wafer by an image capturing unit, wherein each of the N images comprises M geometric features; assign M serial numbers, each of which is associated with one of the M geometric features; calculate a geometric center of each geometric feature of the N images by the processing unit; calculate M average geometric centers associated with the M geometric features from geometric centers of N geometric features having the same serial number in the N images, wherein the M average geometric centers are associated with the M serial numbers; calculate an amount of shift of each geometric feature of the N images; perform a first coordinate transformation on a first set of geometric features associated with a particular geometric feature in response to the particular geometric feature exceeding a first threshold value of an amount of shift, wherein the particular geometric feature belongs to the first set of geometric features; and perform a second coordinate transformation on a second set of geometric features associated with the particular geometric feature in response to the particular geometric feature exceeding a first threshold value of an amount of shift, wherein the particular geometric feature belongs to the second set of geometric features.
13. The non-transitory computer readable medium of claim 12, wherein the inspection procedure comprises instructions which, when executed by the processing unit, cause the inspection apparatus to determine whether the amount of shift of the particular geometric feature exceeding a first threshold value is caused by a first manufacturing procedure or a second manufacturing procedure.
14. The non-transitory computer readable medium of claim 12, wherein the inspection procedure comprises instructions which, when executed by the processing unit, cause the inspection apparatus to: compare a y-coordinate value of the particular geometric feature obtained after the first coordinate transformation with a second threshold value; and compare a y-coordinate value of the particular geometric feature obtained after the second coordinate transformation with the second threshold value.
15. The non-transitory computer readable medium of claim 12, wherein the inspection procedure comprises instructions which, when executed by the processing unit, cause the inspection apparatus to: construct a coordinate system of the N images, wherein the coordinate system comprises a coordinate origin disposed at a center of each of the N images, and each of the geometric features comprises a coordinate value on an x-axis and a coordinate value on a y-axis.
16. The non-transitory computer readable medium of claim 12, wherein the inspection program comprises instructions that, when executed by the processing unit, cause the inspection apparatus to calculate an offset of the particular geometric feature from a geometric center of the particular geometric feature and an average geometric center associated with the particular geometric feature.
17. The non-transitory computer readable medium of claim 12, wherein the first coordinate transformation is performed according to the following equation: x = x + y tan(θi) where x represents a coordinate value of the first set of geometric features on an x-axis; y represents a coordinate value of the first set of geometric features on a y-axis; θi represents an angle between the first set of geometric features and the x-axis. x T = x x cos θ1- y x sin θ1; and y T = y x cos θ1+ x x sin θ1; 18. The non-transitory computer readable medium of claim 12, wherein the second coordinate transformation is performed according to the following equation: x = x + y tan(θ2) where x represents a coordinate value of the second set of geometric features on an x-axis; y represents a coordinate value of the second set of geometric features on a y-axis; θ2 represents an angle between the second set of geometric features and the x-axis. x T a transformed coordinate value representing the first set of geometric features in the x-axis; y T a transformed coordinate value representing the first set of geometric features in the y-axis; and x T = x x cos θ2+ y x sin θ2; and y T = y x cos θ2- x x sin θ2; x T a transformed coordinate value representing the second set of geometric features in the x-axis; y T a transformed coordinate value representing the second set of geometric features in the y-axis; and
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