Pixel circuit, array substrate and display panel
By introducing a combination design of a drive current output module and a set voltage writing module into the full-screen display panel, and by controlling the set voltage writing stage and the light emission stage, the problem of uneven display was solved, and rapid charging to the target grayscale voltage was achieved, thus improving display uniformity and effect.
Patent Information
- Application Number
- CN202310637099.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-31
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2043-05-31
AI Technical Summary
Existing full-screen display panels suffer from uneven display, mainly due to the large anode capacitance of the light-emitting devices in the secondary screen area. This results in an excessively long charging time for the driving current, making it impossible to reach the target grayscale voltage within one frame, thus causing uneven brightness and poor display effects.
By adopting a combined design of a drive current output module and a set voltage writing module, and through the adjacent control of the set voltage writing stage and the light emission stage, the set voltage is greater than the initial voltage, and the device is quickly charged to the target gray level voltage before the light emission stage, thereby reducing charging time and improving display uniformity.
By quickly charging to the target grayscale voltage, display unevenness is reduced, improving the display effect and uniformity of the display panel, especially significantly improving the brightness unevenness problem at low grayscale levels.
Smart Images

Figure CN116645914B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit, an array substrate, and a display panel. Background Technology
[0002] With the development of display technology, full-screen displays have become a trend.
[0003] A full-screen display panel includes a main screen area and a secondary screen area. The secondary screen area is a light-transmitting area, allowing the camera to be placed there to perform video recording. In existing technology, the pixel circuits connected to the light-emitting devices in the secondary screen area are generally placed in the main screen area surrounding the secondary screen area to improve the light transmittance of the secondary screen area.
[0004] However, existing full-screen display panels suffer from uneven display. Summary of the Invention
[0005] This invention provides a pixel circuit, an array substrate, and a display panel to reduce the uneven display phenomenon in full-screen display panels and improve the display effect.
[0006] In a first aspect, embodiments of the present invention provide a pixel circuit, including: a drive current output module and a set voltage writing module;
[0007] The drive current output module is electrically connected to the first input terminal of the set voltage writing module through the anode connection line. The drive current output module is used to generate drive current according to the input data voltage and output the drive current to the first input terminal.
[0008] The second input terminal of the setting voltage writing module is connected to the setting voltage input terminal of the pixel circuit, and the output terminal of the setting voltage writing module is connected to the anode of the light-emitting device. The setting voltage writing module is used to disconnect the connection between the first input terminal and the anode during the setting voltage writing stage, and write the setting voltage input by the setting voltage input terminal to the first input terminal, wherein the setting voltage is greater than the initialization voltage for initializing the anode; and is used to connect the connection between the first input terminal and the anode and disconnect the connection between the second input terminal and the first output terminal during the light-emitting stage.
[0009] The voltage setting stage is performed before the light emission stage and is adjacent to the light emission stage.
[0010] Optionally, the output terminal of the setting voltage writing module can be directly connected to or connected to the anode of the light-emitting device through a connection structure, and the area of the connection structure is smaller than the area of the anode connection line.
[0011] Optionally, the setting voltage writing module includes a setting voltage writing unit and a cut-off control unit;
[0012] The setting voltage writing unit is used to respond to the write control signal transmitted by the write control signal line, and transmits the setting voltage to the first input terminal during the setting voltage writing stage;
[0013] The cut-off control unit is used to respond to the cut-off control signal transmitted by the cut-off control signal line, cut off the connection between the first input terminal and the anode of the light-emitting device during the set voltage writing phase, and connect the first input terminal and the anode of the light-emitting device during the light-emitting phase.
[0014] Among them, the output terminal of the cut-off control unit is directly connected to the anode or connected through a connection structure;
[0015] Optionally, the voltage setting writing unit includes a first transistor, the gate of the first transistor is connected to a write control signal, the first terminal of the first transistor is connected to a second input terminal, and the second terminal of the first transistor is connected to a first input terminal;
[0016] The cut-off control unit includes a second transistor, the gate of which is connected to a cut-off control signal, the first terminal of which is connected to a first input terminal, and the second terminal of which is connected to the anode of a light-emitting device.
[0017] Optionally, the setting voltage writing unit is also used to respond to the write control signal and, in the first initialization phase, transmit the initialization voltage input at the setting voltage input terminal to the first input terminal;
[0018] The cut-off control unit is also used in the first initialization phase to conduct between the first input terminal and the anode to transmit the initialization voltage to the anode of the light-emitting device;
[0019] The first initialization phase is performed before the voltage setting phase.
[0020] Optionally, the drive current output module further includes a first initialization unit, which is used to write an initialization voltage to the first input terminal of the setting voltage writing module during the first initialization phase. The setting voltage writing module is also used to transmit the initialization voltage of the first output terminal to the anode of the light-emitting device during the first initialization phase. The first initialization phase is performed before the setting voltage writing phase.
[0021] Optionally, the drive current output module includes a data voltage writing unit and a drive unit. The data voltage writing unit is used to write data voltage to the control terminal of the drive unit during the data writing phase. The drive unit is used to generate drive current according to the voltage of its own control terminal.
[0022] Preferably, the drive current output module further includes a first light-emitting control unit, which is connected between the first power supply voltage input terminal and the first terminal of the drive unit, and the second terminal of the drive unit serves as the output terminal of the drive current output module.
[0023] Alternatively, the drive current output module may further include a first light-emitting control unit and a second light-emitting control unit, wherein the first light-emitting control unit is connected between the first power supply voltage input terminal and the first terminal of the drive unit, and the second light-emitting control unit is connected between the second terminal of the drive unit and the output terminal of the drive current output module;
[0024] Optionally, the drive current output module also includes a compensation unit, which is used to compensate the threshold voltage of the drive transistors included in the drive unit during the data writing phase.
[0025] Optionally, the drive current output module further includes a second initialization unit, which is used to write an initialization voltage to the control terminal of the drive unit during the second initialization phase, wherein the second initialization phase is performed before the data writing phase.
[0026] Optionally, the voltage difference between the set voltage and the cathode voltage connected to the cathode of the light-emitting device is greater than or equal to the turn-on voltage that makes the light-emitting device emit light.
[0027] Optionally, the voltage can be set to be less than or equal to the anode point voltage corresponding to the set gray level;
[0028] Optionally, for a display panel including a pixel circuit without a set voltage writing module, when displaying a display screen with a set gray level and a display screen with a gray level below the set gray level, the gray level value of the display screen exceeds the display non-uniformity threshold.
[0029] In a second aspect, embodiments of the present invention also provide an array substrate, including the pixel circuit of the first aspect; the array substrate further includes a substrate, a driving circuit layer disposed on one side of the substrate, and an anode layer on the side of the driving circuit layer away from the substrate, the anode layer including the anodes of a plurality of light-emitting devices, the pixel circuit being located in the driving circuit layer; the setting voltage writing module includes a setting voltage writing unit and a cut-off control unit.
[0030] In one pixel circuit, the orthographic projection of the anode of the light-emitting device onto the substrate covers the orthographic projection of the cutoff control unit onto the substrate.
[0031] Optionally, the driving circuit layer includes a first light-transmitting signal line layer, and the anode connection line is disposed on the first light-transmitting signal line layer;
[0032] Optionally, the driving circuit layer further includes a second light-transmitting signal line layer, and the cut-off control signal line includes a light-transmitting signal line, which is disposed on the second light-transmitting signal line layer, wherein the second light-transmitting signal line layer is located on the side of the first light-transmitting signal line layer near the substrate.
[0033] Thirdly, embodiments of the present invention also provide a display panel, including the array substrate of the second aspect; the display panel includes a light-transmitting display area and a light-transmitting display area, the light-transmitting display area including a transition area connected to the light-transmitting display area; both the light-transmitting display area and the light-transmitting display area are provided with a plurality of light-emitting devices;
[0034] In the pixel circuit used to drive the light-emitting devices in the light-transmitting display area, the driving current output module is located in the transition area, and the output terminal of the driving current output module is connected to the cut-off control unit through the anode connection line; the cut-off control unit is located in the light-transmitting display area.
[0035] Preferably, the anode connection line includes a light-transmitting signal line.
[0036] In this embodiment of the invention, the pixel circuit, array substrate, and display panel include a driving current output module electrically connected to the first input terminal of a setting voltage writing module via an anode connection line. The driving current output module generates a driving current based on the input data voltage and outputs the driving current to the first input terminal at least during the light-emitting phase. The output terminal of the setting voltage writing module is connected to the anode of the light-emitting device. During the setting voltage writing phase, the setting voltage writing module disconnects the connection between the output terminal of the first input driving current output module and the anode, and writes the setting voltage input at the setting voltage input terminal to the anode of the first input light-emitting device. The module also serves to connect the output terminal of the first input driving module output module to the anode and disconnect the connection between the second input terminal and the first output terminal during the light-emitting phase. The setting voltage writing phase occurs before and adjacent to the light-emitting phase. The setting voltage is greater than the initialization voltage for anode initialization, causing the anode capacitor to reach the anode point voltage corresponding to the target grayscale in a short time, thereby improving display uniformity and ultimately enhancing the display effect. Furthermore, since the anode capacitor can be charged to the anode point voltage corresponding to the target grayscale in a short time, even if the anode capacitors in different pixel circuits are of different sizes, the anode capacitors of each pixel circuit can be easily charged to the corresponding anode point voltage during the set voltage writing stage, thereby further improving display uniformity. Attached Figure Description
[0037] Figure 1 This is a schematic diagram of the structure of a display panel in the prior art;
[0038] Figure 2 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;
[0039] Figure 3 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;
[0040] Figure 4 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;
[0041] Figure 5 This is a driving timing diagram of a pixel circuit provided in an embodiment of the present invention;
[0042] Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;
[0043] Figure 7 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention;
[0044] Figure 8 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;
[0045] Figure 9 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention;
[0046] Figure 10 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;
[0047] Figure 11 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention;
[0048] Figure 12 This is a cross-sectional structural diagram of an array substrate provided in an embodiment of the present invention;
[0049] Figure 13 This is a schematic diagram of the overall structure of a display panel provided in an embodiment of the present invention. Detailed Implementation
[0050] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.
[0051] As described in the background section, existing full-screen display panels suffer from uneven display. The inventors discovered that this problem arises because, in existing technologies, the pixel circuits connected to the light-emitting devices in the secondary screen area are placed in the main screen area surrounding the secondary screen area. The light-emitting devices in the secondary screen area are connected to their corresponding pixel circuits via light-transmitting signal lines. These signal lines form a capacitor with the nearby film structure in the display panel, increasing the anode capacitance of the light-emitting devices. During the light-emitting phase driven by the pixel circuits, the driving current charges the anode capacitor, causing the potential of the anode point to gradually rise from the initial voltage to the voltage corresponding to the target grayscale. Due to the large anode capacitance and low initial voltage, the time required to charge the anode capacitor to the voltage corresponding to the target grayscale is relatively long. However, a single frame is finite; with the increased anode capacitance, the anode point cannot rise to the voltage corresponding to the target grayscale within one frame, thus easily causing uneven display, lower brightness of the light-emitting devices, and poor display performance. Figure 1 This is a schematic diagram of the structure of a display panel in the prior art, for reference. Figure 1 The varying lengths of the light-transmitting signal lines 3 connecting the light-emitting device 1 in the secondary screen area and the corresponding pixel circuit 2 (located in the main screen area) result in different anode capacitance values for the different light-emitting devices 1. Due to these different anode capacitance values, when the same driving current charges the anode capacitors, the anode points of different light-emitting devices 1 cannot be charged to the same voltage within the same time frame, further exacerbating the display unevenness. This unevenness is particularly noticeable at low grayscale levels where the driving current is small.
[0052] For the reasons stated above, embodiments of the present invention provide a pixel circuit. Figure 2 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention, for reference. Figure 2 The pixel circuit includes a drive current output module 110 and a set voltage writing module 120. The drive current output module 110 is electrically connected to the first input terminal A1 of the set voltage writing module 120 through an anode connection line 130. The drive current output module 110 is used to generate a drive current according to the input data voltage and output the drive current to the first input terminal A1 at least during the light emission stage.
[0053] The second input terminal A2 of the setting voltage writing module 120 is connected to the setting voltage input terminal VIN of the pixel circuit, and the output terminal of the setting voltage writing module 120 is connected to the anode of the light-emitting device 140. The setting voltage writing module is used to disconnect the connection between the first input terminal A1 and the anode and write the setting voltage input by the setting voltage input terminal VIN to the first input terminal A1 during the setting voltage writing stage. The setting voltage is greater than the initialization voltage for initializing the anode. It is also used to connect the connection between the first input terminal A1 and the anode and disconnect the connection between the second input terminal A2 and the first input terminal A1 during the light-emitting stage. The setting voltage writing stage is performed before the light-emitting stage and is adjacent to the light-emitting stage.
[0054] Specifically, the drive current output module 110 can be implemented using the pixel circuit structure in the prior art. The drive current output module 110 may include a data voltage input terminal, which can generate a drive current based on the data voltage input to the data voltage input terminal. For example, the drive current output module 110 may include a data writing unit and a drive unit, wherein the data writing unit is used to write a data voltage to the control terminal of the drive unit during the data writing phase, and the drive unit is used to generate a drive current based on the voltage of its own control terminal.
[0055] The setting voltage writing module 120 includes a first input terminal A1, a second input terminal A2, and an output terminal. The first input terminal A1 of the setting voltage writing module 120 is connected to the output terminal of the drive current output module 110 via an anode connection line 130. The pixel circuit of this embodiment can be applied in a full-screen display panel, which includes a light-transmitting display area and a non-light-transmitting display area. A camera can be placed below the light-transmitting display area to ensure that the camera can perform video recording. The pixel circuit of this embodiment can be used to drive the light-emitting device 140 in the light-transmitting display area to control the light-emitting state of the light-emitting device 140. The drive current output module 110 can be located in the non-light-transmitting display area, and at least a portion of the structure of the setting voltage writing module 120 is located in the light-transmitting display area. The anode connection line 130 connects the output terminal of the drive current output module 110 and the first input terminal A1 of the setting voltage writing module 120, which is located in the light-transmitting display area. To ensure the light transmittance of the transparent display area, the anode connection line 130 is a transparent connection line, extending from the non-transparent display area to the transparent display area. The setting voltage writing module 120 can control the connection state between the anode signal line and the anode of the light-emitting device 140, including connection and disconnection. Specifically, the setting voltage writing module 120 includes a device structure that is directly connected to or connected to the anode of the light-emitting device 140 through a connection structure, and at least this device structure that is directly connected to or connected to the anode of the light-emitting device 140 through a connection structure is located in the transparent display area. The connection structure can be a signal line or a conductive metal structure, etc. The signal line can be a transparent signal line or a non-transparent signal line. The connection structure can be located in the metal layer of the array substrate including the pixel circuit, and be made of the same material and using the same process as other conductive structures in the metal layer. For example, the connection structure is located in the metal layer between the setting voltage writing module 120 and the anode of the light-emitting device 140. One end of the connection structure can be connected to the output terminal of the setting voltage writing module 120, and the other end can be connected to the anode of the light-emitting device 140, so as to realize the connection between the output terminal of the setting voltage writing module 120 and the anode of the light-emitting device 140. The area of the connection structure is smaller than the area of the anode connection line. This means that the area of the connection structure projected onto the substrate of the display panel where the pixel circuit is located is smaller than the area of the anode connection line projected onto the substrate. This makes the anode capacitance corresponding to the connection structure smaller than the anode capacitance corresponding to the anode connection line, so that the anode voltage is easier to write. The setting voltage writing module 120 can also be connected to the anode of the light-emitting device 140 without the connection structure, that is, the output terminal of the setting voltage writing module 120 is directly connected to the anode of the light-emitting device 140.
[0056] Specifically, during the setting voltage writing phase, the setting voltage writing module 120 disconnects its first input terminal A1 from the anode, i.e., disconnects the anode connection line from the anode, and writes the setting voltage input at the setting voltage input terminal VIN to its first input terminal A1. The setting voltage is greater than the initialization voltage used to initialize the anode. During the light emission phase, it connects the first input terminal A1 to the anode and disconnects the second input terminal A2 from the first input terminal A1, causing the light-emitting device 140 to emit light or not emit light according to the driving current. The setting voltage writing phase occurs before and is adjacent to the light emission phase (the light emission phase being adjacent to the setting voltage writing phase means that the level of the control signals for each module of the pixel circuit does not change from the end of the setting voltage writing phase to the start of the light emission phase). When the set voltage is greater than the initialization voltage for anode initialization, and when the set voltage is less than the anode voltage corresponding to the target grayscale, the initial voltage for charging the anode capacitor by the driving current is increased compared to existing technologies. This shortens the time required to charge the anode capacitor to the anode voltage corresponding to the target grayscale, allowing the anode to be charged to the target grayscale voltage in a short time. When the set voltage is greater than the anode voltage corresponding to the target grayscale, the anode capacitor discharges instantly at the moment of transition from the set voltage writing stage to the light emission stage, reaching the anode voltage corresponding to the target grayscale. Because the discharge time is very short compared to the charging time, the charging process of the anode capacitor by the driving current can be reduced compared to existing technologies, ensuring that the anode reaches the anode voltage corresponding to the target grayscale in a short time. Therefore, the pixel circuit of this embodiment helps ensure that the anode capacitor in the pixel circuit reaches the anode voltage corresponding to the target grayscale in a short time, thereby improving display uniformity and ultimately enhancing the display effect. Furthermore, since the anode capacitor can be charged to the anode point voltage corresponding to the target grayscale in a short time, even if the anode capacitors in different pixel circuits are of different sizes, the anode capacitors of each pixel circuit can be easily charged to the corresponding anode point voltage during the light emission stage, thereby further improving the display uniformity.
[0057] The voltage setting can be adjusted according to actual needs. However, when setting the voltage, it is essential to ensure that the voltage setting is greater than the initial voltage of the anode of the light-emitting device 140.
[0058] In some optional embodiments, the set voltage can be greater than the initial voltage but less than the minimum voltage required to light up the light-emitting device 140, to ensure that the light-emitting device 140 does not emit light momentarily when the non-transparent display area is in a black state, thus ensuring a good display effect in the black state of the non-transparent display area. In another optional embodiment, the set voltage can be greater than the minimum voltage required to light up the light-emitting device 140; this embodiment does not impose a specific limitation here. Optionally, the voltage difference between the set voltage and the cathode voltage connected to the cathode of the light-emitting device 140 is greater than or equal to the turn-on voltage required to make the light-emitting device 140 emit light, so that the anode point of the light-emitting device 140 can be charged and discharged more quickly to the anode point voltage corresponding to the target grayscale during the light-emitting phase, further contributing to improved display uniformity. Optionally, the set voltage is less than or equal to the anode point voltage corresponding to the set gray level. In some optional embodiments of the present invention, the set gray level can be determined as follows: for a display panel including a pixel circuit without a set voltage writing module (e.g., a display panel including a conventional 7T1C pixel circuit), when displaying a display image at the set gray level and a display image at a gray level below the set gray level, the gray level value of the display image exceeds the display non-uniformity threshold, thereby determining the set gray level. For example, the degree of display non-uniformity can be characterized by the ratio of the area of display non-uniformity on the display panel to the total area of the display panel; the display non-uniformity threshold will then correspond to an area threshold for display non-uniformity on the display panel. Since display non-uniformity primarily occurs in the low gray level range, setting the set voltage to be less than or equal to the anode point voltage corresponding to the set gray level improves at least some of the display non-uniformity at low gray levels. Since display non-uniformity mostly occurs in low gray level conditions, in some optional embodiments of the present invention, the set gray level is less than or equal to 32 gray levels. For example, when the set voltage is equal to the anode point voltage corresponding to the set gray level, the uneven display of the set gray level and gray levels below the set gray level can also be improved.
[0059] The pixel circuit of this embodiment includes a drive current output module and a setting voltage writing module. The drive current output module is electrically connected to the first input terminal of the setting voltage writing module via an anode connection line. The drive current output module generates a drive current based on the input data voltage and outputs the drive current to the first input terminal at least during the light-emitting phase. The output terminal of the setting voltage writing module is connected to the anode of the light-emitting device. During the setting voltage writing phase, the setting voltage writing module disconnects the connection between the output terminal of the first input drive current output module and the anode, and writes the setting voltage input to the anode of the first input light-emitting device to avoid display defects caused by the light-emitting device emitting light when the setting voltage is written to the first input terminal of the light-emitting device during the setting writing phase. During the light-emitting phase, the connection between the output terminal of the first input drive module output module and the anode is turned on, and the connection between the second input terminal and the first input terminal is disconnected. The setting voltage writing phase is performed before the light-emitting phase. The setting voltage is greater than the initialization voltage for anode initialization, so that the anode capacitor reaches the anode point voltage corresponding to the target grayscale in a short time, which helps to improve display uniformity and thus improve the display effect. Furthermore, since the anode capacitor can be charged to the anode point voltage corresponding to the target grayscale in a short time, even if the anode capacitors in different pixel circuits are of different sizes, the anode capacitors of each pixel circuit can be easily charged to the corresponding anode point voltage during the light emission stage, thereby further improving the display uniformity.
[0060] Figure 3 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, for reference. Figure 3 The setting voltage writing module 120 includes a setting voltage writing unit 121 and a cut-off control unit 122. The setting voltage writing unit 121 is used to transmit the setting voltage to the first input terminal A1 in response to the write control signal Ctrl1 transmitted by the write control signal line. The cut-off control unit 122 is used to cut off the connection between the first input terminal A1 and the anode of the light-emitting device 140 in response to the cut-off control signal Ctrl2 transmitted by the cut-off control signal line in the setting voltage writing stage. In the light-emitting stage, it connects the first input terminal A1 and the anode of the light-emitting device 140. The output terminal of the cut-off control unit 122 is directly connected to the anode or connected through a connection structure.
[0061] The voltage setting writing unit 121 includes a control terminal, a first terminal, and a second terminal. The control terminal of the voltage setting writing unit 121 is connected to the write control signal line and receives the write control signal Ctrl1 from the write control signal line. The first terminal of the voltage setting writing unit 121 is connected to the second input terminal A2, and the second terminal of the voltage setting writing unit 121 is connected to the first input terminal A1. During the voltage setting writing stage, when the write control signal Ctrl1 is a valid level signal, the voltage setting writing unit 121 responds to the valid level signal and conducts, transmitting the setting voltage to the first input terminal A1.
[0062] The cut-off control unit 122 includes a control terminal, a first terminal, and a second terminal. The control terminal of the cut-off control unit 122 is connected to the cut-off control signal line and receives the cut-off control signal Ctrl2 from the cut-off control signal line. The first terminal of the cut-off control unit 122 is connected to the first input terminal A1, and the second terminal of the cut-off control unit 122 is connected to the output terminal of the setting voltage writing module 120. During the setting voltage writing stage, the cut-off control signal Ctrl2 is an invalid level signal, causing the cut-off control unit 122 to turn off in response to the valid level signal, thereby cutting off the gap between the first input terminal A1 and the output terminal of the drive current output module 110, that is, cutting off the gap between the anode connection line 130 and the anode. During the setting voltage writing stage, the cut-off control unit 122 cuts off the gap between the anode connection line 130 and the anode, while the setting voltage writing unit 121 writes the setting voltage to the anode connection line 130. In the pixel circuit of this embodiment, except for the drive transistor included in the drive current output module 110, other transistors can be switching transistors. Compared to driving transistors, switching transistors have a much larger on-state current, allowing the setting voltage writing unit 121 to charge the anode connection line 130 to the setting voltage within a short time corresponding to the setting voltage writing stage, regardless of the length of the anode connection line 130. Since the setting voltage writing stage occurs before the light emission stage and can be adjacent to it, after the setting voltage writing stage enters the light emission stage, the disconnect control unit 122 connects the anode connection line 130 to the anode, allowing the potential of both the anode connection line 130 and the anode point to rapidly change from the setting voltage to the anode point voltage corresponding to the target grayscale (see the above embodiment for the specific principle), thereby improving display uniformity.
[0063] Both the setting voltage writing unit 121 and the cut-off control unit 122 may include at least one transistor. For the setting voltage writing unit 121, a valid level signal is a level signal that turns the setting voltage writing unit 121 on, and an invalid level signal is a level signal that turns the setting voltage writing unit 121 off. For the cut-off control unit 122, a valid level signal is a level signal that turns the cut-off control unit 122 on, and an invalid level signal is a level signal that turns the cut-off control unit 122 off.
[0064] Figure 4 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, for reference. Figure 4 Optionally, the drive current output module 110 includes a data voltage writing unit 111 and a drive unit 112. The data voltage writing unit 111 is used to write data voltage to the control terminal of the drive unit 112 during the data writing stage; the drive unit 112 is used to generate drive current according to the voltage of its own control terminal.
[0065] Depending on the circuit structure of different drive current output modules 110, the data voltage writing unit 111 can be directly or indirectly connected to the control terminal of the drive unit 112. The drive unit 112 includes a drive transistor DT. When the drive current output module 110 does not include a compensation unit 114 for compensating the threshold voltage of the drive transistor DT, the data voltage writing unit 111 is directly connected to the control terminal of the drive unit 112. When the drive current output module 110 includes a compensation unit 114 for compensating the threshold voltage of the drive transistor DT, the data voltage writing unit 111 can be connected to the first terminal of the drive unit 112, which is either the source or drain of the drive transistor DT. Figure 4 The diagram schematically illustrates the structure of the drive current output module 110, which includes a compensation unit. The first end of the data voltage sinking unit 111 is electrically connected to the data voltage input terminal Vdata, and the second end of the data voltage writing unit 111 is connected to the first end of the drive unit 112.
[0066] Continue to refer to Figure 4 Optionally, the drive current output module 110 also includes a first light-emitting control unit 113, which is connected between the first power supply voltage input terminal VDD and the first terminal of the drive unit 112, and the second terminal of the drive unit 112 serves as the output terminal of the drive current output module 110.
[0067] In this system, the control terminal of the first light-emitting control unit 113 is connected to the light-emitting control signal EM. The first terminal of the first light-emitting control unit 113 is connected to the first power supply voltage input terminal VDD, and the second terminal of the first light-emitting control unit 113 is connected to the first terminal of the driving unit 112. The first light-emitting control unit 113 controls the connection state between the first power supply voltage input terminal VDD and the first terminal of the driving unit 112 according to the light-emitting control signal EM. During the data writing phase, the light-emitting control signal EM is an invalid level signal, and the first light-emitting control unit 113 is turned off. During the light-emitting phase, the light-emitting control signal EM is an active level signal, and the first light-emitting control unit 113 is turned on. During the setting voltage writing phase, the light-emitting control signal EM can be either an active level signal or an invalid level control signal. The setting voltage writing phase occurs after the data writing phase. When the second terminal of the drive unit 112 is used as the output terminal of the drive current output module 110, during the data writing stage, the cut-off control signal Ctrl2 connected to the control terminal of the cut-off control unit 122 needs to be an invalid level signal that turns off the cut-off control unit 122, so as to ensure that the drive current output by the drive current output module 110 will not reach the anode of the light-emitting device 140 during the data writing stage, thereby preventing the light-emitting device 140 from lighting up during the data writing stage.
[0068] Continue to refer to Figure 4 Optionally, the drive current output module 110 further includes a compensation unit 114, which is used to compensate the threshold voltage of the drive transistor DT included in the drive unit 112 during the data writing phase. The compensation unit 114 is connected between the second terminal of the drive unit 112 and the control terminal of the drive unit 112.
[0069] Continue to refer to Figure 4 Optionally, the drive current output module 110 further includes a first initialization unit 115, which is used to write an initialization voltage to the first input terminal A1 of the setting voltage writing module 120 during the first initialization phase. The setting voltage writing module 120 is also used to transmit the initialization voltage of the first output terminal to the anode of the light-emitting device 140 during the first initialization phase. The first initialization phase is performed before the setting voltage writing phase.
[0070] Specifically, the first terminal of the first initialization unit 115 is connected to the initialization voltage input terminal Vref, and the second terminal of the first initialization unit 115 is connected to the output terminal of the drive current output module 110. Based on the signal received at its control terminal, the first initialization unit 115 transmits the initialization voltage input at the initialization voltage input terminal Vref to the output terminal of the drive current output module 110 during the first initialization phase, and then transmits it to the first input terminal A1 of the setting voltage writing module 120. The setting voltage input terminal VIN is turned on during the first initialization phase, transmitting the initialization voltage to the anode of the light-emitting device 140, thereby initializing the anode of the light-emitting device 140. The first initialization phase occurs before the setting and writing phase, which occurs before and is adjacent to the light-emitting phase. This ensures that the voltage on the anode connection line 130 is the setting voltage after the setting voltage writing phase and before the light-emitting phase, thereby improving the display uniformity of the display panel.
[0071] Continue to refer to Figure 4 Optionally, the drive current output module 110 further includes a second initialization unit 116, which is used to write an initialization voltage to the control terminal of the drive unit 112 during the second initialization phase, wherein the second initialization phase is performed before the data writing phase.
[0072] Specifically, the first end of the second initialization unit 116 is connected to the initialization voltage input terminal Vref, and the second end of the second initialization unit 116 is connected to the control terminal of the drive unit 112. The second initialization unit 116 transmits the initialization voltage to the control terminal of the drive unit 112 according to the signal input to its own control terminal during the second initialization stage, thereby initializing the control terminal of the drive unit 112.
[0073] Continue to refer to Figure 4 The control terminal of the second initialization unit 116 can be connected to the first scan signal S1, while the control terminals of the data voltage writing unit 111 and the compensation unit 114 are connected to the second scan signal S2. The control terminal of the first initialization unit 115 can be connected to the first scan signal S1, the second scan signal S2, or the third scan signal S3. The first scan signal S1, the second scan signal S2, and the third scan signal S3 can be provided by the same scan driving circuit, and these signals are connected to different stages of shift registers within the scan driving circuit.
[0074] Continue to refer to Figure 4Optionally, the voltage setting writing unit 121 includes a first transistor T1, the gate of which is connected to a writing control signal Ctrl1, the first terminal of the first transistor T1 is connected to the second input terminal A2, and the second terminal of the first transistor T1 is connected to the first input terminal A1. The cut-off control unit 122 includes a second transistor T2, the gate of which is connected to a cut-off control signal Ctrl2, the first terminal of the second transistor T2 is connected to the first input terminal A1, and the second terminal of the second transistor T2 is connected to the anode of the light-emitting device 140.
[0075] Optionally, the data voltage writing unit 111 includes a third transistor T3, the driving unit 112 includes a driving transistor DT, the first light-emitting control unit 113 includes a fourth transistor T4, the compensation unit 114 includes a fifth transistor T5, the first initialization unit 115 includes a sixth transistor T6, the second initialization unit 116 includes a seventh transistor T7, and the cathode of the light-emitting device 140 is connected to the second power supply voltage input terminal VSS.
[0076] Figure 5 This is a driving timing diagram of a pixel circuit provided in an embodiment of the present invention. Figure 5 The driving timing shown can be used to drive Figure 4 The pixel circuit shown is used to Figure 4 Taking P-type transistors as an example, the operation of the pixel circuit includes the second initialization stage t1, the data writing stage t2, the first initialization stage t3, the setting voltage writing stage t4, and the light emission stage t5.
[0077] In the second initialization phase t1, the first scan signal S1 is at a low level, the seventh transistor T7 is turned on, and the initialization voltage is transmitted to the gate of the driving transistor DT to initialize the gate of the driving transistor DT.
[0078] During the data writing phase t2, the second scan signal S2 is low, and the third transistor T3 and the fifth transistor T5 are turned on. The data voltage is written to the gate of the driving transistor DT through the third transistor T3, the driving transistor DT, and the fifth transistor T5. During data writing phase t2, the threshold voltage of the driving transistor DT is compensated by the fifth transistor T5. Also during data writing phase t2, the cutoff control signal Ctrl2 is high, turning off the cutoff control unit 122 to prevent the light-emitting device 140 from emitting light during data voltage writing to the gate of the driving transistor DT, thus avoiding display defects.
[0079] During the first initialization phase t3, the third scan signal S3 is at a low level, the sixth transistor T6 is turned on, and the initialization voltage is transmitted to the output terminal of the drive current output module 110. Also, during the first initialization phase t3, the cut-off control signal Ctrl2 is at a low level, the second transistor T2 is turned on, and the initialization voltage is transmitted to the anode of the light-emitting device 140 through the sixth transistor T6 and the second transistor T2, thereby initializing the anode of the light-emitting device 140.
[0080] During the voltage setting writing phase t4, the write control signal Ctrl1 is low and the cut-off control signal Ctrl2 is high, thus turning on the first transistor T1 and turning off the second transistor T2. The first transistor T1 is written to the anode connection line 130 and the first input terminal A1 of the voltage setting writing module 120. The first transistor T1 is a switching transistor, ensuring that the anode connection line 130 and the first input terminal A1 of the voltage setting writing module 120 reach the set voltage within the short time corresponding to the voltage setting writing phase t4.
[0081] During the light-emitting phase t5, the light-emitting control signal EM is low, and the fourth transistor T4 is turned on. The cut-off control signal Ctrl2 is low, turning on the second transistor T2, which drives the transistor DT to generate a driving current that is transmitted to the anode of the light-emitting device 140. Because the set voltage is greater than the initial voltage, during the light-emitting phase t5, the anode connection line 130 and the anode point can reach the anode point voltage corresponding to the target grayscale in a relatively short time, thus helping to improve the unevenness of the display.
[0082] Among them, for Figure 4 The pixel circuit shown can maintain a constant set voltage input at the set voltage input terminal VIN within one frame.
[0083] Combination Figure 5 The timing and pixel circuit operation process shown can be achieved by writing the control signal Ctrl1, which can be provided by the same scan drive circuit as the first scan signal S1, the second scan signal S2, and the third scan signal S3. This is beneficial for realizing a narrow bezel on the display panel including the pixel circuit of this embodiment.
[0084] Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, for reference. Figure 6 Optionally, the setting voltage writing unit 121 is also used to respond to the writing control signal Ctrl1 and, in the first initialization phase t3, transmit the initialization voltage input at the setting voltage input terminal VIN to the first input terminal A1; the cut-off control unit 122 is also used to, in the first initialization phase t3, connect the first input terminal A1 and the anode to transmit the initialization voltage to the anode of the light-emitting device 140; wherein, the first initialization phase t3 is performed before the setting voltage writing phase t4.
[0085] contrast Figure 6 and Figure 4 As can be seen from the pixel circuit shown, Figure 6 The pixel circuit shown does not include Figure 4 The first initialization unit 115 in the middle. Figure 6 In the pixel circuit shown, during the first initialization phase t3, an initialization voltage is written to the first input terminal A1 and the anode connection line 130 via the setting voltage writing unit 121. That is, for Figure 6 The pixel circuit shown needs to ensure that the voltage input at the set voltage input terminal VIN is variable.
[0086] Figure 7 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, for reference. Figure 6 and Figure 7 , Figure 6 The operation of the pixel circuit shown includes a second initialization stage t1, a data writing stage t2, a first initialization stage t3, a setting voltage writing stage t4, and a light emission stage t5.
[0087] in, Figure 6 The operation of the pixel circuit shown in the second initialization stage t1, data writing stage t2, setting voltage writing stage t4, and light emission stage t5 are respectively related to... Figure 4 The pixel circuit shown operates in the same way during the second initialization stage t1, data writing stage t2, setting voltage writing stage t4, and light emission stage t5, and will not be described again here.
[0088] Continue to refer to Figure 6 and Figure 7 In the first initialization phase t3, when the write control signal Ctrl1 is low, the first transistor T1 transmits the initialization voltage Vref to the first input terminal A1 and the anode connection line 130; when the cut-off control signal Ctrl2 is low, the second transistor T2 is turned on and transmits the initialization voltage Vref to the anode of the light-emitting device 140, thereby initializing the light-emitting device 140.
[0089] refer to Figure 7 In the first initialization phase, the voltage input to the voltage input terminal is set to the initialization voltage Vref; in other phases, the voltage input to the voltage input terminal is set to the set voltage V1.
[0090] The pixel circuit of this embodiment can reduce the number of transistors in the pixel circuit, thereby reducing the topological area of the pixel circuit and improving pixel density.
[0091] It should be noted that, for Figure 5 and Figure 7The timing diagram shown illustrates an example where the first initialization phase t3 and the second initialization phase t1 are two different phases. In other optional embodiments of the present invention, the first initialization phase t3 and the second initialization phase t1 can overlap, that is, both the first initialization phase t3 and the second initialization phase t1 occur before the data writing phase t2.
[0092] Figure 8 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, for reference. Figure 8 Optionally, the drive current output module 110 further includes a first light-emitting control unit 113 and a second light-emitting control unit 117. The first light-emitting control unit 113 is connected between the first power supply voltage input terminal VDD and the first terminal of the drive unit 112, and the second light-emitting control unit 117 is connected between the second terminal of the drive unit 112 and the output terminal of the drive current output module 110. Optionally, the second light-emitting control unit 117 includes an eighth transistor T8.
[0093] In this system, the control terminal of the first light-emitting control unit 113 is connected to the light-emitting control signal EM. The first terminal of the first light-emitting control unit 113 is connected to the first power supply voltage input terminal VDD, and the second terminal of the first light-emitting control unit 113 is connected to the first terminal of the driving unit 112. The first light-emitting control unit 113 controls the connection state between the first power supply voltage input terminal VDD and the first terminal of the driving unit 112 according to the light-emitting control signal EM. The control terminal of the second light-emitting control unit 117 is connected to the light-emitting control signal EM. The first terminal of the second light-emitting control unit 117 is connected to the second terminal of the driving unit 112, and the second terminal of the second light-emitting control unit 117 serves as the output terminal of the drive current output module 110, connected to the first input terminal A1 of the setting voltage writing module 120. During the data writing stage t2, the light-emitting control signal EM is an invalid level signal, and both the first light-emitting control unit 113 and the second light-emitting control unit 117 are turned off. During the light-emitting stage t5, the light-emitting control signal EM is an active level signal, and both the first light-emitting control unit 113 and the second light-emitting control unit 117 are turned on. During the setting voltage writing stage t4, the light-emitting control signal EM can be either an active or invalid level signal.
[0094] Compared to Figure 4 The pixel circuit shown Figure 8The driving current output module 110 of the pixel circuit shown also includes a second light-emitting control unit 117, which can control the connection state between the second terminal of the driving unit 112 and the anode connection line 130. Because the second light-emitting control unit 117 is turned off during the data writing phase t2, the connection between the driving unit 112 and the anode connection line 130 can be severed. This ensures that during the data writing phase t2, the speed at which the data voltage is written to the driving unit 112 is not affected by the capacitance formed by the anode connection line 130 and other conductive structures, thus guaranteeing a good display effect.
[0095] Figure 9 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention. This driving timing can be used to drive... Figure 8 The pixel circuit shown is still based on Figure 8 Taking an example where all transistors are P-type transistors. (Reference) Figure 8 and Figure 9 The operation of the pixel circuit includes a second initialization stage t1, a data writing stage t2, a first initialization stage t3, a setting voltage writing stage t4, and a light emission stage t5.
[0096] In the second initialization phase t1, the first scan signal S1 is at a low level, the seventh transistor T7 is turned on, and the initialization voltage is transmitted to the gate of the driving transistor DT to initialize the gate of the driving transistor DT.
[0097] During the data writing phase t2, the second scan signal S2 is low, and the third transistor T3 and the fifth transistor T5 are turned on. The data voltage is written to the gate of the driving transistor DT through the third transistor T3, the driving transistor DT, and the fifth transistor T5. During data writing phase t2, the threshold voltage of the driving transistor DT is compensated by the fifth transistor T5. Also during data writing phase t2, the light emission control signal EM is high, and the first light emission control unit 113 and the second light emission control unit 117 are turned off. This disconnects the second electrode of the driving transistor DT from the output terminal of the driving current output module 110. The output terminal of the driving current output module 110 is connected to the anode connection line 130. Therefore, turning off the second light emission control unit 117 disconnects the second electrode of the driving transistor DT from the anode connection line 130. This ensures that the speed at which the data voltage is written to the driving unit 112 during data writing phase t2 is not affected by the capacitance formed by the anode connection line 130 and other conductive structures, guaranteeing a good display effect.
[0098] During the first initialization phase t3, the third scan signal S3 is at a low level, the sixth transistor T6 is turned on, and the initialization voltage is transmitted to the output terminal of the drive current output module 110. Also, during the first initialization phase t3, the cut-off control signal Ctrl2 is at a low level, the second transistor T2 is turned on, and the initialization voltage is transmitted to the anode of the light-emitting device 140 through the sixth transistor T6 and the second transistor T2, thereby initializing the anode of the light-emitting device 140.
[0099] During the voltage setting writing phase t4, the write control signal Ctrl1 is low and the cut-off control signal Ctrl2 is high, thus turning on the first transistor T1 and turning off the second transistor T2. The first transistor T1 is written to the anode connection line 130 and the first input terminal A1 of the voltage setting writing module 120. The first transistor T1 is a switching transistor, ensuring that the anode connection line 130 and the first input terminal A1 of the voltage setting writing module 120 reach the set voltage within the short time corresponding to the voltage setting writing phase t4.
[0100] During the light-emitting phase t5, the light-emitting control signal EM is low, and the fourth transistor T4 is turned on. The cut-off control signal Ctrl2 is low, turning on the second transistor T2, which drives the transistor DT to generate a driving current that is transmitted to the anode of the light-emitting device 140. Because the set voltage is greater than the initial voltage, during the light-emitting phase t5, the anode connection line 130 and the anode point can reach the anode point voltage corresponding to the target grayscale in a relatively short time, thus helping to improve the unevenness of the display.
[0101] Among them, for Figure 8 The pixel circuit shown can maintain a constant set voltage input at the set voltage input terminal VIN within one frame.
[0102] Combination Figure 9 The timing and pixel circuit operation process shown can be achieved by writing the control signal Ctrl1, which can be provided by the same scan drive circuit as the first scan signal S1, the second scan signal S2, and the third scan signal S3. This is beneficial for realizing a narrow bezel on the display panel including the pixel circuit of this embodiment.
[0103] Figure 10 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, for reference. Figure 10Optionally, the setting voltage writing unit 121 is also used to respond to the writing control signal Ctrl1 and, in the first initialization phase t3, transmit the initialization voltage input at the setting voltage input terminal VIN to the first input terminal A1, wherein the initialization voltage is equal to the initialization voltage; the cut-off control unit 122 is also used to, in the first initialization phase t3, connect the first input terminal A1 and the anode to transmit the initialization voltage to the anode of the light-emitting device 140; wherein the first initialization phase t3 is performed before the setting voltage writing phase t4.
[0104] contrast Figure 10 and Figure 8 As can be seen from the pixel circuit shown, Figure 10 The pixel circuit shown does not include Figure 8 The first initialization unit 115 in the middle. Figure 10 In the pixel circuit shown, during the first initialization phase t3, an initialization voltage is written to the first input terminal A1 and the anode connection line 130 via the setting voltage writing unit 121. That is, for Figure 10 The pixel circuit shown needs to ensure that the voltage input at the set voltage input terminal VIN is variable.
[0105] Figure 11 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, for reference. Figure 10 and Figure 11 , Figure 10 The operation of the pixel circuit shown includes a second initialization stage t1, a data writing stage t2, a first initialization stage t3, a setting voltage writing stage t4, and a light emission stage t5.
[0106] in, Figure 10 The operation of the pixel circuit shown in the second initialization stage t1, data writing stage t2, setting voltage writing stage t4, and light emission stage t5 are respectively related to... Figure 8 The pixel circuit shown operates in the same way during the second initialization stage t1, data writing stage t2, setting voltage writing stage t4, and light emission stage t5, and will not be described again here.
[0107] Continue to refer to Figure 10 and Figure 11 In the first initialization phase t3, when the write control signal Ctrl1 is low, the first transistor T1 transmits the initialization voltage Vref to the first input terminal A1 and the anode connection line 130; when the cut-off control signal Ctrl2 is low, the second transistor T2 is turned on and transmits the initialization voltage Vref to the anode of the light-emitting device 140, thereby initializing the light-emitting device 140.
[0108] The pixel circuit of this embodiment can reduce the number of transistors in the pixel circuit, thereby reducing the topological area of the pixel circuit and improving pixel density.
[0109] It should be noted that, for Figure 9 and Figure 11 The timing diagram shown illustrates an example where the first initialization phase t3 and the second initialization phase t1 are two different phases. In another optional embodiment of the invention, the first initialization phase t3 and the second initialization phase t1 can overlap, that is, both the first initialization phase t3 and the second initialization phase t1 occur before the data writing phase t2. Therefore, for... Figure 8 For the pixel circuit shown, the control terminal of the first initialization unit 115 is connected to the first scan signal S1; for Figure 10 In the pixel circuit shown, the first low-level pulse of the write voltage control signal coincides with the low-level pulse of the first scan signal S1, and the initial voltage input period of the set voltage input terminal VIN coincides with the low-level pulse of the first scan signal S1.
[0110] In other optional embodiments of the present invention, the first initialization phase t3 may coincide with the data writing phase t2, then for Figure 9 The pixel circuit shown has its control terminal of the first initialization unit 115 connected to the second scan signal S2; for Figure 10 For the pixel circuit shown, the first low-level pulse of the write voltage control signal coincides with the low-level pulse of the second scan signal S2, and the initial voltage input period of the set voltage input terminal VIN coincides with the low-level pulse of the second scan signal S2.
[0111] It should be noted that, for Figure 8 and Figure 10 For the pixel circuit shown, both the cut-off control signal Ctrl2 and the light emission control signal EM can be provided by the same light emission control driver circuit. For example, the cut-off control signal Ctrl2 connected to the pixel circuit can be the light emission control signal EM connected to the pixel circuits in the next n rows after the row where the pixel circuit is located, where n is an integer greater than or equal to 1.
[0112] Based on the above technical solution, optionally, the light emission stage and the set voltage writing stage are continuous.
[0113] In this embodiment, the light-emitting stage and the set voltage writing stage are adjacent, and therefore continuous. In the above embodiment, "adjacent to the light-emitting stage and the set voltage writing stage" means that the level of the control signals for each module of the pixel circuit does not change after the end of the set voltage writing stage and before the start of the light-emitting stage. Figure 4Taking the pixel circuit shown as an example, after the voltage setting writing stage is completed and before the light emission stage, the write control signal Ctrl1 remains at an invalid level, the first scan signal S1, the second scan signal S2, and the third scan signal S3 all remain at invalid levels, the cut-off control signal Ctrl2 also remains at an invalid level, and the light emission control signal EM remains at either an active or inactive level. The light emission stage is continuous with the voltage setting writing stage, meaning the completion time of the voltage setting writing stage coincides with the start time of the light emission stage. This continuity avoids potential display unevenness caused by the already written voltage on the anode connection line being charged and discharged to other voltage values during the time interval between the two stages, if the light emission control signal is active.
[0114] Continue to refer to Figure 4 , Figure 6 , Figure 8 and Figure 10 The drive current output module 120 also includes a storage capacitor Cst to store and maintain the potential of the control terminal of the drive unit 112.
[0115] The present invention also provides an array substrate, including the pixel circuit of any of the above embodiments of the present invention, and possesses the beneficial effects of the pixel circuit of any of the above embodiments of the present invention.
[0116] Figure 12 This is a cross-sectional structural diagram of an array substrate provided in an embodiment of the present invention, for reference. Figure 12 Optionally, the array substrate includes a substrate 210, a driving circuit layer 220 disposed on one side of the substrate 210, and an anode layer 230 on the side of the driving circuit layer 220 away from the substrate 210. The anode layer 230 includes anodes 231 of a plurality of light-emitting devices. The pixel circuit is located in the driving circuit layer 220. The setting voltage writing module includes a setting voltage writing unit and a cut-off control unit 122.
[0117] In one pixel circuit, the orthographic projection of the anode 231 of the light-emitting device onto the substrate 210 covers the orthographic projection of the cutoff control unit 122 onto the substrate 210.
[0118] Specifically, the cut-off control unit of the setting voltage writing module is connected to the anode 231 of the light-emitting device. Therefore, for the pixel circuit of the light-emitting device driving the light-transmitting display area, the cut-off control unit is set in the light-transmitting display area, and the setting voltage writing unit can be set together with the driving current output module in the non-light-transmitting display area. Figure 12Taking the cut-off control unit, which includes the second transistor T2 in the above embodiment, as an example, this embodiment illustrates that the orthographic projection of the anode 231 of the light-emitting device driven by the pixel circuit onto the substrate 210 covers the orthographic projection of the cut-off control unit onto the substrate 210. This ensures that the placement of the cut-off control unit in the light-transmitting display area does not affect the diffraction effect and transmittance of the light-transmitting display area. Figure 12 The diagram schematically illustrates a display panel structure in which the cutoff control unit 122 is connected to the anode 231 via the connection structure 240. Optionally, the orthographic projection of the anode 231 onto the substrate 210 overlaps the projection of the connection structure 240 onto the substrate 210 to ensure the light transmittance of the light-transmitting display area.
[0119] Based on the above technical solution, optionally, the driving circuit layer 220 includes a first light-transmitting signal line layer 221; the anode connection line 130 is disposed on the first light-transmitting signal line layer 221.
[0120] Specifically, the anode connection line 130 is made of a light-transmitting and conductive material. For example, the light-transmitting and conductive material can be indium tin oxide, so that when the anode connection line 130 extends to the light-transmitting display area AA1, it will not affect the light transmittance of the light-transmitting display area AA1.
[0121] Continue to refer to Figure 12 Optionally, the driving circuit layer 220 may also include a second light-transmitting signal line layer 222; the cut-off control signal line 2221 connected to the control terminal of the cut-off control unit is a light-transmitting signal line and is disposed on the second light-transmitting signal line layer 222, wherein the second light-transmitting signal line layer 222 is located on the side of the first light-transmitting signal line layer 221 close to the substrate 210.
[0122] Specifically, since the cut-off control unit is located in the light-transmitting display area AA1, the cut-off control unit includes a switching transistor. Figure 12Taking the cut-off control unit, which includes the second transistor T2 in the above embodiment, as an example, the cut-off control signal line 2221 also needs to extend from the non-transparent display area AA2 to the transparent display area AA1. Therefore, setting the cut-off control signal line 2221 as a transparent signal line will not affect the light transmittance of the transparent display area AA1. Similarly, the cut-off control signal line 2221 is made of a transparent conductive material. For example, the transparent conductive material can be indium tin oxide. The gate of the second transistor T2 serves as the control terminal of the cut-off control unit. The cut-off control signal line 2221 is connected to the control terminal of the cut-off control unit, meaning that the cut-off control signal line 2221 needs to be connected to the gate of the second transistor T2. The anode signal line 231 is connected to the first electrode of the second transistor T2. The first electrode of the second transistor T2 can be the source or the drain. Since the source and drain are located on the metal layer away from the substrate 210, the second light-transmitting signal line layer 222 (including the cut-off control signal line 2221) is located on the side of the first light-transmitting signal line layer 221 (including the anode connection line 130) closer to the substrate 210, which makes it easier for the cut-off control unit to connect to the anode connection line 130 and the cut-off control signal line 2221 respectively.
[0123] This invention also provides a display panel, which includes the array substrate provided in any of the above embodiments of this invention. Figure 13 This is a schematic diagram of the overall structure of a display panel provided in an embodiment of the present invention, for reference. Figure 13 The display panel 10 includes a light-transmitting display area AA1 and a non-light-transmitting display area AA2. The non-light-transmitting display area AA2 includes a transition area AA21 connected to the light-transmitting display area AA1. Both the light-transmitting display area AA1 and the non-light-transmitting display area AA2 are provided with multiple light-emitting devices. In the pixel circuit used to drive the light-emitting devices in the light-transmitting display area AA1, the driving current output module is located in the transition area AA21. The output terminal of the driving current output module is connected to the cut-off control unit 122 through the anode connection line 130. The cut-off control unit 122 is located in the light-transmitting display area AA1.
[0124] Specifically, the cut-off control unit 122 is located in the light-transmitting display area AA1, which makes the connection line between the cut-off control unit 122 and the light-emitting device short, thereby making the anode capacitance smaller and making it easier for the anode point to rise to the anode point voltage corresponding to the target gray level within one frame.
[0125] Optionally, the anode connection line 130 includes a light-transmitting signal line, thereby ensuring the light transmittance of the light-transmitting display area.
[0126] Specifically, the pixel circuit in the above embodiments of the present invention can be used to drive the light-emitting device in the light-transmitting display area AA1. For the light-emitting device in the non-light-transmitting display area AA2, conventional pixel circuits in the prior art can be used directly for driving, such as conventional 7T1C pixel circuits.
[0127] The display panel of this invention has light-emitting devices in the light-transmitting display area driven by the pixel circuit of any of the above embodiments of this invention, and has the corresponding beneficial effects of the pixel circuit of any of the above embodiments of this invention, which will not be described again here.
[0128] Optionally, when the voltage writing unit is connected to the light-emitting device through a connection structure in the pixel circuit of the light-emitting device used to drive the transparent display area of the display panel, the orthogonal projection area of the connection structure on the substrate in each pixel circuit is equal, so as to reduce the difference in the charging speed of the anode and improve the display uniformity.
[0129] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.
Claims
1. A pixel circuit, characterized in that, The application relates to a pixel circuit, which comprises: a driving current output module and a set voltage writing module; the driving current output module is electrically connected with a first input end of the set voltage writing module through an anode connecting line, the driving current output module is used for generating driving current according to input data voltage and outputting the driving current to the first input end; a second input end of the set voltage writing module is connected with a set voltage input end of the pixel circuit, an output end of the set voltage writing module is connected with an anode of a light-emitting device, the set voltage writing module is used for cutting off the connection between the first input end and the anode in a set voltage writing stage, and writing the set voltage input from the set voltage input end into the first input end, the set voltage is greater than an initialization voltage for initializing the anode; and used for turning on the connection between the first input end and the anode in a light-emitting stage, and cutting off the connection between the second input end and the first input end; wherein the set voltage writing stage is carried out before the light-emitting stage and adjacent to the light-emitting stage; the set voltage writing module comprises a set voltage writing unit and a cutting-off control unit; wherein the set voltage writing unit comprises a control end, a first end and a second end, the control end of the set voltage writing unit is connected with a writing control signal line and receives a writing control signal from the writing control signal line; the first end of the set voltage writing unit is connected with the second input end, and the second end of the set voltage writing unit is connected with the first input end; the cutting-off control unit comprises a control end, a first end and a second end, the control end of the cutting-off control unit is connected with a cutting-off control signal line and receives a cutting-off control signal from the cutting-off control signal line; the first end of the cutting-off control unit is connected with the first input end, and the second end of the cutting-off control unit is connected with the output end of the set voltage writing module; the set voltage writing unit is used for transmitting the set voltage to the first input end in the set voltage writing stage in response to the writing control signal transmitted by the writing control signal line; the cutting-off control unit is used for cutting off the connection between the first input end and the anode of the light-emitting device in the set voltage writing stage in response to the cutting-off control signal transmitted by the cutting-off control signal line, and turning on the connection between the first input end and the anode of the light-emitting device in the light-emitting stage.
2. The pixel circuit of claim 1, wherein, the set voltage writing unit comprises a first transistor, the gate of the first transistor is connected with the writing control signal, the first pole of the first transistor is connected with the second input end, and the second pole of the first transistor is connected with the first input end; the cutting-off control unit comprises a second transistor, the gate of the second transistor is connected with the cutting-off control signal, the first pole of the second transistor is connected with the first input end, and the second pole of the second transistor is connected with the anode of the light-emitting device.
3. The pixel circuit of claim 1, wherein, the set voltage writing unit is also used for transmitting an initialization voltage input from the set voltage input end to the first input end in a first initialization stage in response to the writing control signal; The cutting control unit is also configured to, in the first initialization stage, connect the first input end and the anode to each other to transmit the initialization voltage to the anode of the light emitting device. The first initialization stage is performed before the set voltage writing stage.
4. The pixel circuit of claim 1, wherein An output end of the set voltage writing module is directly connected or connected to the anode of the light emitting device through a connection structure, and an area of the connection structure is less than an area of the anode connection line.
5. The pixel circuit of claim 1, wherein, The driving current output module further comprises a first initialization unit configured to write an initialization voltage to a first input end of the set voltage writing module in a first initialization stage, and the set voltage writing module is further configured to transmit the initialization voltage of the first input end to the anode of the light emitting device in the first initialization stage; wherein the first initialization stage is performed before the set voltage writing stage.
6. The pixel circuit according to any one of claims 1 to 5, characterized in that, The driving current output module comprises a data voltage writing unit and a driving unit, the data voltage writing unit is configured to write the data voltage to a control end of the driving unit in a data writing stage, and the driving unit is configured to generate a driving current according to the voltage of the control end.
7. The pixel circuit of claim 6, wherein, The driving current output module further comprises a first light emitting control unit connected between a first power voltage input end and a first end of the driving unit, and a second end of the driving unit serves as an output end of the driving current output module. Alternatively, the driving current output module further comprises a first light emitting control unit and a second light emitting control unit, the first light emitting control unit is connected between a first power voltage input end and a first end of the driving unit, and the second light emitting control unit is connected between a second end of the driving unit and an output end of the driving current output module.
8. The pixel circuit of claim 6, wherein, The driving current output module further comprises a compensation unit configured to compensate a threshold voltage of a driving transistor included in the driving unit in the data writing stage.
9. The pixel circuit of claim 6, wherein, The driving current output module further comprises a second initialization unit configured to write an initialization voltage to a control end of the driving unit in a second initialization stage, wherein the second initialization stage is performed before the data writing stage.
10. The pixel circuit of claim 1, wherein, The pressure difference between the set voltage and a cathode voltage accessed by the cathode of the light emitting device is greater than or equal to a turn-on voltage for the light emitting device to emit light.
11. The pixel circuit of claim 10, wherein, The set voltage is less than or equal to an anode point voltage corresponding to a set gray scale, and when a display panel comprising a pixel circuit without the set voltage writing module displays a display screen of the set gray scale and a display screen of a gray scale below the set gray scale, a gray scale value of the display screen exceeds a display non-uniformity threshold.
12. An array substrate, characterized by, The pixel circuit of any one of claims 1-11; the array substrate further comprises a substrate, a driving circuit layer disposed on one side of the substrate, and an anode layer away from the substrate on one side of the driving circuit layer, the anode layer comprising a plurality of anodes of the light emitting devices, the pixel circuit being located on the driving circuit layer; the set voltage writing module comprises a set voltage writing unit and a shutoff control unit; In one of the pixel circuits, the orthographic projection of the anode of the light emitting device on the substrate covers the orthographic projection of the shutoff control unit on the substrate.
13. The array substrate of claim 12, wherein, The driving circuit layer comprises a first light-transmissive signal line layer, and the anode connection line is disposed on the first light-transmissive signal line layer.
14. The array substrate of claim 13, wherein, The driving circuit layer further comprises a second light-transmissive signal line layer, and the shutoff control signal line comprises a light-transmissive signal line disposed on the second light-transmissive signal line layer, wherein the second light-transmissive signal line layer is located on the side of the first light-transmissive signal line layer close to the substrate.
15. A display panel, characterized by The array substrate of any one of claims 12-14; the display panel comprises a light-transmissive display area and a non-light-transmissive display area, the non-light-transmissive display area comprising a transition area connected to the light-transmissive display area; the light-transmissive display area and the non-light-transmissive display area are both provided with a plurality of light emitting devices; In the pixel circuit for driving the light emitting devices in the light-transmissive display area, the driving current output module is disposed in the transition area, and the output end of the driving current output module is connected to the shutoff control unit through the anode connection line; the shutoff control unit is located in the light-transmissive display area.
16. The display panel of claim 15, wherein, The anode connection line comprises a light-transmissive signal line.
Citation Information
Patent Citations
Pixel circuit, display panel and display device
CN112037716A