Power converter and its control method

By monitoring the current in the upper and lower bridge circuits of the power converter, and using a weighting adjustment circuit and a pulse width modulation controller to generate a stable control current, the problem of severe output fluctuations in traditional power converters is solved, achieving higher output stability and lower circuit complexity.

CN116667635BActive Publication Date: 2026-06-30RICHTEK TECH

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
RICHTEK TECH
Filing Date
2022-07-07
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

Traditional power converters suffer from excessively wide input potential variations, resulting in drastic output potential fluctuations and insufficient output stability.

Method used

The input potential is monitored by an upper bridge circuit and a lower bridge circuit respectively. The current is detected by a current sensor. A weight adjustment circuit and a pulse width modulation controller are combined to generate a stable control current to adjust the pulse width and achieve stable output potential.

Benefits of technology

Shortening transient response time suppresses distortion, reduces circuit complexity, and improves output stability.

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Abstract

A power converter and its control method are disclosed, wherein the power converter includes: an upper bridge circuit, a lower bridge circuit, an inductor, a first current sensor, a second current sensor, a weighting adjustment circuit, and a pulse width modulation (PWM) controller. The upper bridge circuit receives an input potential. The lower bridge circuit is coupled to a ground node. The upper and lower bridge circuits are operable according to a PWM potential. The inductor is coupled to the upper and lower bridge circuits. The first current sensor monitors the upper bridge circuit to generate a first detection current. The second current sensor monitors the lower bridge circuit to generate a second detection current. The weighting adjustment circuit generates a control current based on the first and second detection currents. The PWM controller generates a PWM potential based on the control current.
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Description

Technical Field

[0001] This invention relates to a power converter, and more particularly to a power converter that can improve output stability. Background Technology

[0002] In traditional power converters, the wide range of input potential variations easily leads to drastic fluctuations in the output potential, resulting in insufficient output stability. Therefore, a novel solution is necessary to overcome the limitations of existing technologies. Summary of the Invention

[0003] In a preferred embodiment, the present invention provides a power converter comprising: an upper bridge circuit receiving an input potential; a lower bridge circuit coupled to a ground node, wherein both the upper bridge circuit and the lower bridge circuit operate according to a pulse width modulation (PWM) potential; an inductor coupled to the upper bridge circuit and the lower bridge circuit, wherein the inductor is used to output an output potential; a first current sensor monitoring the upper bridge circuit to generate a first detection current; a second current sensor monitoring the lower bridge circuit to generate a second detection current; a weighting adjustment circuit generating a control current based on the first detection current and the second detection current; and a PWM controller generating the PWM potential based on the control current.

[0004] In some embodiments, the bridge circuit includes: a first transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the first transistor is used to receive the pulse width modulation potential, the first terminal of the first transistor is coupled to an input node to receive the input potential, and the second terminal of the first transistor is coupled to a common node.

[0005] In some embodiments, the downbridge circuit includes: a second transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is used to receive the pulse width modulation potential, the first terminal of the second transistor is coupled to the ground node, and the second terminal of the second transistor is coupled to the common node.

[0006] In some embodiments, the inductor has a first terminal and a second terminal, the first terminal of the inductor being coupled to the common node, and the second terminal of the inductor being coupled to an output node to output the output potential.

[0007] In some embodiments, the control current is a linear combination of the first detection current and the second detection current.

[0008] In some embodiments, the control current is described according to the following equation:

[0009] IN = IA × X + IB × Y

[0010] Where “IN” represents the control current, “IA” represents the first detection current, “IB” represents the second detection current, “X” represents a first weighting parameter, and “Y” represents a second weighting parameter.

[0011] In some embodiments, the sum of the first weight parameter and the second weight parameter is equal to 1.

[0012] In some embodiments, the control current is a nonlinear combination of the first detection current and the second detection current.

[0013] In some embodiments, the weighting adjustment circuit includes: a transconductance amplifier having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the transconductance amplifier is used to receive the input potential, the negative input terminal of the transconductance amplifier is used to receive K times the output potential, and the output terminal of the transconductance amplifier is used to output a differential current.

[0014] In some embodiments, the weight adjustment circuit further includes: a first current subtractor that subtracts the difference current from the second detected current to generate a first adjustment current.

[0015] In some embodiments, the weight adjustment circuit further includes: a second current subtractor that subtracts the first adjustment current from the first detected current to generate a second adjustment current.

[0016] In some embodiments, the weighting adjustment circuit further includes a current adder that adds the first adjustment current to the second adjustment current to generate the control current.

[0017] In another preferred embodiment, the present invention provides a control method comprising the following steps: providing an upper bridge circuit, a lower bridge circuit, and an inductor, wherein the inductor is coupled to the upper bridge circuit and the lower bridge circuit, both the upper bridge circuit and the lower bridge circuit operating according to a pulse width modulation (PWM) potential, the upper bridge circuit receiving an input potential, and the inductor outputting an output potential; monitoring the upper bridge circuit to generate a first detection current; monitoring the lower bridge circuit to generate a second detection current; generating a control current based on the first detection current and the second detection current; and generating the PWM potential based on the control current.

[0018] In some embodiments, the control method further includes generating a differential current by means of a transconductance amplifier based on the input potential and K times the output potential.

[0019] In some embodiments, the control method further includes: subtracting the difference current from the second detection current to generate a first adjustment current; and subtracting the first adjustment current from the first detection current to generate a second adjustment current.

[0020] In some embodiments, the control method further includes: adding the first adjustment current to the second adjustment current to generate the control current.

[0021] This invention proposes a novel power converter and its control method. Compared with traditional designs, this invention has advantages such as shortening transient response time, suppressing distortion, reducing circuit complexity, and improving overall output stability, making it well-suited for application in various electronic devices. Attached Figure Description

[0022] Figure 1 This is a schematic diagram showing a power converter according to an embodiment of the present invention.

[0023] Figure 2 This is a circuit diagram showing a power converter according to an embodiment of the present invention.

[0024] Figure 3 It is a potential waveform diagram showing the input potential of the power converter according to an embodiment of the present invention.

[0025] Figure 4 This is a potential waveform diagram showing the output potential of the power converter according to an embodiment of the present invention.

[0026] Figure 5 This is a flowchart illustrating a control method for a power converter according to an embodiment of the present invention.

[0027] Attached icon number

[0028] 100, 200: Power converter

[0029] 110, 210: Upper bridge circuit

[0030] 120, 220: Lower bridge circuit

[0031] 130, 230: Inductors

[0032] 140, 240: First current sensor

[0033] 150, 250: Second current sensor

[0034] 160, 260: Weighting adjustment circuit

[0035] 170, 270: Pulse Width Modulation Controller

[0036] 262: Transconductance Amplifier

[0037] 264: First Current Subtractor

[0038] 266: Second Current Subtractor

[0039] 268: Current Adder

[0040] CC1: First Curve

[0041] CC2: Second Curve

[0042] Gm: Transduction value of the transconductance amplifier

[0043] IA: First Detection Current

[0044] IB: Second Detection Current

[0045] IE: Differential Current

[0046] ID1: First Adjustment Current

[0047] ID2: Second Adjustment Current

[0048] IN: Control current

[0049] K·VOUT: K times the output potential

[0050] M1: First transistor

[0051] M2: Second transistor

[0052] NC: Common Node

[0053] NSS: Grounding Node

[0054] S510, S520, S530, S540, S550: Steps

[0055] VIN: Input potential

[0056] VM: Pulse Width Modulation Potential

[0057] VOUT: Output potential Detailed Implementation

[0058] To make the objectives, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below in conjunction with the accompanying drawings for detailed explanation.

[0059] Certain terms are used in this specification and the claims to refer to specific elements. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same element. This specification and the claims do not distinguish elements by differences in name, but by differences in function. The terms "comprising" and "including" used throughout this specification and the claims are open-ended terms and should be interpreted as "comprising but not limited to". The term "generally" means that within an acceptable margin of error, those skilled in the art can solve the technical problem and achieve the basic technical effect within a certain margin of error. Furthermore, the term "coupled" in this specification includes any direct and indirect electrical connection means. Therefore, if a first device is described as coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device via other devices or connection means.

[0060] Figure 1 This is a schematic diagram showing a power converter 100 according to an embodiment of the present invention. For example, the power converter 100 can be applied to a mobile device or an automotive chip, but is not limited thereto. Figure 1 In one embodiment, the power converter 100 includes: an upper-gate circuit 110, a lower-gate circuit 120, an inductor 130, a first current sensor 140, a second current sensor 150, a weight adjustment circuit 160, and a pulse width modulation controller (PWM controller) 170. It must be understood that, although not shown in… Figure 1 However, the pulse width modulation controller 100 may also include other components, such as a processor, a power supply module, or a driving circuit.

[0061] The upper bridge circuit 110 can receive an input potential VIN. For example, the input potential VIN can have a wide input range. The lower bridge circuit 120 is coupled to a ground node NSS, where the ground node NSS can provide a ground potential. Both the upper bridge circuit 110 and the lower bridge circuit 120 can operate according to a pulse width modulation (PWM) potential VM. An inductor 130 is coupled to both the upper bridge circuit 110 and the lower bridge circuit 120, whereby the inductor 130 can also be used to output an output potential VOUT. A first current sensor 140 can be used to monitor the state of the upper bridge circuit 110 to generate a first detection current IA. A second current sensor 150 can be used to monitor the state of the lower bridge circuit 120 to generate a second detection current IB. The weighting adjustment circuit 160 can generate a control current IN according to the first detection current IA and the second detection current IB. The PWM controller 170 can generate the aforementioned PWM potential VM according to the control current IN. Under the design of this invention, the relevant operational information of the upper bridge circuit 110 and the lower bridge circuit 120 can be obtained by analyzing the first detection current IA and the second detection current IB, respectively. Furthermore, the weighting adjustment circuit 160 can reduce the fluctuation of the control current IN by appropriately integrating the first detection current IA and the second detection current IB. Based on actual measurement results, the proposed power converter 100 helps to shorten its transient response time, suppress its distortion, and improve overall output stability.

[0062] The following embodiments will describe the detailed structure and operating principle of the power converter 100. It must be understood that these figures and descriptions are merely illustrative and not intended to limit the scope of the invention.

[0063] Figure 2 This is a circuit diagram showing a power converter 200 according to an embodiment of the present invention. Figure 2 In one embodiment, the power converter 200 has an input node NIN and an output node NOUT, and includes: an upper bridge circuit 210, a lower bridge circuit 220, an inductor 230, a first current sensor 240, a second current sensor 250, a weight adjustment circuit 260, and a pulse width modulation controller 270, wherein the input node NIN of the power converter 200 can be used to receive an input potential VIN, and the output node NOUT of the power converter 200 can be used to output an output potential VOUT.

[0064] The bridge circuit 210 includes a first transistor M1. For example, the first transistor M1 may be a P-type metal-oxide-semiconductor field-effect transistor (PMOSFET). Specifically, the first transistor M1 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain). The control terminal of the first transistor M1 is used to directly or indirectly receive a pulse width modulation (PWM) potential VM. The first terminal of the first transistor M1 is coupled to the input node NIN, and the second terminal of the first transistor M1 is coupled to a common node NC. In some embodiments, if the PWM potential VM is a high logic level (or logic "1"), the first transistor M1 will be disabled; conversely, if the PWM potential VM is a low logic level (or logic "0"), the first transistor M1 will be enabled. It should be noted that the present invention is not limited thereto. In some other embodiments, the first transistor M1 may also be implemented by another N-type metal-oxide-semiconductor field-effect transistor (NMOSFET).

[0065] The lower bridge circuit 220 includes a second transistor M2. For example, the second transistor M2 may be an N-type metal-oxide-semiconductor field-effect transistor. Specifically, the second transistor M2 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the second transistor M2 is used to directly or indirectly receive a pulse width modulation (PWM) potential VM, the first terminal of the second transistor M2 is coupled to a ground node NSS, and the second terminal of the second transistor M2 is coupled to a common node NC. In some embodiments, if the PWM potential VM is at a high logic level, the second transistor M2 will be enabled; conversely, if the PWM potential VM is at a low logic level, the second transistor M2 will be disabled.

[0066] Inductor 230 has a first terminal and a second terminal, wherein the first terminal of inductor 230 is coupled to a common node NC, and the second terminal of inductor 230 is coupled to an output node NOUT.

[0067] The first current sensor 240 can be used to monitor the state of the upper bridge circuit 210 to generate a first detection current IA. For example, if the current through the first transistor M1 increases, the first detection current IA can increase; conversely, if the current through the first transistor M1 decreases, the first detection current IA can decrease. In some embodiments, the first detection current IA can be approximately proportional to the current through the first transistor M1, but it is not limited to this.

[0068] The second current sensor 250 can be used to monitor the state of the lower bridge circuit 220 to generate a second detection current IB. For example, if the current through the second transistor M2 increases, the second detection current IB can increase; conversely, if the current through the second transistor M2 decreases, the second detection current IB can decrease. In some embodiments, the second detection current IB can be approximately proportional to the current through the second transistor M2, but it is not limited to this.

[0069] The weighting adjustment circuit 260 can generate a control current IN based on the first detection current IA and the second detection current IB. For example, the control current IN can be a linear combination of the first detection current IA and the second detection current IB. In some embodiments, the control current IN can be as described by the following equation (1):

[0070] IN=IA×X+IB×Y…………………………(1)

[0071] Where “IN” can represent the control current IN, “IA” can represent the first detection current IA, “IB” can represent the second detection current IB, “X” represents a first weighting parameter, and “Y” represents a second weighting parameter.

[0072] In some embodiments, the aforementioned first weighting parameter X and second weighting parameter Y are both positive numbers, and their sum can be exactly equal to 1 (i.e., X + Y = 1). For example, the first weighting parameter X can be set to 30%, and the second weighting parameter Y can be set to 70%. Alternatively, the first weighting parameter X can be set to 50%, and the second weighting parameter Y can be set to 50%. However, the present invention is not limited to these. In other embodiments, the control current IN can also be replaced by a nonlinear combination of the first detection current IA and the second detection current IB.

[0073] In some embodiments, the weighting adjustment circuit 260 includes a transconductance amplifier 262, a first current subtractor 264, a second current subtractor 266, and a current adder 268.

[0074] The transconductance amplifier 262 has a positive input terminal, a negative input terminal, and an output terminal. The positive input terminal of the transconductance amplifier 262 can receive an input potential VIN, the negative input terminal of the transconductance amplifier 262 can receive a K times output potential VOUT (i.e., K·VOUT), and the output terminal of the transconductance amplifier 262 can output a differential current IE.

[0075] The first current subtractor 264 subtracts the difference current IE from the second sense current IB to generate a first adjustment current ID1. It is important to note that the first current subtractor 264 does not produce any negative output value; if the difference current IE is greater than the second sense current IB, the first current subtractor 264 can force the first adjustment current ID1 to be 0.

[0076] The second current subtractor 266 can subtract the first adjustment current ID1 from the first detection current IA to generate a second adjustment current ID2. It should be noted that the second current subtractor 266 will not generate any negative output value. If the first adjustment current ID1 is greater than the first detection current IA, the second current subtractor 266 can force the second adjustment current ID2 to be set to 0.

[0077] The current adder 268 can add the first adjustment current ID1 to the second adjustment current ID2 to generate the control current IN. In some embodiments, the overall operating principle of the weight adjustment circuit 260 can be described by the following equations (2) to (5):

[0078] IE=(VIN-K×VOUT)×Gm……………………(2)

[0079] ID1=IB-IE……………………(3)

[0080] ID2=IA-ID1…………………………(4)

[0081] IN=ID1+ID2…………………………(5)

[0082] Where “IE” represents the differential current IE, “VIN” represents the input potential VIN, “K” represents any positive number, “VOUT” represents the output potential VOUT, “Gm” represents a transconductance value of the transconductance amplifier 262, “ID1” represents the first adjustment current ID1, “ID2” represents the second adjustment current ID2, “IN” represents the control current IN, “IA” represents the first detection current IA, and “IB” represents the second detection current IB.

[0083] The pulse width modulation controller 270 generates the aforementioned pulse width modulation potential VM based on the control current IN. Since the weighting adjustment circuit 160 appropriately integrates the first detection current IA and the second detection current IB, the fluctuation of the control current IN is significantly reduced, and the stability of the pulse width modulation potential VM is effectively improved. Ultimately, even if the output potential VIN changes, the power converter 200 can still provide an output potential VOUT with high output stability.

[0084] Figure 3 This is a potential waveform diagram showing the input potential VIN of the power converter 200 according to an embodiment of the present invention, where the horizontal axis represents time and the vertical axis represents voltage level. Figure 3 As shown, the potential level of the input potential VIN may change for various reasons. For example, the input potential VIN may gradually increase. However, the invention is not limited to this. In other embodiments, the input potential VIN may also gradually decrease.

[0085] Figure 4 This is a potential waveform diagram showing the output potential VOUT of the power converter 200 according to an embodiment of the present invention, where the horizontal axis represents time and the vertical axis represents the potential level. Figure 4 As shown, a first curve CC1 can represent the characteristics of the output potential VOUT of a conventional power converter, while a second curve CC2 can represent the characteristics of the output potential VOUT of the proposed power converter 200. According to... Figure 4 Measurement results show that when the input potential VIN changes, the output potential VOUT of a conventional power converter fluctuates drastically. However, the output potential VOUT of the proposed power converter 200 can still maintain a relatively stable potential level. Therefore, the design of this invention can provide better output stability than conventional designs.

[0086] Figure 5This is a flowchart illustrating a control method for a power converter according to an embodiment of the present invention. The aforementioned control method includes the following steps. In step S510, an upper bridge circuit, a lower bridge circuit, and an inductor are provided, wherein the inductor is coupled to the upper bridge circuit and the lower bridge circuit. Both the upper bridge circuit and the lower bridge circuit operate according to a pulse width modulation (PWM) potential. The upper bridge circuit receives an input potential, and the inductor outputs an output potential. In step S520, the upper bridge circuit is monitored to generate a first detection current. In step S530, the lower bridge circuit is monitored to generate a second detection current. In step S540, a control current is generated based on the first detection current and the second detection current. In step S550, a PWM potential is generated based on the control current. It must be understood that the above steps do not need to be performed sequentially, but... Figures 1-4 Each feature of the embodiments can be applied to Figure 5 Among the control methods.

[0087] This invention proposes a novel power converter and its control method. Compared with traditional designs, this invention has advantages such as shortening transient response time, suppressing distortion, reducing circuit complexity, and improving overall output stability, making it well-suited for application in various electronic devices.

[0088] It is worth noting that the potential, current, resistance, inductance, capacitance, and other component parameters mentioned above are not limiting conditions of this invention. Designers can adjust these settings according to different needs. The power converter and its control method of this invention are not limited to... Figures 1-5 The state illustrated. This invention may include only the first... Figures 1-5 Any one or more features of any one or more embodiments. In other words, not all illustrated features need to be implemented simultaneously in the power converter and control method of the present invention. Although embodiments of the present invention use metal-oxide-semiconductor field-effect transistors as examples, the present invention is not limited thereto. Those skilled in the art can use other types of transistors, such as junction field-effect transistors or fin field-effect transistors, without affecting the effects of the present invention.

[0089] The method, or a specific form or part thereof, of the present invention may exist in the form of code. The code may be contained in physical media, such as floppy disks, optical discs, hard disks, or any other machine-readable (e.g., computer-readable) storage media, or may be a computer program product, not limited to an external form, wherein when the code is loaded and executed by a machine, such as a computer, that machine becomes an apparatus for participating in the present invention. The code may also be transmitted via some transmission medium, such as wires or cables, optical fibers, or any transmission method, wherein when the code is received, loaded, and executed by a machine, such as a computer, that machine becomes an apparatus for participating in the present invention. When implemented in a general-purpose processing unit, the code, combined with the processing unit, provides a unique apparatus that operates similarly to application-specific logic circuitry.

[0090] The ordinal numbers in this specification and the scope of the claims, such as "first", "first", "third", etc., are not sequential in any way; they are only used to distinguish two different elements with the same name.

[0091] While the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the scope of the invention. Any person skilled in the art can make some modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the appended claims.

Claims

1. A power converter, characterized in that, include: An upper bridge circuit receives an input potential; A lower bridge circuit is coupled to a ground node, wherein both the upper bridge circuit and the lower bridge circuit operate according to a pulse width modulation potential. An inductor is coupled to the upper bridge circuit and the lower bridge circuit, wherein the inductor is used to output an output potential; A first current sensor monitors the upper bridge circuit to generate a first detection current; A second current sensor monitors the lower bridge circuit to generate a second detection current; A weighting adjustment circuit generates a control current based on the first detected current and the second detected current; as well as A pulse width modulation controller generates the pulse width modulation potential based on the control current; The weight adjustment circuit includes: A transconductance amplifier has a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the transconductance amplifier is used to receive the input potential, the negative input terminal of the transconductance amplifier is used to receive K times the output potential, and the output terminal of the transconductance amplifier is used to output a differential current. as well as A first current subtractor subtracts the difference current from the second detected current to generate a first adjustment current.

2. The power converter as described in claim 1, characterized in that, The bridge circuit includes: A first transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the first transistor is used to receive the pulse width modulation potential, the first terminal of the first transistor is coupled to an input node to receive the input potential, and the second terminal of the first transistor is coupled to a common node.

3. The power converter as described in claim 2, characterized in that, The lower bridge circuit includes: A second transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the second transistor is used to receive the pulse width modulation potential, the first terminal of the second transistor is coupled to the ground node, and the second terminal of the second transistor is coupled to the common node.

4. The power converter as described in claim 2, characterized in that, The inductor has a first terminal and a second terminal, the first terminal of the inductor being coupled to the common node, and the second terminal of the inductor being coupled to an output node to output the output potential.

5. The power converter as described in claim 1, characterized in that, The control current is a linear combination of the first detection current and the second detection current.

6. The power converter as described in claim 1, characterized in that, The control current is described by the following equation: Where "IN" represents the control current, "IA" represents the first detection current, "IB" represents the second detection current, "X" represents a first weighting parameter, and "Y" represents a second weighting parameter.

7. The power converter as described in claim 6, characterized in that, The sum of the first weight parameter and the second weight parameter equals 1.

8. The power converter as claimed in claim 1, characterized in that, The control current is a nonlinear combination of the first detection current and the second detection current.

9. The power converter as claimed in claim 1, characterized in that, The weight adjustment circuit further includes: A second current subtractor subtracts the first adjustment current from the first detected current to generate a second adjustment current.

10. The power converter as claimed in claim 9, characterized in that, The weight adjustment circuit further includes: A current adder adds the first adjustment current to the second adjustment current to generate the control current.

11. A control method, characterized in that, Includes the following steps: An upper bridge circuit, a lower bridge circuit, and an inductor are provided, wherein the inductor is coupled to the upper bridge circuit and the lower bridge circuit, both of which operate according to a pulse width modulation potential, the upper bridge circuit receiving an input potential, and the inductor outputting an output potential. Monitor the bridge circuit to generate a first detection current; Monitor the lower bridge circuit to generate a second detection current; A control current is generated based on the first detection current and the second detection current; The pulse width modulation potential is generated based on the control current; A differential current is generated by using a transconductance amplifier based on the input potential and K times the output potential; The difference current is subtracted from the second detection current to generate a first adjustment current; as well as The first detection current is subtracted from the first adjustment current to generate a second adjustment current.

12. The control method as described in claim 11, characterized in that, The control current is a linear combination of the first detection current and the second detection current.

13. The control method as described in claim 11, characterized in that, The control current is described by the following equation: Where "IN" represents the control current, "IA" represents the first detection current, "IB" represents the second detection current, "X" represents a first weighting parameter, and "Y" represents a second weighting parameter.

14. The control method as described in claim 13, characterized in that, The sum of the first weight parameter and the second weight parameter equals 1.

15. The control method as described in claim 11, characterized in that, The control current is a nonlinear combination of the first detection current and the second detection current.

16. The control method as described in claim 11, characterized in that, Including: The first adjusting current is combined with the second adjusting current to generate the control current.